CN111209675A - Simulation method and device of power electronic device, terminal equipment and storage medium - Google Patents
Simulation method and device of power electronic device, terminal equipment and storage medium Download PDFInfo
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Abstract
The invention discloses a simulation method, a simulation device, terminal equipment and a storage medium of a power electronic device, wherein the simulation method comprises the following steps: constructing a parameterized three-dimensional model of the power electronic device to be simulated; performing simulation calculation on preset sample points by adopting a parameterized three-dimensional model to obtain a full-freedom solution under each sample point; taking the full-freedom solution under the sample point as a sample space of the full-freedom solution of the parameter to be simulated; the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, and the parameter types of the parameters to be simulated and the sample points are in one-to-one correspondence; constructing a low-dimensional rigidity matrix for simulation calculation in a parameterized three-dimensional model based on a sample space; the parameters to be simulated are input into the low-dimensional rigidity matrix to obtain the simulation result of the power electronic device to be simulated, so that the analysis efficiency of the simulation of the power electronic device can be effectively improved, and the calculation complexity is greatly reduced.
Description
Technical Field
The present invention relates to the field of power electronic device simulation technologies, and in particular, to a method and an apparatus for simulating a power electronic device, a terminal device, and a storage medium.
Background
As the voltage class of power systems increases, so does the performance requirements for the electrical equipment within the system. Converter valves are a very important piece of equipment in high voltage converter stations, while power electronic switching devices are components of valves. The switching device can generate through-flow loss and switching loss when passing large current and in the switching-on and switching-off process, and the energy loss can be transferred into heat to be dissipated in time, otherwise, the running temperature of the valve is too high and aging is caused, or the device is damaged due to too high local temperature. Therefore, the heat and heat dissipation characteristics of the power electronic device are deeply researched, the material structure parameters of the power electronic device or the module are reasonably designed, and the heat exchange station is ensured to operate safely, reliably and stably. However, when the finite element method is used for thermal analysis, the efficiency is low because the power electronic devices are small in size, interfaces of each layer are multiple, and after a calculation model formed by a module consisting of a plurality of power electronic devices is subjected to mesh subdivision, the calculation amount is large.
Disclosure of Invention
The embodiment of the invention provides a simulation method and device of a power electronic device, terminal equipment and a storage medium, which can effectively improve the analysis efficiency of the simulation of the power electronic device and greatly reduce the computational complexity.
An embodiment of the present invention provides a simulation method for a power electronic device, including:
constructing a parameterized three-dimensional model of the power electronic device to be simulated;
performing simulation calculation on preset sample points by using the parameterized three-dimensional model to obtain a full-freedom solution under each sample point;
taking the full-freedom solution under the sample point as a sample space of the full-freedom solution of the parameter to be simulated; the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, and the parameter types of the parameters to be simulated and the sample points are in one-to-one correspondence;
constructing a low-dimensional rigidity matrix for simulation calculation in the parameterized three-dimensional model based on the sample space;
and inputting the parameters to be simulated into the low-dimensional rigidity matrix to obtain a simulation result of the power electronic device to be simulated.
As an improvement of the above scheme, the building of the parameterized three-dimensional model of the power electronic device to be simulated specifically includes:
constructing a geometric model of the power electronic device to be simulated;
extracting the structural position parameters of the geometric model and the corresponding material parameters thereof;
and constructing a parameterized three-dimensional model corresponding to the geometric model according to the structural position parameters and the material parameters.
As an improvement of the above scheme, the building a parameterized three-dimensional model of the power electronic device to be simulated further includes:
setting material parameters corresponding to the structural position parameters of the geometric components in the geometric model;
determining a thermal load by adopting a preset energy loss model, and compiling working condition information;
determining solving setting parameters;
and carrying out parametric modeling on the geometric model according to the structure position parameter, the material parameter, the working condition information and the solving setting parameter to obtain the parametric three-dimensional model.
As an improvement of the above scheme, the constructing a low-dimensional stiffness matrix for simulation calculation in the parameterized three-dimensional model based on the sample space specifically includes:
the low dimensional stiffness matrix is determined by the following formula, which is as follows:
UTk(x)Uα=UTq
α is an interpolation coefficient, U is a solution of the full degree of freedom at the sample point, k (x) is an overall stiffness matrix, q is a loading matrix, and U is a solution space formed by the solution of the full degree of freedom at the sample point.
Another embodiment of the present invention correspondingly provides a simulation apparatus for a power electronic device, including:
the parameterized three-dimensional model building module is used for building a parameterized three-dimensional model of the power electronic device to be simulated;
the sample point simulation module is used for carrying out simulation calculation on preset sample points by adopting the parameterized three-dimensional model to obtain a full-freedom solution under each sample point;
the sample space selection module is used for taking the full-freedom solution under the sample points as a sample space of the full-freedom solution of the parameters to be simulated; the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, and the parameter types of the parameters to be simulated and the sample points are in one-to-one correspondence;
the low-dimensional rigidity matrix construction module is used for constructing a low-dimensional rigidity matrix for simulation calculation in the parameterized three-dimensional model based on the sample space;
and the power electronic device simulation module is used for inputting the parameters to be simulated into the low-dimensional rigidity matrix to obtain a simulation result of the power electronic device to be simulated.
As an improvement of the above scheme, the parameterized three-dimensional model building module comprises a geometric model unit, a parameter extraction unit and a first modeling unit;
the geometric model unit is used for constructing a geometric model of the power electronic device to be simulated;
the parameter extraction unit is used for extracting the structure position parameters of the geometric model and the corresponding material parameters;
and the first parameterized three-dimensional model unit is used for constructing a parameterized three-dimensional model corresponding to the geometric model according to the structure position parameter and the material parameter.
As an improvement of the above scheme, the parameterized three-dimensional model building module further comprises a material parameter setting unit, a working condition information compiling unit, a solving setting parameter determining unit and a second modeling unit;
the material parameter setting unit is used for setting material parameters corresponding to the structural position parameters of the geometric components in the geometric model;
the working condition information compiling unit is used for determining the heat load by adopting a preset energy loss model and compiling the working condition information;
the solving setting parameter determining unit is used for determining solving setting parameters;
and the second modeling unit is used for carrying out parametric modeling on the geometric model according to the structure position parameter, the material parameter, the working condition information and the solving setting parameter to obtain the parametric three-dimensional model.
As an improvement of the above scheme, the low-dimensional stiffness matrix building module includes a low-dimensional stiffness matrix determining unit;
the low-dimensional rigidity matrix determining unit is used for determining the low-dimensional rigidity matrix by the following formula, wherein the specific formula is as follows:
UTk(x)Uα=UTq
α is an interpolation coefficient, U is a solution of the full degree of freedom at the sample point, k (x) is an overall stiffness matrix, q is a loading matrix, and U is a solution space formed by the solution of the full degree of freedom at the sample point.
Compared with the prior art, the simulation method and the simulation device of the power electronic device disclosed by the embodiment of the invention have the advantages that the parameterized three-dimensional model of the power electronic device to be simulated is constructed, the parameterized three-dimensional model is further adopted to carry out simulation calculation on the preset sample points to obtain the full-freedom solution under each sample point, the full-freedom solution under each sample point is further taken as the sample space of the full-freedom solution of the parameter to be simulated, wherein the sample points and the parameter to be simulated are one or two of the structure position parameter and the material parameter of the parameterized three-dimensional model, the parameter types of the parameter to be simulated and the sample points are in one-to-one correspondence, the low-dimensional rigidity matrix used for simulation calculation in the parameterized three-dimensional model is further constructed based on the sample space, and the parameter to be simulated is input into the low-dimensional rigidity matrix, and then, carrying out simulation solving by adopting a low-dimensional rigidity matrix, greatly reducing the dimension and the calculated amount of the equation set to be solved, further effectively improving the efficiency of simulation calculation, further effectively improving the analysis efficiency of the simulation of the power electronic device by reducing the complexity of the simulation calculation, and reducing the requirements on computer hardware.
Another embodiment of the present invention provides a simulation terminal device of a power electronic device, which includes a processor, a memory, and a computer program stored in the memory and configured to be executed by the processor, and when the processor executes the computer program, the processor implements the simulation method of the power electronic device according to the above embodiment of the present invention.
Another embodiment of the present invention provides a storage medium, where the computer-readable storage medium includes a stored computer program, where when the computer program runs, an apparatus where the computer-readable storage medium is located is controlled to execute the simulation method of the power electronic device according to the above-described embodiment of the present invention.
Drawings
Fig. 1 is a schematic flow chart of a simulation method of a power electronic device according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a power electronic device according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a module composed of power electronic devices according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of a parameterized three-dimensional model of a power electronic device provided in accordance with an embodiment of the invention;
fig. 5 is a schematic structural diagram of a simulation apparatus for a power electronic device according to a second embodiment of the present invention;
fig. 6 is a schematic structural diagram of a simulation terminal device of a power electronic device according to a third embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example one
Referring to fig. 1, a schematic flow chart of a simulation method of a power electronic device according to an embodiment of the present invention is shown, where the method includes steps S101 to S105.
S101, constructing a parameterized three-dimensional model of the power electronic device to be simulated.
For example, referring to fig. 2, a schematic structural diagram of a power electronic device according to a first embodiment of the present invention is shown, and taking a large-capacity power electronic device as an example, the power electronic device includes, in order from top to bottom, a semiconductor device (such as a diode and an IGBT), a DCB board, a substrate, and a heat sink, and a solder layer is provided between each two layers, and the materials of the solder layers are different. In addition, the DCB board is composed of three layers of upper and lower copper layers and a middle ceramic. Further, referring to fig. 3, a schematic diagram of a module structure composed of power electronic devices according to an embodiment of the present invention is provided, since a power electronic device module is usually packaged by a plurality of devices, heat transfer between the devices may affect each other, and in order to evaluate the overall heat dissipation condition in conformity with the structure of an actual device, a model of an entirety composed of a plurality of devices is usually established.
Preferably, step S101 specifically includes:
constructing a geometric model of the power electronic device to be simulated;
extracting the structural position parameters of the geometric model and the corresponding material parameters thereof;
and constructing a parameterized three-dimensional model corresponding to the geometric model according to the structural position parameters and the material parameters.
Preferably, step S101 further includes:
setting material parameters corresponding to the structural position parameters of the geometric components in the geometric model;
determining a thermal load by adopting a preset energy loss model, and compiling working condition information;
determining solving setting parameters;
and carrying out parametric modeling on the geometric model according to the structure position parameter, the material parameter, the working condition information and the solving setting parameter to obtain the parametric three-dimensional model.
Before the temperature field simulation calculation, the key structural parameters required by the modeling of the power electronic device are determined, where the key structural parameters may include, but are not limited to, structural position parameters, material parameters, working condition information, and solution setting parameters. Specifically, a geometric model of a multilayer structure of a power electronic device is established. Meanwhile, corresponding material parameters are set for different geometric components, heat load is determined through energy loss calculation, working condition information is compiled, solution setting is set according to preset temperature field analysis software, and a convection heat transfer coefficient or a forced boundary temperature is set.
In this embodiment, referring to fig. 4, the parameterized three-dimensional model of the power electronic device provided in an embodiment of the present invention is a schematic diagram, where the parameterized three-dimensional model for simulation calculation is composed of a structure and a material, and the model includes structure position parameters and material parameters of each component of the power electronic device, where the structure position parameters are specifically x-direction structure parameters, y-direction structure parameters, and z-direction structure parameters, or length parameters, width parameters, and height parameters. Illustratively, the structure data can be managed by inputting a table, and when a proper model is established, a three-dimensional model can be formed only by inputting corresponding structure position parameters. In addition, each layer structure corresponds to a corresponding material parameter, i.e. a material property, wherein for the calculation of the temperature field, the material property is preferably the thermal conductivity of the material, the power parameter of the heat sink, etc. Thus, material parameters of the corresponding structure are given in the model. Further, after the structure position parameters and the material parameter table are input, a parameterized three-dimensional model of the power electronic device is obtained in response to a model generation instruction. Meanwhile, a module composed of power electronic devices as shown in fig. 3 can be formed in a splicing manner, so that the whole simulation calculation is conveniently carried out.
S102, performing simulation calculation on preset sample points by adopting the parameterized three-dimensional model to obtain a full-freedom-degree solution under each sample point.
S103, taking the full-freedom solution under the sample point as a sample space of the full-freedom solution of the parameter to be simulated; the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, and the parameter types of the parameters to be simulated and the sample points are in one-to-one correspondence.
And S104, constructing a low-dimensional rigidity matrix for simulation calculation in the parameterized three-dimensional model based on the sample space.
Preferably, step S104 specifically includes:
the low dimensional stiffness matrix is determined by the following formula, which is as follows:
UTk(x)Uα=UTq
α is an interpolation coefficient, U is a solution of the full degree of freedom at the sample point, k (x) is an overall stiffness matrix, q is a loading matrix, and U is a solution space formed by the solution of the full degree of freedom at the sample point.
And S105, inputting the parameters to be simulated into the low-dimensional rigidity matrix to obtain a simulation result of the power electronic device to be simulated.
Note that the sample space is W ═ span { u ═1,u2,…,unSubstituting the parameter U into a high-dimensional rigidity matrix k (x) for solving by the original simulation model, and multiplying the two sides of the high-dimensional rigidity matrix by the U at the same timeTTo obtain UTk(x)Uα=UTIn the embodiment, the dimension and the calculated amount of an equation set to be solved in the solving process can be effectively reduced by replacing the low-dimensional stiffness matrix with the high-dimensional stiffness matrix for simulation calculation in the parameterized three-dimensional model so as to realize rapid simulation calculation, and further, an interpolation system is obtained by calculating the low-dimensional stiffness matrix, so that equation solutions u about α and { u } are solved1,u2,…,unAnd finally obtaining a high-precision numerical solution under the arbitrarily input parameters to be simulated.
In a preferred embodiment, when the sample points and the parameters to be simulated are material parameters, the material parameters are sampled in step length in advance, and the parameterized three-dimensional model is adopted to perform simulation calculation on the sample points corresponding to the material parameters, so as to obtain a full-freedom solution of the model at each sample point. Further, the obtained full-freedom solution under the sample point is used as a sample space of the full-freedom solution of the material parameter to be simulated, and a low-dimensional rigidity matrix for simulation calculation is constructed through the sample space. And (4) calculating a low-dimensional equation set to obtain an interpolation system through rapid calculation, so that an equation solution is obtained, and finally a high-precision numerical solution under any material parameter to be simulated is obtained.
In a preferred embodiment, when the sample points and the parameters to be simulated are structural position parameters, the length, width and height parameters in the structural position parameters are sampled in step length in advance, and the parameterized three-dimensional model is adopted to perform simulation calculation on the sample points corresponding to the structural position parameters, so as to obtain a full-freedom solution of the model under each sample point. Further, the obtained full-freedom solution under the sample points is used as a sample space of the full-freedom solution of the position parameters of the structure to be simulated, and a low-dimensional rigidity matrix for simulation calculation is constructed through the sample space. And (4) calculating a low-dimensional equation set to obtain an interpolation system through rapid calculation, so that an equation solution is obtained, and finally a high-precision numerical solution under any position parameter of the structure to be simulated is obtained.
In another preferred embodiment, when the sample points and the parameters to be simulated are structural position parameters, the length, width and height parameters of the material parameters and the structural position parameters are sampled in advance and simultaneously, and the parameterized three-dimensional model is adopted to perform simulation calculation on the sample points corresponding to the parameters, so as to obtain a full-freedom solution of the model at each sample point. Further, the obtained full-freedom solution under the sample points is used as a sample space of the full-freedom solution of the parameters to be simulated, and a low-dimensional rigidity matrix for simulation calculation is constructed through the sample space. And (4) calculating a low-dimensional equation set to obtain an interpolation system through rapid calculation, so that an equation solution is obtained, and finally a high-precision numerical solution under any parameter to be simulated is obtained.
The simulation method of the power electronic device provided by the embodiment of the invention comprises the steps of constructing a parameterized three-dimensional model of the power electronic device to be simulated, further adopting the parameterized three-dimensional model to perform simulation calculation on preset sample points to obtain a full-freedom solution under each sample point, further using the full-freedom solution under the sample points as a sample space of the full-freedom solution of parameters to be simulated, wherein the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, the parameters to be simulated and the parameter types of the sample points correspond to each other one by one, further constructing a low-dimensional rigidity matrix for simulation calculation in the parameterized three-dimensional model based on the sample space, further inputting the parameters to be simulated into the low-dimensional rigidity matrix to obtain a simulation result of the power electronic device to be simulated, therefore, the calculation amount and complexity of modeling can be effectively reduced and the modeling efficiency can be effectively improved by constructing the parameterized three-dimensional model, and then the simulation solution is carried out by adopting the low-dimensional rigidity matrix, so that the dimension and the calculation amount of the equation set to be solved are greatly reduced, and the efficiency of the simulation calculation can be effectively improved, thereby effectively improving the simulation analysis efficiency of the power electronic device and reducing the requirements on computer hardware by reducing the complexity of the simulation calculation.
Example two
Referring to fig. 5, a schematic structural diagram of a simulation apparatus for a power electronic device according to a second embodiment of the present invention is shown, including:
a parameterized three-dimensional model building module 201, configured to build a parameterized three-dimensional model of the power electronic device to be simulated;
a sample point simulation module 202, configured to perform simulation calculation on preset sample points by using the parameterized three-dimensional model, so as to obtain a full-freedom solution under each sample point;
a sample space selecting module 203, configured to use the full-freedom solution at the sample point as a sample space of a full-freedom solution of the parameter to be simulated; the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, and the parameter types of the parameters to be simulated and the sample points are in one-to-one correspondence;
a low-dimensional stiffness matrix constructing module 204, configured to construct a low-dimensional stiffness matrix for simulation calculation in the parameterized three-dimensional model based on the sample space;
and the power electronic device simulation module 205 is configured to input the to-be-simulated parameters into the low-dimensional stiffness matrix to obtain a simulation result of the to-be-simulated power electronic device.
Preferably, the parameterized three-dimensional model building module 201 includes a geometric model unit, a parameter extraction unit, and a first modeling unit;
the geometric model unit is used for constructing a geometric model of the power electronic device to be simulated;
the parameter extraction unit is used for extracting the structure position parameters of the geometric model and the corresponding material parameters;
and the first parameterized three-dimensional model unit is used for constructing a parameterized three-dimensional model corresponding to the geometric model according to the structure position parameter and the material parameter.
Preferably, the parameterized three-dimensional model building module 201 further includes a material parameter setting unit, a working condition information compiling unit, a solution setting parameter determining unit, and a second modeling unit;
the material parameter setting unit is used for setting material parameters corresponding to the structural position parameters of the geometric components in the geometric model;
the working condition information compiling unit is used for determining the heat load by adopting a preset energy loss model and compiling the working condition information;
the solving setting parameter determining unit is used for determining solving setting parameters;
and the second modeling unit is used for carrying out parametric modeling on the geometric model according to the structure position parameter, the material parameter, the working condition information and the solving setting parameter to obtain the parametric three-dimensional model.
Preferably, the low-dimensional stiffness matrix constructing module 204 includes a low-dimensional stiffness matrix determining unit;
the low-dimensional rigidity matrix determining unit is used for determining the low-dimensional rigidity matrix by the following formula, wherein the specific formula is as follows:
UTk(x)Uα=UTq
α is an interpolation coefficient, U is a solution of the full degree of freedom at the sample point, k (x) is an overall stiffness matrix, q is a loading matrix, and U is a solution space formed by the solution of the full degree of freedom at the sample point.
The simulation device of the power electronic device provided by the embodiment of the invention is characterized in that a parameterized three-dimensional model of the power electronic device to be simulated is constructed, a preset sample point is subjected to simulation calculation by adopting the parameterized three-dimensional model to obtain a full-freedom solution under each sample point, the full-freedom solution under the sample point is further taken as a sample space of the full-freedom solution of a parameter to be simulated, wherein the sample point and the parameter to be simulated are one or two of a structure position parameter and a material parameter of the parameterized three-dimensional model, the parameter to be simulated and the parameter types of the sample point correspond to each other one by one, a low-dimensional rigidity matrix used for simulation calculation in the parameterized three-dimensional model is constructed based on the sample space, so that the parameter to be simulated is input into the low-dimensional rigidity matrix to obtain a simulation result of the power electronic device to be simulated, therefore, the calculation amount and complexity of modeling can be effectively reduced and the modeling efficiency can be effectively improved by constructing the parameterized three-dimensional model, and then the simulation solution is carried out by adopting the low-dimensional rigidity matrix, so that the dimension and the calculation amount of the equation set to be solved are greatly reduced, and the efficiency of the simulation calculation can be effectively improved, thereby effectively improving the simulation analysis efficiency of the power electronic device and reducing the requirements on computer hardware by reducing the complexity of the simulation calculation.
EXAMPLE III
Fig. 6 is a schematic structural diagram of simulation terminal equipment of a power electronic device according to a third embodiment of the present invention. The simulation terminal device of the power electronic device of the embodiment includes: a processor 301, a memory 302 and a computer program, such as a simulation program of a power electronic device, stored in said memory 302 and executable on said processor 301. The processor 301 implements the steps in the above-described embodiments of the simulation method for each power electronic device when executing the computer program. Alternatively, the processor 301 implements the functions of the modules/units in the above device embodiments when executing the computer program.
Illustratively, the computer program may be partitioned into one or more modules/units that are stored in the memory and executed by the processor 301 to implement the present invention. The one or more modules/units may be a series of computer program instruction segments capable of performing specific functions, which are used to describe the execution process of the computer program in the simulation terminal device of the power electronic device.
The simulation terminal device of the power electronic device can be a desktop computer, a notebook computer, a palm computer, a cloud server and other computing devices. The simulation terminal equipment of the power electronic device can comprise, but is not limited to, a processor and a memory. It will be understood by those skilled in the art that the schematic diagram is merely an example of an emulated terminal device of a power electronic device and does not constitute a limitation of an emulated terminal device of a power electronic device, and may comprise more or fewer components than shown, or some components in combination, or different components, e.g. the emulated terminal device of a power electronic device may further comprise input-output devices, network access devices, buses, etc.
The Processor may be a Central Processing Unit (CPU), other general purpose Processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), an off-the-shelf Programmable Gate Array (FPGA) or other Programmable logic device, discrete Gate or transistor logic, discrete hardware components, etc. The general purpose processor may be a microprocessor or the processor may be any conventional processor or the like, said processor being the control center of the emulation terminal equipment of said power electronics, the various parts of the emulation terminal equipment of the whole power electronics being connected by means of various interfaces and lines.
The memory may be used to store the computer programs and/or modules, and the processor may implement the various functions of the emulation terminal device of the power electronics device by running or executing the computer programs and/or modules stored in the memory and calling the data stored in the memory. The memory may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required by at least one function (such as a sound playing function, an image playing function, etc.), and the like; the storage data area may store data (such as audio data, a phonebook, etc.) created according to the use of the cellular phone, and the like. In addition, the memory may include high speed random access memory, and may also include non-volatile memory, such as a hard disk, a memory, a plug-in hard disk, a Smart Media Card (SMC), a Secure Digital (SD) Card, a Flash memory Card (Flash Card), at least one magnetic disk storage device, a Flash memory device, or other volatile solid state storage device.
Wherein, the module/unit integrated by the simulation terminal device of the power electronic device can be stored in a computer readable storage medium if the module/unit is realized in the form of a software functional unit and sold or used as an independent product. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like. It should be noted that the computer readable medium may contain content that is subject to appropriate increase or decrease as required by legislation and patent practice in jurisdictions, for example, in some jurisdictions, computer readable media does not include electrical carrier signals and telecommunications signals as is required by legislation and patent practice.
It should be noted that the above-described device embodiments are merely illustrative, where the units described as separate parts may or may not be physically separate, and the parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. In addition, in the drawings of the embodiment of the apparatus provided by the present invention, the connection relationship between the modules indicates that there is a communication connection between them, and may be specifically implemented as one or more communication buses or signal lines. One of ordinary skill in the art can understand and implement it without inventive effort.
While the foregoing is directed to the preferred embodiment of the present invention, it will be understood by those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the invention.
Claims (10)
1. A simulation method of a power electronic device, comprising:
constructing a parameterized three-dimensional model of the power electronic device to be simulated;
performing simulation calculation on preset sample points by using the parameterized three-dimensional model to obtain a full-freedom solution under each sample point;
taking the full-freedom solution under the sample point as a sample space of the full-freedom solution of the parameter to be simulated; the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, and the parameter types of the parameters to be simulated and the sample points are in one-to-one correspondence;
constructing a low-dimensional rigidity matrix for simulation calculation in the parameterized three-dimensional model based on the sample space;
and inputting the parameters to be simulated into the low-dimensional rigidity matrix to obtain a simulation result of the power electronic device to be simulated.
2. The method for simulating a power electronic device according to claim 1, wherein the building of the parameterized three-dimensional model of the power electronic device to be simulated specifically comprises:
constructing a geometric model of the power electronic device to be simulated;
extracting the structural position parameters of the geometric model and the corresponding material parameters thereof;
and constructing a parameterized three-dimensional model corresponding to the geometric model according to the structural position parameters and the material parameters.
3. A method of simulating a power electronic device according to claim 2, wherein said building a parameterized three-dimensional model of the power electronic device to be simulated further comprises:
setting material parameters corresponding to the structural position parameters of the geometric components in the geometric model;
determining a thermal load by adopting a preset energy loss model, and compiling working condition information;
determining solving setting parameters;
and carrying out parametric modeling on the geometric model according to the structure position parameter, the material parameter, the working condition information and the solving setting parameter to obtain the parametric three-dimensional model.
4. The method for simulating a power electronic device according to claim 1, wherein the constructing of the low-dimensional stiffness matrix for simulation calculation in the parameterized three-dimensional model based on the sample space specifically comprises:
the low dimensional stiffness matrix is determined by the following formula, which is as follows:
UTk(x)Uα=UTq
α is an interpolation coefficient, U is a solution of the full degree of freedom at the sample point, k (x) is an overall stiffness matrix, q is a loading matrix, and U is a solution space formed by the solution of the full degree of freedom at the sample point.
5. An apparatus for simulating a power electronic device, comprising:
the parameterized three-dimensional model building module is used for building a parameterized three-dimensional model of the power electronic device to be simulated;
the sample point simulation module is used for carrying out simulation calculation on preset sample points by adopting the parameterized three-dimensional model to obtain a full-freedom solution under each sample point;
the sample space selection module is used for taking the full-freedom solution under the sample points as a sample space of the full-freedom solution of the parameters to be simulated; the sample points and the parameters to be simulated are one or two of structure position parameters and material parameters of the parameterized three-dimensional model, and the parameter types of the parameters to be simulated and the sample points are in one-to-one correspondence;
the low-dimensional rigidity matrix construction module is used for constructing a low-dimensional rigidity matrix for simulation calculation in the parameterized three-dimensional model based on the sample space;
and the power electronic device simulation module is used for inputting the parameters to be simulated into the low-dimensional rigidity matrix to obtain a simulation result of the power electronic device to be simulated.
6. A simulation apparatus of a power electronic device according to claim 5, wherein the parameterized three-dimensional model construction module comprises a geometric model unit, a parameter extraction unit and a first modeling unit;
the geometric model unit is used for constructing a geometric model of the power electronic device to be simulated;
the parameter extraction unit is used for extracting the structure position parameters of the geometric model and the corresponding material parameters;
and the first parameterized three-dimensional model unit is used for constructing a parameterized three-dimensional model corresponding to the geometric model according to the structure position parameter and the material parameter.
7. The simulation apparatus of a power electronic device according to claim 6, wherein the parameterized three-dimensional model building block further comprises a material parameter setting unit, a working condition information compiling unit, a solution setting parameter determining unit and a second modeling unit;
the material parameter setting unit is used for setting material parameters corresponding to the structural position parameters of the geometric components in the geometric model;
the working condition information compiling unit is used for determining the heat load by adopting a preset energy loss model and compiling the working condition information;
the solving setting parameter determining unit is used for determining solving setting parameters;
and the second modeling unit is used for carrying out parametric modeling on the geometric model according to the structure position parameter, the material parameter, the working condition information and the solving setting parameter to obtain the parametric three-dimensional model.
8. The power electronic device simulation apparatus according to claim 5, wherein the low-dimensional stiffness matrix building block includes a low-dimensional stiffness matrix determination unit;
the low-dimensional rigidity matrix determining unit is used for determining the low-dimensional rigidity matrix by the following formula, wherein the specific formula is as follows:
UTk(x)Uα=UTq
α is an interpolation coefficient, U is a solution of the full degree of freedom at the sample point, k (x) is an overall stiffness matrix, q is a loading matrix, and U is a solution space formed by the solution of the full degree of freedom at the sample point.
9. Simulation terminal device of a power electronic device, comprising a processor, a memory and a computer program stored in the memory and configured to be executed by the processor, the processor implementing a simulation method of a power electronic device according to any of claims 1 to 4 when executing the computer program.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium comprises a stored computer program, wherein the computer program, when running, controls an apparatus in which the computer-readable storage medium is located to perform the method of simulating a power electronic device according to any one of claims 1 to 4.
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112052611A (en) * | 2020-08-24 | 2020-12-08 | 南方电网科学研究院有限责任公司 | Simulation method and device of power equipment based on geometric model and storage medium |
Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102096747A (en) * | 2011-03-18 | 2011-06-15 | 长沙高新开发区德研电气技术有限公司 | Method and device for simulating power electronic system |
US20110184708A1 (en) * | 2008-10-06 | 2011-07-28 | Mitiko Miura-Mattausch | Simulation method and simulation apparatus |
CN103412989A (en) * | 2013-08-01 | 2013-11-27 | 电子科技大学 | Parameterized reduced model based three-dimensional electromagnetic field simulation method of periodic structure |
CN103902785A (en) * | 2014-04-14 | 2014-07-02 | 北京航空航天大学 | Structure finite element model correcting method based on multi-element uncertainty |
CN104951634A (en) * | 2015-07-22 | 2015-09-30 | 中国电力科学研究院 | Method for restraining electromagnetic transient simulation virtual power consumption of controllable power electronic device |
CN105528503A (en) * | 2016-02-17 | 2016-04-27 | 中国科学院沈阳自动化研究所 | Large structure dynamic optimization design method based on structural decomposition |
CN107247686A (en) * | 2017-05-22 | 2017-10-13 | 电子科技大学 | A kind of FETD simulation methods based on parallel algorithm |
CN107515982A (en) * | 2017-08-22 | 2017-12-26 | 电子科技大学 | A kind of contact analysis method in three-dimensional mechanical finite element modal analysis |
CN109782625A (en) * | 2018-12-20 | 2019-05-21 | 中国电力科学研究院有限公司 | A kind of real-time emulation method and system of circuit model |
CN112132192A (en) * | 2020-09-07 | 2020-12-25 | 北京海益同展信息科技有限公司 | Model training method and device, electronic equipment and storage medium |
CN112214916A (en) * | 2020-10-09 | 2021-01-12 | 北京福田戴姆勒汽车有限公司 | Method and system for restoring physical test bench simulation process based on virtual model |
-
2020
- 2020-01-10 CN CN202010024766.9A patent/CN111209675B/en active Active
Patent Citations (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110184708A1 (en) * | 2008-10-06 | 2011-07-28 | Mitiko Miura-Mattausch | Simulation method and simulation apparatus |
CN102096747A (en) * | 2011-03-18 | 2011-06-15 | 长沙高新开发区德研电气技术有限公司 | Method and device for simulating power electronic system |
CN103412989A (en) * | 2013-08-01 | 2013-11-27 | 电子科技大学 | Parameterized reduced model based three-dimensional electromagnetic field simulation method of periodic structure |
CN103902785A (en) * | 2014-04-14 | 2014-07-02 | 北京航空航天大学 | Structure finite element model correcting method based on multi-element uncertainty |
CN104951634A (en) * | 2015-07-22 | 2015-09-30 | 中国电力科学研究院 | Method for restraining electromagnetic transient simulation virtual power consumption of controllable power electronic device |
CN105528503A (en) * | 2016-02-17 | 2016-04-27 | 中国科学院沈阳自动化研究所 | Large structure dynamic optimization design method based on structural decomposition |
CN107247686A (en) * | 2017-05-22 | 2017-10-13 | 电子科技大学 | A kind of FETD simulation methods based on parallel algorithm |
CN107515982A (en) * | 2017-08-22 | 2017-12-26 | 电子科技大学 | A kind of contact analysis method in three-dimensional mechanical finite element modal analysis |
CN109782625A (en) * | 2018-12-20 | 2019-05-21 | 中国电力科学研究院有限公司 | A kind of real-time emulation method and system of circuit model |
CN112132192A (en) * | 2020-09-07 | 2020-12-25 | 北京海益同展信息科技有限公司 | Model training method and device, electronic equipment and storage medium |
CN112214916A (en) * | 2020-10-09 | 2021-01-12 | 北京福田戴姆勒汽车有限公司 | Method and system for restoring physical test bench simulation process based on virtual model |
Non-Patent Citations (2)
Title |
---|
徐延明;赵成勇;徐莹;刘启建;许建中;周飞;: "IGBT模块电气模型及实时仿真研究" * |
陈世辉;: "应用集总参数的微机电系统等效电路建模方法研究" * |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112052611A (en) * | 2020-08-24 | 2020-12-08 | 南方电网科学研究院有限责任公司 | Simulation method and device of power equipment based on geometric model and storage medium |
CN112052611B (en) * | 2020-08-24 | 2024-05-28 | 南方电网科学研究院有限责任公司 | Simulation method, device and storage medium of power equipment based on geometric model |
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