CN111107282A - Video switching method, video switcher, electronic device and storage medium - Google Patents
Video switching method, video switcher, electronic device and storage medium Download PDFInfo
- Publication number
- CN111107282A CN111107282A CN201911237156.0A CN201911237156A CN111107282A CN 111107282 A CN111107282 A CN 111107282A CN 201911237156 A CN201911237156 A CN 201911237156A CN 111107282 A CN111107282 A CN 111107282A
- Authority
- CN
- China
- Prior art keywords
- video
- display
- data packet
- signal source
- video signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 54
- 238000006243 chemical reaction Methods 0.000 claims abstract description 33
- 238000004590 computer program Methods 0.000 claims description 10
- 238000004806 packaging method and process Methods 0.000 claims description 7
- 230000005540 biological transmission Effects 0.000 claims description 6
- 238000010586 diagram Methods 0.000 description 14
- 230000008569 process Effects 0.000 description 12
- 230000002457 bidirectional effect Effects 0.000 description 4
- 230000006870 function Effects 0.000 description 4
- 230000003993 interaction Effects 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000001960 triggered effect Effects 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000013500 data storage Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/222—Studio circuitry; Studio devices; Studio equipment
- H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
- H04N5/268—Signal distribution or switching
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Two-Way Televisions, Distribution Of Moving Picture Or The Like (AREA)
Abstract
The invention provides a video switching method, a video switcher, electronic equipment and a storage medium. The method comprises the following steps: after the video signal source is accessed, the decoding chip receives video data sent by the video signal source accessed by the decoding chip and decodes the video data; after the display is accessed, the FPGA receives a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier, acquires a video format supported by the display, and sends the video format to a decoding chip through a switch chip; the decoding chip determines to perform format conversion according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, and encapsulates the converted video data into a data packet to be sent to the switch chip; the FPGA selects a data packet corresponding to the display from the switch chip and sends the data packet to the display. The invention can be compatible with any type of interface and can adapt to the scene with complex interface.
Description
Technical Field
The present invention relates to the field of data processing technologies, and in particular, to a video switching method, a video switcher, an electronic device, and a storage medium.
Background
The video switcher is designed for switching the composite video signal, and can switch one path of video signal to be output to the display at will. The video switcher is used for controlling input and output video signals, and generally speaking, the video switcher is used for controlling a plurality of input pairs and a single output. For example, in the field of surveillance, when multiple video surveillance streams need to be viewed on a single display, a video switcher is required to switch between different screens.
In the prior art, a video switcher can only realize a single interface, that is, the interface of an input video signal source is the same as the interface of an output display. Therefore, in a scene with a complex interface, a single interface cannot be compatible with different interfaces, and the video cannot be switched normally.
Disclosure of Invention
In view of the above, embodiments of the present invention are proposed in order to provide a video switching method, a video switcher, an electronic device, and a storage medium that overcome or at least partially solve the above problems.
In a first aspect, an embodiment of the present invention discloses a video switching method, where the method is applied in a video switcher, where the video switcher includes an FPGA, a switcher chip, and multiple decoding chips; the method comprises the following steps:
the decoding chip receives video data sent by a video signal source accessed by the decoding chip after the video signal source is accessed, and decodes the video data;
after the display is accessed, the FPGA receives a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier, acquires the video format supported by the display, and sends the corresponding relation and the video format supported by the display to the decoding chip through the switch chip;
the decoding chip determines to perform format conversion according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, and encapsulates the converted video data into a data packet to be sent to the switch chip;
and the FPGA selects a data packet corresponding to the display from the switch chip according to the switching instruction and sends the selected data packet to the display.
Optionally, encapsulating the converted video data into a data packet and sending the data packet to the switch chip includes: the decoding chip encapsulates the converted video data into a data packet and adds a video signal source identification which is accessed by the decoding chip to the data packet; and the decoding chip sends the data packet added with the video signal source identifier to the switch chip.
Optionally, the selecting, according to the switching instruction, a data packet corresponding to the display from the switch chip includes: the FPGA acquires the video signal source identification contained in the corresponding relation; and the FPGA selects a data packet added with the acquired video signal source identifier from the switch chip.
Optionally, the sending the selected data packet to the display includes: when one display is available, the FPGA sends the selected data packet to the display; when a plurality of displays are available, the FPGA acquires a display identifier corresponding to the data packet according to the corresponding relation and the video signal source identifier added in the data packet, and adds the corresponding display identifier to the data packet; and the FPGA serially packages the data packets added with the display identifier and then sends the data packets to the display.
Optionally, the sending the selected data packet to the display includes: and the FPGA sends the selected data packet to the display in a wireless transmission mode.
In a second aspect, an embodiment of the present invention discloses a video switcher, where the video switcher includes an FPGA, a switcher chip, and a plurality of decoding chips;
the decoding chip includes: the decoding module is used for receiving video data sent by a video signal source accessed by the decoding module after the video signal source is accessed, and decoding the video data;
the FPGA comprises: the first processing module is used for receiving a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier after the display is accessed, acquiring the video format supported by the display, and sending the corresponding relation and the video format supported by the display to the decoding chip through the switch chip;
the decoding chip further comprises: the conversion module is used for converting the decoded video data into a video format supported by the display corresponding to the video signal source accessed by the conversion module after determining format conversion according to the corresponding relation and the video format supported by the display, and packaging the converted video data into a data packet and sending the data packet to the switch chip;
the FPGA further comprises: and the second processing module is used for selecting a data packet corresponding to the display from the switch chip according to the switching instruction and sending the selected data packet to the display.
Optionally, the conversion module comprises: the first adding unit is used for encapsulating the converted video data into a data packet and adding a video signal source identifier accessed by the first adding unit for the data packet; and the first sending unit is used for sending the data packet added with the video signal source identifier to the switch chip.
Optionally, the second processing module includes: an obtaining unit, configured to obtain a video signal source identifier included in the corresponding relationship; and the selecting unit is used for selecting the data packet added with the acquired video signal source identifier from the switch chip.
Optionally, the second processing module includes: the second sending unit is used for sending the selected data packet to the display when the number of the displays is one; a second adding unit, configured to, when multiple displays are provided, obtain, according to the correspondence and the identifier of the video signal source added to the data packet, a display identifier corresponding to the data packet, and add, to the data packet, a corresponding display identifier; and the third sending unit is used for serially packaging the data packet added with the display identifier and then sending the data packet to the display.
Optionally, the second processing module includes: and the wireless sending unit is used for sending the selected data packet to the display in a wireless transmission mode.
In a third aspect, an embodiment of the present invention discloses an electronic device, including: one or more processors; and one or more machine-readable media having instructions stored thereon; the instructions, when executed by the one or more processors, cause the processors to perform a video switching method as any one of above.
In a fourth aspect, an embodiment of the present invention discloses a computer-readable storage medium, on which a computer program is stored, which when executed by a processor implements the video switching method as described in any one of the above.
In the embodiment of the invention, after a video signal source is accessed, a decoding chip receives video data sent by the video signal source which is accessed by the decoding chip and decodes the video data; after a display is accessed, an FPGA (Field-Programmable Gate Array) receives a switching instruction carrying a corresponding relation between a video signal source identifier and a display identifier, acquires a video format supported by the display, and sends the corresponding relation and the video format supported by the display to a decoding chip through a switch chip; the decoding chip determines to perform format conversion according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, and encapsulates the converted video data into a data packet to be sent to the switch chip; and the FPGA selects a data packet corresponding to the display from the switch chip according to the switching instruction and sends the selected data packet to the display. Therefore, in the embodiment of the invention, the FPGA can acquire the video format supported by the display and inform the decoding chip of the video format, and the decoding chip can convert the format of the video data into the format supported by the display for displaying the video data, so that the video switching device can be compatible with any type of interface, smoothly performs video switching, and can adapt to scenes with complex interfaces.
Drawings
Fig. 1 is a flowchart illustrating steps of a video switching method according to a first embodiment of the present invention.
FIG. 2 is a schematic diagram of a device connection according to a second embodiment of the present invention;
fig. 3 is a flowchart illustrating a video switching method according to a second embodiment of the present invention.
Fig. 4 is a schematic diagram of a device connection according to a third embodiment of the present invention.
Fig. 5 is a block diagram of a video switch according to a fourth embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
In the prior art, a video switcher can only realize a single interface, that is, the interface of an input video signal source is the same as the interface of an output display. If the video switching between different interfaces is to be realized, an alternative is to connect a video conversion device between the video signal source and the video switcher, and send the video data to the video switcher for video switching after performing video format conversion through the video conversion device. However, this method requires a new video conversion device to be deployed, and the operation process is cumbersome. In the embodiment of the invention, the decoding chip is arranged in the video switcher, and the decoding chip is used for carrying out video format conversion according to the actual situation, so that the processing process is simpler and more convenient, and the video switcher can be compatible with various interfaces.
Next, a video switching method in the embodiment of the present invention is described in detail.
Example one
The video switching method of the embodiment of the invention can be applied to a video switcher. The video switcher may include an FPGA, a switch chip, and a plurality of decoding chips. The decoding chip and the switch chip can carry out bidirectional data interaction, and the switch chip and the FPGA can carry out bidirectional data interaction.
Referring to fig. 1, a flowchart illustrating steps of a video switching method according to a first embodiment of the present invention is shown.
The video switching method of the embodiment of the invention can comprise the following steps:
Each decoding chip in the video switcher can access a video signal source. The video signal source may be any type of interface. For example, SDI (Serial Digital Interface), DVI (Digital Video Interface), HDMI (High Definition Multimedia Interface), VGA (Video Graphics Array), and so on. The video signal source can be a camera and other video acquisition equipment.
After the video signal source is accessed to the decoding chip, the video signal source can send the acquired video data to the accessed decoding chip. The format of the video data collected by the video signal source is the format corresponding to the interface of the video signal source. For example, if the interface of the video signal source is SDI, the format of the collected video data is SDI format, and so on.
And each decoding chip receives video data sent by a video signal source accessed by the decoding chip and decodes the video data to obtain decoded video data.
And step 102, after the display is accessed, the FPGA receives a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier, acquires the video format supported by the display, and sends the corresponding relation and the video format supported by the display to the decoding chip through the switch chip.
The FPGA in the video switcher may access at least one display. The display may be of any interface type. Such as SDI, DVI, HDMI, VGA, etc.
After the display is accessed to the FPGA, a user can set the corresponding relation of the video data acquired by the video signal source to be displayed in which display. And after setting, triggering a switching instruction and sending the switching instruction to the FPGA. The switching instruction may carry a corresponding relationship between the video signal source identifier and the display identifier.
After receiving the switching instruction, the FPGA can obtain the video format supported by the display corresponding to the display identifier included in the corresponding relationship. The video format supported by the display is a format corresponding to the interface of the display. For example, if the interface of the display is HDMI, the video format supported by the display is HDMI format, and so on.
And the FPGA sends the corresponding relation and the acquired video format supported by the display to a switch chip, and the switch chip sends the corresponding relation and the video format supported by the display to each decoding chip.
And 103, the decoding chip determines to perform format conversion according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, and encapsulates the converted video data into a data packet to be sent to the switch chip.
After receiving the corresponding relationship between the video signal source and the display and the video format supported by the display, each decoding chip can determine whether to perform format conversion on the video data acquired by the video signal source accessed by the decoding chip itself according to the corresponding relationship and the video format supported by the display.
If the format conversion is determined, the decoding chip converts the video data decoded in the step 101 into a video format supported by a display corresponding to the video signal source accessed by the decoding chip, encapsulates the video data after the format conversion, and sends the encapsulated video data to the switch chip after the data packet is encapsulated.
And 104, the FPGA selects a data packet corresponding to the display from the switch chip according to the switching instruction and sends the selected data packet to the display.
And the FPGA selects the data packet corresponding to the display included in the corresponding relation from the switch chip according to the corresponding relation between the video signal source and the display carried in the switching instruction, and sends the selected data packet to each display. After receiving the data packets, each display can select the data packets to be played for analysis and playing.
In the embodiment of the invention, the FPGA can acquire the video format supported by the display and inform the decoding chip, and the decoding chip can convert the format of the video data into the format supported by the display for displaying the video data, so that the video switching method and the video switching device can be compatible with any type of interface, smoothly carry out video switching and adapt to scenes with complex interfaces.
Example two
Referring to fig. 2, a schematic diagram of device connection according to a second embodiment of the present invention is shown. As shown in fig. 2, the video switcher includes N decoding chips, a switch chip, an FPGA, a 5.8GHZ wireless transmitting end, and an infrared receiving end, where N is a positive integer. The decoding chip 1 is connected to the video signal source 1, the decoding chip 2 is connected to the video signal source 2, the decoding chip 3 is connected to the video signal sources 3 and … …, and the decoding chip N is connected to the video signal source N. The decoding chips 1 to N are in bidirectional interaction with the switch chip, and the switch chip is in bidirectional interaction with the FPGA. The FPGA can receive data through the infrared receiving end and can also send data to the outside through the 5.8GHZ wireless sending end. The display comprises a 5.8GHZ wireless receiving end, an FPGA, a screen decoding chip and a display screen. The data that 5.8GHZ wireless receiving end sent can receive the wireless transmitting end of 5.8GHZ in the video switch, sends data to FPGA, and FPGA handles data, for example data screening etc. sends the screen and decodes the chip, and the screen decodes the chip and decodes the back to data and send for display screen and show.
Referring to fig. 3, a flowchart illustrating steps of a video switching method according to a second embodiment of the present invention is shown.
The video switching method of the embodiment of the invention can comprise the following steps:
The video signal source may access the decoding chip in a wired or wireless manner, which is not limited in this embodiment of the present invention.
The FPGA and the display are wirelessly paired through a 5.8GHZ wireless transmitting end and a 5.8GHZ wireless receiving end, and the display is accessed to the FPGA after pairing is successful. After the display is accessed to the FPGA, the FPGA can automatically acquire the interface type of the accessed display, that is, the video format supported by the accessed display.
The video switcher can provide a user interface, and after the video signal source is connected to the decoding chip and the display is connected to the FPGA, the connected video signal source identification and the connected display identification can be displayed in the user interface. A user can set the corresponding relation between a video signal source and a display through an infrared remote controller, a switching instruction carrying the corresponding relation between the video signal source identification and the display identification is triggered, and the FPGA receives the switching instruction through an infrared receiving end. The corresponding relationship between the video signal source and the display may be in various forms, such as one-to-many, many-to-one, one-to-one, many-to-many, and the like, which is not limited in this embodiment of the present invention.
The FPGA acquires the video format supported by the display corresponding to the display identifier contained in the corresponding relation, and sends the corresponding relation and the acquired video format supported by the display to the decoding chip through the switch chip.
After receiving the corresponding relationship between the video signal source identifier and the display identifier and the video format supported by the display, the decoding chip can acquire the video format supported by the display corresponding to the video signal source accessed by the decoding chip, acquire the format of the video data acquired by the video signal source accessed by the decoding chip, and compare whether the format of the video data is consistent with the video format supported by the display. And if the two types of data are not consistent, determining to perform format conversion, and if the two types of data are consistent, determining not to perform format conversion.
If the format conversion is determined, the decoding chip converts the decoded video data into a video format supported by a display corresponding to the video signal source accessed by the decoding chip, encapsulates the converted video data into a data packet and sends the data packet to the switch chip.
In an optional implementation manner, the process of the decoding chip encapsulating the converted video data into a data packet and sending the data packet to the switch chip may include: the decoding chip encapsulates the converted video data into a data packet, and adds a video signal source identifier accessed by the decoding chip to the data packet; and the decoding chip sends the data packet added with the video signal source identifier to the switch chip.
If the format conversion is not carried out, the decoding chip determines whether the video signal source identification accessed by the decoding chip exists in the corresponding relation. If the video data exists, the video data acquired by the video signal source accessed by the decoding chip needs to be displayed in the display, so that the decoding chip encapsulates the decoded video data into a data packet and sends the data packet to the switch chip. Similarly, the decoding chip encapsulates the decoded video data into a data packet, and adds a video signal source identifier accessed by the decoding chip to the data packet; and the decoding chip sends the data packet added with the video signal source identifier to the switch chip. If the decoding chip does not exist, the video data acquired by the video signal source accessed by the decoding chip does not need to be displayed in a display, so that the decoding chip does not process the decoded video data temporarily.
And 304, the FPGA selects a data packet corresponding to the display from the switch chip according to the switching instruction, and sends the selected data packet to the display in a wireless transmission mode.
The switch chip receives the data packet sent by one or more decoding chips. And the FPGA accesses the switch chip and selects a data packet corresponding to the display from the switch chip according to the switching instruction.
In an optional implementation manner, the process of the FPGA selecting the data packet corresponding to the display from the switch chip according to the switching instruction may include: the FPGA acquires the video signal source identification contained in the corresponding relation; and the FPGA selects a data packet added with the acquired video signal source identifier from the switch chip. The FPGA can send the video signal source identification contained in the corresponding relation to the switch chip, the switch chip selects the data packet added with the video signal source identification from the received data packet, and the data packet is returned to the FPGA.
In an optional implementation mode, the FPGA sends out the selected data packets after performing corresponding processing on the selected data packets according to the difference of the number of the displays. In the embodiment of the present invention, the process of sending the selected data packet to the display may include the following two cases a1 and a 2:
a1: and when one display is available, the FPGA sends the selected data packet to the display.
When the display is one, the selected data packet is indicated to be played in the one display, in which case the FPGA does not need to perform further processing on the selected data packet. And the FPGA sends out the selected data packet through the 5.8GHZ wireless sending end.
A2: and when a plurality of displays are arranged, the FPGA acquires the display identifier corresponding to the data packet according to the corresponding relation and the video signal source identifier added in the data packet, adds the corresponding display identifier for the data packet, serially packages the data packet added with the display identifier and then sends the data packet added with the display identifier to the display.
And when the number of the displays is multiple, the selected data packets are indicated to be distributed to the multiple displays for playing, and in this case, the FPGA can acquire the display identifier corresponding to each data packet, that is, the display identifier corresponding to the video signal source identifier added to each data packet, and add the corresponding display identifier to each data packet, so that the displays can screen the data packets for playing according to the identifiers of the displays after receiving the data packets. The FPGA serially packages the data packets added with the display identifiers in a time division multiplexing mode, and sends out the packaged data packets through the 5.8GHZ wireless sending end.
And 305, the display receives the data packet, selects the data packet corresponding to the display to analyze and play.
The display receives the data packet sent by the FPGA through the 5.8GHZ wireless receiving end and sends the data packet to the FPGA in the display. And the FPGA in the display analyzes the data packet and determines whether a display identifier is added. And if the display identifier is not added in the data packet, the FPGA in the display sends the received data packet to the screen decoding chip, and the data packet is decoded by the screen decoding chip and then played on the display screen. If the display identifier is added in the data packet, the FPGA in the display acquires the identifier of the display, screens the data packet added with the identifier from the received data packet, sends the screened data packet to a screen decoding chip, and plays the data packet on a display screen after the data packet is decoded by the screen decoding chip.
The embodiment of the invention can realize the access identification of different types of interfaces in a single video switcher, greatly reduce the switching equipment and the deployed cables and improve the stability of the equipment. And data is transmitted in a wireless mode, so that the requirement of displaying of a plurality of displays can be flexibly met.
EXAMPLE III
Referring to fig. 4, a schematic diagram of device connection according to a third embodiment of the present invention is shown. As shown in fig. 4, two displays, i.e., a video signal source a _ SDI accessing to the decoding chip 1, a video signal source B _ HDMI accessing to the decoding chip 2, a video signal source C _ DVI accessing to the decoding chip 3, a display M, and a display N, access to the FPGA in the video switcher. It should be noted that fig. 4 is only for illustration and is not meant to limit the embodiments of the present invention.
With reference to fig. 4, the video switching method according to the embodiment of the present invention may include the following processes:
1. the 3 video signal sources are A _ SDI, B _ HDMI and C _ DVI respectively, when the 3 video signal sources are accessed into the corresponding access decoding chips, video data collected by the video signal source A _ SDI enters the decoding chip 1, video data collected by the video signal source B _ HDMI enters the decoding chip 2, and video data collected by the video signal source C _ DVI enters the decoding chip 3. The 3 decoding chips decode the video data received by the decoding chips.
2. The display M and the display N are in wireless pairing with the FPGA of the video switcher, after the pairing is successful, the display M and the display N are connected into the FPGA of the video switcher, and the number of the displays which are connected at present and are detected by the FPGA of the video switcher is 2.
3. After the video signal source and the display are successfully connected, a switching instruction is triggered through the infrared remote controller, the FPGA of the video switcher receives the switching instruction through the infrared receiving end, and the switching instruction carries the corresponding relation between the video signal source identification and the display identification. The FPGA acquires the video format supported by the display identifier carried in the corresponding relation, sends the corresponding relation and the video format supported by the display to the switch chip, and the switch chip forwards the video format to the 3 decoding chips. For example, it is set that video data acquired by a _ SDI is displayed on the display M, video data acquired by B _ HDMI is displayed on the display N, and video data acquired by C _ DVI is displayed on the display N, and the corresponding relationship is M for a _ SDI, N for B _ HDMI, and N for C _ DVI. For example, the video formats supported by the display M and the display N are both HDMI (this process is not shown in fig. 4).
4. The decoding chip 1 obtains that the video format supported by the display M corresponding to the video signal source A _ SDI is HDMI, the format of the video data collected by the video signal source A _ SDI is SDI, format conversion is determined, the decoded video data is converted into the HDMI format, the video data after format conversion is subjected to network packaging, and a network interface data packet X is packaged and sent to the switch chip. The decoding chip 2 obtains that the video format supported by the display N corresponding to the video signal source B _ HDMI is HDMI, the format of the video data acquired by the video signal source B _ HDMI is HDMI, the format conversion is not determined, the decoded and converted video data is subjected to network packaging, and the video data is packaged into a network port data packet Y and sent to the switch chip. The decoding chip 3 obtains that the video format supported by the display N corresponding to the video signal source C _ DVI is HDMI, the format of the video data collected by the video signal source C _ DVI is DVI, format conversion is determined, the decoded video data is converted into the HDMI format, the video data after format conversion is subjected to network packaging, and a network port data packet Z is packaged and sent to the switch chip. Each decoding chip can fix an IP (Internet Protocol ) address when it leaves the factory. When the decoding chip packages, the decoding chip can add information such as its own IP address, its own accessed video signal source identifier, resolution of video data, frame rate, etc. to the data packet.
5. The FPGA of the video switcher can access the switch chip through the network port to obtain the IP addresses accessed to the switch at the moment, and the decoding chip corresponding to each IP address is fixed when the video switcher leaves a factory so as to be convenient for the FPGA to identify. And the FPGA of the video switcher accesses an access port of an A _ SDI on the chip of the switcher to acquire a data packet X, accesses an access port of a B _ HDMI to acquire a data packet Y and accesses an access port of a C _ DVI to acquire a data packet Z according to the corresponding relation and the video signal source identifier added in the data packet.
6. The FPGA adds a display identifier M for a data packet X, adds a display identifier N for a data packet Y, adds a display identifier N for a data packet Z, serially packages the data packet X, the data packet Y and the data packet Z, and sends the data packet X, the data packet Y and the data packet Z out through a wireless sending end.
7. After receiving the data packet X, the data packet Y and the data packet Z which are packaged in series, the FPGA of the display M unpacks the received data, obtains a display identifier M, screens out the data packet X added with the identifier M, transmits the data packet X to a screen decoding chip, decodes the data packet X and displays the data packet on a display screen. After receiving the data packet X, the data packet Y and the data packet Z which are packaged in series, the FPGA of the display N unpacks the received data, acquires the display identifier N, screens out the data packet Y and the data packet Z which are added with the identifier N, and transmits the data packet Y and the data packet Z to a screen decoding chip for decoding and then displaying on a display screen, for example, split-screen display.
The embodiment of the invention can improve the compatibility of the video switcher and simultaneously increase the support to multiple displays.
Example four
Referring to fig. 5, a block diagram of a video switcher according to a fourth embodiment of the present invention is shown. The video switcher includes an FPGA 51, a switcher chip 52, and a plurality of decoding chips 53.
The decoding chip 53 includes: the decoding module 531 is configured to receive video data sent by a video signal source accessed by itself after the video signal source is accessed, and decode the video data.
The FPGA 51 includes: the first processing module 511 is configured to receive a switching instruction carrying a correspondence between a video signal source identifier and a display identifier after the display is accessed, obtain a video format supported by the display, and send the correspondence and the video format supported by the display to the decoding chip via the switch chip.
The decoding chip 53 further includes: a conversion module 532, configured to determine, according to the correspondence and the video format supported by the display, that format conversion is performed, convert the decoded video data into a video format supported by the display corresponding to the video signal source accessed by the video signal source, and encapsulate the converted video data into a data packet and send the data packet to the switch chip.
The FPGA 51 further includes: the second processing module 512 is configured to select a data packet corresponding to the display from the switch chip according to the switching instruction, and send the selected data packet to the display.
Optionally, the conversion module 532 includes: the first adding unit is used for encapsulating the converted video data into a data packet and adding a video signal source identifier accessed by the first adding unit for the data packet; and the first sending unit is used for sending the data packet added with the video signal source identifier to the switch chip.
Optionally, the second processing module 512 includes: an obtaining unit, configured to obtain a video signal source identifier included in the corresponding relationship; and the selecting unit is used for selecting the data packet added with the acquired video signal source identifier from the switch chip.
Optionally, the second processing module 512 includes: the second sending unit is used for sending the selected data packet to the display when the number of the displays is one; a second adding unit, configured to, when multiple displays are provided, obtain, according to the correspondence and the identifier of the video signal source added to the data packet, a display identifier corresponding to the data packet, and add, to the data packet, a corresponding display identifier; and the third sending unit is used for serially packaging the data packet added with the display identifier and then sending the data packet to the display.
Optionally, the second processing module 512 includes: and the wireless sending unit is used for sending the selected data packet to the display in a wireless transmission mode.
In the embodiment of the invention, the FPGA can acquire the video format supported by the display and inform the decoding chip, and the decoding chip can convert the format of the video data into the format supported by the display for displaying the video data, so that the video switching method and the video switching device can be compatible with any type of interface, smoothly carry out video switching and adapt to scenes with complex interfaces.
For the device embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, refer to the partial description of the method embodiment.
In an embodiment of the invention, an electronic device is also provided. The electronic device may include one or more processors and one or more machine-readable media having instructions, such as an application program, stored thereon. The instructions, when executed by the one or more processors, cause the processors to perform the video switching method described above.
In an embodiment of the present invention, there is also provided a non-transitory computer-readable storage medium having stored thereon a computer program executable by a processor of an electronic device to perform the video switching method described above. For example, the non-transitory computer readable storage medium may be a ROM, a Random Access Memory (RAM), a CD-ROM, a magnetic tape, a floppy disk, an optical data storage device, and the like.
The embodiments in the present specification are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, apparatus, or computer program product. Accordingly, embodiments of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
Embodiments of the present invention are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing terminal to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing terminal to cause a series of operational steps to be performed on the computer or other programmable terminal to produce a computer implemented process such that the instructions which execute on the computer or other programmable terminal provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or terminal that comprises the element.
The video switching method, the video switcher, the electronic device and the storage medium provided by the invention are described in detail, and a specific example is applied in the text to explain the principle and the implementation of the invention, and the description of the above embodiment is only used to help understanding the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. The video switching method is applied to a video switcher, and the video switcher comprises an FPGA, a switcher chip and a plurality of decoding chips; the method comprises the following steps:
the decoding chip receives video data sent by a video signal source accessed by the decoding chip after the video signal source is accessed, and decodes the video data;
after the display is accessed, the FPGA receives a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier, acquires the video format supported by the display, and sends the corresponding relation and the video format supported by the display to the decoding chip through the switch chip;
the decoding chip determines to perform format conversion according to the corresponding relation and the video format supported by the display, converts the decoded video data into the video format supported by the display corresponding to the video signal source accessed by the decoding chip, and encapsulates the converted video data into a data packet to be sent to the switch chip;
and the FPGA selects a data packet corresponding to the display from the switch chip according to the switching instruction and sends the selected data packet to the display.
2. The method of claim 1, wherein encapsulating the converted video data into packets for transmission to the switch chip comprises:
the decoding chip encapsulates the converted video data into a data packet and adds a video signal source identification which is accessed by the decoding chip to the data packet;
and the decoding chip sends the data packet added with the video signal source identifier to the switch chip.
3. The method according to claim 2, wherein the selecting the data packet corresponding to the display from the switch chip according to the switching instruction comprises:
the FPGA acquires the video signal source identification contained in the corresponding relation;
and the FPGA selects a data packet added with the acquired video signal source identifier from the switch chip.
4. The method of claim 1, wherein sending the selected data packet to the display comprises:
when one display is available, the FPGA sends the selected data packet to the display;
when a plurality of displays are available, the FPGA acquires a display identifier corresponding to the data packet according to the corresponding relation and the video signal source identifier added in the data packet, and adds the corresponding display identifier to the data packet;
and the FPGA serially packages the data packets added with the display identifier and then sends the data packets to the display.
5. The method of claim 1, wherein sending the selected data packet to the display comprises:
and the FPGA sends the selected data packet to the display in a wireless transmission mode.
6. A video switcher, wherein the video switcher comprises an FPGA, a switcher chip and a plurality of decoding chips;
the decoding chip includes: the decoding module is used for receiving video data sent by a video signal source accessed by the decoding module after the video signal source is accessed, and decoding the video data;
the FPGA comprises: the first processing module is used for receiving a switching instruction carrying the corresponding relation between the video signal source identifier and the display identifier after the display is accessed, acquiring the video format supported by the display, and sending the corresponding relation and the video format supported by the display to the decoding chip through the switch chip;
the decoding chip further comprises: the conversion module is used for converting the decoded video data into a video format supported by the display corresponding to the video signal source accessed by the conversion module after determining format conversion according to the corresponding relation and the video format supported by the display, and packaging the converted video data into a data packet and sending the data packet to the switch chip;
the FPGA further comprises: and the second processing module is used for selecting a data packet corresponding to the display from the switch chip according to the switching instruction and sending the selected data packet to the display.
7. The video switcher of claim 6, wherein the switching module comprises:
the first adding unit is used for encapsulating the converted video data into a data packet and adding a video signal source identifier accessed by the first adding unit for the data packet;
and the first sending unit is used for sending the data packet added with the video signal source identifier to the switch chip.
8. The video switcher of claim 7, wherein the second processing module comprises:
an obtaining unit, configured to obtain a video signal source identifier included in the corresponding relationship;
and the selecting unit is used for selecting the data packet added with the acquired video signal source identifier from the switch chip.
9. An electronic device, comprising:
one or more processors; and
one or more machine-readable media having instructions stored thereon;
the instructions, when executed by the one or more processors, cause the processors to perform the video switching method of any of claims 1 to 5.
10. A computer-readable storage medium, having stored thereon a computer program which, when executed by a processor, implements the video switching method of any one of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911237156.0A CN111107282B (en) | 2019-12-05 | 2019-12-05 | Video switching method, video switcher, electronic device and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911237156.0A CN111107282B (en) | 2019-12-05 | 2019-12-05 | Video switching method, video switcher, electronic device and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111107282A true CN111107282A (en) | 2020-05-05 |
| CN111107282B CN111107282B (en) | 2023-07-04 |
Family
ID=70422251
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911237156.0A Active CN111107282B (en) | 2019-12-05 | 2019-12-05 | Video switching method, video switcher, electronic device and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111107282B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111491114A (en) * | 2020-05-22 | 2020-08-04 | 深圳市玩视科技有限公司 | Audio and video signal switching device and switching method |
| CN113561916A (en) * | 2021-08-31 | 2021-10-29 | 长沙德壹科技有限公司 | Vehicle-mounted display system, vehicle and vehicle-mounted camera image display method |
| CN114285914A (en) * | 2021-10-19 | 2022-04-05 | 南方电网数字电网研究院有限公司 | Video data processing system, method and device based on electric power safety |
| CN114554354A (en) * | 2022-02-18 | 2022-05-27 | 冠捷电子科技(福建)有限公司 | Method for automatically switching audio equipment and application thereof |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040139233A1 (en) * | 2002-12-11 | 2004-07-15 | Marcus Kellerman | Media processing system supporting different media formats via server-based transcoding |
| CN101710946A (en) * | 2009-12-24 | 2010-05-19 | 中国航空工业集团公司第六三一研究所 | System and method for switching and converting video signals |
| CN101999234A (en) * | 2008-04-18 | 2011-03-30 | 日本电气株式会社 | Gateway device, method, and program |
| CN102007774A (en) * | 2008-04-18 | 2011-04-06 | 日本电气株式会社 | Server device, content distribution method, and program |
| CN201878274U (en) * | 2010-11-24 | 2011-06-22 | 北京格非科技发展有限公司 | Multi-format converter |
| CN107959818A (en) * | 2016-10-17 | 2018-04-24 | 北京视联动力国际信息技术有限公司 | The data processing method of integrated terminal and integrated terminal |
| CN110519618A (en) * | 2018-05-22 | 2019-11-29 | 视联动力信息技术股份有限公司 | A kind of processing method of video data and view networked terminals |
-
2019
- 2019-12-05 CN CN201911237156.0A patent/CN111107282B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040139233A1 (en) * | 2002-12-11 | 2004-07-15 | Marcus Kellerman | Media processing system supporting different media formats via server-based transcoding |
| CN101999234A (en) * | 2008-04-18 | 2011-03-30 | 日本电气株式会社 | Gateway device, method, and program |
| CN102007774A (en) * | 2008-04-18 | 2011-04-06 | 日本电气株式会社 | Server device, content distribution method, and program |
| CN101710946A (en) * | 2009-12-24 | 2010-05-19 | 中国航空工业集团公司第六三一研究所 | System and method for switching and converting video signals |
| CN201878274U (en) * | 2010-11-24 | 2011-06-22 | 北京格非科技发展有限公司 | Multi-format converter |
| CN107959818A (en) * | 2016-10-17 | 2018-04-24 | 北京视联动力国际信息技术有限公司 | The data processing method of integrated terminal and integrated terminal |
| CN110519618A (en) * | 2018-05-22 | 2019-11-29 | 视联动力信息技术股份有限公司 | A kind of processing method of video data and view networked terminals |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN111491114A (en) * | 2020-05-22 | 2020-08-04 | 深圳市玩视科技有限公司 | Audio and video signal switching device and switching method |
| CN113561916A (en) * | 2021-08-31 | 2021-10-29 | 长沙德壹科技有限公司 | Vehicle-mounted display system, vehicle and vehicle-mounted camera image display method |
| CN114285914A (en) * | 2021-10-19 | 2022-04-05 | 南方电网数字电网研究院有限公司 | Video data processing system, method and device based on electric power safety |
| CN114285914B (en) * | 2021-10-19 | 2023-10-20 | 南方电网数字电网研究院有限公司 | Video data processing system, method and device based on power safety |
| CN114554354A (en) * | 2022-02-18 | 2022-05-27 | 冠捷电子科技(福建)有限公司 | Method for automatically switching audio equipment and application thereof |
| CN114554354B (en) * | 2022-02-18 | 2023-11-24 | 冠捷电子科技(福建)有限公司 | Method for automatically switching audio equipment and application thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111107282B (en) | 2023-07-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN111107282B (en) | Video switching method, video switcher, electronic device and storage medium | |
| AU2022200777B2 (en) | Methods and apparatus for an embedded appliance | |
| CN100558163C (en) | Multi-screen system and driving method thereof | |
| US10165229B2 (en) | Network communication system and method thereof | |
| CN111050025A (en) | Audio and video display control method, device and system and computer readable storage medium | |
| US20170134690A1 (en) | Multi-display apparatus | |
| KR20160056135A (en) | Display apparatus and display methods thereof | |
| US20140022382A1 (en) | Video setting method | |
| US10244207B2 (en) | Videoconference communication device | |
| CN104837046A (en) | Multi-media file processing method and device | |
| CN115396621A (en) | Network push flow control method, device, equipment and storage medium based on RK628D | |
| US20160065923A1 (en) | Electronic device and color gamut determination method | |
| CN109729296B (en) | Signal output device, display device, and wireless transmission method for HDMI signal | |
| JP5869109B2 (en) | Relay device | |
| CN113489934B (en) | Intelligent manager server, intelligent manager system and remote screen interaction method | |
| CN114840282B (en) | Screen recording method and screen recording device of intelligent interaction panel | |
| JP6514648B2 (en) | Data transmission device, data reception device, and data transmission / reception system | |
| CN110581960B (en) | Video processing method, device, system, storage medium and processor | |
| KR101454333B1 (en) | Real time system for mixing captured image and backgroud image | |
| CN108848409B (en) | Set top box and wireless routing module parameter setting method thereof | |
| CN114827747B (en) | Streaming media data switching method, device, equipment and storage medium | |
| CN103888795A (en) | Digital screen on time broadcasting system and method thereof | |
| KR20190069658A (en) | System and method for service security | |
| CN110958478A (en) | Data processing system based on screen superposition | |
| CN116578450A (en) | Automatic test method and system for HDMI wireless screen-throwing equipment and related equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 33rd Floor, No.1 Huasheng Road, Yuzhong District, Chongqing 400013 Patentee after: VISIONVERA INFORMATION TECHNOLOGY Co.,Ltd. Country or region after: China Address before: 100000 Beijing Dongcheng District Qinglong Hutong 1 Song Hua Building A1103-1113 Patentee before: VISIONVERA INFORMATION TECHNOLOGY Co.,Ltd. Country or region before: China |