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CN111063779A - Preparation method and application of light-emitting diode structure - Google Patents

Preparation method and application of light-emitting diode structure Download PDF

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Publication number
CN111063779A
CN111063779A CN201811204249.9A CN201811204249A CN111063779A CN 111063779 A CN111063779 A CN 111063779A CN 201811204249 A CN201811204249 A CN 201811204249A CN 111063779 A CN111063779 A CN 111063779A
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China
Prior art keywords
layer
type semiconductor
semiconductor layer
electrode
transparent conductive
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Chinese (zh)
Inventor
吕振兴
潘尧波
齐胜利
唐军
刘亚柱
张德
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Ningbo anxinmei Semiconductor Co.,Ltd.
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Hefei Irico Epilight Technology Co Ltd
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Priority to CN201811204249.9A priority Critical patent/CN111063779A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention provides a preparation method of a light-emitting diode structure and application thereof, wherein the preparation method comprises the steps of providing a substrate; sequentially forming an N-type semiconductor layer, a quantum well layer, a P-type semiconductor layer and a transparent conductive layer on the substrate; patterning the N-type semiconductor layer, the quantum well layer, the P-type semiconductor layer and the transparent conductive layer to form a Mesa groove; and forming a first electrode and a second electrode, wherein the surfaces of the light-emitting diode structure except the first electrode and the second electrode are covered with an insulating layer. The preparation method has the advantages of few process steps, simple preparation process and high output efficiency, and can finish the flowing of the Mini LED on the existing LED production line to obtain the Mini LED with high quality, small Mesa and large Pad without additional investment; the Mini LED with the small Mesa and the large Pad has higher brightness and lower energy consumption, and has good electrical property stability and thermal stability.

Description

Preparation method and application of light-emitting diode structure
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method and application of a light-emitting diode structure.
Background
The LED has the advantages of high color purity, fast response speed, small volume, good reliability, long service life, environmental protection, etc., and is undoubtedly the most important light source technology, and with the development of the technology, the requirement of a high pixel screen is more prominent, and higher requirements are put forward on a chip with a larger size. According to the 2018 technological industry development trend published by trends, the Mini LED technology can be matched with a flexible substrate to achieve a high-curved-surface backlight form, and the Mini LED technology is organically applied to various applications such as mobile phones, televisions, vehicle-mounted panels and the like.
Because the existing horizontal structure LED production process adopts a large Mesa and small Pad design, if the existing horizontal structure LED production process is adopted to prepare the Mini LED, the Mini LED structure has low brightness, high energy consumption and poor heat dissipation performance, and the performance and the thermal stability of the LED are influenced; in addition, the conventional horizontal structure LED production process has many steps, low output efficiency and complex preparation process, which leads to low yield and high cost of the conventional Mini LED and limits large-scale mass production, so that the design and preparation process of the chip also needs more optimization on the size of the Mini LED.
Because the development of the Mini LED chip is limited by the chip process requirements combined with the requirement limit of downstream packaging on the electrode size, it is an urgent need for technical personnel in the field to find a method for preparing a Mini LED with simple manufacturing process and applicable to industrialization.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, an object of the present invention is to provide a method for manufacturing a light emitting diode structure and an application thereof, which are used to solve the technical problems of low yield and high cost in the manufacturing process of Mini LED in the prior art, which limit the mass production thereof.
To achieve the above and other related objects, the present invention provides a method for manufacturing a light emitting diode structure, the method comprising:
providing a substrate;
sequentially forming an N-type semiconductor layer, a quantum well layer, a P-type semiconductor layer and a transparent conducting layer on the substrate;
patterning the N-type semiconductor layer, the quantum well layer, the P-type semiconductor layer and the transparent conductive layer to form a groove, wherein the groove sequentially penetrates through partial thicknesses of the transparent conductive layer, the P-type semiconductor layer, the quantum well layer and the N-type semiconductor layer;
forming an insulating layer, wherein the insulating layer is provided with a first opening and a second opening, the first opening exposes a part of the transparent conducting layer, the second opening exposes the N-type semiconductor layer at the bottom of the groove, and the area of the first opening is larger than the horizontal projection area of the groove; and
forming a first electrode and a second electrode, wherein the first electrode is formed on the surface of the transparent conductive layer exposed by the first opening, the first electrode is electrically connected with the transparent conductive layer, the second electrode is formed in the groove and on part of the insulating layer at two sides of the groove, and the second electrode is electrically connected with the N-type semiconductor layer; the horizontal plane projection areas of the first electrode and the second electrode are both larger than the horizontal projection area of the groove.
As an improvement to the above method for fabricating a light emitting diode structure, the method further comprises the step of forming a semiconductor layer between the substrate and the N-type semiconductor layer; the material of the semiconductor layer comprises gallium nitride.
As an improvement to the above-mentioned method for manufacturing a light emitting diode structure, the step of forming the recess includes:
forming a patterned mask layer on the transparent conductive layer;
etching down partial thicknesses of the transparent conductive layer, the P-type semiconductor layer, the quantum well layer and the N-type semiconductor layer in sequence by using the patterned mask layer as a mask;
and removing the patterned mask layer to form the groove.
As an improvement to the above-mentioned method for manufacturing a light emitting diode structure, the step of forming the recess includes:
forming a patterned mask layer on the transparent conductive layer;
etching the transparent conducting layer downwards by a wet method by taking the patterned mask layer as a mask, wherein the etching is stopped on the surface of the P-type semiconductor layer;
etching part of the thicknesses of the P-type semiconductor layer, the quantum well layer and the N-type semiconductor layer downwards in sequence by taking the patterned mask layer as a mask;
and removing the patterned mask layer to form the groove.
As an improvement on the preparation method of the light emitting diode structure, when the transparent conducting layer is etched by a wet method, the side etching width of the transparent conducting layer is 1-2 μm; the size of the opening in the transparent conductive layer is larger than the size of the pattern in the patterned mask layer.
As an improvement on the preparation method of the light-emitting diode structure, the thickness of the insulating layer is not less than 230 nm.
As an improvement on the preparation method of the light-emitting diode structure, the thickness of the transparent conducting layer is between 60nm and 240nm, and is preferably 110 nm.
In one embodiment, the material of the N-type semiconductor layer includes N-type gallium nitride; the material of the quantum well layer comprises indium gallium nitride or gallium nitride; the material of the P-type semiconductor layer comprises P-type gallium nitride.
In one embodiment, the material of the transparent conductive layer includes ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In4Sn3O12One of NiAu; the insulating layer comprises a transparent insulating layer comprising silicon nitride or silicon dioxide; the first electrode and the second electrode are made of multilayer metal structures, and the multilayer metal structures comprise CrAlTiNiTiNiNiAu or CrAlNiPtNiPtNiPtAu which are sequentially stacked.
In order to achieve the above objects and other related objects, the present invention further provides a use of the above method for manufacturing a light emitting diode structure, which is applied to the manufacture of Micro LEDs, Mini LEDs or small-pitch LEDs.
As described above, the light emitting diode structure of the present invention has the following advantages:
the light-emitting diode structure manufactured by the invention adopts the structures of small Mesa (the groove) and large Pad (the first electrode and the second electrode), so that the light-emitting surface can be utilized to the maximum extent and the existing horizontal structure process method is utilized, and the light-emitting diode structure with the same size has higher brightness and lower energy consumption;
by utilizing the light-emitting diode structure manufactured by the invention, the insulating layer is introduced into the side wall of the Mesa groove, so that the possible leakage channel is insulated and protected, and the electrical stability of the light-emitting diode structure is improved;
the light-emitting diode structure manufactured by the invention adopts a large Pad design, so that the light-emitting diode structure has good heat conduction channel (heat dissipation capacity) and thermal stability, namely excellent anti-aging capacity;
the preparation method of the light-emitting diode structure has the advantages of few process steps, simple preparation process and high output efficiency;
the method for preparing the light-emitting diode structure can be applied to the preparation of the Mini LED, can finish the flow of the Mini LED on the existing LED production line, does not need additional investment, and obtains the Mini LED products with high quality, small Mesa and large Pad.
Drawings
Fig. 1 is a flow chart of a method for manufacturing a light emitting diode structure according to the present invention.
Fig. 2 is a schematic structural view illustrating an N-type semiconductor layer, a quantum well layer, a P-type semiconductor layer, and a transparent conductive layer formed on a substrate according to the present invention.
Fig. 3 is a schematic diagram illustrating a structure of forming a groove (Mesa) in the present invention.
FIG. 4 is a schematic diagram of a structure of forming an insulating layer according to the present invention.
Fig. 5 is a schematic structural diagram of a light emitting diode according to the present invention.
Description of the element reference numerals
1 substrate
2N type semiconductor layer
3 Quantum well layer
4P-type semiconductor layer
5 transparent conductive layer
6 groove
7 insulating layer
81 first opening
82 second opening
91 first electrode
92 second electrode
S10-S50
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
Please refer to fig. 1-5. It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
Example one
As shown in fig. 1 to 5, in order to solve the technical problems of low yield and high cost in the manufacturing process of the Mini LED in the prior art, which limits large-scale mass production, the present embodiment provides a method for manufacturing a light emitting diode structure, as shown in fig. 1, the method for manufacturing a light emitting diode structure includes the following steps:
step S10 is executed, as shown in fig. 2, a substrate 1 is provided, the material of the substrate 1 includes but is not limited to sapphire, aluminum nitride, gallium nitride, silicon, and silicon carbide; the substrate 1 may be a planar substrate or a patterned substrate.
Step S20 is performed to form an N-type semiconductor layer 2, a quantum well layer 3, a P-type semiconductor layer 4 and a transparent conductive layer 5 on the substrate 1 in sequence as shown in fig. 2.
In some embodiments, a semiconductor layer (not shown) is formed between the substrate 1 and the N-type semiconductor layer 2.
As an example, the formation process of the structure shown in fig. 2 is: sequentially growing a GaN layer (a semiconductor layer), an N-GaN layer (an N-type semiconductor layer 2), an indium gallium nitride or gallium nitride layer (a quantum well layer 3) and a P-GaN layer (a P-type semiconductor layer 4) on the patterned substrate 1 to form a stable LED epitaxial structure; cleaning the surface of the LED epitaxial structure, and then spin-drying the surface by using a hot nitrogen machine; forming an ITO transparent conductive layer (transparent conductive layer 5) on the cleaned LED epitaxial structure, wherein the ITO transparent conductive layer may be formed by thermal evaporation or sputtering, and the thickness of the ITO transparent conductive layer is between 60nm and 240nm, preferably 110nm, and it should be noted that, In other embodiments, the ITO transparent conductive layer 5 may also be ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In, or the like4Sn3O12Or a transparent conductive layer such as NiAu, but not limited thereto.
Step S30 is performed, as shown in fig. 3, to pattern the N-type semiconductor layer 2, the quantum well layer 3, the P-type semiconductor layer 4 and the transparent conductive layer 5 to form a groove 6, wherein the groove 6 penetrates through partial thicknesses of the transparent conductive layer 5, the P-type semiconductor layer 4, the quantum well layer 3 and the N-type semiconductor layer 2 in sequence.
In this embodiment, the step of forming the groove 6 includes forming a patterned mask layer on the transparent conductive layer 5; etching down partial thicknesses of the transparent conductive layer 5, the P-type semiconductor layer 4, the quantum well layer 3 and the N-type semiconductor layer 2 in sequence with the patterned mask layer as a mask; the patterned mask layer is removed to form the recess 6.
Specifically, the step of forming the groove 6 includes forming a patterned mask layer on the transparent conductive layer 5; wet etching the transparent conductive layer 5 downwards by taking the patterned mask layer as a mask, wherein the etching is stopped on the surface of the P-type semiconductor layer 4; etching down partial thicknesses of the P-type semiconductor layer 4, the quantum well layer 3, and the N-type semiconductor layer 2 in sequence with the patterned mask layer as a mask; the patterned mask layer is removed to form the recess 6.
As an example, the formation process of the structure shown in fig. 3 is: spin-coating a photoresist layer on the ITO transparent conductive layer 5 in the structure formed in step S20, wherein the photoresist layer may adopt positive photoresist (KMP3200), and performing yellow light processes such as pattern exposure, development, baking and the like on the photoresist layer to define the pattern of the groove 6 on the photoresist layer; selecting ITO etching liquid to etch the developed ITO cleanly by wet etching, controlling the side corrosion of the ITO transparent conducting layer, controlling the side corrosion width to be 1-2 mu m to form an opening in the ITO transparent conducting layer 5, and preventing the photoresist layer from being removed after the ITO transparent conducting layer is corroded, wherein the etching liquid is the ITO etching liquid when the ITO transparent conducting layer is etched by the wet etching, the temperature is 30-60 ℃, and the etching time is 100-150S; spin-drying with a hot nitrogen machine and baking in an oven after etching; continuously using the photoresist layer with the pattern of the groove 6 defined as a mask, and adopting an ICP (inductively coupled plasma) process to etch part of the thicknesses of the P-GaN layer (P-type semiconductor layer 4), the indium gallium nitride or gallium nitride layer (quantum well layer) and the N-GaN layer (N-type semiconductor layer 2) downwards in sequence; removing the photoresist layer to form said grooves 6(Mesa), preferably with Cl during ICP2、BCl3Ar is used as etching gas, and the flow rates are respectively as follows: cl2Is 30-100sccm, BCl310-30sccm and Ar 10-20 sccm; the power of the upper electrode and the lower electrode is 50-500W and 10-200W respectively, the etching time is 10S-50min, and the etching time can be reasonably selected according to the thickness and the etching depth of the LED epitaxial structure. Need to make sure thatIt is noted that, since the ITO transparent conductive layer 5 is subjected to side etching by wet etching, the size of the opening in the ITO transparent conductive layer 5 is larger than the pattern size of the groove 6 in the photoresist layer.
Step S40 is executed, as shown in fig. 4, an insulating layer 7 is formed, where the insulating layer 7 has a first opening 81 and a second opening 82, the first opening 81 exposes a portion of the transparent conductive layer 5, and the second opening 82 exposes the N-type semiconductor layer 2 at the bottom of the groove 6, and an area of the first opening 81 is larger than a horizontal projection area of the groove 6.
As an example, the formation process of the structure shown in fig. 4 is: placing the product formed in the step S30 into a rapid annealing furnace for rapid annealing, wherein the annealing temperature of the ITO rapid annealing furnace is 500-700 ℃, the annealing time is 1-10min, and the heating rate is 10-50 ℃/S; annealing is followed by an insulating layer 7 (SiO)2、Si3N4 or other transparent insulating layer); then spin-coating a photoresist layer on the surface of the structure deposited with the insulating layer 7, wherein the photoresist layer can adopt positive photoresist (KMP3200), and performing yellow light processes such as pattern exposure, development and baking on the photoresist layer to define patterns of the first opening 81 and the second opening 82 on the photoresist layer; etching the insulating layer 7 by using BOE, HF acid or dry etching to form the first opening 81 and the second opening 82 on the insulating layer 7, wherein the first opening 81 exposes a portion of the ITO transparent conductive layer 5, and the second opening 82 exposes the N-GaN layer (N-type semiconductor layer 2) at the bottom of the groove 6, and the area of the first opening 81 is larger than the horizontal projection area of the groove 6; and removing the photoresist after etching.
In order to better prevent the occurrence of current leakage in the light emitting diode, the insulating layer should have a relatively thick thickness, and the thickness of the insulating layer is not less than 230nm as an example.
Step S50 is executed, as shown in fig. 5, a first electrode 91 and a second electrode 92 are formed, the first electrode 91 is formed on the surface of the transparent conductive layer 5 exposed by the first opening 81, the first electrode 91 is electrically connected to the transparent conductive layer 5, the second electrode 92 is formed in the groove 6 and on a portion of the insulating layer 7 on both sides of the groove 6, and the second electrode 92 is electrically connected to the N-type semiconductor layer 2; the horizontal plane projection area of the first electrode 91 and the horizontal plane projection area of the second electrode 92 are both larger than the horizontal plane projection area of the groove 6.
The process of forming the first electrode 91 and the second electrode 92 specifically includes: spin coating a photoresist layer on the surface of the structure formed in step S40, wherein the photoresist layer may be a negative photoresist, such as KMP 3130; performing yellow light processes such as pattern exposure, development and baking on the photoresist layer to define the first electrode 91(P-Pad) pattern and the second electrode 92(N-Pad) pattern on the photoresist layer; the first electrode 91 pattern exposes the ITO transparent conductive layer 5 at the bottom of the first opening 81, and the second electrode 92 pattern exposes the N-GaN layer (N-type semiconductor layer 2) at the bottom of the groove 6 and a portion of the insulating layer 7 at both sides of the groove 6; forming a metal layer on the patterned photoresist layer, wherein the metal layer is formed by evaporation or sputtering evaporation, and the metal layer is a multilayer metal structure, such as CrAlTiNiTiNiNiNiNiAu or CrAlNiPtNiPtNiPtAu, which are sequentially stacked; after the metal layer is formed, stripping and removing the photoresist from the metal layer is performed to form the first electrode 91(P-Pad) and the second electrode 92(N-Pad), wherein the horizontal projection areas of the first electrode 91(P-Pad) and the second electrode 92(N-Pad) are both larger than the horizontal projection area of the groove 6(Mesa), so as to form the light emitting diode structure with a small Mesa and a large Pad as shown in fig. 5.
It should be noted that the use of small Mesa and large Pad can maximize the utilization of the light emitting surface and the existing horizontal structure process, so that the light emitting diode structure with the same size has higher brightness and lower energy consumption; the insulating layer 7 is introduced into the side wall of the Mesa groove, so that a possible leakage channel is insulated and protected, and the electrical stability of the light-emitting diode structure is improved; by adopting a large Pad design, the light-emitting diode structure has good heat conduction channel (heat dissipation capability) and thermal stability, namely excellent ageing resistance.
After the first electrode 91 and the second electrode 92 are formed, the subsequent steps such as grinding, thinning, scribing, testing, and sorting are performed to finally form a product.
It should be noted that the method for manufacturing the light emitting diode structure of the embodiment can be applied to the manufacture of a small Mesa and a large Pad Mini LED with high quality, and the Mini LED can be produced on the existing LED production line without additional investment, so that the Mini LED products with high quality of the small Mesa and the large Pad can be obtained, and the method can also be applied to the manufacture of Micro LEDs, small pitch LEDs, and other LEDs with larger or smaller size; that is, the method for manufacturing the light emitting diode structure of the embodiment can be applied to manufacturing light emitting diodes with micron scale, and also with the light emitting diodes larger or smaller than the micron scale.
Example two
As shown in fig. 5, this embodiment provides a light emitting diode structure prepared by the method of the first embodiment, where the structure includes: a substrate 1, and an N-type semiconductor layer 2, a quantum well layer 3, a P-type semiconductor layer 4 and a transparent conductive layer 5 sequentially formed on the substrate 1; a groove 6, wherein the groove 6 penetrates through partial thicknesses of the transparent conductive layer 5, the P-type semiconductor layer 4, the quantum well layer 3 and the N-type semiconductor layer 2 in sequence; an insulating layer 7, wherein the insulating layer 7 has a first opening 81 and a second opening 82, the first opening 81 exposes a portion of the transparent conductive layer 5, and the second opening 82 exposes the N-type semiconductor layer 2 at the bottom of the groove 6; a first electrode 91, wherein the first electrode 91 is located on the surface of the transparent conductive layer 5 exposed by the first opening 81, and the first electrode 91 is electrically connected to the transparent conductive layer 5; the second electrode 92 is positioned in the groove 6 and on a part of the insulating layer 7 on two sides of the groove 6, and the second electrode 92 is electrically connected with the N-type semiconductor layer 2; wherein, the horizontal plane projection area of the first electrode 91 and the second electrode 92 is larger than the horizontal plane projection area of the groove 6.
Specifically, the light emitting diode structure further comprises a semiconductor layer, and the semiconductor layer is located between the substrate 1 and the N-type semiconductor layer 2. As an example, the material of the semiconductor layer includes gallium nitride.
Specifically, the portion of the groove 6 located on the transparent conductive layer 5 has a first size, and the portion of the groove 6 located under the transparent conductive layer 5 has a second size, and the first size is larger than the second size.
As an example, the material of the N-type semiconductor layer 2 includes N-type gallium nitride; the material of the quantum well layer 3 comprises indium gallium nitride or gallium nitride; the material of the P-type semiconductor layer 4 comprises P-type gallium nitride; the transparent conductive layer 5 is made of ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In4Sn3O12One of NiAu; the insulating layer 7 comprises a transparent insulating layer 7, and the transparent insulating layer 7 comprises silicon nitride or silicon dioxide.
It should be noted that the light emitting diode structure in this embodiment can be obtained by the preparation method described in the first embodiment, and can also be formed by other feasible process steps, which is not limited thereto.
In summary, the present invention provides a method for manufacturing a light emitting diode structure and a use thereof, the method for manufacturing a light emitting diode includes providing a substrate; sequentially forming an N-type semiconductor layer, a quantum well layer, a P-type semiconductor layer and a transparent conducting layer on the substrate; patterning the N-type semiconductor layer, the quantum well layer, the P-type semiconductor layer and the transparent conductive layer to form a groove, wherein the groove sequentially penetrates through partial thicknesses of the transparent conductive layer, the P-type semiconductor layer, the quantum well layer and the N-type semiconductor layer; forming an insulating layer, wherein the insulating layer is provided with a first opening and a second opening, the first opening exposes a part of the transparent conducting layer, the second opening exposes the N-type semiconductor layer at the bottom of the groove, and the area of the first opening is larger than the horizontal projection area of the groove; forming a first electrode and a second electrode, wherein the first electrode is formed on the surface of the transparent conductive layer exposed by the first opening, the first electrode is electrically connected with the transparent conductive layer, the second electrode is formed in the groove and on part of the insulating layer at two sides of the groove, and the second electrode is electrically connected with the N-type semiconductor layer; the horizontal plane projection areas of the first electrode and the second electrode are both larger than the horizontal projection area of the groove. The light-emitting diode structure adopts the structures of small Mesa (the groove) and large Pad (the first electrode and the second electrode), so that the light-emitting surface can be utilized to the maximum extent and the existing horizontal structure process method is utilized, and the light-emitting diode structure with the same size has higher brightness and lower energy consumption; according to the light-emitting diode structure, the insulating layer is introduced into the side wall of the Mesa groove, so that a possible leakage channel is subjected to insulation protection, and the electrical stability of the light-emitting diode structure is improved; the light-emitting diode structure adopts a large Pad design, so that the light-emitting diode structure has a good heat conduction channel (heat dissipation capacity) and thermal stability, namely excellent ageing resistance; the preparation method of the light-emitting diode structure has the advantages of few process steps, simple preparation process and high output efficiency; the method for preparing the light-emitting diode structure can be applied to the preparation of the Mini LED, can finish the flow of the Mini LED on the existing LED production line, does not need additional investment, and obtains the Mini LED products with high quality, small Mesa and large Pad. Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (10)

1. A method for manufacturing a light emitting diode structure is characterized by comprising the following steps:
providing a substrate;
sequentially forming an N-type semiconductor layer, a quantum well layer, a P-type semiconductor layer and a transparent conducting layer on the substrate;
patterning the N-type semiconductor layer, the quantum well layer, the P-type semiconductor layer and the transparent conductive layer to form a groove, wherein the groove sequentially penetrates through partial thicknesses of the transparent conductive layer, the P-type semiconductor layer, the quantum well layer and the N-type semiconductor layer;
forming an insulating layer, wherein the insulating layer is provided with a first opening and a second opening, the first opening exposes a part of the transparent conducting layer, the second opening exposes the N-type semiconductor layer at the bottom of the groove, and the area of the first opening is larger than the horizontal projection area of the groove; and
forming a first electrode and a second electrode, wherein the first electrode is formed on the surface of the transparent conductive layer exposed by the first opening, the first electrode is electrically connected with the transparent conductive layer, the second electrode is formed in the groove and on part of the insulating layer at two sides of the groove, and the second electrode is electrically connected with the N-type semiconductor layer; the horizontal plane projection areas of the first electrode and the second electrode are both larger than the horizontal projection area of the groove.
2. The method of claim 1, further comprising a step of forming a semiconductor layer between the substrate and the N-type semiconductor layer; the material of the semiconductor layer comprises gallium nitride.
3. The method for manufacturing an led structure according to claim 1, wherein the step of forming the groove comprises:
forming a patterned mask layer on the transparent conductive layer;
etching down partial thicknesses of the transparent conductive layer, the P-type semiconductor layer, the quantum well layer and the N-type semiconductor layer in sequence by using the patterned mask layer as a mask;
and removing the patterned mask layer to form the groove.
4. The method for manufacturing an led structure according to claim 1, wherein the step of forming the groove comprises:
forming a patterned mask layer on the transparent conductive layer;
etching the transparent conducting layer downwards by a wet method by taking the patterned mask layer as a mask, wherein the etching is stopped on the surface of the P-type semiconductor layer;
etching part of the thicknesses of the P-type semiconductor layer, the quantum well layer and the N-type semiconductor layer downwards in sequence by taking the patterned mask layer as a mask;
and removing the patterned mask layer to form the groove.
5. The method for manufacturing the led structure according to claim 4, wherein when the transparent conductive layer is wet-etched, the lateral etching width of the transparent conductive layer is 1 μm to 2 μm.
6. The method of claim 1, wherein the insulating layer has a thickness of not less than 230 nm.
7. The method for manufacturing an led structure according to claim 1, wherein the thickness of the transparent conductive layer is 60nm to 240 nm.
8. The method for manufacturing a light emitting diode structure according to any one of claims 1 to 7, wherein the material of the N-type semiconductor layer comprises N-type gallium nitride; the material of the quantum well layer comprises indium gallium nitride or gallium nitride; the material of the P-type semiconductor layer comprises P-type gallium nitride.
9. The method for manufacturing the light emitting diode structure according to any one of claims 1 to 7, wherein the material of the transparent conductive layer comprises ITO, ZITO, ZIO, GIO, ZTO, FTO, AZO, GZO, In4Sn3O12One of NiAu; the insulating layer comprises a transparent layerAn insulating layer, the transparent insulating layer comprising silicon nitride or silicon dioxide; the first electrode and the second electrode are made of multilayer metal structures, and the multilayer metal structures comprise CrAlTiNiTiNiNiAu or CrAlNiPtNiPtNiPtAu which are sequentially stacked.
10. Use of a method of manufacturing a light emitting diode structure according to any of claims 1-9. The method for preparing the light-emitting diode structure is applied to preparation of Micro LEDs, Mini LEDs or small-spacing LEDs.
CN201811204249.9A 2018-10-16 2018-10-16 Preparation method and application of light-emitting diode structure Pending CN111063779A (en)

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CN113257959A (en) * 2021-04-09 2021-08-13 深圳市思坦科技有限公司 Preparation method of micro light-emitting diode chip, micro light-emitting diode chip and display module
TWI798759B (en) * 2020-08-04 2023-04-11 日商日本顯示器股份有限公司 Manufacturing method of LED module and manufacturing method of display device
US12107189B2 (en) 2020-11-24 2024-10-01 Japan Display Inc. Light-emitting element and electronic device

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CN107039569A (en) * 2015-10-16 2017-08-11 首尔伟傲世有限公司 Light-emitting diode chip for backlight unit

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TWI798759B (en) * 2020-08-04 2023-04-11 日商日本顯示器股份有限公司 Manufacturing method of LED module and manufacturing method of display device
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