Disclosure of Invention
The invention aims to provide a display panel which reduces the lateral capacitance between two adjacent metal layers and reduces the signal influence.
The invention provides a display panel, which comprises a first metal layer, a second metal layer, a grid insulating layer, a first insulating layer, an organic insulating layer and a common electrode, wherein the first metal layer and the second metal layer are crisscrossed; a second auxiliary metal layer formed simultaneously with and adjacent to the second metal layer; the plane of the lower surface of the common electrode between the second metal layer and the second auxiliary metal layer is lower than the plane of the upper surfaces of the second metal layer and the second auxiliary metal layer.
Preferably, a first opening between the second metal layer and the second auxiliary metal layer is formed in the first insulating layer, and a part of the first insulating layer is still arranged at the bottom of the first opening; the organic insulating layer is provided with a second through hole penetrating through the organic insulating layer, and the second through hole and the first opening are arranged in an overlapping mode.
Preferably, a first opening between the second metal layer and the second auxiliary metal layer is formed in the gate insulating layer, and a part of the gate insulating layer is still arranged at the bottom of the first opening; the organic insulating layer and the first insulating layer are provided with second through holes penetrating through the organic insulating layer and the first insulating layer, and the second through holes and the first openings are arranged in an overlapping mode.
The invention also provides a display panel, which comprises a first metal layer and a second metal layer which are crisscrossed, a grid electrode insulating layer which is positioned between the first metal layer and the second metal layer and covers the first metal layer, a first insulating layer which covers the second metal layer and a common electrode which is positioned on the first insulating layer; a second auxiliary metal layer formed simultaneously with and adjacent to the second metal layer; the plane of the lower surface of the common electrode between the second metal layer and the second auxiliary metal layer is lower than the plane of the upper surfaces of the second metal layer and the second auxiliary metal layer.
Preferably, the first insulating layer is provided with a first opening between the second metal layer and the second auxiliary metal layer, and a part of the first insulating layer is still arranged at the bottom of the first opening.
Preferably, the gate insulating layer is provided with a first opening between the second metal layer and the second auxiliary metal layer, and a part of the gate insulating layer is still arranged at the bottom of the first opening; the first insulating layer is provided with a second through hole penetrating through the first insulating layer, and the second through hole is overlapped with the first opening.
The invention also provides a display panel, which comprises a first metal layer and a second metal layer which are crisscrossed, a grid electrode insulating layer which is positioned between the first metal layer and the second metal layer and covers the first metal layer, a first insulating layer which covers the second metal layer, an organic insulating layer which covers the first insulating layer and a common electrode which is positioned on the organic insulating layer; further comprising a first auxiliary metal layer formed simultaneously with and proximate to the first metal layer; the plane of the lower surface of the common electrode between the first metal layer and the first auxiliary metal layer is lower than the plane of the upper surfaces of the first metal layer and the first auxiliary metal layer.
Preferably, the first insulating layer is provided with a first opening between the first metal layer and the first auxiliary metal layer, and a part of the first insulating layer is still arranged at the bottom of the first opening; the organic insulating layer is provided with a second through hole penetrating through the organic insulating layer, and the second through hole and the first opening are arranged in an overlapping mode.
Preferably, the gate insulating layer is provided with a first opening between the first metal layer and the first auxiliary metal layer, and a part of the gate insulating layer is still arranged at the bottom of the first opening; the organic insulating layer and the first insulating layer are provided with second through holes penetrating through the organic insulating layer and the first insulating layer, and the second through holes and the first openings are arranged in an overlapping mode.
The invention also provides a display panel, which comprises a first metal layer and a second metal layer which are crisscrossed, a grid electrode insulating layer which is positioned between the first metal layer and the second metal layer and covers the first metal layer, a first insulating layer which covers the second metal layer and a common electrode which is positioned on the first insulating layer; further comprising a first auxiliary metal layer formed simultaneously with and proximate to the first metal layer; the plane of the lower surface of the common electrode between the first metal layer and the first auxiliary metal layer is lower than the plane of the upper surfaces of the first metal layer and the first auxiliary metal layer; the grid insulation layer is provided with a first opening between the first metal layer and the first auxiliary metal layer, and the bottom of the first opening is still provided with a part of the grid insulation layer; the first insulating layer is provided with a second through hole penetrating through the first insulating layer, and the second through hole is overlapped with the first opening.
According to the display panel, the insulating layer between the two adjacent metal layers formed on the same layer with different functions is provided with the hole, so that the plane of the lower surface of the common electrode between the two adjacent metal layers is lower than the plane of the upper surfaces of the two adjacent metal layers, the lateral capacitance between the two adjacent metal layers can be reduced, and the signal influence between the two adjacent metal layers can be greatly reduced.
Detailed Description
The present invention is further illustrated by the following figures and specific examples, which are to be understood as illustrative only and not as limiting the scope of the invention, which is to be given the full breadth of the appended claims and any and all equivalent modifications thereof which may occur to those skilled in the art upon reading the present specification.
For the sake of simplicity, the drawings only schematically show the parts relevant to the present invention, and they do not represent the actual structure as a product. In addition, in order to make the drawings concise and understandable, components having the same structure or function in some of the drawings are only schematically illustrated or only labeled. In this document, "one" means not only "only one" but also a case of "more than one".
A display panel of the present invention, as shown in fig. 1, includes a first metal layer (not shown) and a second metal layer (data)40 which are criss-crossed, a gate insulating layer (GI)30 which is located between the first metal layer (not shown) and the second metal layer (data)40 and covers the first metal layer, a first insulating layer (PAS1)50 which covers the second metal layer 40, an organic insulating layer (JAS)60 which covers the first insulating layer 50, a common electrode (COM-ITO)70 which is located on the organic insulating layer 60, a second insulating layer (not shown) which covers the common electrode 70, and a pixel electrode (not shown) which is located on the second insulating layer.
The manufacturing method of the display panel comprises the following steps:
the first step is as follows: forming a first metal layer on the substrate 10;
the second step is that: forming a gate insulating layer (GI)30 covering the first metal layer;
the third step: forming a semiconductor layer on the gate insulating layer 30 and then forming a second metal layer 40;
the fourth step: forming a first insulating layer 50 covering the second metal layer 40 and forming an organic insulating layer 60 covering the first insulating layer 50;
the fifth step: depositing a common electrode 70 on the organic insulating layer 60;
and a sixth step: a second insulating layer (not shown) covering the common electrode 70 and a pixel electrode (not shown) on the second insulating layer are formed.
In the embodiment, the first metal layer forms a grid electrode and a scanning line through etching, exposure and display; the second metal layer forms a data line, a source electrode and a drain electrode through etching, exposure and display, and the source electrode and the drain electrode are respectively positioned on two sides of the semiconductor layer and are in contact with the semiconductor layer.
For some display panels, a second auxiliary metal layer (CK)41 disposed adjacent to the second metal layer 40 is formed with the second metal layer 40 in each pixel region at the same time as the second metal layer 40 is formed due to the need for testing and repair, etc. Due to the presence of the second auxiliary metal layer 41, a lateral capacitance exists between the second metal layer 40 and the second auxiliary metal layer 41, and the presence of the lateral capacitance causes the second metal layer 40 and the second auxiliary metal layer 41 to be coupled with each other, which ultimately affects the display.
As shown in fig. 1, the first embodiment: in order to solve the problem of lateral capacitance, after the first insulating layer 50 is formed, a first opening 51 is formed in the first insulating layer 50 between the second metal layer 40 and the second auxiliary metal layer 41, and a part of the first insulating layer 50 remains at the bottom of the first opening 51; the organic insulating layer 60 covers the first insulating layer 50 and is located in the first opening 51, the organic insulating layer 60 is provided with a second through hole 61 penetrating through the organic insulating layer 60, and the second through hole 61 and the first opening 51 are overlapped. The plane of the lower surface of the common electrode 70 between the second metal layer 40 and the second auxiliary metal layer 41 is lower than the plane of the upper surfaces of the second metal layer 40 and the second auxiliary metal layer 41, so that the lateral capacitance existing between the second metal layer 40 and the second auxiliary metal layer 41 can be reduced.
As shown in fig. 2, the second embodiment: in order to solve the problem of lateral capacitance, after the gate insulating layer 30 is formed, the gate insulating layer 30 is provided with a first opening 31 between the second metal layer 40 and the second auxiliary metal layer 41, and a part of the gate insulating layer 30 is still arranged at the bottom of the first opening 31; the organic insulating layer 60 and the first insulating layer 50 are provided with a second through hole 61 penetrating through the organic insulating layer 60 and the first insulating layer 50, and the second through hole 61 overlaps with the first opening 31; the common electrode 70 directly contacts the gate insulating layer 30 in the second via hole 61 and the first opening 31, and a plane of a lower surface of the common electrode 70 between the second metal layer 40 and the second auxiliary metal layer 41 is lower than a plane of an upper surface of the second metal layer 40 and the second auxiliary metal layer 41, so that a lateral capacitance existing between the second metal layer 40 and the second auxiliary metal layer 41 can be reduced.
In other embodiments, the display panel may not be provided with an organic insulating layer, when the organic insulating layer is not provided, the first insulating layer 50 is provided with a first opening located between the second metal layer 40 and the second auxiliary metal layer 41, and a portion of the first insulating layer 50 remains at the bottom of the first opening; the plane of the lower surface of the common electrode 70 between the second metal layer 40 and the second auxiliary metal layer 41 is lower than the plane of the upper surfaces of the second metal layer 40 and the second auxiliary metal layer 41, so that the lateral capacitance existing between the second metal layer 40 and the second auxiliary metal layer 41 can be reduced.
In other embodiments, the display panel may not have an organic insulating layer, and when the organic insulating layer is not provided, the gate insulating layer 30 has a first opening located between the second metal layer 40 and the second auxiliary metal layer 41, and a portion of the gate insulating layer 30 remains at the bottom of the first opening; the first insulating layer 50 is provided with a second through hole penetrating through the first insulating layer, and the second through hole overlaps with the first opening; the common electrode 70 directly contacts the gate insulating layer 30 in the second via hole and the first opening, and a plane of a lower surface of the common electrode 70 located between the second metal layer 40 and the second auxiliary metal layer 41 is lower than a plane of upper surfaces of the second metal layer 40 and the second auxiliary metal layer 41, so that a lateral capacitance existing between the second metal layer 40 and the second auxiliary metal layer 41 can be reduced.
In other embodiments, as shown in fig. 3, the first metal layer 20 is formed simultaneously with the first metal layer 20 and the first auxiliary metal layer 21 is disposed adjacent to the first metal layer 20, as required for testing and repair.
The third embodiment: in order to solve the problem of lateral capacitance, after the first insulating layer 50 is formed, the first insulating layer 50 is provided with a first opening (not shown) between the first metal layer 20 and the first auxiliary metal layer 21, and a part of the first insulating layer 50 remains at the bottom of the first opening; the organic insulating layer 60 is provided with a second through hole 61 penetrating the organic insulating layer 60, and the second through hole 61 is located on the first insulating layer 50, and the second through hole and the first opening are overlapped. The plane of the lower surface of the common electrode 70 between the first metal layer 20 and the first auxiliary metal layer 21 is lower than the plane of the upper surfaces of the first metal layer 20 and the first auxiliary metal layer 21, so that the lateral capacitance existing between the first metal layer 20 and the first auxiliary metal layer 21 can be reduced.
As shown in fig. 3, the fourth embodiment: in order to solve the problem of lateral capacitance, after the gate insulating layer 30 is formed, the gate insulating layer 30 is provided with a first opening 31 between the first metal layer 20 and the first auxiliary metal layer 21, and a part of the gate insulating layer 30 is still arranged at the bottom of the first opening 31; the organic insulating layer 60 and the first insulating layer 50 are provided with a second through hole 61 penetrating the organic insulating layer 60 and the first insulating layer 50, and the second through hole 61 overlaps the first opening 31; the common electrode 70 directly contacts the gate insulating layer 30 in the second via hole 61 and the first opening 31, and a lower surface of the common electrode 70 between the first metal layer 20 and the first auxiliary metal layer 21 is located at a lower level than a level of an upper surface of the first metal layer 20 and the first auxiliary metal layer 21, so that a lateral capacitance existing between the first metal layer 20 and the first auxiliary metal layer 21 can be reduced.
In other embodiments, the display panel may not have an organic insulating layer, and when the organic insulating layer is not provided, the gate insulating layer 30 has a first opening located between the first metal layer 20 and the first auxiliary metal layer 21, and a portion of the gate insulating layer 30 is still located at the bottom of the first opening; the first insulating layer 50 is provided with a second through hole penetrating through the first insulating layer 50, and the second through hole and the first opening are overlapped; the common electrode 70 directly contacts the gate insulating layer 30 in the second via hole and the first opening, and a plane of a lower surface of the common electrode 70 between the first metal layer 20 and the first auxiliary metal layer 21 is lower than a plane of an upper surface of the first metal layer 20 and the first auxiliary metal layer 21, so that a lateral capacitance existing between the first metal layer 20 and the first auxiliary metal layer 21 can be reduced.
According to the display panel, the insulating layer between the two adjacent metal layers formed on the same layer with different functions is provided with the hole, so that the plane of the lower surface of the common electrode between the two adjacent metal layers is lower than the plane of the upper surfaces of the two adjacent metal layers, the lateral capacitance between the two adjacent metal layers can be reduced, and the signal influence between the two adjacent metal layers can be greatly reduced.
Although the preferred embodiments of the present invention have been described in detail, the present invention is not limited to the details of the foregoing embodiments, and various equivalent changes (such as number, shape, position, etc.) may be made to the technical solution of the present invention within the technical spirit of the present invention, and these equivalent changes are all within the protection scope of the present invention.