CN111025374B - DDS device neutron effect evaluation system - Google Patents
DDS device neutron effect evaluation system Download PDFInfo
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- CN111025374B CN111025374B CN201911284148.1A CN201911284148A CN111025374B CN 111025374 B CN111025374 B CN 111025374B CN 201911284148 A CN201911284148 A CN 201911284148A CN 111025374 B CN111025374 B CN 111025374B
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- 238000012544 monitoring process Methods 0.000 claims abstract description 8
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
- G01T3/00—Measuring neutron radiation
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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Abstract
The invention discloses a neutron effect evaluation system of a DDS device, and belongs to the technical field of integrated circuits. The neutron effect evaluation system of the DDS device comprises a circuit board to be tested and a configuration circuit board which are positioned in a radiation room, and a spectrum analyzer, a phase noise tester, a frequency counter, a low-phase noise signal source, a power supply, a computer and a GPIB controller which are positioned in a monitoring room; the circuit board to be tested is respectively connected with the spectrum analyzer, the phase noise tester and the frequency counter through connecting cables and is connected with the configuration circuit board through a short-distance cable; the configuration circuit board is respectively connected with the low-phase noise signal source, the power supply and the computer through connecting cables; the GPIB controller is respectively connected with the spectrum analyzer, the phase noise tester, the frequency counter, the low-phase noise signal source and the computer. The invention provides a DDS neutron effect evaluation system based on the current test conditions, can carry out neutron effect evaluation on a high-speed DDS device on line, and has great engineering significance.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a neutron effect evaluation system of a DDS device.
Background
Neutrons are high-energy particles without electric charges, have extremely strong penetrating power and are distributed in the atmosphere and deep space areas of the earth. The metal shell and the internal material of the aircraft hardly have any blocking effect on the metal shell and the internal material, neutrons penetrate through the shell and directly act on internal devices, neutron effects such as displacement damage and device ionization are caused, dynamic performance reduction, frequency deviation and functional failure of the devices are caused, and therefore the function of the aircraft is interrupted, data acquisition is abnormal, even flight control errors are caused, and the safety of the aircraft is seriously influenced.
A DDS (Direct Digital Synthesizer) is a device of a Digital frequency and phase waveform synthesis technology, which generates a sinusoidal Digital signal by an internal Digital core and converts the sinusoidal Digital signal into an analog signal for output by an embedded DAC. The DDS device internally comprises an SRAM, a configuration circuit, a large-scale digital module and a digital-to-analog converter, the DDS device has certain sensitivity to neutron effect, the current international evaluation on the anti-neutron effect of the DDS device is just started, and almost no related papers and patents of a neutron test system and a test method of the DDS device exist.
Neutron test conditions have certain limitations, a high-frequency clock needs to be provided and online test and evaluation are carried out, the radiation area and the monitoring area are long in distance, and the test of clock transmission and device dynamic performance is difficult.
Disclosure of Invention
The invention aims to provide a neutron effect evaluation system of a DDS device, which is used for solving the problem that the clock transmission and the device are difficult to test the dynamic performance at present.
In order to solve the above technical problem, the present invention provides a neutron effect evaluation system for a DDS device, including:
the system comprises a circuit board to be tested and a configuration circuit board which are positioned in a radiation room, and a spectrum analyzer, a phase noise tester, a frequency counter, a low-phase noise signal source, a power supply, a computer and a GPIB controller which are positioned in a monitoring room; wherein,
the circuit board to be tested is respectively connected with the spectrum analyzer, the phase noise tester and the frequency counter through connecting cables and is connected with the configuration circuit board through a short-distance cable;
the configuration circuit board is respectively connected with the low-phase noise signal source, the power supply and the computer through connecting cables;
and the GPIB controller is respectively connected with the spectrum analyzer, the phase noise tester, the frequency counter, the low-phase noise signal source and the computer.
Optionally, the connection cable includes a high-frequency low-loss SMA cable, a low-loss communication cable, and a low-resistance power cable;
the high-frequency low-loss SMA cable is used for connecting the spectrum analyzer, the phase noise tester and the frequency counter with the circuit board to be tested; and the configuration circuit board is connected with the low-phase noise signal source;
the low-loss communication cable is used for connecting the configuration circuit board with the computer;
the low-resistance power cable is used for connecting the configuration circuit board with the power supply.
Optionally, the circuit board to be tested includes a DDS device to be tested and a peripheral passive device, and the SPI, configuration, device clock, and power supply thereof are provided by the configuration circuit board through a short-distance cable.
Optionally, the configuration circuit board includes an LDO, an FPGA, an RS485 communication module, a crystal oscillator, and a clock circuit, the main control is transmitted to the FPGA by the computer through an RS485 protocol, and the FPGA transmits an upper signal including an SPI and a control signal;
the power supply provides external power for the configuration circuit board, and the LDO is converted into low-voltage power for the circuit board to be tested; and the low-phase noise signal source provides a clock to a clock driving circuit in the configuration circuit board and forwards the clock to the circuit board to be tested.
Optionally, the GPIB controller interacts with the spectrum analyzer, the phase noise tester, the frequency counter, and the low phase noise signal source through a short-range cable, provides a GPIB control signal, and collects corresponding spurious, phase noise, and frequency jitter count values.
Optionally, the computer interacts with the GPIB controller through a USB2.0 protocol, sends a GPIB control signal, collects stray, phase noise, and frequency jitter count values collected by the GPIB controller, and outputs a determination result through software.
Optionally, the circuit board to be tested is located in an effective irradiation area of the neutron source.
The invention provides a neutron effect evaluation system of a DDS device, which comprises a circuit board to be tested and a configuration circuit board which are positioned in a radiation room, and a spectrum analyzer, a phase noise tester, a frequency counter, a low-phase noise signal source, a power supply, a computer and a GPIB controller which are positioned in a monitoring room; the circuit board to be tested is respectively connected with the spectrum analyzer, the phase noise tester and the frequency counter through connecting cables and is connected with the configuration circuit board through short-distance cables; the configuration circuit board is respectively connected with the low-phase noise signal source, the power supply and the computer through connecting cables; and the GPIB controller is respectively connected with the spectrum analyzer, the phase noise tester, the frequency counter, the low-phase noise signal source and the computer. The invention provides a DDS neutron effect evaluation system based on the current test conditions, can carry out neutron effect evaluation on a high-speed DDS device on line, and has great engineering significance.
Drawings
FIG. 1 is a schematic structural diagram of a neutron effect evaluation system of a DDS device provided by the present invention;
fig. 2 is a schematic view of a work flow of the neutron effect evaluation system of the DDS device provided by the invention.
Detailed Description
The neutron effect evaluation system of the DDS device provided by the present invention is further described in detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Example one
The invention provides a DDS device neutron effect evaluation system, the structural block diagram of which is shown in figure 1, the whole system is divided into two parts, one part is positioned in a radiation room where a neutron source is positioned and comprises a circuit board 110 to be tested and a configuration circuit board 120, and the circuit board 110 to be tested is positioned in an effective radiation area of the neutron source; the other part is located in an external monitoring room and includes a spectrum analyzer 130, a phase noise tester 140, a frequency counter 150, a low phase noise signal source 160, a power supply 170, a computer 180 (i.e., a PC) and a GPIB controller 190. The circuit board 110 to be tested comprises a DDS device to be tested and a peripheral passive device, and the SPI, configuration, device clock, and power supply thereof are provided by the configuration circuit board 120 through a short-distance cable; the configuration circuit board 120 comprises an LDO, an FPGA, an RS485 communication module, a crystal oscillator and a clock circuit, the computer 180 transmits a master control signal to the FPGA through an RS485 protocol, and the FPGA transmits an upper signal including an SPI and a control signal; the power source 170 provides external power to the configuration circuit board 120, and the LDO converts the external power to low-voltage power to be provided to the circuit board 110 to be tested; the low phase noise signal source 160 provides a clock to the clock driver chip in the configuration circuit board 120 and forwards the clock to the circuit board 110 under test.
The radiology department and the equipment in the monitoring room are connected by a long-distance connecting cable 200 of about 50 meters, wherein the connecting cable 200 comprises a high-frequency low-loss SMA cable, a low-loss communication cable and a low-resistance power supply cable. The circuit board 110 to be tested is respectively connected with the spectrum analyzer 130, the phase noise tester 140 and the frequency counter 150 through high-frequency low-loss SMA cables; the configuration circuit board 120 is connected to the low phase noise signal source 160 through a high frequency low loss SMA cable, to the power source 170 through a low resistance power cable, and to the computer 180 through a low loss communication cable.
The connections between the radiation rooms and the monitoring room are short-distance cable connections, and the circuit board 110 to be tested is connected with the configuration circuit board 120 through the short-distance cable; wherein, a common cable is arranged between the SPI, configuration and DUT (device under test) power supply of the circuit board 110 to be tested and the configuration circuit board 120, and an SMA cable is arranged between the common cable and a clock; the GPIB controller 190 interacts with the spectrum analyzer 130, the phase noise tester 140, the frequency counter 150, and the low phase noise signal source 160 through a GPIB cable, provides a GPIB control signal, and collects corresponding stray, phase noise, and frequency jitter count values; the computer 180 is connected with the GPIB controller 190 through a USB cable and interacts with a USB2.0 protocol, transmits a GPIB control signal, collects stray, phase noise and frequency jitter count values collected by the GPIB controller 190, and outputs a determination result through software.
The DUT in the circuit board 110 to be tested is output to the measurement devices such as the spectrum analyzer 130 through the high-frequency low-loss SMA cable, the measurement devices are switched through the high-frequency relay, the spectrum analyzer 130 is used for measuring broadband stray and narrowband stray of the DDS device, the phase noise tester 140 is used for measuring phase noise, and the frequency counter 150 is used for calculating frequency jitter times; the DUT clock is provided by the low phase noise signal source 160 and the clock for the FPGA on the configuration circuit board 120 is provided by a crystal oscillator.
The test flow is shown in fig. 2, and specifically as follows:
(1) all equipment is powered on, including power supplies and other equipment;
(2) the computer 180 sends out a master control instruction, the FPGA on the configuration circuit board 120 is controlled by the RS485 communication module to send out an upper instruction, and the low-phase noise signal source 160 is controlled by the GPIB controller 190 to send out the system clock frequency required by the DUT;
(3) the DUT clock is provided by a clock driving circuit on the configuration circuit board 120, power is supplied by the LDO on the configuration circuit board 120, and the DUT clock starts to work in a current instruction mode after receiving an upper instruction sent by the FPGA;
(4) after the DUT works, outputting the signals to testing equipment such as a spectrum analyzer 130 and the like through a high-frequency low-loss SMA cable for parameter testing;
(5) the test equipment interacts with the GPIB controller 190 through a general interface bus, the GPIB controller 190 sends out instructions such as test conditions and the like, and the GPIB controller is also responsible for collecting relevant test data and transmitting the test data to the computer 180 through a USB2.0 for judgment;
(6) the computer 180 evaluates the results and outputs them.
The neutron effect evaluation system provided by the invention can be used for on-line observation of the deterioration degree of key indexes such as dynamic stray, phase noise, frequency jitter and the like of the high-speed DDS device under the neutron effect under the existing test condition, and can be used for effectively evaluating the neutron effect resistance of the DDS device.
The above description is only for the purpose of describing the preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are intended to fall within the scope of the appended claims.
Claims (7)
1. A DDS device neutron effect evaluation system, comprising:
a circuit board to be tested (110) and a configuration circuit board (120) which are positioned in the radiation room, and a spectrum analyzer (130), a phase noise tester (140), a frequency counter (150), a low phase noise signal source (160), a power supply (170), a computer (180) and a GPIB controller (190) which are positioned in a monitoring room; wherein,
the circuit board (110) to be tested is respectively connected with the spectrum analyzer (130), the phase noise tester (140) and the frequency counter (150) through connecting cables (200) and is connected with the configuration circuit board (120) through short-distance cables;
the configuration circuit board (120) is respectively connected with the low-phase noise signal source (160), the power supply (170) and the computer (180) through connecting cables (200);
the GPIB controller (190) is respectively connected with the spectrum analyzer (130), the phase noise tester (140), the frequency counter (150), the low-phase noise signal source (160) and the computer (180).
2. The DDS device neutron effect evaluation system of claim 1, wherein the connection cable (200) comprises a high frequency low loss SMA cable, a low loss communication cable, and a low resistance power cable;
the high-frequency low-loss SMA cable is used for connecting the spectrum analyzer (130), the phase noise tester (140) and the frequency counter (150) with the circuit board (110) to be tested; and the connection of the configuration circuit board (120) to the low phase noise signal source (160);
the low-loss communication cable is used for connecting the configuration circuit board (120) and the computer (180);
the low resistance power cable is used for connecting the configuration circuit board (120) and the power supply (170).
3. The DDS device neutron effect evaluation system of claim 1, wherein the circuit board under test (110) comprises a DDS device under test and peripheral passive devices, the SPI, configuration, device clock, and power supply of which are provided by the configuration circuit board (120) through short-range cables.
4. The DDS device neutron effect evaluation system of claim 3, wherein the configuration circuit board (120) comprises LDO, FPGA, RS485 communication module, crystal oscillator and clock driving circuit, a master control is transmitted to the FPGA by the computer (180) through RS485 protocol, and the FPGA sends out an upper signal comprising SPI and control signal;
the power supply (170) provides external power to the configuration circuit board (120), and the LDO converts the external power into low-voltage power to be provided to the circuit board (110) to be tested; the low phase noise signal source (160) provides a clock to the clock driver circuit in the configuration circuit board (120) and is forwarded by it to the circuit board under test (110).
5. The DDS device neutron effect evaluation system of claim 1, wherein the GPIB controller (190) interacts with the spectrum analyzer (130), the phase noise tester (140), the frequency counter (150), and the low phase noise signal source (160) via short-range cables to provide GPIB control signals and collect corresponding spurious, phase noise, and frequency jitter count values.
6. The DDS device neutron effect evaluation system of claim 5, wherein the computer (180) interacts with the GPIB controller (190) via a USB2.0 protocol, sends GPIB control signals and collects stray, phase noise and frequency jitter count values collected by the GPIB controller (190) and outputs the determination results via software.
7. The DDS device neutron effect evaluation system of claim 1, wherein the circuit board under test (110) is within an effective irradiation area of a neutron source.
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CN105022084A (en) * | 2015-08-20 | 2015-11-04 | 中国原子能科学研究院 | Digital neutron spectrometer |
CN106896318A (en) * | 2017-03-27 | 2017-06-27 | 中国电子科技集团公司第五十八研究所 | Direct Digital Frequency Synthesizers circuit dynamic parameter testing system and method |
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