CN110995266B - Digital-to-analog conversion device - Google Patents
Digital-to-analog conversion device Download PDFInfo
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- CN110995266B CN110995266B CN201911337874.5A CN201911337874A CN110995266B CN 110995266 B CN110995266 B CN 110995266B CN 201911337874 A CN201911337874 A CN 201911337874A CN 110995266 B CN110995266 B CN 110995266B
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- 238000006243 chemical reaction Methods 0.000 title claims abstract description 97
- 239000003990 capacitor Substances 0.000 claims abstract description 236
- 239000011324 bead Substances 0.000 claims description 16
- 239000003381 stabilizer Substances 0.000 claims description 9
- 238000007667 floating Methods 0.000 claims description 4
- 239000000725 suspension Substances 0.000 claims description 3
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- 230000000694 effects Effects 0.000 description 3
- 238000001914 filtration Methods 0.000 description 3
- 238000004146 energy storage Methods 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
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Abstract
The embodiment of the invention discloses a digital-to-analog conversion device. The device comprises: the first voltage input end is connected with a negative analog power pin of the digital-to-analog converter and one end of the first capacitor; the second voltage input end is connected with one end of the first resistor and the second capacitor and a digital power pin of the digital-to-analog converter, and the other end of the first resistor is connected with one end of the second resistor and a bipolar output range determining pin of the digital-to-analog converter; a low-level effective input pin of the digital-to-analog converter is connected with one end of the third resistor; a logic input pin of the digital-to-analog converter is connected with one end of the fourth resistor; a clock input pin of the digital-to-analog converter is connected with one end of the fifth resistor; the third voltage input end is connected with the positive analog power pin of the digital-to-analog converter and one end of the third capacitor; and a fourth voltage input terminal connected to the positive reference input pin of the digital-to-analog converter. By applying the scheme provided by the embodiment of the invention, the torque measurement value can be subjected to digital-to-analog conversion.
Description
Technical Field
The invention relates to the technical field of torque measurement, in particular to a digital-to-analog conversion device.
Background
With the development of the domestic automobile industry, new automobile types are endlessly layered, and automobile bench and road tests are more and more important. Modern engines require increased rotational speed to improve mechanical performance and efficiency, while torque is an important indicator of motor and engine performance, thus requiring high accuracy, high reliability torque measurements. And, the measured data needs to be transmitted to a display device for display.
The torque measured value acquired by the torque acquisition equipment passes through the singlechip in the transmission process and then is a digital signal, and when the torque measured value is transmitted to the display equipment from the singlechip, the analog signal can only be transmitted. Therefore, in order to solve the problem of accurate transmission of the torque measurement value, a digital-to-analog conversion device is needed.
Disclosure of Invention
The invention provides a digital-to-analog conversion device which is used for carrying out digital-to-analog conversion on a torque measured value and ensuring accurate transmission of the torque measured value between a singlechip and display equipment. The specific technical scheme is as follows.
In a first aspect, an embodiment of the present invention provides a digital-to-analog conversion apparatus, including:
The first voltage input end is connected with a negative analog power pin of the digital-to-analog converter and one end of the first capacitor; the other end of the first capacitor is grounded;
The second voltage input end is connected with one end of the first resistor, one end of the second capacitor and a digital power supply pin of the digital-to-analog converter, and the other end of the first resistor is connected with one end of the second resistor and a certain bipolar output range pin of the digital-to-analog converter;
The other end of the second resistor is grounded; the other end of the second capacitor is grounded;
The low-level effective input pin of the digital-to-analog converter is connected with one end of the third resistor; the logic input pin of the digital-to-analog converter is connected with one end of the fourth resistor; the clock input pin of the digital-to-analog converter is connected with one end of the fifth resistor;
The other ends of the third resistor, the fourth resistor and the fifth resistor are grounded;
the third voltage input end is connected with the positive analog power pin of the digital-to-analog converter and one end of the third capacitor; the other end of the third capacitor is grounded;
The ground pin of the digital-to-analog converter, the first digital-to-analog converter grounding reference pin, the second digital-to-analog converter grounding reference pin, the first output amplifier grounding reference pin and the second output amplifier grounding reference pin are all grounded;
And a fourth voltage input terminal connected to a positive reference input pin of the digital-to-analog converter.
Optionally, the method further comprises:
a first voltage conversion device, a second voltage conversion device, a third voltage conversion device, and a fourth voltage conversion device;
The first voltage output end of the first voltage conversion device is connected with the first voltage input end; the second voltage output end of the first voltage conversion device is connected with the third voltage input end; the third voltage output end of the second voltage conversion device is connected with the fifth voltage input end of the third voltage conversion device and the sixth voltage input end of the fourth voltage conversion device; the fourth voltage output end of the third voltage conversion device is connected with the second voltage input end; the fifth voltage output end of the fourth voltage conversion device is connected with the fourth voltage input end;
The seventh voltage input end of the first voltage conversion device and the eighth voltage input end of the second voltage conversion device are both 6-32 volts, the first voltage output end is 11 volts, the second voltage output end is 11 volts, the third voltage output end is 5 volts, the fourth voltage output end is 3.3 volts, and the fifth voltage output end is 2.5 volts.
Optionally, the second voltage conversion device includes:
The eighth voltage input end is connected with one end of the fourth capacitor, one end of the sixth resistor and a voltage input pin of the switching regulator;
The other end of the fourth capacitor is grounded; the other end of the sixth resistor is connected with an enabling input pin and a disabling input pin of the switching regulator; the ground pin of the switching regulator is grounded;
The bootstrap voltage pin of the switching regulator is connected with one end of the fifth capacitor; the other end of the fifth capacitor is connected with a switching node pin of the switching voltage stabilizer, one end of the inductor and the cathode of the diode;
The anode of the diode is grounded; the other end of the inductor is connected with one end of a seventh resistor, one end of a sixth capacitor, one end of a seventh capacitor and one end of an eighth capacitor, and the third voltage output end;
The other end of the seventh resistor is connected with one end of the eighth resistor and the feedback pin of the switching regulator; the other end of the eighth resistor is grounded;
And the other ends of the sixth capacitor, the seventh capacitor and the eighth capacitor are grounded.
Optionally, the fourth capacitance is 4.7 microfarads; the fifth capacitance is 100 nanofarads; the sixth capacitance is 10 microfarads; the seventh capacitance is 10 microfarads; the eighth capacitance is 100 nanofarads;
The sixth resistance is 100 kilo ohms; the seventh resistance is 54.9 kilo ohms; the eighth resistor is 10 kilo ohms;
the inductance is 33 microhenries;
the diode is MBR0520LT1G.
Optionally, the third voltage conversion device includes:
The fifth voltage input end is connected with one end of the ninth capacitor and the tenth capacitor, and the first voltage input pin and the second voltage input pin of the voltage stabilizer;
The other ends of the ninth capacitor and the tenth capacitor are grounded;
The output voltage pin of the voltage stabilizer is connected with one end of the eleventh capacitor, the twelfth capacitor, the thirteenth capacitor and the first magnetic bead;
the other ends of the eleventh capacitor, the twelfth capacitor and the thirteenth capacitor are all grounded; the other end of the first magnetic bead is connected with the fourth voltage output end.
Optionally, the ninth capacitance is 1 microfarad; the tenth capacitance is 100 nanofarads; the eleventh capacitance is 1 microfarad; the twelfth capacitance is 100 nanofarads; the thirteenth capacitance is 100 picofarads;
The first magnetic bead is 0 ohm.
Optionally, the fourth voltage conversion device includes:
The sixth voltage input end is connected with one end of the fourteenth capacitor and one end of the fifteenth capacitor and an input voltage connecting pin of the voltage conversion chip; the other ends of the fourteenth capacitor and the fifteenth capacitor are grounded; the ground pin of the voltage conversion chip is grounded;
the output voltage pin of the voltage conversion chip is connected with the sixteenth capacitor, the seventeenth capacitor and one end of the second magnetic bead; the sixteenth capacitor and the seventeenth capacitor are grounded at the other end;
the other end of the second magnetic bead is connected with the fifth voltage output end;
the fourteenth capacitance is 4.7 microfarads, the fifteenth capacitance is 100 nanofarads, the sixteenth capacitance is 4.7 microfarads, and the seventeenth capacitance is 100 nanofarads.
Optionally, the first voltage conversion device includes:
The seventh voltage input end is connected with one end of the eighteenth capacitor and one end of the nineteenth capacitor, and a voltage input pin, a first logic input pin and a second logic input pin of an output power supply; the other end of the eighteenth capacitor is grounded; the nineteenth capacitor is grounded at the other end and is connected with the mode pin of the output power supply;
The floating capacitor positive connection pin of the output power supply is connected with one end of the twentieth capacitor; the twentieth capacitor is connected with the negative connecting pin of the suspension capacitor of the output power supply at the other end;
An output voltage pin of the output power supply is connected with one end of the twenty-first capacitor and one end of the twenty-second capacitor; the twenty-first capacitor and the twenty-second capacitor are connected with the other end of the capacitor in a grounding mode;
An input connecting pin of the input power supply is connected with one end of the eleventh resistor; the other end of the eleventh resistor is grounded;
The positive low-voltage difference output pin of the input power supply is connected with one end of a twenty-third capacitor, one end of a twenty-fourth capacitor, one end of a twelfth resistor and the second voltage output end; the other ends of the twenty-third capacitor and the twenty-fourth capacitor are grounded;
The other end of the twelfth resistor is connected with one end of the thirteenth resistor and a feedback input pin of the positive low-dropout regulator of the input power supply; the other end of the thirteenth resistor is connected with one end of the twenty-fifth capacitor, one end of the twenty-sixth capacitor and one end of the fourteenth resistor and the ground pin of the input power supply;
The other end of the twenty-fifth capacitor is connected with a positive reference bypass pin of the input power supply; the other end of the twenty-sixth capacitor is connected with a negative reference bypass pin of the input power supply; the other end of the fourteenth resistor is connected with one end of the fifteenth resistor and a feedback input pin of the negative low-dropout voltage regulator of the input power supply;
The other end of the fifteenth resistor is connected with one end of the twenty-seventh capacitor, one end of the twenty-eighth capacitor, a negative low-voltage difference output pin of the input power supply and the first voltage output end; and the twenty-seventh capacitor and the twenty-eighth capacitor are connected with the other end of the capacitor in a grounding mode.
Optionally, the eighteenth capacitor is 10 microfarads; the nineteenth capacitance is 100 nanofarads; the twentieth capacitance is 1 microfarad; the twenty-first capacitance is 10 microfarads; the twenty-second capacitance is 100 nanofarads; the twenty-third capacitance is 10 microfarads; the twenty-fourth capacitance is 100 nanofarads; the twenty-fifth capacitance is 10 that method; the twenty-sixth capacitance is 10 nanofarads; the twenty-seventh capacitance is 10 microfarads; the twenty-eighth capacitance is 100 nanofarads;
the eleventh resistor is 200 kilo ohms; the twelfth resistor is 115 kiloohms; the thirteenth resistance is 20 kilo ohms; the fourteenth resistor is 20 kilo ohms; the fifteenth resistor is 115 kilo ohms.
Optionally, the first capacitance is 100 nanofarads; the second capacitance is 100 nanofarads; the third capacitance is 100 nanofarads;
the third resistor is 10 kiloohms; the fifth resistance is 10 kilo ohms.
As can be seen from the foregoing, the digital-to-analog conversion apparatus provided in the embodiment of the present invention may include: the first voltage input end is connected with a negative analog power pin of the digital-to-analog converter and one end of the first capacitor; the other end of the first capacitor is grounded; the second voltage input end is connected with one end of the first resistor, one end of the second capacitor and a digital power supply pin of the digital-to-analog converter, and the other end of the first resistor is connected with one end of the second resistor and a certain bipolar output range pin of the digital-to-analog converter; the other end of the second resistor is grounded; the other end of the second capacitor is grounded; the low-level effective input pin of the digital-to-analog converter is connected with one end of the third resistor; the logic input pin of the digital-to-analog converter is connected with one end of the fourth resistor; the clock input pin of the digital-to-analog converter is connected with one end of the fifth resistor; the other ends of the third resistor, the fourth resistor and the fifth resistor are grounded; the third voltage input end is connected with the positive analog power pin of the digital-to-analog converter and one end of the third capacitor; the other end of the third capacitor is grounded; the ground pin of the digital-to-analog converter, the first digital-to-analog converter grounding reference pin, the second digital-to-analog converter grounding reference pin, the first output amplifier grounding reference pin and the second output amplifier grounding reference pin are all grounded; the fourth voltage input end is connected with the reference input pin of the digital-to-analog converter, so that the torque measured value can be converted from a digital signal to an analog signal based on the digital-to-analog converter, and the accurate transmission of the torque measured value between the singlechip and the display equipment can be ensured. Of course, it is not necessary for any one product or method of practicing the invention to achieve all of the advantages set forth above at the same time.
The innovation points of the embodiment of the invention include:
1. Based on the D/A converter, the torque measured value is converted from a digital signal to an analog signal, so that accurate transmission of the torque measured value between the singlechip and the display equipment can be ensured.
2. The voltage value suitable for the digital-to-analog conversion device to work can be obtained through conversion of the voltage conversion device, and the digital-to-analog conversion device is ensured to work normally.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below. It is apparent that the drawings in the following description are only some embodiments of the invention. Other figures may be derived from these figures without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a schematic diagram of a digital-to-analog conversion apparatus according to the present invention;
FIG. 2 is a schematic diagram of a voltage converting apparatus according to the present invention;
FIG. 3 is a schematic diagram of another voltage converting apparatus according to the present invention;
FIG. 4 is a schematic diagram of another voltage converting apparatus according to the present invention;
fig. 5 is a schematic structural diagram of another voltage conversion device according to the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. It will be apparent that the described embodiments are only some, but not all, embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without any inventive effort, are intended to be within the scope of the invention.
It should be noted that the terms "comprising" and "having" and any variations thereof in the embodiments of the present invention and the accompanying drawings are intended to cover non-exclusive inclusions. A process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed but may alternatively include other steps or elements not listed or inherent to such process, method, article, or apparatus.
The embodiment of the invention discloses a digital-to-analog conversion device which can convert a torque measured value from a digital signal to an analog signal, thereby ensuring accurate transmission of the torque measured value between a singlechip and display equipment. The following describes embodiments of the present invention in detail.
Fig. 1 is a schematic structural diagram of a digital-to-analog conversion device according to an embodiment of the present invention. The digital-to-analog conversion device comprises:
A first voltage input terminal connected to pin 1 of the digital-to-analog converter, i.e., AVss (Negative Analog Supply, negative analog power supply) pin, and one terminal of a first capacitor (C41); the other end of the first capacitor C41 is grounded;
The second voltage input end is connected with one end of a first resistor R16 and a second capacitor C47, and a pin 14 of the digital-to-analog converter, namely a DVcc (digital power supply) pin, and the other end of the first resistor R16 is connected with one end of a second resistor R66 and a pin 5 of the digital-to-analog converter, namely a BIN/2SCOMP (bipolar output range determination) pin;
the other end of the second resistor R66 is grounded; the other end of the second capacitor C47 is grounded;
A pin 7 of the digital-to-analog converter, namely a SYNC (low level active input) pin, is connected with one end of a third resistor R67; pin 10 of the digital-to-analog converter, namely LDAC (logic input) pin, is connected with one end of a fourth resistor R68; a pin 11 of the digital-to-analog converter, namely a CLR (clock input) pin, is connected with one end of a fifth resistor R69;
the other ends of the third resistor R67, the fourth resistor R68 and the fifth resistor R69 are grounded;
A third voltage input terminal connected to pin 24 of the digital-to-analog converter, i.e., AVDD (positive analog power supply) pin, and one terminal of a third capacitor C42; the other end of the third capacitor C42 is grounded;
The pins 15, i.e. the GND (ground) pins, the pins 18, 19, i.e. the two dac_gnd (digital to analog converter ground reference) pins, the pins 20, 21, i.e. the two sig_gnd (output amplifier ground reference) pins, are both grounded;
The fourth voltage input is connected to pin 17 of the digital to analog converter, i.e. the REFIN (positive reference input) pin.
The digital-to-analog converter may be an AD5752.AD5752 is a two-channel 16-bit serial input digital-to-Analog converter that can operate at a clock rate of 30MHz and that meets the DSP (DIGITAL SIGNAL Processing technology) and microcontroller interface standards, and double buffering allows all ADCs (Analog-to-Digital Converter) to be updated simultaneously.
The BIN/2SCOMP pin functions as a digital-to-analog converter code that determines the bipolar output range. This pin should be connected to DVCC or GND, when connected to DVCC, the input code is offset binary, and when connected to GND, the input code is two's complement. The SYNC pin is the frame synchronization signal of the serial interface. When SYNC is at a low level, data is transmitted on the falling edge of SCLK; when SYNC is high, data is latched on the rising edge of SYNC.
The first resistor R16 and the second resistor R66 function as a selection chip function, a BIN function at a high level, and a 2SCOMP function at a low level. The third resistor R67 is 10 kilo ohms; the fifth resistor R69 is 10 kilo-ohms. The third resistor R67 and the fifth resistor R69 function as pull-down resistors to ground.
The first capacitor C41 is 100 nanofarads; the second capacitance C47 is 100 nanofarads; the third capacitance C42 is 100 nanofarads. The effect of each capacitor is filtering.
As can be seen from the foregoing, the digital-to-analog conversion apparatus provided in the embodiment of the present invention may include: the first voltage input end is connected with a negative analog power pin of the digital-to-analog converter and one end of the first capacitor; the other end of the first capacitor is grounded; the second voltage input end is connected with one end of the first resistor, one end of the second capacitor and a digital power supply pin of the digital-to-analog converter, and the other end of the first resistor is connected with one end of the second resistor and a certain bipolar output range pin of the digital-to-analog converter; the other end of the second resistor is grounded; the other end of the second capacitor is grounded; the low-level effective input pin of the digital-to-analog converter is connected with one end of the third resistor; the logic input pin of the digital-to-analog converter is connected with one end of the fourth resistor; the clock input pin of the digital-to-analog converter is connected with one end of the fifth resistor; the other ends of the third resistor, the fourth resistor and the fifth resistor are grounded; the third voltage input end is connected with the positive analog power pin of the digital-to-analog converter and one end of the third capacitor; the other end of the third capacitor is grounded; the ground pin of the digital-to-analog converter, the first digital-to-analog converter grounding reference pin, the second digital-to-analog converter grounding reference pin, the first output amplifier grounding reference pin and the second output amplifier grounding reference pin are all grounded; the fourth voltage input end is connected with the reference input pin of the digital-to-analog converter, so that the torque measured value can be converted from a digital signal to an analog signal based on the digital-to-analog converter, and the accurate transmission of the torque measured value between the singlechip and the display equipment can be ensured.
As an implementation manner of the embodiment of the present invention, the digital-to-analog conversion apparatus may further include: the first voltage conversion device, the second voltage conversion device, the third voltage conversion device, and the fourth voltage conversion device.
The first voltage output end of the first voltage conversion device is connected with the first voltage input end; the second voltage output end of the first voltage conversion device is connected with the third voltage input end; the third voltage output end of the second voltage conversion device is connected with the fifth voltage input end of the third voltage conversion device and the sixth voltage input end of the fourth voltage conversion device; the fourth voltage output end of the third voltage conversion device is connected with the second voltage input end; the fifth voltage output end of the fourth voltage conversion device is connected with the fourth voltage input end; the seventh voltage input end of the first voltage conversion device and the eighth voltage input end of the second voltage conversion device are both 6-32 volts, the first voltage output end is 11 volts, the second voltage output end is 11 volts, the third voltage output end is 5 volts, the fourth voltage output end is 3.3 volts, and the fifth voltage output end is 2.5 volts.
In one implementation, as shown in fig. 2, the second voltage conversion device includes:
An eighth Voltage Input terminal connected to the fourth capacitor C33, one end of the sixth resistor R79, and a pin 5 (VIN) of the switching regulator;
A fourth capacitor C33, the other end of which is grounded; a sixth resistor R79, the other end of which is connected to pin 4 of the switching regulator, namely shdn_n (enable and disable input) pin; pin 2 of the switching regulator, i.e. GND (Ground) pin, is grounded;
Pin 1 of the switching regulator, namely CB (bootstrap voltage) pin, is connected with one end of a fifth capacitor C32; a fifth capacitor C32, the other end of which is connected with pin 6 of the switching regulator, namely, a SW (switching node) pin, one end of an inductor L2 and the cathode of a diode D14;
The anode of the diode D14 is grounded; the other end of the inductor L2 is connected with one end of a seventh resistor R64, a sixth capacitor C54, a seventh capacitor C55 and an eighth capacitor C56 and a third voltage output end;
A seventh resistor R64, the other end of which is connected with one end of an eighth resistor R65 and a pin 3 of the switching regulator, namely a FB (feedback) pin; an eighth resistor R65, the other end of which is grounded;
the other ends of the sixth capacitor C54, the seventh capacitor C55 and the eighth capacitor C56 are grounded.
The switching regulator may be an LMR16006XDDCR. In the second voltage conversion device, 6-32V voltage is converted into 5V voltage by a switching regulator. The chip LMR16006XDDCR has a wide operating input voltage of 1.4V to 36V and an output voltage of 2.5V to 15V which is adjustable.
The fourth capacitance C33 is 4.7 microfarads; the fifth capacitor C32 is 100 nanofarads; the sixth capacitance C54 is 10 microfarads; the seventh capacitance C55 is 10 microfarads; the eighth capacitance C56 is 100 nanofarads. The effect of each capacitor is filtering. The fourth capacitor C33, the sixth capacitor C54 and the seventh capacitor C55 also have the function of energy storage.
The sixth resistor R79 is 100 kilo-ohms; the seventh resistor R64 is 54.9 kilo-ohms; the eighth resistor R65 is 10 kilo-ohms. The seventh resistor R64 and the eighth resistor R65 function to regulate the output voltage.
The inductance L2 is 33 microhenries, which functions to store energy. Diode D14 is MBR0520LT1G, which acts to prevent reverse connection.
In one implementation, as shown in fig. 3, the third voltage conversion device includes:
A fifth Voltage Input terminal connected to one end of the ninth capacitor C50 and the tenth capacitor C51, and to pins 2 and 4 of the Voltage regulator, i.e., VIN (Voltage Input) pins;
the other ends of the ninth capacitor C50 and the tenth capacitor C51 are grounded;
pin 3 of the voltage stabilizer, namely OUT (output voltage) pin, is connected with one end of an eleventh capacitor C52, a twelfth capacitor C53, a thirteenth capacitor C49 and a first magnetic bead R41;
The eleventh capacitor C52, the twelfth capacitor C53 and the thirteenth capacitor C49 are all grounded at the other ends; the other end of the first magnetic bead R41 is connected with a fourth voltage output end.
The voltage stabilizer can be MCP1700T-3302E/MB. In the third voltage conversion device, a voltage of 3.3V is output from the 5V voltage through the low dropout regulator. The input voltage range of the voltage stabilizer is 2.3V-6V, the output voltage is 3.3V, and the output current is 250mA.
The ninth capacitance C50 is 1 microfarad; the tenth capacitor C51 is 100 nanofarads; the eleventh capacitance C52 is 1 microfarad; the twelfth capacitance C53 is 100 nanofarads; thirteenth capacitor C49 is 100 picofarads; the first magnetic bead R41 is 0 ohm.
The effect of each capacitor and resistor is filtering. The ninth capacitor C50 and the eleventh capacitor C52 also have the function of energy storage.
In one implementation, as shown in fig. 4, the fourth voltage conversion device includes:
A sixth voltage input terminal connected to one end of the fourteenth capacitor C45 and the fifteenth capacitor C46, and pin 2 of the voltage conversion chip, i.e., the Vi (Input Voltage Connection ) pin; a fourteenth capacitor C45 and a fifteenth capacitor C46, the other ends of which are grounded; pin 4 of the voltage conversion chip, i.e. GND (Ground) pin, is grounded;
A pin 6 of the Voltage conversion chip, i.e. a Vo (Output Voltage) pin, is connected with one end of the sixteenth capacitor C43, the seventeenth capacitor C44 and the second magnetic bead R70; a sixteenth capacitor C43 and a seventeenth capacitor C44, the other ends of which are grounded;
The other end of the second magnetic bead R70 is connected with a fifth voltage output end.
The fourteenth capacitor C45 is 4.7 microfarads, the fifteenth capacitor C46 is 100 nanofarads, the sixteenth capacitor C43 is 4.7 microfarads, and the seventeenth capacitor C44 is 100 nanofarads. The function of the second magnetic bead R70 is to configure the amplitude of the output voltage.
In one implementation, as shown in fig. 5, the first voltage conversion device includes:
A seventh Voltage Input terminal connected to one end of the eighteenth capacitor C4 and one end of the nineteenth capacitor C7, and a pin 11 of the output power source, i.e., a VIN (Voltage Input) pin, a pin 1 and a pin 13, i.e., en+ and EN- (logic Input) pins; an eighteenth capacitor C4, the other end of which is grounded; a nineteenth capacitor C7, the other end of which is grounded and connected to the pin 14 of the output power supply, i.e., the MODE pin;
the pin 10 of the output power supply, namely the pin C+ (the floating capacitor is connected with) is connected with one end of the twentieth capacitor C6; the twentieth capacitor C6, the other end of which is connected with the pin 7 of the output power supply, namely the pin of the C- (suspension capacitor negative connection);
a pin 6 of the output power supply, namely a pin Vout (output voltage), is connected with one end of a twenty-first capacitor C21 and one end of a twenty-second capacitor C23; a twenty-first capacitor C21 and a twenty-second capacitor C23, and the other ends are grounded;
Pin 2 of the input power supply, namely an RT (input connection) pin, is connected with one end of an eleventh resistor R54; an eleventh resistor R54, the other end of which is grounded;
pin 12 of the input power supply, i.e. ldo+ (positive low dropout output) pin, is connected to one end of the twenty-third capacitor C3, the twenty-fourth capacitor C2, the twelfth resistor R9, and the second voltage output terminal; a twenty-third capacitor C3 and a twenty-fourth capacitor C2, and the other ends are grounded;
A twelfth resistor R9, the other end of which is connected with one end of the thirteenth resistor R4 and a pin 15 of an input power supply, namely an ADJ+ (feedback input of the positive low dropout regulator); the thirteenth resistor R4, the other end is connected to the twenty-fifth capacitor C5, the twenty-sixth capacitor C18, one end of the fourteenth resistor R5, and the pin 17 of the input power, i.e., the GND (Ground) pin;
A twenty-fifth capacitor C5, the other end of which is connected to pin 16 of the input power supply, namely, a byp+ (positive reference bypass) pin; a twenty-sixth capacitor C18, the other end of which is connected to pin 3 of the input power supply, namely, the BYP- (negative reference bypass) pin; a fourteenth resistor R5, the other end of which is connected with one end of a fifteenth resistor R12 and a pin 4 of an input power supply, namely a feedback input pin of the ADJ- (negative low dropout regulator);
the fifteenth resistor R12, the other end is connected with one end of a twenty-seventh capacitor C19, one end of a twenty-eighth capacitor C20, a pin 5 of an input power supply, namely an LDO (negative low dropout output) pin and a first voltage output end; twenty-seventh capacitor C19, twenty-eighth capacitor C20, and the other end is grounded.
The input power may be LTC3260.LTC3260 is a low noise bipolar output power supply. The input voltage range is 4.5V-32V, and the current of up to 100mA can be output. The charge pump operates in a low quiescent current burst mode or a low noise constant frequency mode.
The logic "high" on the en+ pin in LTC3260 enables a positive low dropout (ldo+) regulator. The RT pin is used to program the input connection of the switching frequency. When the EN-pin is driven logic "high", the RT pin will be fixed at 1.2V. If the RT pin is connected to GND, the switching frequency defaults to a fixed 500kHz. The LDO-pin connects the BYP capacitor to GND to reduce LDO-output noise, which remains floating if not used. The LDO-pin requires a low ESR (Equivalent series resistance) capacitor, at least 2 microfarads to ground, to ensure stability. The logic "high" on the EN-pin enables the inverting charge pump and the negative LDO regulator.
The eighteenth capacitor C4 is 10 microfarads; nineteenth capacitance C7 is 100 nanofarads; the twentieth capacitance C6 is 1 microfarad; the twenty-first capacitance C21 is 10 microfarads; the twenty-second capacitance C23 is 100 nanofarads; the twenty-third capacitance C3 is 10 microfarads; the twenty-fourth capacitance C2 is 100 nanofarads; the twenty-fifth capacitance C5 is 10; the twenty-sixth capacitance C18 is 10 nanofarads; the twenty-seventh capacitance C19 is 10 microfarads; the twenty-eighth capacitance C20 is 100 nanofarads.
The eleventh resistor R54 is 200 kilo-ohms; the twelfth resistor R9 is 115 kilo ohms; the thirteenth resistor R4 is 20 kilo-ohms; the fourteenth resistor R5 is 20 kilo ohms; the fifteenth resistor R12 is 115 kilo ohms.
The voltage value suitable for the digital-to-analog conversion device to work can be obtained through conversion of the voltage conversion device, and the digital-to-analog conversion device is ensured to work normally.
Those of ordinary skill in the art will appreciate that: the drawing is a schematic diagram of one embodiment and the modules or flows in the drawing are not necessarily required to practice the invention.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present invention, and are not limiting; although the invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims (10)
1. A digital to analog conversion apparatus, comprising:
the first voltage input end is connected with a negative analog power pin of the digital-to-analog converter and one end of a first capacitor C41; the other end of the first capacitor C41 is grounded; the digital-to-analog converter is AD5752;
The second voltage input end is connected with one end of a first resistor R16 and a second capacitor C47 and a digital power supply pin of the digital-to-analog converter, and the other end of the first resistor R16 is connected with one end of a second resistor R66 and a bipolar output range determining pin of the digital-to-analog converter;
the other end of the second resistor R66 is grounded; the other end of the second capacitor C47 is grounded;
the low-level effective input pin of the digital-to-analog converter is connected with one end of a third resistor R67; the logic input pin of the digital-to-analog converter is connected with one end of a fourth resistor R68; the clock input pin of the digital-to-analog converter is connected with one end of a fifth resistor R69;
the other ends of the third resistor R67, the fourth resistor R68 and the fifth resistor R69 are grounded;
The third voltage input end is connected with the positive analog power pin of the digital-to-analog converter and one end of a third capacitor C42; the other end of the third capacitor C42 is grounded;
The ground pin of the digital-to-analog converter, the first digital-to-analog converter grounding reference pin, the second digital-to-analog converter grounding reference pin, the first output amplifier grounding reference pin and the second output amplifier grounding reference pin are all grounded;
And a fourth voltage input terminal connected to a positive reference input pin of the digital-to-analog converter.
2. The digital to analog conversion apparatus according to claim 1, further comprising:
a first voltage conversion device, a second voltage conversion device, a third voltage conversion device, and a fourth voltage conversion device;
The first voltage output end of the first voltage conversion device is connected with the first voltage input end; the second voltage output end of the first voltage conversion device is connected with the third voltage input end; the third voltage output end of the second voltage conversion device is connected with the fifth voltage input end of the third voltage conversion device and the sixth voltage input end of the fourth voltage conversion device; the fourth voltage output end of the third voltage conversion device is connected with the second voltage input end; the fifth voltage output end of the fourth voltage conversion device is connected with the fourth voltage input end;
The seventh voltage input end of the first voltage conversion device and the eighth voltage input end of the second voltage conversion device are both 6-32 volts, the first voltage output end is 11 volts, the second voltage output end is 11 volts, the third voltage output end is 5 volts, the fourth voltage output end is 3.3 volts, and the fifth voltage output end is 2.5 volts.
3. The digital to analog conversion apparatus according to claim 2, wherein said second voltage conversion means comprises:
the eighth voltage input end is connected with one end of the fourth capacitor C33 and the sixth resistor R79 and the voltage input pin of the switching regulator;
The other end of the fourth capacitor C33 is grounded; the other end of the sixth resistor R79 is connected with an enabling and disabling input pin of the switching regulator; the ground pin of the switching regulator is grounded;
The bootstrap voltage pin of the switching regulator is connected with one end of a fifth capacitor C32; the other end of the fifth capacitor C32 is connected with a switching node pin of the switching voltage stabilizer, one end of the inductor L2 and the cathode of the diode D14;
The anode of the diode D14 is grounded; the other end of the inductor L2 is connected with one end of a seventh resistor R64, a sixth capacitor C54, a seventh capacitor C55 and an eighth capacitor C56 and the third voltage output end;
The other end of the seventh resistor R64 is connected with one end of an eighth resistor R65 and a feedback pin of the switching regulator; the other end of the eighth resistor R65 is grounded;
the other ends of the sixth capacitor C54, the seventh capacitor C55 and the eighth capacitor C56 are grounded.
4. The digital to analog conversion apparatus according to claim 3,
The fourth capacitance C33 is 4.7 microfarads; the fifth capacitor C32 is 100 nano-farads; the sixth capacitance C54 is 10 microfarads; the seventh capacitor C55 is 10 microfarads; the eighth capacitor C56 is 100 nano-farads;
The sixth resistor R79 is 100 kilo ohms; the seventh resistor R64 is 54.9 kilo-ohms; the eighth resistor R65 is 10 kilo ohms;
The inductance L2 is 33 microhenries;
The diode D14 is MBR0520LT1G.
5. The digital to analog conversion apparatus according to claim 2, wherein said third voltage conversion means comprises:
The fifth voltage input end is connected with one end of the ninth capacitor C50 and one end of the tenth capacitor C51 as well as the first voltage input pin and the second voltage input pin of the voltage stabilizer;
the other ends of the ninth capacitor C50 and the tenth capacitor C51 are grounded;
The output voltage pin of the voltage stabilizer is connected with one end of an eleventh capacitor C52, a twelfth capacitor C53, a thirteenth capacitor C49 and a first magnetic bead R41;
the other ends of the eleventh capacitor C52, the twelfth capacitor C53 and the thirteenth capacitor C49 are all grounded; the other end of the first magnetic bead R41 is connected with the fourth voltage output end.
6. The digital to analog conversion apparatus of claim 5, wherein,
The ninth capacitance C50 is 1 microfarad; the tenth capacitor C51 is 100 nanofarads; the eleventh capacitor C52 is 1 microfarad; the twelfth capacitance C53 is 100 nano-farads; the thirteenth capacitance C49 is 100 picofarads;
The first magnetic bead R41 is 0 ohm.
7. The digital to analog conversion apparatus according to claim 2, wherein said fourth voltage conversion means comprises:
The sixth voltage input end is connected with one end of the fourteenth capacitor C45 and one end of the fifteenth capacitor C46 and an input voltage connecting pin of the voltage conversion chip; the other ends of the fourteenth capacitor C45 and the fifteenth capacitor C46 are grounded; the ground pin of the voltage conversion chip is grounded;
The output voltage pin of the voltage conversion chip is connected with one end of a sixteenth capacitor C43, a seventeenth capacitor C44 and a second magnetic bead R70; the sixteenth capacitor C43 and the seventeenth capacitor C44 are grounded at the other ends;
the other end of the second magnetic bead R70 is connected with the fifth voltage output end;
the fourteenth capacitor C45 is 4.7 microfarads, the fifteenth capacitor C46 is 100 nanofarads, the sixteenth capacitor C43 is 4.7 microfarads, and the seventeenth capacitor C44 is 100 nanofarads.
8. The digital to analog conversion apparatus according to claim 2, wherein said first voltage conversion means comprises:
the seventh voltage input end is connected with one end of the eighteenth capacitor C4 and one end of the nineteenth capacitor C7, and a voltage input pin, a first logic input pin and a second logic input pin of the output power supply; the other end of the eighteenth capacitor C4 is grounded; the nineteenth capacitor C7 is grounded at the other end and is connected with the mode pin of the output power supply;
The floating capacitor positive connection pin of the output power supply is connected with one end of the twentieth capacitor C6; the other end of the twentieth capacitor C6 is connected with a negative connecting pin of the suspension capacitor of the output power supply;
an output voltage pin of the output power supply is connected with one end of a twenty-first capacitor C21 and one end of a twenty-second capacitor C23; the twenty-first capacitor C21 and the twenty-second capacitor C23 are connected with the other end of the capacitor;
an input connecting pin of the input power supply is connected with one end of an eleventh resistor R54; the other end of the eleventh resistor R54 is grounded;
The positive low-voltage difference output pin of the input power supply is connected with one end of a twenty-third capacitor C3, one end of a twenty-fourth capacitor C2, one end of a twelfth resistor R9 and the second voltage output end; the other ends of the twenty-third capacitor C3 and the twenty-fourth capacitor C2 are grounded;
the other end of the twelfth resistor R9 is connected with one end of the thirteenth resistor R4 and a feedback input pin of the positive low dropout regulator of the input power supply; the other end of the thirteenth resistor R4 is connected with one end of a twenty-fifth capacitor C5, one end of a twenty-sixth capacitor C18 and one end of a fourteenth resistor R5 and the ground pin of the input power supply;
the other end of the twenty-fifth capacitor C5 is connected with a positive reference bypass pin of the input power supply; the other end of the twenty-sixth capacitor C18 is connected with a negative reference bypass pin of the input power supply; the other end of the fourteenth resistor R5 is connected with one end of the fifteenth resistor R12 and a feedback input pin of the negative low dropout regulator of the input power supply;
The other end of the fifteenth resistor R12 is connected with one end of a twenty-seventh capacitor C19 and one end of a twenty-eighth capacitor C20, a negative low-voltage difference output pin of the input power supply and the first voltage output end; and the twenty-seventh capacitor C19 and the twenty-eighth capacitor C20 are connected with the other end of the capacitor C20 in a grounding mode.
9. The digital to analog conversion apparatus according to claim 8, wherein,
The eighteenth capacitor C4 is 10 microfarads; the nineteenth capacitor C7 is 100 nano-meters; the twentieth capacitor C6 is 1 microfarad; the twenty-first capacitor C21 is 10 microfarads; the twenty-second capacitor C23 is 100 nanofarads; the twenty-third capacitor C3 is 10 microfarads; the twenty-fourth capacitor C2 is 100 nano-farads; the twenty-fifth capacitor C5 is 10-step; the twenty-sixth capacitor C18 is 10 nano-farads; the twenty-seventh capacitor C19 is 10 microfarads; the twenty-eighth capacitor C20 is 100 nano-farads;
The eleventh resistor R54 is 200 kilo ohms; the twelfth resistor R9 is 115 kiloohms; the thirteenth resistor R4 is 20 kilo ohms; the fourteenth resistor R5 is 20 kilo ohms; the fifteenth resistor R12 is 115 kilo ohms.
10. The digital to analog conversion apparatus according to any of claims 1 to 8, wherein,
The first capacitor C41 is 100 nanofarads; the second capacitor C47 is 100 nanofarads; the third capacitor C42 is 100 nano-farads;
The third resistor R67 is 10 kiloohms; the fifth resistor R69 is 10 kilo-ohms.
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