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CN110896098A - Reverse switch transistor based on silicon carbide base and preparation method thereof - Google Patents

Reverse switch transistor based on silicon carbide base and preparation method thereof Download PDF

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CN110896098A
CN110896098A CN201911118668.5A CN201911118668A CN110896098A CN 110896098 A CN110896098 A CN 110896098A CN 201911118668 A CN201911118668 A CN 201911118668A CN 110896098 A CN110896098 A CN 110896098A
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silicon carbide
anode
cathode
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substrate
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CN110896098B (en
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梁琳
颜小雪
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Huazhong University of Science and Technology
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/74Thyristor-type devices, e.g. having four-zone regenerative action
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/0619Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66053Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
    • H01L29/66068Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices

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Abstract

The invention belongs to the technical field of pulse power devices, and discloses a silicon carbide-based reverse switch transistor and a preparation method thereof+A type substrate (7), a silicon carbide P base region (1), and a silicon carbide NA drift region (3) and an anode emitter region; the device adopts a positive bevel terminal; the device being able to pass through the cathode short-circuit point, i.e. the silicon carbide cathode P+The region (8) conducts current. The invention improves the structure and the preparation method of SiC RSD and adds N+Thinning the substrate, and then periodically disconnecting N+Cathode region and injecting P at the disconnection+The high-doped ions form a cathode short-circuit point, thereby realizing the effective pre-charging process of RSD, and overcoming the defect that the silicon carbide epitaxial wafer cannot be well controlled in the prior art to cause the deviceThe device is broken down in advance when avalanche is used for establishing the pre-charged plasma layer, and the problem that effective establishment of the pre-charged plasma layer is difficult to realize by utilizing avalanche breakdown is solved.

Description

Reverse switch transistor based on silicon carbide base and preparation method thereof
Technical Field
The invention belongs to the technical field of pulse power devices, and particularly relates to a silicon carbide-based reverse switching transistor and a preparation method thereof, which are a structure and a process of a wide bandgap semiconductor device.
Background
The pulse power technology plays an important role in the fields of national defense, military and the like, and a pulse power switch is a core device of a pulse power system. The reverse switch transistor RSD (reverse switch bipolar) is a pulse power semiconductor switch device based on the controllable plasma layer triggering principle, can realize the full-area uniform synchronous turn-on, and has better voltage-sharing characteristic, higher withstand voltage and di/dt tolerance compared with IGBT, SCR and the like. RSD was originally formed only on silicon-based materials, but its voltage blocking capability and dv/dt and di/dt resistance have gradually approached the physical limit that silicon material itself can reach, so that new semiconductor materials need to be searched for to develop power semiconductor devices.
The third generation wide bandgap semiconductor material silicon carbide has the advantages of a bandgap width about 3 times that of silicon, a breakdown field strength about 10 times that of silicon, a carrier saturation velocity about 2 times that of silicon, a thermal conductivity about 3 times that of silicon and the like, so that a power device prepared by adopting the silicon carbide has higher blocking voltage, smaller on-resistance and higher switching frequency than similar devices of silicon.
The structure of the existing SiC RSD (as shown in fig. 1) is a device with two ends and four layers, and has 3 PN junctions, only a cathode end and an anode end, and no gate similar to a thyristor or an IGBT, and it can be seen from the structure that the structure is composed of many thyristor units and transistor units arranged at intervals. The specific process is that the avalanche multiplication effect of the junction J3 is generated under the back pressure to generate a large enough reverse pre-charging current to drive the transistor unit to be conducted, because a transverse current exists in the RSD structure, a full-area uniform plasma layer P1 is formed near the junction J2, and a plasma layer P2 is formed along with the drift of electrons in the anode N + region to the low-doped N-region, so that the whole pre-charging process is completed. The pre-charge plasma formed inside the device during the pre-charge process acts like a gate of a thyristor, providing a corresponding majority of carriers to the base region. The plasma generated by the pre-charging is distributed on the whole chip area, so that the device opening process is uniform and has higher di/dt. The SiCRSD device has obvious advantages in characteristics and size compared with Si RSD due to the characteristics of the 4H-SiC material.
However, in the actual manufacturing process, the application development of the SiC RSD device is limited by the existing control level of defects of the SiC material. In the epitaxial growth process of the 4H-SiC crystal, various defects can be introduced into the epitaxial material by growth conditions, substrate damage, substrate defects and the like; in addition to epitaxial growth, defects are also generated during device processing, and such processes as high temperature annealing, ion implantation, impurity diffusion, etc. introduce defects. For example, impurities and doping atoms are enriched near dislocations, changing the distribution uniformity of impurities and doping; the lattice structure change of the grain boundary reduces the constraint capacity of the grain boundary to electrons, or free electrons are introduced near the grain boundary due to the enrichment of impurity elements on the grain boundary to become a conductive channel, so that the increase of the leakage current of the semiconductor is caused; the reverse leakage current of the device can be increased while the reverse characteristic of the PN junction is influenced by the TSD; BPD affects the characteristics of bipolar power devices.
In the case of SiC RSD, the current in the reverse precharge process is from N+The P-junction full area avalanche breakdown mechanism is provided. The biggest difficulty of the SiCRSD is how to solve the problem that the device utilizes an avalanche breakdown mechanism to provide sufficient precharge charge during the precharge process, so as to establish an effective precharge plasma layer, and at the same time, ensure that the device is not damaged.
Disclosure of Invention
In view of the above-mentioned drawbacks and needs of the prior art, it is an object of the present invention to provide a silicon carbide-based reverse switching transistor and a method for fabricating the same, in which the thinned N is utilized by improving the detailed structure design of the device and the corresponding fabrication method+A substrate, and implanting P at the cathode at regular intervals+Type highly doped ions to form cathode short-circuit points, i.e. by pairing N+Thinning the substrate, and then thinning N+The cathode region is disconnected and P is injected at the disconnected position+The high-doped ions form a cathode short-circuit point, the effective pre-charging process of RSD can be realized, and the problems that in the prior art, due to the fact that the defects of the silicon carbide epitaxial wafer cannot be well controlled, a device is broken down in advance when a pre-charged plasma layer is established by utilizing avalanche, and effective establishment of the pre-charged plasma layer is difficult to achieve by utilizing avalanche breakdown are solved. In addition, the complete preparation process of the SiCRSD device with the improved structure is simple and easy to realize.
To achieve the above object, according to one aspect of the present invention, there is provided a silicon carbide-based reverse switching transistor characterized in that the reverse switching transistor comprises silicon carbide N from bottom to top+Type substrate, silicon carbide P base region and silicon carbide N-A drift region and an anode emission region composed of a silicon carbide anode P+Emitter region and silicon carbide anode N+The emission regions are alternately formed; the reverse switch transistor based on the silicon carbide adopts a terminal mode of a positive bevel angle of 30-60 degrees, and a passivation layer covers a formed table board;
the reverse switch transistor based on silicon carbide base is provided with a cathode short-circuit point, wherein the cathode short-circuit point is formed by firstly preparing silicon carbide N+The substrate is cut off, and ions are selectively implanted at the cut-off part to form a silicon carbide cathode P+Region then at N+Shaped substrate and silicon carbide cathode P+Depositing metal on the surface of the area to form a cathode electrode; wherein, the silicon carbide cathode P+The region is used as a cathode short-circuit point of the reverse transistor and can conduct carriers;
the silicon carbide anode P+The doping concentration of the emitter region is 3 x 1018cm-3~9*1019cm-3Said silicon carbide anode N+The doping concentration of the emitter region is 8 x 1018cm-3~2*1019cm-3Said silicon carbide N-The doping concentration of the drift region is 9 x 1014cm-3~8*1015cm-3The doping concentration of the silicon carbide P base region is 4 x 1017cm-3~2.8*1018cm-3Said silicon carbide N+Patterned substrateDoping concentration of 1 x 1019cm-3~9*1019cm-3
The silicon carbide N+The thickness of the substrate is 1-3 μm;
in addition, an anode ohmic metal is covered above the anode emission region, and the silicon carbide N+The underside of the type substrate is also covered with a cathode ohmic metal.
As a further preferred aspect of the present invention, the silicon carbide cathode P+Region is distributed on the silicon carbide N+And the contact surface of the type substrate and the silicon carbide P base region.
As a further preferred aspect of the present invention, the silicon carbide cathode P+The regions are uniformly distributed on the silicon carbide N in a dot array according to a preset interval+And the contact surface of the type substrate and the silicon carbide P base region.
As a further preferred aspect of the present invention, the silicon carbide anode P+The thickness of the emitting region is 0.5 μm, and the silicon carbide anode P+The transverse length of the emitting region is 10-30 μm; the silicon carbide anode N+The lateral length of the emitter region was 5 μm.
As a further preferred aspect of the present invention, the silicon carbide N is-The thickness of the drift region is 54 μm; the thickness of the silicon carbide P base region is 0.5-2.5 microns.
According to another aspect of the present invention, there is provided a method of preparing a silicon carbide based reverse switching transistor as described above, comprising the steps of:
(S1) selecting clean N+Shaped silicon carbide substrate as silicon carbide N+A type substrate sequentially on the N+Epitaxially growing silicon carbide P base region and silicon carbide N on type silicon carbide substrate-Drift region and silicon carbide anode P+An emitter region formed of P+N-PN+A four-layer structure;
(S2) for the P resulting from the step (S1)+N-PN+Four-layer structure of N+Thinning the silicon carbide substrate to make the silicon carbide N+Of a mould substrateThe thickness meets the preset thickness requirement;
(S3) for P processed by the step (S2)+N-PN+Cleaning the four-layer structure, photoetching and etching, and placing the silicon carbide anode P+One side of the emitter region forms an anode side N+Implantation window followed by the uppermost silicon carbide anode P+N-type ion implantation is carried out above the emitter region to make the anode side N+Forming a silicon carbide anode N in the injection window+An emission region;
(S4) for the structure processed by the step (S3), after cleaning, photoetching and etching processes are carried out on the silicon carbide N+One side of the type substrate forms a cathode side P+Implanting windows followed by N-SiC from the bottom layer+P-type ion implantation is performed below the type substrate to make the cathode side P+Forming a silicon carbide cathode P in the implantation window+A zone;
(S5) performing high temperature annealing treatment of 1200 to 1600 ℃ on the ions implanted in the step (S3) and the step (S4) to activate the ions, wherein the high temperature annealing treatment can also eliminate lattice damage of SiC;
(S6) applying a protective layer on the silicon carbide anode P for the structure obtained after the step (S5)+An emitter region and the silicon carbide anode N+Depositing anodic ohmic metal on the emitter region, then on the silicon carbide N+Depositing cathode ohmic metal below the substrate; then carrying out integral annealing to enable ohmic contact to be formed between the anode ohmic metal and the cathode ohmic metal and the silicon carbide-based material respectively;
(S7) mechanically cutting the structure obtained through the processing in the step (S6) by a diamond blade to form a mesa with a positive bevel angle of 30-60 ° on the side surface of the structure as a terminal mode; and finally, depositing a passivation layer on the table top to be used as a passivation film, thus obtaining the silicon carbide-based reverse switching transistor.
As a further preferred aspect of the present invention, the step (S3) is specifically:
for P processed by the step (S2)+N-PN+Four-layer structure, R is first performedCA cleaning to remove impurities including organic matter, metal ions or metal hydride on the surface of the wafer, and then performing reverse photoetching and target anode side N to be formed+The positions of the injection windows correspond to each other; then magnetron sputtering is carried out to deposit metal Ni, and then AZ400T or acetone is used for stripping and removing the anode side N to be formed of the target+Ni is implanted into the window to ensure that only the target silicon carbide anode P is present+Leaving a Ni mask on the emitter region, and dry etching to form an anode N+Injecting a window; finally from the uppermost layer, i.e. the silicon carbide anode P+N-type ion implantation is carried out above the emitter region to make the anode side N+Forming a silicon carbide anode N in the injection window+An emission area.
As a further preferred aspect of the present invention, the step (S4) is specifically:
for the structure obtained after the processing in the step (S3), RCA cleaning is performed to remove impurities including organic matters, metal ions or metal hydrides on the surface of the wafer, and then reverse photolithography and target cathode side P to be formed are performed+The positions of the injection windows correspond to each other; then magnetron sputtering is carried out to deposit metal Ni, and then AZ400T or acetone is used for stripping to remove the cathode side P to be formed+Implanting Ni over the window to ensure only the target silicon carbide N+Leaving a Ni mask on the patterned substrate, and dry etching to form cathode side P+Injecting a window; finally from the lowest layer, i.e. silicon carbide N+P-type ion implantation is performed below the type substrate to make the cathode side P+Forming a silicon carbide cathode P in the implantation window+And (4) a zone.
In a further preferred embodiment of the present invention, in the step (S4), the P-type ion implantation is ion implantation of at least one of a boron element, an aluminum element, and a gallium element.
In a further preferred embodiment of the present invention, in the step (S6), the anode ohmic metal is a Ni/Ti/Al/Ag alloy layer mainly composed of Ni element, Ti element, Al element, and Ag element, and the cathode ohmic metal is a Ni/Ti/Al/Ag alloy layer mainly composed of Ni element, Ti element, Al element, and Ag element.
Through the technical scheme, compared with the prior art, the invention has the following beneficial effects:
(1) the silicon carbide based reverse transistor of the present invention can more effectively establish a pre-charged plasma layer while ensuring that the device is not damaged or reducing the likelihood of device damage.
(2) The invention converts N into+The substrate layer is thinned to the outermost layer P+The layers are of comparable thickness (thickness differences within a few microns are allowed) and P-type ion implantation is performed at regular intervals on the cathode face to form cathode short-circuit points (emitter shorts). The anode and the cathode of the SiC RSD almost have the structural characteristics of bilateral symmetry, and can bear higher withstand voltage and higher current.
(3) The preparation method of the silicon carbide-based reverse transistor is simple in process and easy to implement.
At the present stage, it is difficult to achieve the establishment of an effective pre-charged plasma layer by exploiting avalanche breakdown, at the level of defect control of silicon carbide materials, for which the present invention addresses the problem by improving the device structure, in particular by modifying N+Thinning the substrate, injecting P at regular intervals into the cathode+The pre-charge process is achieved by doping ions highly to form a cathode short-circuit point. Because the turn-on of the RSD device is realized by establishing a pre-charging plasma layer by utilizing avalanche breakdown, the principle enables the RSD device to have high di/dt, but the existing process level causes insufficient defect control level on a silicon carbide material, so that the device is easy to break down and cannot be normally turned on under the mechanism, namely, the existing defect control level on the SiC material limits the application development of the SiC RSD device; the RSD can be used as a cathode short-circuit point after being thinned, so that the large current can be more favorably passed, and a pre-charged plasma layer can be more easily established, thereby realizing the normal work of the device.
The preparation method of the invention forms the anode with high doped N+Region and cathode highly doped with P+And after the regions are processed, high-temperature annealing is carried out together, and the high-temperature annealing has the function of activating injected ions and eliminating crystal lattice damage.
According to the invention, the novel SiC RSD device uses the Bevel cut-through as a terminal, when the SiC RSD device is used for preparing the PN junction in an ion injection mode in the actual preparation process, the curvature exists at the edge of the PN junction, so that the electric field value at the corner is very large, namely, a peak electric field exists, so that the device is broken down in advance, and based on the structural characteristics of the SiC RSD, the invention provides a mode of using an oblique angle (Bevel) as the terminal in consideration of the fact that the blocking junction is a deep junction structure. Because the chip area utilization rate of the negative bevel angle structure is not high, the invention adopts the positive bevel angle table-board terminal. And because the SiC material has high hardness, the wet etching is difficult, the precision requirement of the structure is high, and the precision cannot be ensured by the dry etching, the structure is formed by mechanically cutting by adopting a diamond blade. In addition, considering that the mechanical cutting can damage the SiC material, the invention can also reduce the influence caused by the damage by processing the surface through dry etching, namely, after the cutting is finished, considering that the mechanical cutting can damage the SiC material, the invention can also eliminate or reduce the influence caused by the damage by processing the inclined surface through the dry etching, and then depositing a passivation layer.
According to the invention, through researching the opening mechanism of the RSD and the test phenomenon that effective opening is difficult in actual sample preparation, the defect control of silicon carbide epitaxy is found to be a large reason that effective pre-filling cannot be well realized by the RSD, and in combination with the development of the current process, the influence of the defect is avoided or reduced from the structural aspect, and particularly, by thinning the substrate to 1-3 mu m, the device performance can be obviously improved under the condition that higher requirements are not provided for the defect of the epitaxy process, and the effective pre-filling process of the SiC RSD can be realized. In addition, the invention can also control the terminal mode of the RSD, especially can use a 45-degree positive bevel terminal, has simple process and can ensure the realization of higher blocking voltage of the device.
In summary, the silicon carbide-based reverse switching transistor which can normally work is easier to manufacture by considering the control level of the silicon carbide defect in the current process. The invention is particularly suitable for the field of high-voltage pulse, is an ultrahigh-voltage silicon carbide reverse switching transistor, can more effectively establish a pre-charging plasma layer, and can ensure that a device cannot be broken down in advance to be damaged. Because the short-circuit point is established, when the current is larger, compared with a device without the short-circuit point, the short-circuit point can lead the current to be better conducted.
Drawings
Fig. 1 is a schematic diagram of a prior art silicon carbide based inversion transistor.
Fig. 2 is a schematic diagram of the structure of a silicon carbide based inversion transistor of the present invention.
Fig. 3 is a schematic structural diagram of the manufacturing method of the present invention after step 1 is completed.
Fig. 4 is a schematic structural diagram of the manufacturing method of the present invention after step 2 is completed.
Fig. 5 is a schematic structural diagram of the manufacturing method of the present invention after step 3 is completed.
Fig. 6 is a schematic structural diagram of the manufacturing method of the present invention after step 4 is completed.
Fig. 7 is a schematic structural diagram of the manufacturing method of the present invention after step 6 is completed.
Fig. 8 is a schematic structural diagram of the manufacturing method of the present invention after step 7 is completed.
Fig. 9 is a schematic structural diagram of the manufacturing method of the present invention after step 9 is completed.
The meanings of the reference symbols in the figures are as follows: 1 is a silicon carbide P base region, 2 is a passivation layer (such as a silicon dioxide passivation layer), and 3 is silicon carbide N-Drift region, 4 is silicon carbide anode P+Emitter region, 5 anode ohmic metal, 6 silicon carbide N+Emitter region, 7 is silicon carbide N+Substrate, 8 is cathode silicon carbide P+And the short-circuit point 9 is cathode ohmic metal.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In addition, the technical features involved in the embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
The silicon carbide based reverse switch transistor consists of four PNPN layers and the anode is P+N+Alternating unit cells. As shown in fig. 2, comprising silicon carbide N+A molding substrate (7), cathode silicon carbide P+Short-circuit point (8), silicon carbide P base region (1), silicon carbide N-A drift region (3) and an anode made of silicon carbide P+Emitter region (4) and silicon carbide N+The emitter regions (6) are alternately composed of silicon carbide anodes P+An emitter region (4) and a silicon carbide cathode N+The region (6) is covered with an anodic ohmic metal (5), silicon carbide N+Substrate (7) and silicon carbide cathode P+The region (8) is covered with cathode ohmic metal (9), the whole device adopts a table-board terminal mode with a positive bevel angle of 45 degrees, and a silicon dioxide passivation layer (2) is arranged on the table-board.
The doping concentration of the silicon carbide anode P + emitter region (4) is 3e18 cm-3-9 e19cm-3, and the silicon carbide anode P+The thickness of the emitting region (4) is 0.5 μm, and the silicon carbide anode P+The transverse length of the emitting region (4) is 10-30 μm; the silicon carbide anode N+The doping concentration of the emitter region (6) is 8e18cm-3~2e19cm-3Said silicon carbide anode N+The lateral length of the emitting region (6) is 5 μm; the silicon carbide N-The drift region (3) has a doping concentration of 2.3e15cm-3(of course, it may also be 9e14cm-3~8e15cm-3Etc. other doping concentration), the silicon carbide N-The thickness of the drift region (3) is 54 μm; the doping concentration of the silicon carbide P base region (1) is 4e17cm-3~2.8e18cm-3The thickness of the silicon carbide P base region (1) is 0.5-2.5 microns; said N is+The thickness of the silicon carbide substrate (7) is 1-3 μm.
The N-type impurity ions can be selected from nitrogen, phosphorus, arsenic or their mixture, and the P-type impurity ions can be selected from boron, aluminum, gallium or their mixture.
Silicon carbide N+The type substrate (7) is in direct contact with the silicon carbide P base region (1). When the device is switched on, the current path is from the silicon carbide P base region (1)Silicon carbide cathode P+The region (8) flows to the metal electrode from the silicon carbide N+The mold substrate (7) is flowed through by silicon carbide N+The molding substrate (7) flows to the metal electrode and past the silicon carbide cathode P+The current of the region (8) is larger than that of the silicon carbide N+The patterned substrate (7) is much larger.
Accordingly, the above-described silicon carbide-based reverse transistor can be prepared as follows; the method can be implemented according to the following steps:
step 1, epitaxial growth: firstly, select N+A type silicon carbide substrate (7) is subjected to RCA standard cleaning treatment and then sequentially subjected to N+A silicon carbide P base region (1) and a silicon carbide N are grown on a type silicon carbide substrate (7)-A drift region (3) and a silicon carbide anode P+An emitter region (4) forming P+N-PN+A four-layer structure, see fig. 3;
N+the type silicon carbide substrate (7) may be a 4H-SiC single crystal, N+The thickness of the type silicon carbide substrate (7) is 350 [ mu ] m.
The doping concentration of the silicon carbide P base region (1) is 4e17cm-3~2.8e18cm-3The thickness of the silicon carbide P base region (1) is 0.5-2.5 μm; silicon carbide N-The drift region (3) has a doping concentration of 2.3e15cm-3Silicon carbide N-The thickness of the drift region (3) is 54 μm; the doping concentration of the silicon carbide anode P + emitter region (4) is 3e18 cm-3-9 e19cm-3, and the silicon carbide anode P+The emitter region (4) has a thickness of 0.5 μm and a silicon carbide anode P+The lateral length of the emitting region (4) is 10-30 μm.
Step 2, thinning the substrate: for N after the treatment of the step 1+Thinning the type silicon carbide substrate (7), as shown in fig. 4;
N+the method for thinning the silicon carbide substrate (7) can be one of a grinding method, a chemical mechanical polishing method, a wet etching method or a plasma etching method. Thinned N+The thickness of the silicon carbide substrate is 1-3 μm.
Step 3, forming silicon carbide N by ion implantation on the front surface+Emitter region (6): firstly, removing impurities such as organic matters, metal ions, metal hydride and the like on the surface of the wafer by RCA standard cleaning, and thenForming the anode side N by means of reverse lithography+Window, using metal Ni as mask layer by magnetron sputtering method, stripping and removing N by AZ400T or acetone+Removing anode P on the area+Forming N in the region outside the region by dry etching+Implanting N-type ions into the implantation window to form silicon carbide N+Emission area (6), see fig. 5.
Step 4, back ion implantation is carried out to form a silicon carbide cathode P+Region (8): n after the substrate thinning treatment of step 2+Carrying out magnetron sputtering deposition on the back surface of the silicon carbide substrate (7) to form a mask layer by metal Ni, stripping by using AZ400T or acetone after photoetching, and forming P by dry etching+Injecting a window; performing P-type ion implantation to form silicon carbide cathode P+Zone (8), see FIG. 6.
The P-type impurity ions can be selected from boron, aluminum, gallium or their mixture.
In the step 4, because the thinned substrate is in the range of 1-3 μm, the implementation difficulty of the step 4 after the step 3 is different, and the processes used for different thicknesses can be flexibly adjusted; for example, when the thickness is too thick (e.g., 3 μm), a metal may be used as a mask, i.e., the structure obtained in step 3 is first subjected to photolithography, then sputtered and stripped, and finally subjected to an etching process; if the thickness is too thin (for example, 1 μm), the photoresist can be used as a mask, and sputtering and stripping are not needed.
And 5, carrying out high-temperature annealing activation: high doping of the anode with N+Region and cathode highly doped with P+The regions are annealed together at a high temperature to activate implanted ions while eliminating lattice damage. The method comprises the following specific steps: cleaning to remove the anode P+And (3) depositing an oxide layer on the Ni mask on the region, annealing at high temperature to activate the ions injected before and eliminate lattice damage, and then placing the device into BOE for standing at normal temperature to corrode and remove the deposited oxide layer.
And 6, preparing an anode ohmic electrode (5): adopting photoetching stripping method to make silicon carbide anode P+Emitter region (4) and silicon carbide anode N obtained in step 3+Depositing Ni/Ti/Al/Ag on the upper surface of the emitting region (6) ((80nm/30nm/80nm/500nm) alloy layer to form an anodic ohmic electrode (5), see fig. 7.
When ohmic metal is made, the anode is made first, because TMAH developing solution has a certain corrosion effect on the metal, because the anode metal needs to be subjected to a photoetching process, if the cathode ohmic metal is made first, the developing solution in the photoetching process influences the metal deposited on the cathode in front, and therefore the ohmic contact performance of the cathode is influenced. The method comprises the following specific steps: and photoetching to expose an active region, and sputtering Ni/Ti/Al/Ag. The method of depositing the metal can be either PECVD or evaporation metallization.
And 7, preparing a cathode ohmic electrode (9): applying photoetching stripping method to silicon carbide N+Substrate (7) and silicon carbide cathode P obtained in step 4+The upper surface of the region (8) is deposited with a Ni/Ti/Al/Ag (80nm/30nm/80nm/500nm) alloy layer to form a cathode ohmic electrode (9), see FIG. 8.
The method of depositing the metal can be either PECVD or evaporation metallization.
Step 8, RTA (annealing): and carrying out heat treatment alloying on the anode ohmic metal and the cathode ohmic metal to form ohmic contact.
Step 9, Bevel cutting through (terminal making): the mesa end was formed by mechanical cutting with a diamond blade with a positive bevel angle of 45, see fig. 9.
When the SiC RSD device is used for preparing the PN junction in an ion implantation mode in the actual preparation process, the curvature exists at the corner of the PN junction generally, so that the electric field value at the corner is very large, namely, a peak electric field exists, so that the device is broken down in advance. Because the chip area utilization rate of the negative bevel angle structure is not high, the invention adopts the positive bevel angle table-board terminal. And because the SiC material has high hardness, the wet etching is difficult, the precision requirement of the structure is high, and the precision cannot be ensured by the dry etching, the structure is formed by mechanically cutting by adopting a diamond blade. In addition, considering that the damage of the SiC material caused by mechanical cutting, the invention can also reduce the influence caused by the damage by processing the surface through dry etching.
Step 10, manufacturing a passivation layer: and (3) carrying out PECVD deposition on the table top with the oblique angle of 45 degrees obtained in the step (9) to obtain a silicon dioxide passivation layer (2) as a passivation film, so as to obtain the high-voltage silicon carbide reverse transistor, wherein the blocking voltage is about 4.5kV (the withstand voltage value of the device is directly related to the thickness of the N base region, and the N base region is thicker when the blocking voltage is larger in general) as shown in figure 2.
The invention relates to a preparation method of a reverse transistor based on silicon carbide, which comprises the steps of firstly preparing high-quality N+Epitaxially growing on a silicon carbide substrate to obtain epitaxial layers, thinning the substrate to a proper thickness, and adding N+The substrate is periodically disconnected, selective P-type ion injection is carried out at the disconnected position to form a cathode short-circuit point, and large current formed in the reverse pre-charging process can rapidly flow through the short-circuit point, so that the current distribution is more uniform, the full-area opening can be realized more quickly, and the situation that the device is not damaged while the pre-charging plasma layer is effectively established is guaranteed.
The silicon carbide based reverse transistor of the present invention converts N+The substrate layer is thinned to the outermost layer P+The layer thickness being of comparable order (e.g. outermost layer P)+The thickness of the layer is 0.5 μm, the thickness of the substrate after thinning is 1 μm-3 μm), and P-type ion implantation is performed at regular intervals on the cathode to form cathode short-circuit points (emitter shorts). The anode and the cathode of the SiC RSD almost have the structural characteristics of bilateral symmetry, and theoretically can bear higher withstand voltage and higher current. The preparation method of the reverse transistor based on the silicon carbide base is simple in process and easy to realize.
In addition, the invention can further carry out structure optimization by modifying the size layout of the short circuit points; the above-described fabrication process flow is also merely exemplary, and other fabrication methods may be employed as long as the silicon carbide-based reverse switching transistor having the specific structure of the present invention can be obtained. The parameters of which metal the ohmic electrode is composed of, their respective thicknesses, etc., can also be flexibly adjusted.
The above embodiment only takes the terminal mode that the side surface adopts the positive bevel angle of 45 degrees as an example, and other terminal modes of positive bevel angles of 30 degrees to 60 degrees can also be adopted, and the positive bevel angle of 45 degrees has a better effect. Additionally, the passivation layer may be formed using other passivation layer materials known in the art in addition to the silicon dioxide passivation layer.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (10)

1. A silicon carbide-based reverse switch transistor is characterized in that the reverse switch transistor comprises silicon carbide N from bottom to top+A type substrate (7), a silicon carbide P base region (1), and a silicon carbide N-A drift region (3) and an anode emitter region, wherein the anode emitter region is formed by a silicon carbide anode P+An emitter region (4) and a silicon carbide anode N+The emitting areas (6) are alternately formed; the reverse switch transistor based on the silicon carbide adopts a terminal mode of a positive bevel angle of 30-60 degrees, and a passivation layer (2) covers a formed table board;
the reverse switch transistor based on silicon carbide base is provided with a cathode short-circuit point, wherein the cathode short-circuit point is formed by firstly preparing silicon carbide N+The substrate (7) is disconnected, and ions are selectively implanted at the disconnected position to form a silicon carbide cathode P+Region (8) then at N+A molding substrate (7) and a silicon carbide cathode P+Depositing metal on the surface of the region (8) to form a cathode electrode (9); wherein, the silicon carbide cathode P+The region (8) serves as a cathode short-circuit point of the reverse transistor and is capable of conducting charge carriers;
the silicon carbide anode P+The doping concentration of the emitter region (4) is 3 x 1018cm-3~9*1019cm-3Said silicon carbide anode N+The doping concentration of the emitter region (6) is 8 x 1018cm-3~2*1019cm-3Said silicon carbide N-The drift region (3) has a doping concentration of 9 x 1014cm-3~8*1015cm-3The doping concentration of the silicon carbide P base region (1) is 4 x 1017cm-3~2.8*1018cm-3Said silicon carbide N+The doping concentration of the type substrate (7) is 1 x 1019cm-3~9*1019cm-3
The silicon carbide N+The thickness of the type substrate (7) is 1-3 μm;
in addition, an anode ohmic metal (5) is covered above the anode emission region, and the silicon carbide N is+The lower part of the type substrate (7) is also covered with cathode ohmic metal (9).
2. The silicon carbide-based reverse switching transistor of claim 1, wherein the silicon carbide cathode P+The region (8) is distributed in the silicon carbide N+And the contact surface of the type substrate (7) and the silicon carbide P base region (1).
3. The silicon carbide-based reverse switching transistor of claim 1, wherein the silicon carbide cathode P+The regions (8) are uniformly distributed in the silicon carbide N in a dot array at preset intervals+And the contact surface of the type substrate (7) and the silicon carbide P base region (1).
4. The silicon carbide-based reverse switching transistor of claim 1, wherein the silicon carbide anode P+The thickness of the emitting region (4) is 0.5 μm, and the silicon carbide anode P+The transverse length of the emitting region (4) is 10-30 μm; the silicon carbide anode N+The lateral length of the emitter region (6) is 5 μm.
5. The silicon carbide-based reverse switching transistor of claim 1, wherein the silicon carbide N is N-The thickness of the drift region (3) is 54 μm; the thickness of the silicon carbide P base region (1) is 0.5-2.5 microns.
6. A method of manufacturing a silicon carbide based reverse switching transistor according to any of claims 1 to 5, comprising the steps of:
(S1) selecting clean N+Shaped silicon carbide substrate as silicon carbide N+A type substrate sequentially on the N+Epitaxially growing silicon carbide P base region and silicon carbide N on type silicon carbide substrate-Drift region and silicon carbide anode P+An emitter region formed of P+N-PN+A four-layer structure;
(S2) for the P resulting from the step (S1)+N-PN+Four-layer structure of N+Thinning the silicon carbide substrate to make the silicon carbide N+The thickness of the molding substrate meets the preset thickness requirement;
(S3) for P processed by the step (S2)+N-PN+Cleaning the four-layer structure, photoetching and etching, and placing the silicon carbide anode P+One side of the emitter region forms an anode side N+Implantation window followed by the uppermost silicon carbide anode P+N-type ion implantation is carried out above the emitter region to make the anode side N+Forming a silicon carbide anode N in the injection window+An emission region;
(S4) for the structure processed by the step (S3), after cleaning, photoetching and etching processes are carried out on the silicon carbide N+One side of the type substrate forms a cathode side P+Implanting windows followed by N-SiC from the bottom layer+P-type ion implantation is performed below the type substrate to make the cathode side P+Forming a silicon carbide cathode P in the implantation window+A zone;
(S5) performing high temperature annealing treatment of 1200 to 1600 ℃ on the ions implanted in the step (S3) and the step (S4) to activate the ions, wherein the high temperature annealing treatment can also eliminate lattice damage of SiC;
(S6) applying a protective layer on the silicon carbide anode P for the structure obtained after the step (S5)+An emitter region and the silicon carbide anode N+Depositing anodic ohmic metal on the emitter region, then on the silicon carbide N+Depositing cathode ohmic metal below the substrate; then carrying out integral annealing to enable ohmic contact to be formed between the anode ohmic metal and the cathode ohmic metal and the silicon carbide-based material respectively;
(S7) mechanically cutting the structure obtained through the processing in the step (S6) by a diamond blade to form a mesa with a positive bevel angle of 30-60 ° on the side surface of the structure as a terminal mode; and finally, depositing a passivation layer on the table top to be used as a passivation film, thus obtaining the silicon carbide-based reverse switching transistor.
7. The method according to claim 6, wherein the step (S3) is specifically:
for P processed by the step (S2)+N-PN+Firstly, RCA cleaning is carried out to remove impurities including organic matters, metal ions or metal hydrides on the surface of the wafer, and then reverse photoetching and target anode side N to be formed are carried out+The positions of the injection windows correspond to each other; then magnetron sputtering is carried out to deposit metal Ni, and then AZ400T or acetone is used for stripping and removing the anode side N to be formed of the target+Ni is implanted into the window to ensure that only the target silicon carbide anode P is present+Leaving a Ni mask on the emitter region, and dry etching to form an anode N+Injecting a window; finally from the uppermost layer, i.e. the silicon carbide anode P+N-type ion implantation is carried out above the emitter region to make the anode side N+Forming a silicon carbide anode N in the injection window+An emission area.
8. The method according to claim 6, wherein the step (S4) is specifically:
for the structure obtained after the processing in the step (S3), RCA cleaning is performed to remove impurities including organic matters, metal ions or metal hydrides on the surface of the wafer, and then reverse photolithography and target cathode side P to be formed are performed+The positions of the injection windows correspond to each other; then magnetron sputtering is carried out to deposit metal Ni, and then AZ400T or acetone is used for stripping to remove the cathode side P to be formed+Implanting Ni over the window to ensure only the target silicon carbide N+Leaving a Ni mask on the patterned substrate, and dry etching to form cathode side P+Injecting a window; finally from the lowest layer, i.e. silicon carbide N+Under the substratePerforming P-type ion implantation to make cathode side P+Forming a silicon carbide cathode P in the implantation window+And (4) a zone.
9. The method according to any one of claims 6 to 8, wherein in the step (S4), the P-type ion implantation is ion implantation of at least one of boron element, aluminum element, and gallium element.
10. The method according to any one of claims 6 to 9, wherein in the step (S6), the anodic ohmic metal is a Ni/Ti/Al/Ag alloy layer mainly composed of Ni element, Ti element, Al element and Ag element, and the cathodic ohmic metal is a Ni/Ti/Al/Ag alloy layer mainly composed of Ni element, Ti element, Al element and Ag element.
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