CN110855172A - Multi-level power amplification system and PWM control signal generation method thereof - Google Patents
Multi-level power amplification system and PWM control signal generation method thereof Download PDFInfo
- Publication number
- CN110855172A CN110855172A CN201911206265.6A CN201911206265A CN110855172A CN 110855172 A CN110855172 A CN 110855172A CN 201911206265 A CN201911206265 A CN 201911206265A CN 110855172 A CN110855172 A CN 110855172A
- Authority
- CN
- China
- Prior art keywords
- power
- voltage
- pwm control
- power module
- signals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 40
- 230000003321 amplification Effects 0.000 title claims abstract description 16
- 238000003199 nucleic acid amplification method Methods 0.000 title claims abstract description 16
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 title claims abstract description 8
- 238000004891 communication Methods 0.000 claims abstract description 22
- 238000012544 monitoring process Methods 0.000 claims abstract description 10
- 238000005457 optimization Methods 0.000 claims description 32
- 230000014509 gene expression Effects 0.000 claims description 9
- 238000006243 chemical reaction Methods 0.000 claims description 5
- 238000010187 selection method Methods 0.000 claims description 5
- 238000000354 decomposition reaction Methods 0.000 claims description 4
- 230000009466 transformation Effects 0.000 claims description 4
- 239000013307 optical fiber Substances 0.000 claims description 3
- 230000002457 bidirectional effect Effects 0.000 claims 1
- 230000008030 elimination Effects 0.000 abstract description 12
- 238000003379 elimination reaction Methods 0.000 abstract description 12
- 238000010586 diagram Methods 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000012804 iterative process Methods 0.000 description 5
- 239000003990 capacitor Substances 0.000 description 3
- 238000013461 design Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 238000004364 calculation method Methods 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 238000001228 spectrum Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/483—Converters with outputs that each can have more than two voltages levels
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/12—Arrangements for reducing harmonics from ac input or output
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
- H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
- H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
- H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
- H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
- Inverter Devices (AREA)
Abstract
The invention discloses a multi-level power amplification system and a PWM control signal generation method thereof, belonging to the technical field of power electronics and wireless communication and comprising a main control case, a power module and a cascade transformer; the main control case is used for carrying out multi-level modulation according to control signals transmitted by external communication equipment and generating PWM control signals corresponding to each power unit; the main control case is also used for monitoring whether the Fault signal and the voltage and current signal of the power module are normal or not and sending corresponding PWM control signals to the power unit with the normal Fault signal and the voltage and current signal; the power module is used for measuring a Fault signal and a voltage current signal; the power unit receiving the PWM control signal is also used for generating a corresponding alternating-current square wave; the cascade transformer is used for outputting the alternating voltage square waves after the alternating voltage square waves are connected in series. The method solves the problem that the traditional iteration method is slow in iteration speed or not convergent when solving the harmonic elimination equation with more levels.
Description
Technical Field
The invention belongs to the technical field of power electronics and wireless communication, and particularly relates to a multi-level power amplification system and a PWM control signal generation method thereof.
Background
The conventional multi-level inverter structure adopting a clamping topology is generally divided into a diode clamping type multi-level inverter, a flying capacitor clamping type multi-level inverter and a hybrid clamping type multi-level inverter. The clamped multi-level inverter topology has limitations in high-voltage and high-power occasions, because all levels of level voltages are obtained by a capacitor clamped direct-current power supply, the maximum amplitude of the superposed output voltage can only be equal to the voltage of a direct-current side, the number of clamping diodes or clamping capacitors required to be used is large, and the problems of complex system control and difficult optimization and maintenance are introduced when the hardware cost is increased. Especially in the application of power amplifier, the proposed high voltage and multi-level requirements often make the topology not able to fulfill the design requirements well.
As a control method of the multilevel inverter, there are mainly Modulation methods such as SPWM (Sinusoidal Pulse Width Modulation), SVPWM (Space Vector Pulse Width Modulation), and SHEPWM (Selective Harmonic Elimination Pulse Width Modulation). The SHEPWM (specific subharmonic elimination pulse width modulation) is adopted to eliminate specific subharmonic in the output waveform, so that the effect of optimizing the output waveform is achieved. The key of applying SHEPWM technology to the modulation of the step wave multilevel converter is to solve a nonlinear equation set (namely a harmonic elimination equation set) related to a switching angle, however, as the number of converter levels increases, the number of variables to be solved and the number of the equation set increase, and therefore, the solving of the equation set is difficult.
For the harmonic elimination equation set required to be solved by the SHEPWM technology, a numerical algorithm or an intelligent algorithm is mostly adopted for solving at present. Both methods require initial values to be given, and if the initial value selection is not suitable, the iterative process will diverge, however, no general method for initial value selection exists so far. For the case that N > 9, the conventional newton iteration method becomes no longer convergent (or convergence too depends on the choice of the initial value); the number of iterations of the homotopy algorithm is large, and huge calculation amount is brought to the solution of the harmonic elimination equation set.
Disclosure of Invention
Aiming at the defects of the prior art, the invention aims to provide a multi-level power amplification system and a PWM control signal generation method thereof, and aims to solve the problems of low iteration speed and non-convergence when a traditional iteration method is used for solving a harmonic elimination equation.
To achieve the above object, the present invention provides a multi-level power amplifying system, comprising: the power module comprises a main control case, a power module and a cascade transformer;
one end of the main control case is connected with external communication equipment; the other end of the main control case is bidirectionally connected with one end of the power module; one end of the cascade transformer is connected with the other end of the power module;
the main control case is used for carrying out multi-level modulation according to the control signals transmitted by the external communication equipment and generating PWM control signals corresponding to each power unit of the power module; the main control case is also used for monitoring whether the Fault signal and the voltage and current signal of each power unit in the power module are normal or not and sending corresponding PWM control signals to the power units with normal Fault signals and voltage and current signals;
the multilevel modulation is based on an iteration initial value selection method of an area equivalence principle and an optimization iteration method of an interior point method;
the power module is used for measuring Fault signals and voltage and current signals of each power unit and reporting the Fault signals and the voltage and current signals to the main control case; the power unit receiving the PWM control signal is also used for generating a corresponding alternating-current voltage square wave and outputting the alternating-current voltage square wave to the cascade transformer;
the cascade transformer is used for outputting the alternating current voltage square waves transmitted from the power module after being connected in series.
Preferably, the main control cabinet includes a DSP (Digital Signal Processor) and an FPGA (Field Programmable Gate Array), and one end of the DSP is connected to the external communication device; the other end of the DSP is in two-way communication with one end of the FPGA; the other end of the FPGA is in optical fiber communication with one end of the power module;
the DSP is used for carrying out multi-level modulation according to the control signal transmitted by the external communication equipment and generating PWM control signals corresponding to each power unit; monitoring whether Fault signals and voltage and current signals of each power unit in the power module are normal or not;
the FPGA is used for sending corresponding PWM control signals to the power unit with normal Fault signals and normal voltage and current signals.
Preferably, the power module is of a distributed structure and comprises N sub-control boards and N H-bridge power units which are in one-to-one correspondence;
the sub-control board is used for controlling the H-bridge power unit to output an alternating-current voltage square wave according to the received PWM control signal; and simultaneously measuring Fault signals and voltage and current signals of the corresponding H-bridge power units, and reporting the Fault signals and the voltage and current signals to the main control case.
Preferably, the cascade transformer is an electromagnetic module obtained by connecting N single-phase transformers in series;
the primary sides of the N single-phase transformers are not coupled, and the secondary sides of the N single-phase transformers are connected in series.
On the other hand, the method for generating the PWM control signal based on the multi-level power amplifying system includes:
(1) fourier decomposition is carried out on the target output waveform of the cascade transformer, and an expression of the harmonic amplitude of the specific times of the target output waveform is obtained
Calculating to obtain an initial value of the opening angle vector according to an area equivalent principle;
(2) taking the square sum of the expression of each harmonic amplitude of the target output waveform to obtain a target function;
(3) acquiring a constraint optimization model according to the target function and the constraint conditions of the opening angle vector inequality;
(4) converting the constraint conditions of the opening angular quantity inequality into a penalty function form to realize the conversion from a constrained optimization model to an unconstrained optimization model;
(5) inputting the initialized penalty factor into an unconstrained optimization model, and iterating the initial value of the opening angle vector until the initial value converges to a first opening angle vector;
(6) expanding the initialized penalty factor by m times to form a first penalty factor input unconstrained optimization model, and iterating the first opening angle vector until the first opening angle vector converges to a second opening angle vector;
(7) expanding the kth penalty factor by m times to form a (k +1) th penalty factor, inputting the (k +1) th penalty factor into the unconstrained optimization model, and iterating the (k +1) th opening angle vector until the (k +2) th opening angle vector is converged;
(8) judging whether the (k +1) th penalty factor is larger than or equal to the maximum penalty factor or not, if so, determining that the (k +2) th turn-on angle vector is a PWM control signal corresponding to the power module; otherwise, k is k +1, go to step (7);
wherein k is more than or equal to 1, and the initial value of k is 1; b is the harmonic frequency; m is more than 1.
Preferably, the constrained optimization model is:
wherein,
is an objective function;
an opening angle quantity formed by opening angles of N power units αi(i ═ 1,2,3, and N) is the turn-on angle of the ith power cell.
Preferably, the unconstrained optimization model is:
wherein,
opening a penalty function for angular vector inequality constraint condition transformation; t is a penalty factor;is an objective function;
the quantity of the opening angle formed by the opening angles of the N power units.
Through the technical scheme, compared with the prior art, the invention has the following beneficial effects:
(1) according to the invention, a SHEPWM (namely, Selective Harmonic Elimination Pulse width modulation) method is adopted to eliminate specific subharmonics of a target output waveform, in the process of solving a SHEPWM equation, the problem of divergence of an iterative process when the number of levels is large can be solved by the scheme based on an inner point method (namely, steps (5) to (8)), and the initial value selection method based on the area equivalence principle also promotes iterative convergence and accelerates the convergence speed.
(2) The multilevel power amplification system provided by the invention adopts a modularized and distributed design for realizing the power module. When the level number is larger and the requirement of output voltage/power is higher, the hardware expansion of the system can be realized by increasing the number of the power units. Compared with the traditional clamping topology, the multi-level power amplification system provided by the invention has simpler control scheme, and the cascade transformer is used for isolating the output side of each power unit, so that each power unit can share one direct-current power supply.
Drawings
Fig. 1 is a block diagram of a multi-level power amplification system according to the present invention;
FIG. 2 is a main circuit topology of a power module provided by the present invention;
FIG. 3 is a schematic diagram of obtaining the turn-on angle of each power unit by using step wave modulation according to the present invention;
FIG. 4 is a schematic diagram of obtaining the turn-on angle of each power unit by using the stepped wave modulation after current sharing according to the present invention;
FIG. 5 is a schematic diagram of the area equivalence principle provided by the present invention;
fig. 6 is a graph of the output voltage spectrum of a 32-level power amplifier provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
As shown in fig. 1, the present invention provides a multi-level power amplification system, which includes a main control chassis, a power module and a cascade transformer;
one end of the main control case is connected with external communication equipment; the other end of the main control case is bidirectionally connected with one end of the power module; one end of the cascade transformer is connected with the other end of the power module;
the main control case is used for carrying out multi-level modulation according to the control signals transmitted by the external communication equipment and generating PWM control signals corresponding to each power unit of the power module; the main control case is also used for monitoring whether the Fault signal and the voltage and current signal of each power unit in the power module are normal or not and sending corresponding PWM control signals to the power units with normal Fault signals and voltage and current signals;
the multilevel modulation is based on an iteration initial value selection method of an area equivalence principle and an optimization iteration method of an interior point method;
the power module is used for measuring Fault signals and voltage and current signals of each power unit and reporting the Fault signals and the voltage and current signals to the main control case; the power unit receiving the PWM control signal is also used for generating a corresponding alternating-current voltage square wave and outputting the alternating-current voltage square wave to the cascade transformer;
the cascade transformer is used for outputting the alternating current square waves transmitted from the power module after being connected in series.
Preferably, the main control cabinet includes a DSP (Digital Signal Processor) and an FPGA (Field Programmable Gate Array), and one end of the DSP is connected to the external communication device; the other end of the DSP is in two-way communication with one end of the FPGA; the other end of the FPGA is in optical fiber communication with one end of the power module;
the DSP is used for carrying out multi-level modulation according to the control signal transmitted by the external communication equipment and generating PWM control signals corresponding to each power unit; monitoring whether Fault signals and voltage and current signals of each power unit in the power module are normal or not;
the FPGA is used for sending corresponding PWM control signals to the power unit with normal Fault signals and normal voltage and current signals.
Preferably, the power module is of a distributed structure and comprises N sub-control boards and N H-bridge power units which are in one-to-one correspondence;
the sub-control board is used for controlling the H-bridge power unit to output alternating-current square waves according to the received PWM control signal; and simultaneously measuring Fault signals and voltage and current signals of the corresponding H-bridge power units, and reporting the Fault signals and the voltage and current signals to the main control case.
Preferably, the cascade transformer is an electromagnetic module obtained by connecting N single-phase transformers in series;
the primary sides of the N single-phase transformers are not coupled, and the secondary sides of the N single-phase transformers are connected in series.
On the other hand, the method for generating the PWM control signal based on the multi-level power amplifying system includes:
(1) fourier decomposition is carried out on the target output waveform of the cascade transformer, and an expression of the harmonic amplitude of the specific times of the target output waveform is obtainedCalculating to obtain an initial value of the opening angle vector according to an area equivalent principle;
(2) taking the square sum of the expression of each harmonic amplitude of the target output waveform to obtain a target function;
(3) acquiring a constraint optimization model according to the target function and the constraint conditions of the opening angle vector inequality;
(4) converting the constraint conditions of the opening angular quantity inequality into a penalty function form to realize the conversion from a constrained optimization model to an unconstrained optimization model;
(5) inputting the initialized penalty factor into an unconstrained optimization model, and iterating the initial value of the opening angle vector until the initial value converges to a first opening angle vector;
(6) expanding the initialized penalty factor by m times to form a first penalty factor input unconstrained optimization model, and iterating the first opening angle vector until the first opening angle vector converges to a second opening angle vector;
(7) expanding the kth penalty factor by m times to form a (k +1) th penalty factor, inputting the (k +1) th penalty factor into the unconstrained optimization model, and iterating the (k +1) th opening angle vector until the (k +2) th opening angle vector is converged;
(8) judging whether the (k +1) th penalty factor is larger than or equal to the maximum penalty factor or not, if so, determining that the (k +2) th turn-on angle vector is a PWM control signal corresponding to the power module; otherwise, k is k +1, go to step (7);
wherein k is more than or equal to 1, and the initial value of k is 1.
Preferably, the constrained optimization model is:
wherein,
is an objective function;an opening angle quantity formed by opening angles of N power units αi(i ═ 1,2,3, and N) is the turn-on angle of the ith power cell.
Preferably, the unconstrained optimization model is:wherein,
opening a penalty function for angular vector inequality constraint condition transformation; t is a penalty factor;is an objective function;
the quantity of the opening angle formed by the opening angles of the N power units.
The following describes the specific principles of the present invention:
FIG. 2 is a main circuit topology diagram of the power module provided by the present invention, where N square wave inverters are N power units, UdcFor the DC side voltage of each power cell, UoutThe voltage step wave is obtained by connecting N power units in series through a cascade transformer, wherein, as shown in fig. 3, when N is 4, the voltage step wave is obtained by the ac voltage square waves output by the N power units according to the superposition principle.
According to the property of Fourier transform, in order to make the output voltage step wave free of direct current component and even harmonic, the alternating current voltage square wave output by a single power unit needs to have 1/4 periodic symmetry property, i.e. the output waveform of each power unit needs to be symmetrical to a straight line
And a point (pi, 0) is connected, and the output voltage step wave is formed only by the opening angles α of the N power cellsi(i ═ 1, 2.., N).
As can be seen from fig. 3, the step wave modulation method has a defect: the conduction time lengths of different power units in one main period are different, and along with the increase of the level number, the difference between the longest conduction time and the shortest conduction time is very large, so that the output powers of different power units are greatly different, and the service lives of different power units are greatly different due to different heating conditions. In an ideal case, the conduction time of each power unit is equalized to achieve the equalization effect, and the main circuit of the actual power module adopts stepped wave modulation after current equalization as shown in fig. 4.
Fourier expansion is carried out on the voltage step wave in the figure 4 to obtain an expression of each harmonic amplitudeLet the amplitude of the harmonic to be cancelled equal to 0 result in the set of harmonic cancellation equations (1) (taking the case of an N-level power amplification system cancelling three to twenty harmonics as an example):
the nonlinear equation set (1) is a transcendental equation set containing N unknowns, and theoretically, no analytic solution exists and only a numerical solution can be solved. Conversion of the problem of solving the system of nonlinear equations into a constrained optimization problem is considered, namely
Under the condition, solving an objective function
Problem of minimum value:
the objective function of the problem is obtained by equation (1)
It should be noted that the initial value selection of the iterative method is very important. According to the impulse equivalence principle, a sufficiently short time pulse is taken in the time domain, the corresponding integrals of the two voltage waveforms are obtained, and if the integrals are equal everywhere, the two voltage waveforms are considered to have similar low-frequency components in the frequency domain. Accordingly, an area equivalence principle suitable for selection of the initial values of the harmonic elimination equation is obtained, and the iteration initial values are selected by adopting the area equivalence principle as follows:
αishould be chosen such that the area of the black part in fig. 5 is equal to the area of the shaded part, i.e.:
simplifying to obtain:
αi＝i·θB-(i-1)·θA+N·(cosθB-cosθA) (5)
wherein,is an objective function;an opening angle quantity formed by opening angles of N power units αi(i ═ 1,2,3, N) is the turn-on angle of the ith power cell;
the values of N conduction angles can be obtained from equation (5).
And (3) taking the values of the N conduction angles as iteration initial values, and solving the formula (2) by using an interior point method. Converting the constraint in equation (2) into a penalty function
Then equation (2) can be approximated as an unconstrained optimization model (7):
wherein,
opening a penalty function for angular vector inequality constraint condition transformation; t is a penalty factor;
is an objective function;
the quantity of the opening angle formed by the opening angles of the N power units.
Multiplying the penalty factor t by the kth penalty factor t for each iterationkFormula (7) without constraint condition can be used for solving numerical solution meeting iteration precision by using Newton method
This process is called an iterative process of the inner layer. After each time of inner layer iteration is finished, updating the value of t once, and updating tkAmplifying the same times to obtain tk+1This process is an iterative process of the outer layer. The numerical solution of equation (7) when the value of t is iterated to larger values
Namely the numerical solution of formula (2), namely the opening angle of the N levels meeting the requirement
Off-line calculation of opening angle under different N values
The (N level switch table) is stored in the main control board, and the user can control the program on line from the external communication interface. The specific control process comprises the following steps:
(1) and normally outputting the N-level voltage step wave. The DSP of the main control board utilizes N opening angles (N level switch tables) stored in an off-line mode to complete N level SHEPWM modulation, controls each power unit to emit waves, and outputs the waves in a superposed mode through a cascade transformer;
(2) and (5) monitoring the state. Monitoring the reported voltage/current signal, temperature signal and Fault signal sent by each branch control board, and entering Fault-tolerant control when the Fault is found;
(3) and (5) fault-tolerant control. The main control case sends a bypass instruction to the power unit with the fault, and the corresponding sub-control board receives and completes the bypass work of the path. And (3) for the rest N paths of normal power units (N is less than N), calling a corresponding N level switch table by the main control case, and entering an N level step wave output working condition similar to the process (1).
Examples
Taking a working condition that a 32-level power amplification system requires output to eliminate three to twenty harmonics as an example, the following specific description is given:
(1) carrying out Fourier decomposition on a target output waveform of the cascade transformer to obtain an expression of each subharmonic of the target output waveform
(b is 3,5,7, …, 19 is the harmonic order);
wherein the expressions of each harmonic all contain
Of a scalar function in the form of a trigonometric series, αi(i is 1,2,3, 32) is a vector consisting of the opening angles of the 32 power units;
(2) taking the square sum of each harmonic expression of the target output waveform to obtain the target function
Bond αiObtaining a constraint optimization model A in the self constraint range:
(3) α will be mixediConversion of inequality constraints into form of penalty function
Model to be constrained and optimizedConverting A into an unconstrained optimization model B:
wherein t is an introduced penalty factor which is a positive number;
(4) calculating the opening angle vector by adopting the area equivalent principle
Initial value of
(5) Get t0Substituting 1 into model B, and
the iteration is carried out as an initial value,
will converge to
(6) Get tk＝10*tk-1Substituting into model B, will
The iteration is carried out as an initial value,
will converge to
k＝1,2,3，….；
(7) Repeating the step (6), and when t is sufficiently large, considering that the obtained result is iterated
As a solution to model A, composition
α (g)i(i is 1,2,3, 32) is the controlMaking 32 required switching angles to obtain a 32-level switch meter;
(8) taking N values equal to 31, 30 and the like (according to engineering fault tolerance requirements), repeating the steps (1) to (7) to obtain 31 and 30 level switch tables;
(9) storing the level switch tables 32, 31 and 30 off line, sending 32 level step waves in a normal state, and monitoring the states of all power units;
(10) in the event of a power cell failure, the circuit will be bypassed and the remaining power modules will switch into the respective 31 or 30 level step wave condition.
On the 32-level elimination of the three to twenty harmonic problem, the traditional newton iteration method will not converge; the 32-level three to twenty harmonic elimination effect diagram shown in fig. 6 shows that the problem can be solved well by using the initial value selection and iteration method provided by the invention.
In summary, the present invention adopts a SHEPWM (Selective Harmonic Elimination pulse width Modulation) method to eliminate each Harmonic of a target output waveform of a specific number of times, and in the process of solving the SHEPWM equation, the proposed scheme based on the interior point method (i.e., steps (5) to (8)) can solve the problem of divergence in the iterative process when the number of levels is large, and the proposed initial value selection method based on the area equivalence principle also promotes the iterative convergence and accelerates the convergence speed.
The multilevel power amplification system provided by the invention adopts a modularized and distributed design for realizing the power module. When the level number is larger and the requirement of output voltage/power is higher, the hardware expansion of the system can be realized by increasing the number of the power units. Compared with the traditional clamping topology, the multi-level power amplification system provided by the invention has simpler control scheme, and the cascade transformer is used for isolating the output side of each power unit, so that each power unit can share one direct-current power supply.
It will be understood by those skilled in the art that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the invention, and that any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the present invention.
Claims (7)
1. A multi-level power amplification system is characterized by comprising a main control case, a power module and a cascade transformer;
one end of the main control case is connected with external communication equipment; the other end of the main control case is connected with one end of the power module in a bidirectional mode; one end of the cascade transformer is connected with the other end of the power module;
the main control case is used for carrying out multi-level modulation according to control signals transmitted by external communication equipment and generating PWM control signals corresponding to each power unit in the power module; the main control case is also used for monitoring whether the Fault signal and the voltage and current signal of each power unit are normal or not and sending corresponding PWM control signals to the power units with normal Fault signals and voltage and current signals;
the multilevel modulation is an iteration initial value selection method based on an area equivalence principle and a multilevel modulation method based on an optimization iteration method of an interior point method;
the power module is used for measuring Fault signals and voltage and current signals of each power unit and reporting the Fault signals and the voltage and current signals to the main control case; the power unit receiving the PWM control signal is also used for generating a corresponding alternating-current voltage square wave and outputting the alternating-current voltage square wave to the cascade transformer;
the cascade transformer is used for outputting the alternating current square waves transmitted from the power module after being connected in series.
2. The multi-level power amplification system of claim 1, wherein the main control cabinet comprises a DSP and an FPGA, one end of the DSP being connected to an external communication device; the other end of the DSP is in two-way communication with one end of the FPGA; the other end of the FPGA is in optical fiber communication with one end of the power module;
the DSP is used for carrying out multi-level modulation according to a control signal transmitted by external communication equipment to generate a PWM control signal corresponding to the power module; monitoring whether a Fault signal and a voltage current signal of the power module are normal or not;
the FPGA is used for sending corresponding PWM control signals to the power unit with normal Fault signals and normal voltage and current signals.
3. The multilevel power amplifying system according to claim 1 or 2, wherein the power module is a distributed structure including N sub-control boards and N H-bridge power cells in a one-to-one correspondence;
the sub-control board is used for controlling the H-bridge power unit to output alternating-current square waves according to the received PWM control signal; and simultaneously measuring Fault signals and voltage and current signals of the corresponding H-bridge power units, and reporting the Fault signals and the voltage and current signals to the main control case.
4. The multilevel power amplification system of claim 3, wherein the cascaded transformer is an electromagnetic module of N single-phase transformers connected in series;
the primary sides of the N single-phase transformers are not coupled, and the secondary sides of the N single-phase transformers are connected in series.
5. The PWM control signal generation method of the multilevel power amplifying system according to claim 1, comprising:
(1) fourier decomposition is carried out on the target output waveform of the cascade transformer, and an expression of the harmonic amplitude of the specific times of the target output waveform is obtained
Calculating to obtain an initial value of the opening angle vector according to an area equivalent principle;
(2) for expressionTaking the sum of squares to obtain a target function;
(3) acquiring a constraint optimization model according to the target function and the constraint conditions of the opening angle vector inequality;
(4) converting the constraint conditions of the opening angular quantity inequality into a penalty function form to realize the conversion from a constrained optimization model to an unconstrained optimization model;
(5) inputting the initialized penalty factor into an unconstrained optimization model, and iterating the initial value of the opening angle vector until the initial value converges to a first opening angle vector;
(6) expanding the initialized penalty factor by m times to form a first penalty factor input unconstrained optimization model, and iterating the first opening angle vector until the first opening angle vector converges to a second opening angle vector;
(7) expanding the kth penalty factor by m times to form a (k +1) th penalty factor, inputting the (k +1) th penalty factor into the unconstrained optimization model, and iterating the (k +1) th opening angle vector until the (k +2) th opening angle vector is converged;
(8) judging whether the (k +1) th penalty factor is larger than or equal to the maximum penalty factor or not, if so, determining that the (k +2) th turn-on angle vector is a PWM control signal corresponding to the power module; otherwise, k is k +1, go to step (7);
wherein k is more than or equal to 1, and the initial value of k is 1; b is the number of harmonics specified to be eliminated; m is more than 1.
6. The PWM control signal generation method according to claim 5, wherein the constraint optimization model is:
wherein,
is an objective function;
an opening angle quantity formed by opening angles of N power units αi(i ═ 1,2,3, and N) is the turn-on angle of the ith power cell.
7. The PWM control signal generation method according to claim 5 or 6, wherein the unconstrained optimization model is:
wherein,
opening a penalty function for angular vector inequality constraint condition transformation; t is a penalty factor;
is an objective function;
the quantity of the opening angle formed by the opening angles of the N power units.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911206265.6A CN110855172B (en) | 2019-11-29 | 2019-11-29 | Multi-level power amplification system and PWM control signal generation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911206265.6A CN110855172B (en) | 2019-11-29 | 2019-11-29 | Multi-level power amplification system and PWM control signal generation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN110855172A true CN110855172A (en) | 2020-02-28 |
| CN110855172B CN110855172B (en) | 2020-09-18 |
Family
ID=69606718
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911206265.6A Active CN110855172B (en) | 2019-11-29 | 2019-11-29 | Multi-level power amplification system and PWM control signal generation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110855172B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113271027A (en) * | 2021-07-12 | 2021-08-17 | 希望森兰科技股份有限公司 | Diode-clamped high-performance synchronous overmodulation algorithm for three-level inverter |
| WO2024000054A1 (en) * | 2022-06-29 | 2024-01-04 | Companhia Energética De Pernambuco - Celpe | Methods for current control together with selective harmonic elimination modulation in a three-phase dc-ac converter connected to the power grid to mitigate current distortion by low order harmonics and digital filtering of harmonics |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1877975A (en) * | 2006-07-06 | 2006-12-13 | 北京四方清能电气电子有限公司 | Selective harmonic elimination optimization method for tri-level single-phase-bridge inverter |
| CN102983768A (en) * | 2012-11-14 | 2013-03-20 | 国网智能电网研究院 | Optimization control method based on selective harmonic elimination pulse width modulation (SHEPWM) |
| EP2634908A1 (en) * | 2012-03-02 | 2013-09-04 | Ingeteam Power Technology, S.A. | Method for controlling the DC- voltage balance in a multi-level inverter and multi-level inverter |
| CN104270023A (en) * | 2014-06-23 | 2015-01-07 | 中国矿业大学(北京) | Harmonic optimization and modulation method of multi-level converter |
| CN106253288A (en) * | 2016-07-19 | 2016-12-21 | 河海大学 | A kind of optimal load flow algorithm containing THE UPFC based on automatic differential |
| CN108879775A (en) * | 2018-07-23 | 2018-11-23 | 国网重庆市电力公司经济技术研究院 | A kind of unbalanced power supply photovoltaic DC-to-AC converter control method for coordinating considering current limit |
| CN109510633A (en) * | 2018-12-05 | 2019-03-22 | 中国人民解放军国防科技大学 | Power equalization method and modulator for specific harmonic elimination multilevel radio frequency pulse width modulation |
-
2019
- 2019-11-29 CN CN201911206265.6A patent/CN110855172B/en active Active
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1877975A (en) * | 2006-07-06 | 2006-12-13 | 北京四方清能电气电子有限公司 | Selective harmonic elimination optimization method for tri-level single-phase-bridge inverter |
| EP2634908A1 (en) * | 2012-03-02 | 2013-09-04 | Ingeteam Power Technology, S.A. | Method for controlling the DC- voltage balance in a multi-level inverter and multi-level inverter |
| CN102983768A (en) * | 2012-11-14 | 2013-03-20 | 国网智能电网研究院 | Optimization control method based on selective harmonic elimination pulse width modulation (SHEPWM) |
| CN104270023A (en) * | 2014-06-23 | 2015-01-07 | 中国矿业大学(北京) | Harmonic optimization and modulation method of multi-level converter |
| CN106253288A (en) * | 2016-07-19 | 2016-12-21 | 河海大学 | A kind of optimal load flow algorithm containing THE UPFC based on automatic differential |
| CN108879775A (en) * | 2018-07-23 | 2018-11-23 | 国网重庆市电力公司经济技术研究院 | A kind of unbalanced power supply photovoltaic DC-to-AC converter control method for coordinating considering current limit |
| CN109510633A (en) * | 2018-12-05 | 2019-03-22 | 中国人民解放军国防科技大学 | Power equalization method and modulator for specific harmonic elimination multilevel radio frequency pulse width modulation |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113271027A (en) * | 2021-07-12 | 2021-08-17 | 希望森兰科技股份有限公司 | Diode-clamped high-performance synchronous overmodulation algorithm for three-level inverter |
| WO2024000054A1 (en) * | 2022-06-29 | 2024-01-04 | Companhia Energética De Pernambuco - Celpe | Methods for current control together with selective harmonic elimination modulation in a three-phase dc-ac converter connected to the power grid to mitigate current distortion by low order harmonics and digital filtering of harmonics |
Also Published As
| Publication number | Publication date |
|---|---|
| CN110855172B (en) | 2020-09-18 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| Abd Rahim et al. | Elimination of harmonics in photovoltaic seven-level inverter with Newton-Raphson optimization | |
| Aleenejad et al. | Selective harmonic elimination for cascaded multicell multilevel power converters with higher number of H-Bridge modules | |
| Zhao et al. | Analysis and suppression of resonant current envelope ripple of LLC converter in cascaded modular PV solid-state transformer | |
| CN110855172B (en) | Multi-level power amplification system and PWM control signal generation method thereof | |
| Dash et al. | Implementation of EMD‐based control algorithm for a cascaded multilevel inverter–based shunt active filter | |
| Kumar et al. | Modelling of symmetric switched capacitor multilevel Inverter for high power appliances | |
| Awais et al. | Optimal switching angles for minimization of total harmonic distortion in single phase cascaded multilevel inverters | |
| Barbie et al. | Analytical approach to THD formulation and optimization in sine-pwm-based single-phase multilevel inverters with variable DC ratios | |
| Srinath et al. | Quasi newton least mean fourth control for multifunctional grid tied solar photovoltaic system | |
| Wang et al. | Robustness evaluation for harmonic suppression of LCL-type converter based on converter-side current feedback strategy under weak and distorted grid | |
| Shami et al. | Selective Harmonic Elimination Notch Angle Calculation Using THD and ZHF Benchmarks for Cascaded Multilevel Inverters | |
| Halim et al. | Generalized selective harmonic elimination modulation for transistor-clamped H-bridge multilevel inverter | |
| Barros et al. | Optimal predictive control of three-phase NPC multilevel inverter: Comparison to robust sliding mode controller | |
| Fang et al. | High performance unified control for interlinking converter in hybrid AC/DC microgrid | |
| Mantilla et al. | Control of active and reactive powers in three phase inverters for grid-tied photovoltaic systems under unbalanced voltages | |
| Shah et al. | Power quality improvement using three‐phase transformerless grid interfaced SECS enabling leakage current suppression | |
| Brusco et al. | A repetitive-based control for a single-phase shunt active power filter for harmonic voltage compensation | |
| Kipke et al. | Actively damped PI-based control design of grid-connected three-level VSC with LCL filter | |
| Zhang et al. | A generalized simulation-based multi-functional differential mode and common mode LCL filter design method | |
| Kumar et al. | Selective Harmonic Elimination Technique for a CMLI with Unequal DC Sources | |
| Imarazene et al. | Fpga-based control of three-level inverter using selective harmonics elimination pwm | |
| Osório et al. | Robust control of grid-connected converters under wide grid impedance variation | |
| Achilladelis et al. | Optimized pulse width modulation for transformerless active-NPC inverters | |
| Mohan et al. | Comparative evaluation of various single phase harmonic filters for non-linear load | |
| Catzin Contreras et al. | A current controller for the modular multilevel converter operating under distorted grid voltage |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |