CN110825310A - Memory management method and memory controller - Google Patents
Memory management method and memory controller Download PDFInfo
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- CN110825310A CN110825310A CN201810901685.5A CN201810901685A CN110825310A CN 110825310 A CN110825310 A CN 110825310A CN 201810901685 A CN201810901685 A CN 201810901685A CN 110825310 A CN110825310 A CN 110825310A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
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Abstract
The invention provides a memory management method and a memory controller. The method comprises the following steps: executing a garbage collection instruction; generating a garbage collection information table with a predetermined size according to one or more collection block strings, and writing the garbage collection information table into a target block string, wherein the garbage collection information table comprises an identification tag, a local collection block string list and first padding data; reading valid data of the one or more reclamation block strings and writing the valid data into the target block string, wherein the written valid data is immediately after the written garbage reclamation information table; and closing the target tile string and appending the local recycle block string list to a global recycle block string list in a buffer memory to complete the garbage collection instruction.
Description
Technical Field
The present invention relates to a memory management method, and more particularly, to a memory management method and a memory controller suitable for a memory device configured with a rewritable nonvolatile memory module.
Background
Generally, a memory controller of a memory device configured with a rewritable nonvolatile memory module performs a garbage collection operation to move valid data in a plurality of source physical blocks to a plurality of new physical blocks, and erases the plurality of source physical blocks to release space occupied by invalid data of the plurality of source physical blocks.
Conventionally, in the process of performing a garbage collection operation on a plurality of physical blocks, when there is any change in information of the plurality of physical blocks, a Snapshot (Snapshot) operation is performed to store the information of the plurality of physical blocks corresponding to the performed garbage collection operation, which is originally maintained in a buffer memory, to a rewritable nonvolatile memory module. As a result, during the execution of the garbage collection operation, a lot of time is consumed because the snapshot operation is frequently executed, which results in a lot of delay of the storage device.
Therefore, it is one of the topics studied by those skilled in the art how to efficiently store the information of the garbage collection operation to reduce the delay caused by executing the garbage collection operation and further improve the working efficiency of the storage device.
Disclosure of Invention
The invention provides a memory management method, which can generate a garbage collection information table according to the information of a collection block string of the garbage collection operation and write the garbage collection information table into a target block string corresponding to the garbage collection operation when the garbage collection operation is started. In addition, the memory management method can also execute a recovery operation when a power-off event occurs, so as to reconstruct the global reclaimed block string list by using the garbage information table stored in the target block string.
An embodiment of the present invention provides a memory management method, which is suitable for a storage device configured with a rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of physical blocks, and the physical blocks are grouped into a plurality of block strings. The method comprises the following steps: a memory management method for a memory device configured with a rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of physical blocks, and the physical blocks are grouped into a plurality of block strings, the method comprising: executing a garbage collection instruction, wherein the garbage collection instruction instructs collection of valid data of one or more recovery block strings to a target block string; generating a garbage collection information table having a predetermined size according to the one or more collection block strings, and writing the garbage collection information table to the target block string, wherein the garbage collection information table comprises an identification tag, a local collection block string list and first padding data; reading valid data of the one or more reclamation block strings and writing the valid data into the target block string, wherein the written valid data is immediately after the written garbage reclamation information table; and closing the target string and appending the local recycle block string list to a global recycle block string list in a buffer memory to complete the garbage collection instruction.
An embodiment of the present invention provides a memory controller for controlling a memory device configured with a rewritable non-volatile memory module. The storage controller includes: the garbage collection management circuit comprises a connection interface circuit, a memory interface control circuit, a garbage collection management circuit unit and a processor. The connection interface circuit is used for being coupled to a host system. The memory interface control circuit is coupled to the rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of physical blocks, and the physical blocks are grouped into a plurality of block strings. The processor is coupled to the connection interface circuit, the memory interface control circuit and the garbage collection management circuit unit. The garbage collection management circuit unit is configured to execute a garbage collection instruction received from the processor, wherein the garbage collection instruction instructs to collect valid data of one or more recovery block strings to a target block string, wherein the garbage collection management circuit unit is further configured to generate a garbage collection information table having a predetermined size according to the one or more recovery block strings, and instruct the memory interface control circuit to write the garbage collection information table to the target block string. The garbage collection information table comprises an identification tag, a local collection block string list and first filling data. The garbage collection management circuit unit is further configured to read valid data of the one or more collection block strings and write the valid data to the target block string, wherein the written valid data is immediately after the written garbage collection information table. The garbage collection management circuit unit is further configured to close the target string and append the local recycle block string list to a global recycle block string list in a buffer memory to complete the garbage collection instruction.
Based on the above, the memory management method and the memory controller provided in the embodiments of the present invention can generate the garbage collection information table according to the collection block string for performing the garbage collection operation only when responding to the start of performing the garbage collection operation, write the garbage collection information table into the target block string corresponding to the garbage collection operation, and copy the valid data of the collection block string into the target block string having the garbage collection information table, so as to complete the garbage collection operation. In addition, the garbage collection information table in each target block string can also be used to reconstruct the global collection block string list to assist in managing the use status of the entire block string of the storage device. Therefore, under the condition of reducing access delay caused by garbage collection operation, the data stored in the storage device still has reliability, and the working efficiency of the storage device is further improved.
In order to make the aforementioned and other features and advantages of the invention more comprehensible, embodiments accompanied with figures are described in detail below.
Drawings
FIG. 1 is a block diagram of a host system and a storage device according to an embodiment of the invention.
FIG. 2A is a flow chart of a method for memory management according to an embodiment of the invention.
FIG. 2B is a flow chart of a method for memory management according to an embodiment of the invention.
FIG. 3 is a block diagram of a plurality of block strings of a rewritable nonvolatile memory module according to an embodiment of the present invention.
Fig. 4A is a schematic diagram illustrating a data structure of a garbage collection information table according to an embodiment of the present invention.
Fig. 4B is a diagram illustrating writing of a garbage collection table to a target block string according to an embodiment of the invention.
FIG. 4C is a block diagram illustrating a data structure of a global reclaim block list according to an embodiment of the invention.
Fig. 5 is a flow diagram illustrating a recovery operation according to an embodiment of the present invention.
Description of the reference numerals
10: host system
20: storage device
110. 211: processor with a memory having a plurality of memory cells
120: host memory
130: data transmission interface circuit
210: storage controller
212: data management circuit
213: memory interface control circuit
214: error checking and correcting circuit
215: garbage recovery management circuit unit
2151: garbage recycling execution circuit
2152: recovery block string recording circuit
216: buffer memory
217: power management circuit
220: rewritable nonvolatile memory module
230: connection interface circuit
S211, S212, S213, S214, S215, S216: flow steps of memory management method
S221, S222, S223: flow steps of memory management method
D1: package with a metal layer
LUN 1: logic number
P1(1) -P1 (6), P1(M-1), P1(M-1), P2(1) -P2 (6), P2(M-1), P2(M), P3(1) -P3 (6), P3(M-1), P3(M), P4(1) -P4 (6), P4(M-1), P4 (M): physical block
P1-P4: plane surface
BS (1) to BS (6), BS (M-1), BS (M): block string
Page [1] to Page [ N ]: physical page
400: garbage recovery information table
410: global reclaim block string list
DT: data label
RBI [1] RBI [ Y ], RBI [1] RBI [ X ]: block string index value
PD1, PD 2: stuffing data
S51, S52, S53, S54, S55, S56, S57, S58, S59, S60: flow steps of recovery operation
Detailed Description
In this embodiment, the memory device includes a rewritable non-volatile memory module (rewritable non-volatile memory module) and a memory device controller (also referred to as a memory controller or a memory control circuit). Further, the storage device is used with a host system so that the host system can write data to or read data from the storage device.
FIG. 1 is a block diagram of a host system and a storage device according to an embodiment of the invention.
Referring to fig. 1, a Host System (Host System)10 includes a Processor (Processor)110, a Host Memory (Host Memory)120, and a Data Transfer Interface Circuit (Data Interface Circuit) 130. In the present embodiment, the data transmission interface circuit 130 is coupled (also referred to as electrically connected) to the processor 110 and the host memory 120. In another embodiment, the processor 110, the host memory 120 and the data transmission interface circuit 130 are coupled to each other by a System Bus (System Bus).
The Memory device 20 includes a Memory Controller (Storage Controller)210, a Rewritable Non-Volatile Memory Module (Rewritable Non-Volatile Memory Module)220, and a connection interface Circuit (connection interface Circuit) 230. The Memory controller 210 includes a processor 211, a data management Circuit (DataManagement Circuit)212, and a Memory Interface Control Circuit (Memory Interface Control Circuit) 213.
In the present embodiment, the host system 10 is coupled to the storage device 20 through the data transmission interface circuit 130 and the connection interface circuit 230 of the storage device 20 to perform data access operation. For example, the host system 10 may store data to the storage device 20 or read data from the storage device 20 via the data transfer interface circuit 130.
In the present embodiment, the processor 110, the host memory 120 and the data transmission interface circuit 130 may be disposed on a motherboard of the host system 10. The number of the data transmission interface circuits 130 may be one or more. The motherboard can be coupled to the memory device 20 via a wired or wireless connection via the data transmission interface circuit 130. The storage device 20 may be, for example, a usb disk, a memory card, a Solid State Drive (SSD), or a wireless memory storage device. The wireless memory storage device can be, for example, a Near Field Communication (NFC) memory storage device, a wireless facsimile (WiFi) memory storage device, a Bluetooth (Bluetooth) memory storage device, or a Bluetooth low energy memory storage device (e.g., iBeacon), which are based on various wireless Communication technologies. In addition, the motherboard may also be coupled to various I/O devices such as a Global Positioning System (GPS) module, a network interface card, a wireless transmission device, a keyboard, a screen, a speaker, and the like through a System bus.
In the present embodiment, the data transmission interface circuit 130 and the connection interface circuit 230 are interface circuits compatible with the PCI Express (Peripheral Component Interconnect Express) standard. The data transmission interface circuit 130 and the connection interface circuit 230 transmit data by using a Non-Volatile Memory interface (NVMe) protocol.
However, it should be understood that the present invention is not limited thereto, and the data transmission interface circuit 130 and the connection interface circuit 230 may also conform to Parallel Advanced Technology Attachment (PATA) standard, Institute of Electrical and Electronic Engineers (IEEE) 1394 standard, Serial Advanced Technology Attachment (SATA) standard, Universal Serial Bus (USB) standard, SD interface standard, Ultra High Speed (UHS-I) interface standard, Ultra High Speed (UHS-II) interface standard, Memory Stick (Memory Stick, MS) interface standard, Multi-Chip Package (Multi-P Package) interface standard, multimedia Memory Card (Multi-Media) interface, flash Memory standard (MMC) interface, UFS) interface standard, eMCP interface standard, CF interface standard, Integrated Device Electronics (IDE) standard, or other suitable standard. In addition, in another embodiment, the connection interface circuit 230 may be packaged with the memory controller 210 in a chip, or the connection interface circuit 230 may be disposed outside a chip including the memory controller 210.
In the present embodiment, the host memory 120 is used for temporarily storing instructions or data executed by the processor 110. For example, in the present exemplary embodiment, the host Memory 120 may be a Dynamic Random Access Memory (DRAM), a Static Random Access Memory (SRAM), and the like. However, it should be understood that the present invention is not limited thereto, and the host memory 120 may be other suitable memories.
The memory controller 210 is used for executing a plurality of logic gates or control commands implemented in hardware or firmware and performing operations such as writing, reading and erasing data in the rewritable nonvolatile memory module 220 according to commands of the host system 10.
More specifically, the processor 211 in the memory controller 210 is computing hardware for controlling the overall operation of the memory controller 210. Specifically, the processor 211 has a plurality of control commands, and the control commands are executed to write, read and erase data when the memory device 20 is in operation.
It should be noted that, in the embodiment, the Processor 110 and the Processor 211 are, for example, a Central Processing Unit (CPU), a Microprocessor (micro-Processor), or other Programmable Processing Unit (Microprocessor), a Digital Signal Processor (DSP), a Programmable controller, an Application Specific Integrated Circuit (ASIC), a Programmable Logic Device (PLD), or other similar circuit elements, and the invention is not limited thereto.
In one embodiment, the memory controller 210 further has a read only memory (not shown) and a random access memory (not shown). In particular, the rom has a boot code (bootstrap code), and when the memory controller 210 is enabled, the processor 211 executes the boot code to load the control instructions stored in the rewritable nonvolatile memory module 220 into the ram of the memory controller 210. Then, the processor 211 operates the control commands to perform data writing, reading, and erasing operations. In another embodiment, the control instructions of the processor 211 can also be stored in the form of program codes in a specific area of the rewritable nonvolatile memory module 220, for example, in a physical storage unit of the rewritable nonvolatile memory module 220 dedicated for storing system data.
In the present embodiment, as described above, the memory controller 210 further includes the data management circuit 212 and the memory interface control circuit 213. It should be noted that the operations performed by the components of the storage controller 210 may also be considered as operations performed by the storage controller 210.
The data management circuit 212 is coupled to the processor 211, the memory interface control circuit 213 and the connection interface circuit 230. The data management circuit 212 is used for receiving an instruction from the processor 211 to transmit data. For example, data is read from the host system 10 (e.g., the host memory 120) via the connection interface circuit 230, and the read data is written into the rewritable nonvolatile memory module 220 via the memory interface control circuit 213 (e.g., a write operation is performed according to a write instruction from the host system 10). For another example, data is read from one or more physical units of the rewritable nonvolatile memory module 220 via the memory interface control circuit 213 (the data can be read from one or more memory units of the one or more physical units), and the read data is written into the host system 10 (e.g., the host memory 120) via the connection interface circuit 230 (e.g., a read operation is performed according to a read command from the host system 10). In another embodiment, the data management circuit 212 may also be integrated into the processor 211.
The memory interface control circuit 213 is used for receiving an instruction from the processor 211 and performing a writing (also called Programming) operation, a reading operation or an erasing operation on the rewritable nonvolatile memory module 220 in cooperation with the data management circuit 212.
For example, the processor 211 can execute a write command sequence to instruct the memory interface control circuit 213 to write data into the rewritable nonvolatile memory module 220; the processor 211 can execute a read instruction sequence to instruct the memory interface control circuit 213 to read data from one or more physical units (also referred to as target physical units) of the corresponding read instruction of the rewritable nonvolatile memory module 220; the processor 211 can execute an erase command sequence to instruct the memory interface control circuit 213 to perform an erase operation on the rewritable nonvolatile memory module 220. The write command sequence, the read command sequence, and the erase command sequence may respectively include one or more program codes or command codes and are used to instruct the rewritable nonvolatile memory module 220 to perform corresponding operations of writing, reading, and erasing. In one embodiment, the processor 211 may also issue other types of instruction sequences to the memory interface control circuit 213 to perform corresponding operations on the rewritable nonvolatile memory module 220.
In addition, the data to be written into the rewritable nonvolatile memory module 220 is converted into a format accepted by the rewritable nonvolatile memory module 220 through the memory interface control circuit 213. Specifically, if the processor 211 wants to access the rewritable nonvolatile memory module 220, the processor 211 transmits a corresponding instruction sequence to the memory interface control circuit 213 to instruct the memory interface control circuit 213 to perform a corresponding operation. For example, the command sequences may include a write command sequence for indicating writing data, a read command sequence for indicating reading data, an erase command sequence for indicating erasing data, and corresponding command sequences for indicating various memory operations (e.g., changing a plurality of preset read voltage values of a preset read voltage set for performing a read operation, or performing a garbage collection procedure, etc.). The sequences of instructions may include one or more signals or data on a bus. These signals or data may include instruction code or program code. For example, the read command sequence includes read identification codes, memory addresses, and other information.
The rewritable nonvolatile memory module 220 is coupled to the memory controller 210 (the memory interface control circuit 213) and is used for storing data written by the host system 10. The rewritable nonvolatile memory module 220 may be a Single Level Cell (SLC) NAND flash memory module (i.e., a flash memory module that can store 1 bit in one memory Cell), a Multi-Level Cell (MLC) NAND flash memory module (i.e., a flash memory module that can store 2 bits in one memory Cell), a Triple Level Cell (TLC) NAND flash memory module (i.e., a flash memory module that can store 3 bits in one memory Cell), a Quad Level Cell (QLC) NAND flash memory module (i.e., a flash memory module that can store 4 bits in one memory Cell), a three-dimensional NAND flash memory module (3D NAND flash memory), or a Vertical NAND flash memory module (i.e., a flash memory module that can store 4 bits in one memory Cell), or other flash memory modules having the same characteristics. The memory cells in the rewritable nonvolatile memory module 220 are arranged in an array.
In the embodiment, the rewritable nonvolatile memory module 220 has a plurality of word lines, wherein each of the word lines includes a plurality of memory cells. Multiple memory cells on the same word line are grouped into one or more physical programming units (physical pages). In addition, a plurality of physical programming units can be combined into one physical unit (physical block or physical erasing unit).
In the present embodiment, one physical page is used as the minimum unit for writing (programming) data. The physical cells (physical blocks) are the smallest unit of erase, i.e., each physical cell contains one of the smallest number of memory cells that are erased. Further, the address of each physical page may also be referred to as a physical address.
It should be noted that, in the present embodiment, the system data for recording information of a physical block or block string may be recorded by using one or more storage units in the physical block, or by using one or more storage units in a specific physical block (also referred to as a system physical block) in a system area for recording all system data.
Furthermore, it should be understood that when the processor 211 groups the storage units (or physical units) in the rewritable non-volatile memory module 220 to perform corresponding management operations, the storage units (or physical units) are logically grouped, and their actual locations are not changed.
The memory controller 210 configures a plurality of logic units to the rewritable nonvolatile memory module 220. The host system 10 accesses the user data stored in the plurality of physical units through the configured logical unit. Here, each logical unit may be composed of one or more logical addresses. For example, a Logical unit may be a Logical block (Logical block), a Logical Page (Logical Page), or a Logical Sector (Logical Sector). A logical unit may be mapped to one or more physical units, where a physical unit may be one or more physical addresses, one or more physical sectors, one or more physical programming units, or one or more physical erasing units. In this embodiment, the logic units are logic blocks, and the logic sub-units are logic pages. Each logic unit has a plurality of logic sub-units. In the present embodiment, the address of a logical subunit is also referred to as a logical address.
In addition, the storage controller 210 establishes a Logical To Physical address mapping table (Logical To Physical address mapping table) and a Physical To Logical address mapping table (Physical To Logical address mapping table) To record a mapping relationship between the Logical address and the Physical address configured To the rewritable nonvolatile memory module 220. In other words, the memory controller 210 may look up a physical address mapped by a logical address through the logical-to-physical address mapping table, and the memory controller 210 may look up a logical address mapped by a physical address through the physical-to-logical address mapping table. However, the technical concept related to the mapping relationship between the logical address and the physical address is a conventional technical means for those skilled in the art, and is not described herein again. In the general operation of the memory controller, the logical to physical address mapping table and the physical to logical address mapping table may be maintained in the buffer memory 216.
In the present embodiment, the error checking and correcting circuit 214 is coupled to the processor 211 and is used for performing an error checking and correcting procedure to ensure the correctness of the data. Specifically, when the processor 211 receives a write command from the host system 10, the ECC and ECC circuit 214 generates an Error Correction Code (ECC) and/or an EDC (EDC) for data corresponding to the write command, and the processor 211 writes the data corresponding to the write command and the corresponding ECC and/or EDC into the rewritable nonvolatile memory module 220. Thereafter, when the processor 211 reads data from the rewritable nonvolatile memory module 220, the corresponding error correction code and/or error check code is simultaneously read, and the error checking and correcting circuit 214 performs an error checking and correcting process on the read data according to the error correction code and/or error check code.
In one embodiment, the memory controller 210 further includes a buffer memory 216 and a power management circuit 217. The buffer memory 216 is coupled to the processor 211 and is used for temporarily storing data and instructions from the host system 10, data from the rewritable nonvolatile memory module 220, or other system data for managing the storage device 20, so that the processor 211 can quickly access the data, instructions, or system data from the buffer memory 216. The power management circuit 217 is coupled to the processor 211 and is used to control the power of the memory device 20.
In the present embodiment, the garbage collection management circuit unit 215 includes a garbage collection execution circuit 2151 and a collection block string recording circuit 2152. The garbage collection management circuit unit 215 is used for receiving an instruction from the processor 211 to execute a write command or a reprogramming operation. It should be noted that, in an embodiment, the garbage collection management circuit unit 215 may also be integrated into the processor 211, so that the processor 211 can implement the data writing method provided in this embodiment. In another embodiment, the garbage collection management circuit unit 215 can also be implemented as a garbage collection management program code module in firmware or software, and accessed and executed by the processor 211 to implement the memory management method provided by the present invention
It should be noted that, in the present embodiment, the garbage collection operation is performed for one block string. Details of the block string are described below with reference to fig. 3.
FIG. 3 is a block diagram of a plurality of block strings of a rewritable nonvolatile memory module according to an embodiment of the present invention. Referring to fig. 3, in the present embodiment, the rewritable nonvolatile memory module 220 may have a plurality of packages (Pakage), each of which may have a plurality of physical blocks, the plurality of physical blocks may be divided into N planes, and some or all of the planes may be logically divided into one Logical Unit Number (LUN). For simplicity, it is assumed that the rewritable nonvolatile memory module 220 has one package D1, and the package D1 has a plurality of physical blocks. The plurality of physical blocks are divided (grouped) into 4 planes (planes) P1-P4 (N equals 4), wherein the 4 planes are divided into one logical number LUN 1. Furthermore, each plane has M physical units arranged according to a first order, e.g., the plane P1 has M physical blocks P1(1) -P1 (M); the plane P2 has M physical blocks P2(1) to P2 (M); the plane P3 has M physical blocks P3(1) to P3 (M); the plane P4 has M physical blocks P4(1) to P4 (M). In this embodiment, the physical blocks in the same arrangement order in each plane are grouped into a Block string (Block string). For example, the block string BS (1) includes the physical block P1(1), the physical block P2(1), the physical block P3(1), and the physical block P4 (1). That is, all the physical blocks in the 4 planes may constitute M block strings BS (1) -BS (M) arranged according to the first order.
In the present embodiment, the memory controller 210 writes data into the plurality of block strings sequentially according to the order of the block strings, and writes data into the same block string according to the order of the planes P1-P4. Assuming that all block strings are empty, in order to write a write data item that can be filled with 4 physical blocks, the memory controller 210 stores the write data item from the first empty block string (in this example, block string BS (1)) to all physical blocks of the first empty block string (e.g., physical block P1(1), physical block P2(1), physical block P3(1), and physical block P4 (1)) according to the first order. For another example, assuming that the physical block P1(1) of the block string BS (1) is not available for storing the data and all other physical blocks are available for storing the write data, the memory controller 210 stores the write data into the physical block P2(1), the physical blocks P3(1), the physical blocks P4(1) of the block string BS (1) and the physical block P1(2) of the block string BS (2).
In the present embodiment, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) is configured to receive an instruction from the processor 211 to perform a garbage collection operation on one or more block strings. The garbage collection management circuit unit 215 (or the collected block string recording circuit 2152) is configured to record information corresponding to the one or more block strings on which the garbage collection operation is performed. The details of the data writing method provided by the embodiments of the present invention, and the functions of the memory controller 210 and the garbage collection management circuit unit 215 corresponding to the data writing method will be described in detail below with reference to several drawings.
FIG. 2A is a flow chart of a method for memory management according to an embodiment of the invention. Referring to fig. 1 and fig. 2A, in step S211, the garbage collection management circuit unit 215 executes a garbage collection instruction, wherein the garbage collection instruction instructs to collect valid data of one or more recovery block strings into the target block string.
Specifically, the processor 211 can record valid data count values of a plurality of block strings of the rewritable nonvolatile memory module 220. When an empty block string is just full of data, the valid data count value of the block string is at a maximum. When the valid data count value of a block string falls below a valid data threshold (or when the invalid data count value of a block string is above an invalid data threshold), the processor 211 records the block string index value of the block string to prepare for performing a garbage collection operation on the block string (also referred to as a source block string). At a specific time, the processor 211 may send a garbage collection command to the garbage collection management circuit unit 215 to instruct the garbage collection management circuit unit 215 to start performing a garbage collection operation on the source block string (also referred to as a recovered block string) so as to collect (copy) valid data in the recovered block string into an available block string (also referred to as a target block string).
In other words, at least two types of information are included in the garbage collection instruction, one is information of the collected valid data in the collection block string, and the other is the target block string. The garbage collection management circuit unit 215 may identify, by the garbage collection instruction, a block string index value (also referred to as a collection block string index value) of the one or more collection block strings indicated by the garbage collection instruction and a block string index value (also referred to as a target block string index value) of the target block string. A block string index value (e.g., BS (1) above) for a block string may be used by various elements of memory controller 210 to identify the block string and a plurality of physical blocks within the block string. In addition, the block string index value can also be used to indicate the position of the corresponding block string in the rewritable nonvolatile memory module 220.
It is worth mentioning that the processor 211 may reuse the recycling block string. Specifically, the processor 211 may perform an erase operation on the recycle block string at an appropriate time (e.g., at the time of idle of the storage device) so that the physical blocks in the recycle block string become blank physical blocks, and thus can be written with data. In addition, in one embodiment, the processor 211 may also select the recycle block string to perform the write operation, and perform the erase operation on the recycle block string before writing the data corresponding to the write operation.
Next, in step S212, the garbage collection management circuit unit 215 (or the garbage collection block string recording circuit 2152) generates a garbage collection information table having a predetermined size according to the one or more garbage collection block strings, and writes the garbage collection information table to the target block string, wherein the garbage collection information table includes the identification tag, the local garbage collection block string list and the first padding data. The following describes the structure of the generated garbage collection information table with reference to fig. 4A.
Fig. 4A is a diagram illustrating a data structure of a garbage collection information table according to an embodiment of the present invention. Referring to fig. 4A, in the present embodiment, the garbage collection information table 400 mainly includes a local collection block string list. The local recycle block string list is used for recording one or more recycle block string index values RBI [1] to RBI [ Y ] of one or more recycle block strings corresponding to the garbage recycle instruction. Y is a positive integer.
In addition, in the present embodiment, the size of the generated garbage collection information table is a predetermined size for convenience of data management. The predetermined size is, for example, a size of one physical page or a size of one Codeword (coded), but the present invention is not limited thereto. The garbage collection management circuit unit 215 (or the garbage collection block string recording circuit 2152) appends the data tag DT and the padding data PD1 (also referred to as the first padding data) to the front and back of the local garbage collection block string list to form the garbage collection information table 400.
The data tag DT is attached to the foremost part of the garbage collection information table 400, and the data tag DT is used to indicate that the data tag DT and various data located behind the data tag DT are a garbage collection information table having a predetermined size. The size of the space occupied by the data tag DT may be predetermined. The plurality of data includes a local reclaim block string list and first padding data.
The first padding PD1 is used to make the size of the garbage collection information table 400 a predetermined size. Specifically, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) calculates the size of the total space occupied by the data tag DT in the currently updated garbage collection information table 400 together with the collection block string list, and takes the difference obtained by subtracting the size of the total space from the predetermined size as the size of the first padding data PD 1. In this way, after the first padding data PD1 is appended to the garbage collection information table 400, the total size of the garbage collection information table 400 can be made the predetermined size. At this time, the operation of generating the garbage collection information table 400 is completed. It should be noted that the size of the space occupied by the data tag DT and the index value RBI [1] -RBI [ Y ] of each recycle block string can be predetermined.
Fig. 4B is a diagram illustrating writing of a garbage collection table to a target block string according to an embodiment of the invention. After generating the garbage collection information table, the garbage collection management circuit unit 215 (or the collection block string recording circuit 2152) instructs the memory interface control circuit 213 to write the generated garbage collection information table to the target block string.
For example, referring to fig. 4B, assume that the blank target block string bs (M) has four physical blocks P1(M) -P4 (M) corresponding to four planes, and each physical block has N physical pages Page [1] -Page [ N ]. The garbage collection management circuit unit 215 (or the garbage collection block string recording circuit 2152) instructs the memory interface control circuit 213 to write the generated garbage collection information table 400 into the front of the first physical Page [1] of the first physical block P1(M) of the target block string bs (M).
After writing the garbage collection information table, the valid data of the one or more collection block strings is written into the target block string. That is, in step S213, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to read the valid data of the one or more recovered block strings and instructs the memory interface control circuit 213 to write the valid data to the target block string, wherein the written valid data is immediately after the written garbage collection information table.
That is, following the example of fig. 4B above, after writing the garbage collection information table 400, the valid data in the one or more recovery block strings are written into the target block string bs (m) in sequence and arranged after the written garbage collection information table 400. For example, the valid data is written into the first physical Page [1] of the physical block P1(M), arranged in the written garbage collection information table 400, then written into other physical pages [2] to [ N ] of the physical block P1(M), and then written into the physical blocks P2(M), P3(M), and P4 (M).
After writing the valid data in all of the one or more reclaimed block strings, then, in step S214, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) determines whether the target block string has a remaining space.
In response to the target block string having a remaining space, in step S215, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to write the second padding data into the remaining space.
For example, continuing with the example of FIG. 4B, assume that after all valid data has been written, the last physical Page [ N ] of physical block P4(M) has room to write data (the target block string has room to remain). At this time, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to write the second padding data PD2 to the last physical Page [ N ] of the physical block P4 (M). Then, continuing to step S216, the garbage collection management circuit unit 215 (or the garbage collection execution circuit 2151) instructs the memory interface control circuit 213 to close the target string, and the garbage collection management circuit unit 215 (or the garbage collection string recording circuit 2152) adds the local list of the garbage collection string to the global list of the garbage collection string in the buffer memory 216 to complete the garbage collection instruction. It should be noted that the mapping relationship between the logical addresses and the physical addresses for storing the valid data is also updated.
Specifically, after writing the second padding data PD2, there is no space available for the target chunk string, and all of the physical chunks P1(M) -P4 (M) of the target chunk string are closed, i.e., set to be unable to write any data. Then, the garbage collection management circuit unit 215 (or the garbage collection string recording circuit 2152) appends the local garbage collection string list corresponding to the one or more garbage collection strings to the global garbage collection string list in the buffer 216, so that the processor 211 can identify all the garbage collection strings of the current rewritable nonvolatile memory module 220 by using the global garbage collection string list in the buffer 216.
FIG. 4C is a block diagram illustrating a data structure of a global reclaim block list according to an embodiment of the invention. Referring to fig. 4C, the global recycle block string list 410 is similar to the local recycle block string list of the garbage collection table 400 in structure. That is, the global recycle block string list 410 is used to record the recycle block string index values RBI [1] RBI [ X ] of all recycle block strings. X is a positive integer and greater than Y. That is, after the local recycle block string list corresponding to the one or more recycle block strings is appended to the global recycle block string list 410 in the buffer memory 216, the recycle block string index values RBI [1] -RBI [ X ] recorded in the global recycle block string list 410 include the recycle block string index values RBI [1] -RBI [ Y ] recorded in the local recycle block string list.
After appending the local recycle block string list corresponding to the one or more recycle block strings to the global recycle block string list 410 in the buffer memory 216, the garbage collection management circuit unit 215 (or the recycle block string recording circuit 2152) determines that the garbage collection instruction is complete. As described above, the processor 211 may update the mapping relationship between the logical addresses and the physical addresses for storing the valid data accordingly.
Referring back to fig. 2A, after step S214 is executed, in response to that the target block string does not have a remaining space, the reclamation management circuit unit 215 (or the reclamation block string recording circuit 2152) determines that the second padding data does not need to be written, and step S216 is executed subsequently.
It should be understood that the present invention is not limited to the setting of the bit values of the first and second padding data PD1 and PD 2. For example, the first and second padding data PD1 and PD2 may be generated by using a random function. Alternatively, the first and second padding data PD1 and PD2 may be generated by using data of a fixed embodiment.
In this embodiment, in addition to updating the global garbage collection string list in response to the garbage collection operation being performed, it is also possible to determine whether to update the global garbage collection string list according to the use of the string.
FIG. 2B is a flow chart of a method for memory management according to an embodiment of the invention. Referring to fig. 2B, in step S221, the processor 211 uses the target block string. Specifically, when the processor 211 is going to perform a write operation or a data merge operation to write a piece of data, the processor 211 selects one or more Available Block strings (also called, nominal Block strings) from a plurality of Available Block strings (Available Block strings) in the rewritable nonvolatile memory module 220 to write the piece of data. The target block string selected for writing data may also be considered the target block string to be used. The usable Block string includes a reclaimed Block string (recycled Block string), a Free Block string (Free Block string), or a blank Block string (Empty Block string) that has completed a garbage reclamation operation. In this embodiment, the processor 211 records a time stamp (also referred to as a block string time stamp) corresponding to the target block string to the system physical block according to the time point when the target block string is selected for use. Alternatively, in another embodiment, the target chunk string itself may have a Spare area (Spare area) for storing metadata (Meta data) corresponding to the target chunk string, and the metadata may record a chunk string time stamp of the target chunk string.
Next, in step S222, the garbage collection management circuit unit 215 (or the collected block string recording circuit 2152) compares the target block string index of the target block string with a plurality of collected block string indexes recorded in the global collected block string list. Specifically, the garbage collection management circuit unit 215 (or the reclaimed string recording circuit 2152) identifies the string index (also called the target string index) of the used target string, and compares all the reclaimed string indexes in the global reclaimed string list according to the target string index to find whether there is a reclaimed string index matching/equal to the target string index.
Next, in step S223, in response to the target recycling string index value matching a target recycling string index value of the recycling string index values, the garbage collection management circuit unit 215 (or the recycling string recording circuit 2152) deletes the target recycling string index value from the recycling string index values recorded in the global recycling string list. In this way, the update operation of the global tile string list performed by the target tile string is completed. When the target recycling chunk string index of the global recycling chunk string list is deleted, all the recycling chunk string indexes arranged after the deleted target recycling chunk string index are arranged in the forward direction. For example, when the target recycle chunk string index RBI [1] is deleted, the recycle chunk string indexes RBI [2] -RBI [ X ] following the target recycle chunk string index RBI [1] are decremented in advance, i.e., the global recycle chunk string list is arranged from the recycle chunk string index RBI [2] to the recycle chunk string index RBI [ X ]. It should be noted that the size of the space occupied by the index value of each recycling block string can be predetermined.
It should be noted that after the update operation of this embodiment is completed, the snapshot operation is not performed on the global recycle block string list currently maintained in the buffer memory 216, i.e., the global recycle block string list of the buffer memory 216 is not written to the rewritable non-volatile memory module 220.
Since the global reclaimed block string list is only stored in the buffer memory 216. Therefore, if the memory device is suddenly powered down (also referred to as a power down event), the global recycle block string list and other data stored in the buffer 216 are lost. In response, the garbage collection management circuit 215 may perform a recovery operation in response to the sudden power failure event to attempt to recover the global garbage collection block string list in the buffer 216 before the sudden power failure.
Fig. 5 is a flow diagram illustrating a recovery operation according to an embodiment of the present invention. Referring to fig. 5, in step S51, the reclamation management circuit unit 215 (or the reclamation block string recording circuit 2152) identifies a plurality of closed target block strings among all the target block strings of the rewritable nonvolatile memory module. Specifically, the reclamation management circuit unit 215 (or the reclamation block string recording circuit 2152) may identify a plurality of target block strings from all the block strings of the rewritable non-volatile memory 220 using the data tags DT. That is, the block sequence in which the garbage collection information table is stored in front is identified as the target block sequence. In addition, corresponding to the step S216, the target block string that has been closed can be regarded as completing the garbage collection operation.
On the contrary, when the target block string for performing the garbage collection operation is not closed, the processor 211 or the collection management circuit unit 215 determines that the garbage collection block of the target block string (also called the non-closed target block string) is not completely executed, i.e. all valid data in one or more of the collection block strings corresponding to the non-closed target block string is not collected/copied into the non-closed target block string. Accordingly, the global garbage collection block list should not have one or more garbage collection block strings of the target block string that is not closed, i.e., the garbage collection management circuit unit 215 ignores the garbage collection information table of the target block string that is not closed in the recovery operation of the global garbage collection block string list. It should be noted that, in one embodiment, in response to the identified target block string not being closed, the processor 211 or the recycling management circuit unit 215 may re-execute the garbage recycling operation of one or more recycling block strings corresponding to the target block string.
After identifying the closed target block strings, continuing to step S52, the recycling management circuit unit 215 (or the recycling block string recording circuit 2152) determines whether all of the closed target block strings have been selected. Specifically, the reclaim management circuit unit 215 (or the reclaim block string recording circuit 2152) starts to select, one by one, closed target block strings that have not been selected from the closed target block strings to perform the restore operation until all closed target block strings have been selected to perform the restore operation. If there are any closed target block strings that have not been selected, then in step S53, the reclaim management circuit unit 215 (or the reclaim block string recording circuit 2152) selects a first target block string from one or more closed target block strings that have not been selected.
Next, in step S54, the reclamation management circuit unit 215 (or the reclamation block string recording circuit 2152) identifies the target block string time stamp of the first target block string, identifies a plurality of reclamation block strings corresponding to the first target block string from the garbage reclamation information table of the first target block string, and identifies the reclamation block string time stamps of the plurality of reclamation block strings. Specifically, after selecting the first target block string, the reclamation management circuit unit 215 (or the reclamation block string recording circuit 2152) identifies the target block string timestamp of the first target block string according to the block string index value of the first target block string (e.g., by reading the metadata corresponding to the target block string in the system physical block), and reads the garbage reclamation information table of the first target block string. From the read garbage collection information table, the collection management circuit unit 215 (or the collection block string recording circuit 2152) may identify collection block string index values of a plurality of collection block strings corresponding to the first target block string, and identify collection block string time stamps of the plurality of collection block strings according to the plurality of collection block string index values (e.g., by reading metadata corresponding to the plurality of collection block strings in the system physical block).
Next, in step S55, the recycle management circuit unit 215 (or the recycle block string recording circuit 2152) compares the target block string time stamp with the identified plurality of recycle block string time stamps. Next, different treatments are performed according to different comparison results, which will be described in detail below.
In response to the identified first recycle block string timestamp being less than the target block string timestamp, proceeding to step S56, the recycle management circuit unit 215 (or the recycle block string recording circuit 2152) appends the first recycle block string index value of the first recycle block string corresponding to the first recycle block string timestamp to the global recycle block string list stored in the buffer memory.
On the other hand, in response to the identified second rdb string timestamp being greater than the target string timestamp, the recycling management circuit unit 215 (or the recycling block string recording circuit 2152) proceeds to step S57 without adding the second rdb string index value of the second rdb string corresponding to the second rdb string timestamp to the global rdb string list stored in the buffer. That is, the reclaim management circuit unit 215 (or the reclaim block string recording circuit 2152) considers that the second reclaim block string has been used after the corresponding garbage reclamation operation is completed, and thus the second reclaim block string timestamp of the second reclaim block string is greater than the target block string timestamp.
In addition, in response to the third tile string timestamp of the third recycle tile string in the identified plurality of recycle tile strings being NULL (NULL) (e.g., the third recycle tile string timestamp of the third recycle tile string corresponding to the third recycle tile string index value does not exist), the process proceeds to step S58, and the recycle management circuit unit 215 (or the recycle tile string recording circuit 2152) does not add the third recycle tile string index value of the third recycle tile string to the global recycle tile string list stored in the buffer memory.
In this embodiment, when the third string timestamp of the third recycled block string corresponding to the third recycled block string index value does not exist or is NULL (NULL), the recycling management circuit unit 215 (or the recycled block string recording circuit 2152) can determine that the third recycled block string has been erased, which results in the block string timestamp of the third recycled block string being deleted. Next, in one embodiment, step S58 continues to step S60, and the recycling management circuit unit 215 (or the recycling block string recording circuit 2152) notifies the processor 211 to add the third recycling block string index value to the free block string list. The free string list is maintained in the buffer 216, and the plurality of string indexes recorded in the free string list all correspond to the plurality of string indexes to complete the erase operation.
After all the block string timestamps are compared with the table timestamp and the subsequent operations (e.g., steps S56, S57, S58) corresponding to the comparison result are also completed, the reclamation management circuit unit 215 (or the reclamation block string recording circuit 2152) completes the recovery operation corresponding to the selected first target block string. Then, the process returns to step S52, in which the reclamation management circuit unit 215 (or the reclamation block string recording circuit 2152) selects another new closed target block string that has not been selected to perform the recovery operation.
If the recycling management circuit unit 215 (or the recycling block string recording circuit 2152) determines that all of the closed target block strings have been selected in step S52, then it goes to step S59 where the recycling management circuit unit 215 (or the recycling block string recording circuit 2152) determines that the global recycling block string list recovery operation is completed.
It should be noted that, in the above embodiment, since the garbage collection operation is performed on one or more recycling block strings, the garbage collection information table records information corresponding to the one or more recycling block strings. For example, in another embodiment, the garbage collection operation is performed on one or more physical blocks to be collected, and thus the garbage collection information table records information corresponding to the one or more physical blocks to be collected. In addition, the garbage collection information table is written to the forefront of the target physical block corresponding to the one or more collected physical blocks.
In summary, the memory management method and the memory controller according to the embodiments of the invention can generate the garbage collection information table according to the collection block string for performing the garbage collection operation only in response to the start of performing the garbage collection operation, write the garbage collection information table into the target block string corresponding to the garbage collection operation, and copy the valid data of the collection block string into the target block string having the garbage collection information table, so as to complete the garbage collection operation. In addition, the garbage collection information table in each target block string can also be used to reconstruct the global collection block string list to assist in managing the use status of the entire block string of the storage device. Therefore, under the condition of reducing access delay caused by garbage collection operation, the data stored in the storage device still has reliability, and the working efficiency of the storage device is further improved.
Although the present invention has been described with reference to the above embodiments, it should be understood that the invention is not limited to the embodiments, and various changes and modifications can be made by those skilled in the art without departing from the spirit and scope of the invention.
Claims (10)
1. A memory management method is suitable for a storage device configured with a rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module is provided with a plurality of physical blocks, and the physical blocks are grouped into a plurality of block strings, and the method comprises the following steps:
executing a garbage collection instruction, wherein the garbage collection instruction instructs collection of valid data of one or more recovery block strings to a target block string;
generating a garbage collection information table having a predetermined size according to the one or more collection block strings, and writing the garbage collection information table to the target block string, wherein the garbage collection information table comprises an identification tag, a local collection block string list and first padding data;
reading valid data of the one or more reclamation block strings and writing the valid data into the target block string, wherein the written valid data is immediately after the written garbage reclamation information table; and
closing the target string and appending the local recycle block string list to a global recycle block string list in a buffer memory to complete the garbage collection instruction.
2. The memory management method of claim 1, wherein after the step of writing the valid data to the target block string, the method further comprises:
and in response to determining that the target block string has a remaining space, writing the remaining space with second padding data.
3. The memory management method of claim 1, wherein
The data tag is arranged at the forefront of the garbage collection information table, and the data tag is used for indicating that the data tag and a plurality of data positioned behind the data tag are the garbage collection information table with the preset size,
wherein the plurality of data located after the data tag are the local reclaim block string list and the first padding data in sequence,
wherein the local recycle block string list is used to record recycle block string index values of the one or more recycle block strings,
wherein the first padding data is used to make the size of the garbage collection information table the predetermined size.
4. The memory management method of claim 1, further comprising:
using the target block string;
comparing the target string index of the target string with the plurality of recycling string index values recorded in the global recycling string list; and
deleting the target recycling string index value from the recycling string indexes recorded in the global recycling string list in response to the target recycling string index value corresponding to the target recycling string index value among the recycling string index values.
5. The memory management method of claim 1, further comprising:
performing a recovery operation corresponding to the global garbage collection block string list,
wherein the recovery operation comprises:
identifying a plurality of closed target block strings in all target block strings of the rewritable nonvolatile memory module;
determining whether all of the closed target strings have been selected, wherein in response to determining that all of the closed target strings have been selected, determining that the recovery operation of the global tile reclamation string list is complete,
wherein in response to determining that none of the plurality of closed target block strings have been selected, selecting a first target block string from one or more closed target block strings that have not been selected;
identifying a target block string timestamp of the first target block string, identifying a plurality of reclaim block strings corresponding to the first target block string according to a garbage reclamation information table of the first target block string, and identifying reclaim block string timestamps of the plurality of reclaim block strings;
comparing the target block string timestamp with the identified plurality of reclaim block string timestamps,
wherein in response to the identified first reclaimed chunk string timestamp being less than the target chunk string timestamp, appending a first reclaimed chunk string index value for a first reclaimed chunk string corresponding to the first reclaimed chunk string timestamp to the global reclaimed chunk string list stored in the buffer memory,
wherein in response to the identified second recycle block string timestamp being greater than the target block string timestamp, a second recycle block string index value of a second recycle block string corresponding to the second recycle block string timestamp is not appended to the global recycle block string list stored in the buffer memory,
wherein a third string of reclaiming blocks index value of a third reclaiming block string in the plurality of reclaiming block strings is not added to the global reclaiming block string list stored in the buffer memory in response to the third string time stamp of the third reclaiming block string being a null value.
6. A memory controller for controlling a memory device configured with a rewritable non-volatile memory module, the memory controller comprising:
a connection interface circuit for coupling to a host system;
a memory interface control circuit coupled to the rewritable nonvolatile memory module, wherein the rewritable nonvolatile memory module has a plurality of physical blocks, and the physical blocks are grouped into a plurality of block strings;
a garbage collection management circuit unit; and
a processor coupled to the connection interface circuit, the memory interface control circuit, and the garbage collection management circuit unit,
wherein the garbage collection management circuit unit is configured to execute a garbage collection instruction received from the processor, wherein the garbage collection instruction instructs to collect valid data of one or more recovery block strings to a target block string,
wherein the garbage collection management circuit unit is further configured to generate a garbage collection information table having a predetermined size according to the one or more recovery block strings, and instruct the memory interface control circuit to write the garbage collection information table to the target block string, wherein the garbage collection information table comprises an identification tag, a local recovery block string list and first padding data,
wherein the garbage collection management circuit unit is further configured to instruct the memory interface control circuit to read valid data of the one or more recovery block strings and instruct the memory interface control circuit to write the valid data to the target block string, wherein the written valid data is immediately after the written garbage collection information table,
wherein the garbage collection management circuit unit is further configured to instruct the memory interface control circuit to close the target string, and the garbage collection management circuit unit is further configured to append the local recycle block string list to a global recycle block string list in a buffer memory to complete the garbage collection instruction.
7. The memory controller of claim 6, wherein after the operation of writing the valid data to the target block string,
in response to determining that the target block string has a remaining space, the garbage collection management circuit unit instructs the memory interface control circuit to write the remaining space with second padding data.
8. The storage controller of claim 6, wherein
The data tag is arranged at the forefront of the garbage collection information table, and the data tag is used for indicating that the data tag and a plurality of data positioned behind the data tag are the garbage collection information table with the preset size,
wherein the plurality of data located after the data tag are the local reclaim block string list and the first padding data in sequence,
wherein the local recycle block string list is used to record recycle block string index values of the one or more recycle block strings,
wherein the first padding data is used to make the size of the garbage collection information table the predetermined size.
9. The storage controller of claim 6, wherein
The processor uses a target block string,
wherein the garbage collection management circuit unit compares a target tile string index value of the target tile string with a plurality of recycle bin string index values recorded in the global recycle bin string list,
in response to the target recycling chunk string index value matching a target recycling chunk string index value of the recycling chunk string index values, the garbage collection management circuit unit deletes the target recycling chunk string index value from the recycling chunk string index values recorded in the global recycling chunk string list.
10. The storage controller of claim 6, wherein
The processor further instructs the garbage collection management circuit to perform a recovery operation corresponding to the global garbage collection block string list,
wherein the recovery operation comprises:
the garbage collection management circuit unit identifies a plurality of closed target block strings among all the target block strings of the rewritable nonvolatile memory module,
wherein the garbage collection management circuit unit determines whether all of the closed target block strings have been selected, wherein in response to determining that all of the closed target block strings have been selected, the garbage collection management circuit unit determines that the recovery operation of the global collection block string list is completed,
wherein in response to determining that none of the plurality of closed target block strings has been selected, the garbage collection management circuit unit selects a first target block string from one or more closed target block strings that have not been selected,
wherein the garbage collection management circuit unit identifies a target block string time stamp of the first target block string, identifies a plurality of recovery block strings corresponding to the first target block string according to a garbage collection information table of the first target block string, and identifies recovery block string time stamps of the plurality of recovery block strings,
wherein the garbage collection management circuit unit compares the target block string timestamp with the identified plurality of recovered block string timestamps,
wherein in response to the identified first reclaimed block string timestamp being less than the target block string timestamp, the garbage collection management circuit unit appends a first reclaimed block string index value for a first reclaimed block string corresponding to the first reclaimed block string timestamp to the global reclaimed block string list stored in the buffer memory,
wherein the garbage collection management circuit unit does not append a second recycle block string index value of a second recycle block string corresponding to the second recycle block string time stamp to the global recycle block string list stored in the buffer memory in response to the identified second recycle block string time stamp being greater than the target block string time stamp,
wherein the garbage collection management circuit unit does not append a third recycle block string index value of a third recycle block string of the plurality of recycle block strings to the global recycle block string list stored in the buffer memory in response to the third block string time stamp of the third recycle block string being identified as a null value.
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