CN110718613A - Light-emitting diode chip and method of making the same - Google Patents
Light-emitting diode chip and method of making the same Download PDFInfo
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/81—Bodies
- H10H20/816—Bodies having carrier transport control structures, e.g. highly-doped semiconductor layers or current-blocking structures
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- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/83—Electrodes
- H10H20/832—Electrodes characterised by their material
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- H10H—INORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
- H10H20/00—Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
- H10H20/80—Constructional details
- H10H20/84—Coatings, e.g. passivation layers or antireflective coatings
- H10H20/841—Reflective coatings, e.g. dielectric Bragg reflectors
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Abstract
本发明公开了一种发光二极管芯片及其制作方法,属于半导体技术领域。所述发光二极管芯片包括硅基板、键合层、金属反射层、透明导电层、填充层、电流阻挡层、窗口层、P型限制层、有源层、N型限制层和电极;所述硅基板、所述键合层、所述金属反射层、所述透明导电层、所述填充层、所述窗口层、所述P型限制层、所述有源层、所述N型限制层和所述电极依次层叠设置,所述填充层内设有多个从所述透明导电层延伸至所述窗口层的通孔,所述电流阻挡层设置在所述通孔内;所述电流阻挡层的材料为二氟化镁,所述填充层和所述透明导电层的材料为氧化铟锡、氧化钨、掺钨的氧化铟锡中的一种。本发明可以提高红光LED芯片的正面出光效率。
The invention discloses a light-emitting diode chip and a manufacturing method thereof, belonging to the technical field of semiconductors. The light-emitting diode chip includes a silicon substrate, a bonding layer, a metal reflective layer, a transparent conductive layer, a filling layer, a current blocking layer, a window layer, a P-type confinement layer, an active layer, an N-type confinement layer and electrodes; the silicon a substrate, the bonding layer, the metal reflective layer, the transparent conductive layer, the filling layer, the window layer, the P-type confinement layer, the active layer, the N-type confinement layer, and The electrodes are stacked in sequence, a plurality of through holes extending from the transparent conductive layer to the window layer are arranged in the filling layer, and the current blocking layer is arranged in the through holes; the current blocking layer The material is magnesium difluoride, and the material of the filling layer and the transparent conductive layer is one of indium tin oxide, tungsten oxide, and tungsten-doped indium tin oxide. The invention can improve the front light emitting efficiency of the red LED chip.
Description
技术领域technical field
本发明涉及半导体技术领域,特别涉及一种发光二极管外延片及其制作方法。The invention relates to the technical field of semiconductors, in particular to a light emitting diode epitaxial wafer and a manufacturing method thereof.
背景技术Background technique
发光二极管(英文:Light Emitting Diode,简称:LED)是一种能发光的半导体电子元件。Light Emitting Diode (English: Light Emitting Diode, LED for short) is a semiconductor electronic component that can emit light.
芯片是LED的核心组件,包括外延片和分别设置在外延片上的N型电极和P型电极。对于红光LED芯片来说,外延片包括GaAs衬底以及依次生长在GaAs衬底上的N型限制层、有源层、P型限制层和窗口层。GaAs衬底吸光,为了避免有源层发出的光线被GaAs衬底吸收,可以先将硅基板键合到窗口层上作为P型电极,再在N型限制层上去除GaAs衬底,设置N型电极。The chip is the core component of the LED, including an epitaxial wafer and an N-type electrode and a P-type electrode respectively arranged on the epitaxial wafer. For a red light LED chip, the epitaxial wafer includes a GaAs substrate and an N-type confinement layer, an active layer, a P-type confinement layer and a window layer sequentially grown on the GaAs substrate. The GaAs substrate absorbs light. In order to prevent the light emitted by the active layer from being absorbed by the GaAs substrate, the silicon substrate can be bonded to the window layer as a P-type electrode, and then the GaAs substrate is removed on the N-type confinement layer to set the N-type electrode.
在实现本发明的过程中,发明人发现现有技术至少存在以下问题:In the process of realizing the present invention, the inventor found that the prior art has at least the following problems:
有源层发出的光线会射向所有方向,只有部分光线从N型限制层射出,因此红光LED芯片的正面出光效率很低。The light emitted by the active layer will be emitted in all directions, and only part of the light will be emitted from the N-type confinement layer, so the front light emission efficiency of the red LED chip is very low.
发明内容SUMMARY OF THE INVENTION
本发明实施例提供了一种发光二极管芯片及其制作方法,可以有效提升发光二极管芯片的正面出光效率。所述技术方案如下:The embodiments of the present invention provide a light emitting diode chip and a manufacturing method thereof, which can effectively improve the front light extraction efficiency of the light emitting diode chip. The technical solution is as follows:
一方面,本发明实施例提供了一种发光二极管芯片,所述发光二极管芯片包括硅基板、键合层、金属反射层、透明导电层、填充层、电流阻挡层、窗口层、P型限制层、有源层、N型限制层和电极;所述硅基板、所述键合层、所述金属反射层、所述透明导电层、所述填充层、所述窗口层、所述P型限制层、所述有源层、所述N型限制层和所述电极依次层叠设置,所述填充层内设有多个从所述透明导电层延伸至所述窗口层的通孔,所述电流阻挡层设置在所述通孔内;所述电流阻挡层的材料为二氟化镁,所述填充层和所述透明导电层的材料为氧化铟锡、氧化钨、掺钨的氧化铟锡中的一种。In one aspect, an embodiment of the present invention provides a light-emitting diode chip, the light-emitting diode chip includes a silicon substrate, a bonding layer, a metal reflection layer, a transparent conductive layer, a filling layer, a current blocking layer, a window layer, and a P-type confinement layer , active layer, N-type confinement layer and electrodes; the silicon substrate, the bonding layer, the metal reflective layer, the transparent conductive layer, the filling layer, the window layer, the P-type confinement layer, the active layer, the N-type confinement layer and the electrode are stacked in sequence, a plurality of through holes extending from the transparent conductive layer to the window layer are arranged in the filling layer, the current The blocking layer is arranged in the through hole; the material of the current blocking layer is magnesium difluoride, and the materials of the filling layer and the transparent conductive layer are indium tin oxide, tungsten oxide, and tungsten-doped indium tin oxide. a kind of.
可选地,所述电流阻挡层和所述填充层的厚度为100nm~140nm,所述透明导电层的厚度为100nm~300nm。Optionally, the thickness of the current blocking layer and the filling layer is 100 nm to 140 nm, and the thickness of the transparent conductive layer is 100 nm to 300 nm.
进一步地,所述通孔的孔径为6μm~10μm,相邻两个所述通孔的间距为10μm~20μm。Further, the diameter of the through holes is 6 μm˜10 μm, and the distance between two adjacent through holes is 10 μm˜20 μm.
可选地,所述金属反射层的材料为银。Optionally, the material of the metal reflective layer is silver.
进一步地,所述发光二极管芯片还包括钛钨合金层,所述钛钨合金层设置在所述金属反射层和所述键合层之间。Further, the light-emitting diode chip further includes a titanium-tungsten alloy layer, and the titanium-tungsten alloy layer is disposed between the metal reflective layer and the bonding layer.
更进一步地,所述钛钨合金层中钛组分的含量为10%。Further, the content of the titanium component in the titanium-tungsten alloy layer is 10%.
可选地,所述发光二极管芯片还包括电流扩展层、过渡层和出光层,所述电流扩展层、所述过渡层和所述出光层依次层叠在所述N型限制层上,所述电极设置在所述出光层的部分区域上;所述电流扩展层、所述过渡层和所述出光层的材料采用N型掺杂的铝镓铟磷,所述电流扩展层中铝组分的含量小于所述过渡层中铝组分的含量,所述过渡层中铝组分的含量小于所述出光层中铝组分的含量。Optionally, the light-emitting diode chip further includes a current spreading layer, a transition layer and a light extraction layer, the current spreading layer, the transition layer and the light extraction layer are sequentially stacked on the N-type confinement layer, and the electrode The material of the current spreading layer, the transition layer and the light extraction layer is N-type doped AlGaInP, and the content of the aluminum component in the current spreading layer is It is less than the content of the aluminum component in the transition layer, and the content of the aluminum component in the transition layer is less than the content of the aluminum component in the light emitting layer.
进一步地,所述电流扩展层中铝组分的含量为20%~40%,所述过渡层中铝组分的含量为35%~60%,所述出光层中铝组分的含量为55%~70%。Further, the content of the aluminum component in the current spreading layer is 20% to 40%, the content of the aluminum component in the transition layer is 35% to 60%, and the content of the aluminum component in the light emitting layer is 55%. %~70%.
进一步地,所述电极在所述出光层上的投影为圆形;所述发光二极管芯片还包括欧姆接触层,所述欧姆接触层的材料为N型掺杂的砷化镓,所述欧姆接触层设置在所述电极和所述出光层之间;所述欧姆接触层在所述出光层上的投影为环形,所述环形的外径小于所述圆形的直径;或者,所述欧姆接触层在所述出光层上的投影为多个间隔分布的弧形,所述弧形的外径等于所述圆形的直径。Further, the projection of the electrode on the light emitting layer is a circle; the light emitting diode chip further includes an ohmic contact layer, the material of the ohmic contact layer is N-type doped gallium arsenide, and the ohmic contact The layer is arranged between the electrode and the light-exiting layer; the projection of the ohmic contact layer on the light-extracting layer is annular, and the outer diameter of the annular shape is smaller than the diameter of the circle; or, the ohmic contact The projection of the layer on the light emitting layer is a plurality of arcs distributed at intervals, and the outer diameter of the arc is equal to the diameter of the circle.
另一方面,本发明实施例提供了一种发光二极管芯片的制作方法,所述制作方法包括:On the other hand, an embodiment of the present invention provides a method for fabricating a light-emitting diode chip, the fabrication method comprising:
在砷化镓衬底上依次生长腐蚀停层、N型限制层、有源层、P型限制层和窗口层;The etching stop layer, the N-type confinement layer, the active layer, the P-type confinement layer and the window layer are sequentially grown on the GaAs substrate;
在所述窗口层上形成电流阻挡层和填充层,所述填充层内设有多个延伸至所述窗口层的通孔,所述电流阻挡层设置在所述通孔内;forming a current blocking layer and a filling layer on the window layer, the filling layer is provided with a plurality of through holes extending to the window layer, and the current blocking layer is arranged in the through holes;
在所述电流阻挡层和所述填充层上依次铺设透明导电层、金属反射层、第一键合层;A transparent conductive layer, a metal reflection layer, and a first bonding layer are sequentially laid on the current blocking layer and the filling layer;
在硅基板上形成第二键合层;forming a second bonding layer on the silicon substrate;
将所述第二键合层和所述第一键合层键合在一起;bonding the second bonding layer and the first bonding layer together;
去除所述砷化镓衬底和所述腐蚀停层;removing the gallium arsenide substrate and the etch stop layer;
在所述N型限制层上设置电极。An electrode is provided on the N-type confinement layer.
本发明实施例提供的技术方案带来的有益效果是:The beneficial effects brought by the technical solutions provided in the embodiments of the present invention are:
通过窗口层和键合层之间增设电流阻挡层、填充层、透明导电层和金属反射层,电流阻挡层的材料为二氟化镁,填充层和透明导电层的材料为氧化铟锡、氧化钨、掺钨的氧化铟锡中的一种,电流阻挡层和透明导电层的折射率相差较大(二氟化镁的折射率为1.38,氧化铟锡的折射率为1.62,氧化钨的折射率为1.65,掺钨的氧化铟锡的折射率为1.62~1.65);加上透明导电层设置电流阻挡层上,电流阻挡层和透明导电层可以组成单个周期的布拉格反射镜。而且金属反射层设置在透明导电层上,因此窗口层和键合层之间形成全方位反射镜,可以将有源层射向P型限制层的光线反射到N型限制层射出,提高红光LED芯片的正面出光效率。By adding a current blocking layer, a filling layer, a transparent conductive layer and a metal reflection layer between the window layer and the bonding layer, the material of the current blocking layer is magnesium difluoride, and the material of the filling layer and the transparent conductive layer is indium tin oxide, oxide One of tungsten and tungsten-doped indium tin oxide, the refractive index of the current blocking layer and the transparent conductive layer are quite different (the refractive index of magnesium difluoride is 1.38, the refractive index of indium tin oxide is 1.62, and the refractive index of tungsten oxide is 1.62). The ratio is 1.65, and the refractive index of tungsten-doped indium tin oxide is 1.62-1.65); plus the transparent conductive layer is arranged on the current blocking layer, the current blocking layer and the transparent conductive layer can form a single period Bragg mirror. Moreover, the metal reflective layer is arranged on the transparent conductive layer, so an omnidirectional mirror is formed between the window layer and the bonding layer, which can reflect the light emitted from the active layer to the P-type confinement layer to the N-type confinement layer for emission, improving the red light. The front luminous efficiency of the LED chip.
附图说明Description of drawings
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the following briefly introduces the accompanying drawings used in the description of the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can also be obtained from these drawings without creative effort.
图1是本发明实施例提供的一种发光二极管芯片的结构示意图;FIG. 1 is a schematic structural diagram of a light-emitting diode chip provided by an embodiment of the present invention;
图2是本发明实施例提供的电流阻挡层和填充层的结构示意图;2 is a schematic structural diagram of a current blocking layer and a filling layer provided by an embodiment of the present invention;
图3是本发明实施例提供的一种欧姆接触层的结构示意图;3 is a schematic structural diagram of an ohmic contact layer provided by an embodiment of the present invention;
图4是本发明实施例提供的另一种欧姆接触层的结构示意图;4 is a schematic structural diagram of another ohmic contact layer provided by an embodiment of the present invention;
图5是本发明实施例提供的一种发光二极管芯片的制作方法的流程图。FIG. 5 is a flowchart of a method for fabricating a light-emitting diode chip according to an embodiment of the present invention.
具体实施方式Detailed ways
为使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明实施方式作进一步地详细描述。In order to make the objectives, technical solutions and advantages of the present invention clearer, the embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.
本发明实施例提供了一种发光二极管芯片,特别是红光LED芯片。图1为本发明实施例提供的一种发光二极管芯片的结构示意图。参见图1,该发光二极管芯片包括硅基板10、键合层20、金属反射层31、透明导电层32、填充层33、电流阻挡层34、窗口层41、P型限制层42、有源层43、N型限制层44和电极50。硅基板10、键合层20、金属反射层31、透明导电层32、填充层33、窗口层41、P型限制层42、有源层43、N型限制层44和电极50依次层叠设置。The embodiments of the present invention provide a light emitting diode chip, especially a red light LED chip. FIG. 1 is a schematic structural diagram of a light emitting diode chip according to an embodiment of the present invention. 1, the light emitting diode chip includes a
图2为本发明实施例提供的电流阻挡层和填充层的结构示意图。参见图2,填充层33内设有多个从透明导电层32延伸至窗口层41的通孔,电流阻挡层34设置在通孔内。电流阻挡层34的材料为二氟化镁,填充层33和透明导电层32的材料为氧化铟锡、氧化钨、掺钨的氧化铟锡中的一种。FIG. 2 is a schematic structural diagram of a current blocking layer and a filling layer provided by an embodiment of the present invention. Referring to FIG. 2 , a plurality of through holes extending from the transparent conductive layer 32 to the
本发明实施例通过窗口层和键合层之间增设电流阻挡层、填充层、透明导电层和金属反射层,电流阻挡层的材料为二氟化镁,填充层和透明导电层的材料为氧化铟锡、氧化钨、掺钨的氧化铟锡中的一种,电流阻挡层和透明导电层的折射率相差较大(二氟化镁的折射率为1.38,氧化铟锡的折射率为1.62,氧化钨的折射率为1.65,掺钨的氧化铟锡的折射率为1.62~1.65);加上透明导电层设置电流阻挡层上,电流阻挡层和透明导电层可以组成单个周期的布拉格反射镜。而且金属反射层设置在透明导电层上,因此窗口层和键合层之间形成全方位反射镜,可以将有源层射向P型限制层的光线反射到N型限制层射出,提高红光LED芯片的正面出光效率。另外,二氟化镁为绝缘材料,氧化铟锡、氧化钨、掺钨的氧化铟锡为导电材料,电流阻挡层设置在填充层内的多个通孔中,既不会影响电流注入窗口层,也有利于电流均匀注入窗口层中。In the embodiment of the present invention, a current blocking layer, a filling layer, a transparent conductive layer and a metal reflection layer are added between the window layer and the bonding layer. The material of the current blocking layer is magnesium difluoride, and the material of the filling layer and the transparent conductive layer is oxide One of indium tin, tungsten oxide, and tungsten-doped indium tin oxide, the refractive index difference between the current blocking layer and the transparent conductive layer is relatively large (the refractive index of magnesium difluoride is 1.38, the refractive index of indium tin oxide is 1.62, The refractive index of tungsten oxide is 1.65, and the refractive index of tungsten-doped indium tin oxide is 1.62 to 1.65); plus the transparent conductive layer is arranged on the current blocking layer, the current blocking layer and the transparent conductive layer can form a single period Bragg mirror. Moreover, the metal reflective layer is arranged on the transparent conductive layer, so an omnidirectional mirror is formed between the window layer and the bonding layer, which can reflect the light emitted from the active layer to the P-type confinement layer to the N-type confinement layer for emission, improving the red light. The front luminous efficiency of the LED chip. In addition, magnesium difluoride is an insulating material, indium tin oxide, tungsten oxide, and tungsten-doped indium tin oxide are conductive materials, and the current blocking layer is arranged in a plurality of through holes in the filling layer, which will not affect the current injection window layer. , which is also conducive to the uniform injection of current into the window layer.
可选地,电流阻挡层34和填充层33的厚度可以为100nm~140nm,透明导电层32的厚度可以为100nm~300nm,以使电流阻挡层34和透明导电层32的厚度相互配合,有利于实现布拉格反射。Optionally, the thickness of the
进一步地,如图2所示,通孔的孔径d可以为6μm~10μm,相邻两个通孔的间距s可以为10μm~20μm。相邻两个通孔的间距为通孔孔径的两倍左右,有利于电流均匀注入窗口层中。Further, as shown in FIG. 2 , the diameter d of the through holes may be 6 μm˜10 μm, and the spacing s of two adjacent through holes may be 10 μm˜20 μm. The distance between two adjacent through holes is about twice the diameter of the through holes, which is conducive to the uniform injection of current into the window layer.
可选地,金属反射层31的材料可以为银。银的反射率高,有利于形成全方位反射镜,提高芯片的正面出光效率。Optionally, the material of the metal
示例性地,金属反射层31的表面粗糙度为0.5nm~3nm,对550nm~650nm波长光线的反射率可保持在95%以上。Exemplarily, the surface roughness of the metal
进一步地,该发光二极管芯片还可以包括钛钨合金层35,钛钨合金层35设置在金属反射层31和键合层20之间。钛钨合金具有良好的扩散阻隔性能和粘附性能,既能避免银扩散到键合层中,也有利于键合层的固定,提高芯片的可靠性。Further, the light-emitting diode chip may further include a titanium-
更进一步地,钛钨合金层35中钛组分的含量可以为10%,芯片的可靠性好。Furthermore, the content of the titanium component in the titanium-
可选地,该发光二极管芯片还可以包括电流扩展层45、过渡层46和出光层47,电流扩展层45、过渡层46和出光层47依次层叠在N型限制层44上,电极50设置在出光层47的部分区域上。电流扩展层45、过渡层46和出光层47的材料采用N型掺杂(如硅)的铝镓铟磷,电流扩展层45中铝组分的含量小于过渡层46中铝组分的含量,过渡层46中铝组分的含量小于出光层47中铝组分的含量。电流扩展层中铝组分的含量最低,可以将硅的掺杂浓度提升至4*1018以上,有利于电流扩展;出光层中铝组分的含量最高,可以方便进行粗化,提高芯片的正面出光效率;过渡层中铝组分的含量在电流扩展层和出光层之间,可以起到过渡作用,避免电流扩展层和出光层中铝组分的含量相差太大而影响芯片的晶体质量。Optionally, the light-emitting diode chip may further include a current spreading
进一步地,电流扩展层45中铝组分的含量可以为20%~40%,过渡层46中铝组分的含量可以为35%~60%,出光层47中铝组分的含量可以为55%~70%,配合效果好。Further, the content of the aluminum component in the current spreading
可选地,电极50在出光层47上的投影可以为圆形。Optionally, the projection of the
进一步地,该发光二极管芯片还可以包括欧姆接触层48,欧姆接触层48的材料为N型掺杂的砷化镓,欧姆接触层48设置在电极50和出光层47之间,在电极和外延材料之间实现欧姆接触,有利于电极将电流注入外延材料中。Further, the light emitting diode chip may further include an
图3为本发明实施例提供的一种欧姆接触层的结构示意图。参见图3,在本实施例的一种实现方式中,欧姆接触层48在出光层47上的投影可以为环形,环形的外径小于圆形的直径。FIG. 3 is a schematic structural diagram of an ohmic contact layer according to an embodiment of the present invention. Referring to FIG. 3 , in an implementation manner of this embodiment, the projection of the
图4为本发明实施例提供的另一种欧姆接触层的结构示意图。参见图4,在本实施例的另一种实现方式中,欧姆接触层48在出光层47上的投影可以为多个间隔分布的弧形,弧形的外径等于圆形的直径。FIG. 4 is a schematic structural diagram of another ohmic contact layer provided by an embodiment of the present invention. Referring to FIG. 4 , in another implementation manner of this embodiment, the projection of the
上述两种实现方式,都在实现电极和外延材料之间欧姆接触的基础上,尽可能减少欧姆接触层的占用面积,避免砷化镓吸光。The above two implementations both reduce the occupied area of the ohmic contact layer as much as possible on the basis of realizing the ohmic contact between the electrode and the epitaxial material, and avoid light absorption by gallium arsenide.
可选地,该发光二极管芯片还可以包括保护层60,保护层60的材料为Si3N4,保护层60设置在芯片的侧面,以避免外延材料被空气的氧气和水蒸气腐蚀。在实际应用中,出光层47上设有延伸至窗口层41的凹槽,以便将保护层60沉积在凹槽的侧壁上。Optionally, the light emitting diode chip may further include a
在本实施例中,芯片的尺寸可以为5mil~10mil。N型限制层44的材料可以为N型掺杂的铝铟磷,发光层43的材料可以为铝镓铟磷,P型限制层42的材料可以为P型掺杂的铝铟磷,窗口层41可以为P型掺杂的磷化镓。键合层20可以包括依次层叠的钛层、铂层、金层、铟层、金层、铂层和钛层,电极50可以包括依次层叠的金层、金锗镍合金层、金层、钛层、铂层、金层。在实际应用中,可以采用硅基板作为电极,也可以在硅基板上依次沉积钛层和金层作为电极。In this embodiment, the size of the chip may be 5 mils to 10 mils. The material of the N-
示例性地,金属反射层31的厚度可以为200nm~500nm,钛钨合金层的厚度可以为100nm~300nm;键合层中钛层的厚度可以为100nm,铂层的厚度可以为80nm,金层的厚度可以为400nm,铟层的厚度可以为2μm~4μm,铟层的沉积速率大于180nm/s;硅基板上的电极中钛层的厚度可以为100nm,金层的厚度可以为400nm。欧姆接触层中N型掺杂剂的掺杂浓度可以为7*1018/cm3以上,窗口层中P型掺杂即的掺杂浓度可以为8*1019/cm3以上。Exemplarily, the thickness of the metal
本发明实施例提供了一种发光二极管芯片的制作方法,适用于制作图1所示的发光二极管芯片。图5为本发明实施例提供的一种发光二极管芯片的制作方法的流程图。参见图5,该制作方法包括:The embodiment of the present invention provides a manufacturing method of a light emitting diode chip, which is suitable for manufacturing the light emitting diode chip shown in FIG. 1 . FIG. 5 is a flowchart of a method for fabricating a light-emitting diode chip according to an embodiment of the present invention. Referring to Figure 5, the manufacturing method includes:
步骤201:在砷化镓衬底上依次生长腐蚀停层、N型限制层、有源层、P型限制层和窗口层。Step 201 : sequentially growing an etch stop layer, an N-type confinement layer, an active layer, a P-type confinement layer and a window layer on the gallium arsenide substrate.
可选地,该步骤201可以包括:Optionally, this
采用金属有机化合物化学气相沉淀(英文:Metal-organic Chemical VaporDeposition,简称:MOCVD)技术在砷化镓衬底上依次生长腐蚀停层、N型限制层、有源层、P型限制层和窗口层。Etch stop layer, N-type confinement layer, active layer, P-type confinement layer and window layer are sequentially grown on GaAs substrate by metal-organic chemical vapor deposition (English: Metal-organic Chemical VaporDeposition, MOCVD for short) technology .
步骤202:在窗口层上形成电流阻挡层和填充层,填充层内设有多个延伸至窗口层的通孔,电流阻挡层设置在通孔内。Step 202 : forming a current blocking layer and a filling layer on the window layer, the filling layer is provided with a plurality of through holes extending to the window layer, and the current blocking layer is arranged in the through holes.
可选地,该步骤202可以包括:Optionally, this
采用电子束蒸镀技术在窗口层上铺设二氟化镁;Using electron beam evaporation technology to lay magnesium difluoride on the window layer;
采用光刻技术和干法刻蚀技术对二氟化镁图形化,形成电流阻挡层;Using photolithography technology and dry etching technology to pattern magnesium difluoride to form a current blocking layer;
采用溅射技术在电流阻挡层的图形之间形成填充层。A filling layer is formed between the patterns of the current blocking layer using a sputtering technique.
在实际应用中,当填充层和透明导电层采用的材料相同时,填充层和透明导电层可以一起沉积形成;当填充层和透明导电层采用的材料不同时,可以先在电流阻挡层上和电流阻挡层之间沉积填充层,再去除电流阻挡层上的填充层,最后在电流阻挡层和填充层上沉积透明导电层。In practical applications, when the materials used for the filling layer and the transparent conductive layer are the same, the filling layer and the transparent conductive layer can be deposited together; when the materials used for the filling layer and the transparent conductive layer are different, the current blocking layer and A filling layer is deposited between the current blocking layers, the filling layer on the current blocking layer is removed, and finally a transparent conductive layer is deposited on the current blocking layer and the filling layer.
步骤203:在电流阻挡层和填充层上依次铺设透明导电层、金属反射层、第一键合层。Step 203: Lay a transparent conductive layer, a metal reflective layer, and a first bonding layer on the current blocking layer and the filling layer in sequence.
可选地,该步骤203可以包括:Optionally, this
采用溅射技术在电流阻挡层和填充层上依次铺设透明导电层、金属反射层、第一键合层。The transparent conductive layer, the metal reflection layer and the first bonding layer are sequentially laid on the current blocking layer and the filling layer by sputtering technology.
采用溅射技术,膜质致密性好,电流扩展性强。Using sputtering technology, the film has good compactness and strong current expansion.
在实际应用中,在金属反射层形成之后,可以在250℃~500℃的温度下通入氮气进行退火。另外,形成时先抽真空,再通入氩气并将压力保持为0.2Pa~10Pa。In practical applications, after the metal reflective layer is formed, annealing can be performed by passing nitrogen gas at a temperature of 250°C to 500°C. In addition, when forming, vacuum is drawn first, then argon gas is introduced and the pressure is kept at 0.2Pa-10Pa.
步骤204:在硅基板上形成第二键合层。Step 204 : forming a second bonding layer on the silicon substrate.
可选地,该步骤203可以包括:Optionally, this
采用溅射技术在硅基板上形成第二键合层。The second bonding layer is formed on the silicon substrate using sputtering technology.
步骤205:将第二键合层和第一键合层键合在一起。Step 205: Bond the second bonding layer and the first bonding layer together.
可选地,该步骤205可以包括:Optionally, this
在280℃~320℃的温度下进行键合,键合比较牢固。The bonding is carried out at a temperature of 280°C to 320°C, and the bonding is relatively firm.
步骤206:去除砷化镓衬底和腐蚀停层。Step 206: Remove the gallium arsenide substrate and the etch stop layer.
可选地,该步骤206可以包括:Optionally, this
湿法腐蚀砷化镓衬底和腐蚀停层。Wet etching of GaAs substrates and etch stop layers.
步骤207:在N型限制层上设置电极。Step 207: Disposing electrodes on the N-type confinement layer.
可选地,该步骤207可以包括:Optionally, this
采用光刻技术在N型限制层上形成设定图形的负性光刻胶;A negative photoresist with a set pattern is formed on the N-type confinement layer by photolithography;
采用电子束蒸镀技术在负性光刻胶上和负性光刻胶之间铺设电极材料;The electrode material is laid on and between the negative photoresist by electron beam evaporation technology;
剥离负性光刻胶,留下的电极材料形成电极。The negative photoresist is stripped off, leaving the electrode material to form the electrode.
采用负性光刻胶,电极上窄下宽,粘附性较好。Using negative photoresist, the electrode is narrow on the top and wide on the bottom, and the adhesion is better.
可选地,在步骤207之前,该制作方法还包括:Optionally, before
在N型限制层上外延生长电流扩展层、过渡层、出光层和欧姆接触层;Epitaxial growth of current spreading layer, transition layer, light extraction layer and ohmic contact layer on the N-type confinement layer;
采用光刻技术和ICP技术对欧姆接触层进行图形化。The ohmic contact layer is patterned using photolithography and ICP techniques.
进一步地,图形化之后,在300℃的温度下对欧姆接触层进行退火,有利于与电极之间形成欧姆接触。Further, after patterning, the ohmic contact layer is annealed at a temperature of 300° C., which is beneficial to form ohmic contact with the electrodes.
可选地,在步骤207之后,该制作方法还包括:Optionally, after
采用等离子刻蚀技术在出光层上开设延伸至窗口层的凹槽;Using plasma etching technology, a groove extending to the window layer is formed on the light emitting layer;
化学腐蚀出光层,对出光层进行粗化;Chemically corrode the light emitting layer and roughen the light emitting layer;
采用PECVD技术在芯片的正面和侧面形成保护层;Use PECVD technology to form protective layers on the front and sides of the chip;
采用光刻和干法刻蚀技术去除芯片正面的保护层。The protective layer on the front side of the chip is removed by photolithography and dry etching.
可选地,该制作方法还可以包括:Optionally, the manufacturing method may also include:
减薄硅基板。Thinning of the silicon substrate.
示例性地,硅基板的厚度可以减薄至130μm~150μm。Exemplarily, the thickness of the silicon substrate may be thinned to 130 μm˜150 μm.
进一步地,该制作方法还可以包括:Further, the manufacturing method can also include:
在减薄后的硅基板上依次沉积钛层和金层;Deposit a titanium layer and a gold layer sequentially on the thinned silicon substrate;
在200℃的温度下进行退火,以增加粘附力及形成良好的电性接触。Annealed at 200°C to increase adhesion and form good electrical contacts.
将上述步骤得到的产品进行激光切割和分离之后,即可得到LED芯片,其正面的发光亮度提升15%,而且可靠性高。After the products obtained in the above steps are laser cut and separated, an LED chip can be obtained, the luminous brightness of the front side is increased by 15%, and the reliability is high.
以上所述仅为本发明的较佳实施例,并不用以限制本发明,凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。The above are only preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principles of the present invention shall be included in the protection of the present invention. within the range.
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