CN110457072A - Method, device, equipment and computer readable medium for preventing system hang-up - Google Patents
Method, device, equipment and computer readable medium for preventing system hang-up Download PDFInfo
- Publication number
- CN110457072A CN110457072A CN201910557348.3A CN201910557348A CN110457072A CN 110457072 A CN110457072 A CN 110457072A CN 201910557348 A CN201910557348 A CN 201910557348A CN 110457072 A CN110457072 A CN 110457072A
- Authority
- CN
- China
- Prior art keywords
- memory
- processor
- wake
- signal
- preventing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 41
- 230000015654 memory Effects 0.000 claims abstract description 142
- 238000004891 communication Methods 0.000 claims description 17
- 230000002618 waking effect Effects 0.000 claims description 11
- 238000004590 computer program Methods 0.000 claims description 9
- 230000004622 sleep time Effects 0.000 claims description 8
- 238000001514 detection method Methods 0.000 claims description 4
- 230000004044 response Effects 0.000 claims description 4
- 230000007958 sleep Effects 0.000 description 19
- 230000006870 function Effects 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 230000008569 process Effects 0.000 description 4
- 238000012545 processing Methods 0.000 description 4
- 230000009471 action Effects 0.000 description 3
- 230000005611 electricity Effects 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012806 monitoring device Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 238000013500 data storage Methods 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 230000006266 hibernation Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/44—Arrangements for executing specific programs
- G06F9/4401—Bootstrapping
- G06F9/4418—Suspend and resume; Hibernate and awake
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
Abstract
The invention relates to a method, a device, equipment and a computer readable medium for preventing a system from being hung up, wherein the method comprises the following steps: under the condition that the system is determined to enter a state to be started, sending a wake-up signal to a memory storing system starting codes to wake up the memory; detecting whether the memory is woken up; and if the memory is awakened, awakening a processor for starting the system so that the processor can read the system starting code from the memory. The invention can effectively prevent the system from being hung up after the system is awakened.
Description
Technical Field
The present invention relates to the field of system startup, and in particular, to a method, an apparatus, a device, and a computer readable medium for preventing system deadlock.
Background
The memory generally stores calibration parameters of a power supply or a clock, a chip number, a software code version, special function enabling and the like, but in some cases, in consideration of security, a system boot code is put in the memory, and after the processor is started, the system boot code is firstly read from the memory and executed. The memory itself is power consuming, and the power consumption of the memory is not a large proportion when the system is in operation, but in some low power consumption situations, such as system standby, the power consumption is still considered, especially for battery powered systems.
The memory is generally located in a normal electricity area of an Integrated Circuit (IC), the normal electricity area does not power down when power consumption is low, modules such as a Central Processing Unit (CPU), a Static Random Access Memory (SRAM), a controller, and other peripherals are generally located in a power down area, the power down area can power down when power consumption is low, and the memory is located in the normal electricity area, so power down cannot be performed when power consumption is low.
Therefore, in order to reduce power consumption, One often selects some memories with sleep function, such as an OTP (One Time programmable) memory, where OTP is a type of memory and only supports One Time programming, and once programming is successful, it cannot be changed and cleared again.
However, in the prior art, if the above-mentioned memory with the hibernation function is used, the system is suspended after being awakened from the low power consumption state, and after the system is suspended, the system interface is frozen, the window cannot be refreshed, and cannot be switched, all applications are affected, and data loss may also be caused.
Disclosure of Invention
To solve the above technical problem or at least partially solve the above technical problem, the present invention provides a method, an apparatus, a device and a computer readable medium for preventing a system from hanging up.
In a first aspect, the present invention provides a method for preventing a system from hanging up, including:
under the condition that the system is determined to enter a state to be started, sending a wake-up signal to a memory storing system starting codes to wake up the memory;
detecting whether the memory is woken up;
and if the memory is awakened, awakening a processor for starting the system so that the processor can read the system starting code from the memory.
Optionally, waking up the processor for starting the system includes:
and sending a wake-up success signal to a control end of the processor so that the control end responds to the wake-up success signal and sends a wake-up signal to the processor to wake up the processor.
Optionally, sending a wake-up signal to a memory storing a system boot code to wake up the memory includes:
generating a wake-up signal according to a preset sleep time sequence of the memory;
and waking up the memory by utilizing the wake-up signal.
Optionally, the sleep timing of the memory is matched with the working timing of the system.
In a second aspect, the present invention provides an apparatus for preventing a system from hanging up, comprising:
the first awakening module is used for sending an awakening signal to a memory storing system starting codes so as to awaken the memory;
the detection module is used for detecting whether the memory is awakened or not;
and the second wake-up module is used for waking up a processor for starting the system under the condition that the memory is woken up so that the processor can read the system starting code from the memory.
Optionally, the second wake-up module is specifically configured to send a wake-up success signal to the control end of the processor under the condition that the memory is woken up, so that the control end sends a wake-up signal to the processor in response to the wake-up success signal to wake up the processor.
Optionally, the first wake-up module includes:
the signal generating unit is used for generating a wake-up signal according to a preset sleep time sequence of the memory;
and the awakening unit is used for awakening the memory by utilizing the awakening signal.
Optionally, the sleep timing of the memory is matched with the working timing of the system.
In a third aspect, the present invention provides a system starting apparatus capable of preventing a system from being hung up, where the apparatus includes:
the device for preventing the system from being hung up in the second aspect;
a memory for storing system boot code;
a processor for reading the system boot code to boot the system; wherein,
the device for preventing the system from being hung up is respectively connected with the memory and the processor.
In a fourth aspect, the present invention provides a terminal, including a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory complete communication with each other through the communication bus; the memory is stored with a computer program operable on the processor, wherein the processor implements the steps of the method according to the first aspect when executing the computer program.
In a fifth aspect, the invention provides a computer readable medium having non-volatile program code executable by a processor, the program code causing the processor to perform the method of the first aspect.
Compared with the prior art, the technical scheme provided by the embodiment of the invention has the following advantages:
in the method provided by the embodiment of the invention, under the condition that the system is determined to enter the state to be started, a wake-up signal is sent to a memory storing a system starting code so as to wake up the memory; and in the case of detecting that the memory is woken up, waking up the processor for starting the system, thereby enabling the processor to read the system starting code from the memory, and effectively preventing the system from being hung up after the system is woken up.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the invention and together with the description, serve to explain the principles of the invention.
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained according to the drawings without inventive exercise.
Fig. 1 is a schematic flow chart illustrating a method for preventing a system from being hung up according to an embodiment of the present invention;
FIG. 2 is a timing diagram illustrating a memory sleep according to one embodiment of the present invention;
fig. 3 is a flowchart illustrating a method for preventing a system from being hung up according to another embodiment of the present invention;
FIG. 4 is a schematic diagram of an apparatus for preventing system hang-up according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a system boot apparatus capable of preventing a system from being hung up according to an embodiment of the present invention;
fig. 6 is a schematic structural diagram of a system boot apparatus capable of preventing a system hang-up according to yet another embodiment of the present invention;
fig. 7 is a block diagram of a terminal according to an embodiment of the present invention.
The system comprises a first awakening module, a second awakening module and a control module, wherein 1 the first awakening module; 2. a detection module; 3. a second wake-up module;
4. a memory; 5. a first controller; 6. a second controller; 7. a processor.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
In the prior art, after the system is awakened from the low power consumption state, the memory 4 with the sleep function is still in the sleep mode, and the processor 7 cannot read the system start code, so that the system is hung up, after the system is hung up, the system interface is frozen, the window is not refreshed, the switching cannot be performed, all applications are affected, and data loss may also be caused. To this end, an embodiment of the present invention provides a method for preventing a system from being hung up, and as shown in fig. 1, the method for preventing the system from being hung up may include the following steps:
step S100, sending a wake-up signal to a memory 4 storing a system start code to wake up the memory 4 under the condition that the system is determined to enter a state to be started;
step S200, detecting whether the memory 4 is awakened; if the memory 4 is not woken up, the following step S300 is not performed to prevent the system from hanging up.
Step S300, if the memory 4 is woken up, the processor 7 for starting the system is woken up, so that the processor 7 can read the system start code from the memory 4.
In the method provided by the embodiment of the invention, under the condition that the system is determined to enter the state to be started, a wake-up signal is sent to the memory 4 storing the system starting code so as to wake up the memory 4; in case that the memory 4 is detected to be woken up, the processor 7 for starting the system is woken up, so that the processor 7 can read the system starting code from the memory 4, and the condition that the system is hung up after the system is woken up can be effectively prevented.
The overall flow of the method of the present invention is described above, and the detailed flow of the method of the present invention is described below with reference to examples.
[ METHOD EXAMPLE 1 ]
In embodiment 1, all the steps of the method shown in fig. 1 described above are included, wherein, as shown in fig. 3, step S100 is implemented by:
step S101, under the condition that the system is determined to enter a state to be started, a wake-up signal is generated according to a preset sleep time sequence of the memory 4;
step S102, waking up the memory 4 by using the wake-up signal.
For example, in step S101, the operating state of the system may be monitored by the monitoring device to determine whether the system enters the to-be-started state, for example, if it is monitored that the system wakes up from the low power consumption state, it is determined that the system enters the to-be-started state. Of course, the system wake success information may also be directly received from the wake module for waking up the system, and it is determined that the system enters the to-be-started state based on the information.
[ METHOD EXAMPLE 2 ]
In embodiment 2, all steps of the method shown in fig. 1 are included, wherein step S200 is specifically implemented by the following processes:
and sending a wake-up success signal to the control end of the processor 7, so that the control end responds to the wake-up success signal and sends a wake-up signal to the processor 7 to wake up the processor 7.
The control end of the processor 7 sends the wake-up signal to the processor 7 after responding to the wake-up success signal, so that the processor 7 wakes up after the memory 4 wakes up, the processor 7 can be ensured to successfully read the system start code in the memory 4, and the system is effectively prevented from being hung.
In this embodiment, the system boot code may be a boot code, the memory 4 is a memory 4 with a sleep function, for example, the system can sleep when the system enters a low power consumption state to reduce power consumption of the system, and for example, an OTP (One Time programmable) memory 4 may be selected, and the OTP (One Time programmable) is a type of the memory 4, only supports One Time programmable, and cannot be changed and cleared again once the programming is successful.
Of course, in some other embodiments of the present invention, for the method shown in fig. 2, step S200 is implemented by the processing described in the present embodiment.
In addition, in some embodiments of the present invention, the sleep timing of the memory 4 is matched with the operation timing of the system.
Specifically, as shown in fig. 2, assuming that the operation timing of the system is low-high-low-high, and is in an operation state at a high level and is in a low power consumption state at a low level, the timing of the memory 4 is low-high-low, and the memory 4 is in a sleep state at a high level and is in a wake-up state at a low level, as shown in fig. 2, before a point a, the system is in a non-power-on state, at a point a, when the system is powered on for the first time, the system reset signal is released, the system reset signal changes from a low level to a high level, then the timing of the memory 4 matches the operation timing of the system, the timing of the memory 4 is in a low level state, before the system enters low power consumption, at a point B in fig. 2, a sleep signal is first sent to the memory 4 to trigger the memory 4 to enter the sleep state, that is, the memory 4 should enter the sleep state in advance before the system enters the low power consumption state, because once the system enters the low power consumption state, all modules in the normal power region are in the low power consumption power-down state, and the execution main body is in the normal power region of the system, the memory 4 should enter the sleep state before the system enters the low power consumption state;
then, after the system is awakened from the low power consumption state at the point D, the normal power region is powered on, the system releases the system reset signal, the system reset signal first awakens the execution main body, the execution main body sends an awakening signal to the memory 4 to trigger the memory 4, and the memory 4 is awakened from the dormant state, namely the position of the point E in the drawing.
The method applied to the system shown in fig. 1 is described in detail above, and the apparatus, device and terminal provided by the present invention are described below with reference to fig. 4 to 6.
Product example 1
As shown in fig. 4, an embodiment of the present invention provides an apparatus for preventing a system hang-up, including:
the first awakening module 1 is used for sending an awakening signal to a memory 4 storing a system starting code so as to awaken the memory 4;
the detection module 2 is used for detecting whether the memory 4 is awakened or not; if the memory 4 is not woken up, the processor 7 is not woken up to prevent the system from hanging up.
A second wake-up module 3, configured to wake up a processor 7 for starting up the system in a case where the memory 4 is woken up, so that the processor 7 can read the system boot code from the memory 4.
In this embodiment, after the system is awakened from the low power consumption state and enters the to-be-started state, the first awakening module 1 may operate, and may monitor the operating state of the system through the monitoring device to determine whether the system enters the to-be-started state, for example, if it is monitored that the system is awakened from the low power consumption state, it is determined that the system enters the to-be-started state. Of course, the system wake success information may also be directly received from the wake module for waking up the system, and it is determined that the system enters the to-be-started state based on the information.
Product example 2
The device for preventing the system from being hung up provided by this embodiment includes all the contents in product embodiment 1, and is not described herein again. In this embodiment, the second wake-up module 3 is specifically configured to perform the following operations: in case that the memory 4 is woken up, a wake-up success signal is sent to the control terminal (second controller 6) of the processor 7, so that the control terminal sends a wake-up signal to the processor 7 in response to the wake-up success signal to wake up the processor 7.
Since the second controller 6 sends a processor 7 reset signal to trigger the processor 7 after receiving the wake-up success signal from the second wake-up module 3, so as to wake up the processor 7 (that is, the second controller can only perform response processing after the second wake-up module 3 sends the wake-up success signal), it can be ensured that the processor 7 is woken up after the memory 4, thereby effectively preventing the system from being hung up, and the working timing sequence of the processor 7 is as shown in fig. 2.
Product example 3
The apparatus for preventing the system from being hung up provided by this embodiment includes all the contents in product embodiment 1 or product embodiment 2, and is not described herein again. In this embodiment, the first wake-up module 1 includes:
the signal generating unit is used for generating a wake-up signal according to a preset sleep time sequence of the memory 4;
a wake-up unit for waking up the memory 4 by using the wake-up signal.
Product example 4
The apparatus for preventing the system hang-up provided in this embodiment includes all the contents in product embodiment 3, and is not described herein again. In the present embodiment, the sleep timing in the memory 4 matches the operation timing of the system.
As shown in fig. 5, an embodiment of the present invention provides a system boot apparatus capable of preventing a system hang-up, where the apparatus includes:
a first controller 5 for implementing the aforementioned method for preventing the system from hanging up;
a memory 4 for storing a system boot code;
a processor 7 for reading the system boot code to boot the system; wherein,
the first controller 5 is connected to the memory 4 and the processor 7, respectively.
The first controller 5 is the same as the device for preventing the system from being hung up described in any one of product embodiments 1 to 4 in structure and function, and is not described again here.
In some embodiments of the present invention, as shown in fig. 6, the first controller 5 is connected to the memory 4 and the second controller 6 is connected to the second controller 6, and the second controller 6 is connected to the processor 7, wherein the memory 4 is located in a normal power region of the system, and the first controller 5, the second controller 6 and the processor 7 are located in a power down capable region of the system. The first controller 5 is arranged on the one hand to wake up the memory 4 and to detect whether the memory 4 is woken up, and on the other hand to send a wake-up signal to the second controller 6.
Specifically, the first controller 5 and the second controller 6 may be awakened respectively, after the first controller 5 is awakened, the first controller 5 sends an awakening signal to awaken the memory 4 according to the sleep timing sequence in the memory 4, after the memory 4 is awakened successfully, the first controller 5 sends an awakening success signal to the second controller 6, and after the second controller 6 responds to the awakening success signal, the second controller sends a processor 7 reset signal to trigger the processor 7, so that the processor 7 is awakened. By adding the second controller 6, it is able to control when the processor 7 is woken up, ensuring that the processor 7 is woken up after the memory 4, thereby effectively preventing the problem of system hang-up.
In the embodiment shown in fig. 6, the second controller 6 is independent of the first controller 5. Of course, in other embodiments of the present invention, the first controller 5 and the second controller 6 may be different control modules integrated on one controller for saving hardware cost.
The memory 4 is exemplarily a memory 4 having a sleep function.
In some embodiments of the present invention, the first controller 5 stores therein a sleep timing chart of the memory 4, and is capable of sending a corresponding control signal to wake up the memory 4 according to the sleep timing chart of the memory 4.
As shown in fig. 7, an embodiment of the present invention provides a terminal, a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus; the memory stores a computer program operable on the processor, and the processor executes the computer program to implement the steps of the method of the above-mentioned method embodiments.
In the terminal provided by the embodiment of the invention, the processor sends the wake-up signal to the memory storing the system start code to wake up the memory by executing the program stored in the memory under the condition that the system is determined to enter the state to be started; detecting whether the memory is woken up; if the memory is awakened, the processor for starting the system is awakened, so that the processor can read the system starting code from the memory, the memory is preferentially awakened, then the processor is awakened, and the condition that the system is hung up after the system is awakened is effectively prevented.
As shown in fig. 7, the communication bus 1140 mentioned in the above terminal may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like.
The communication bus 1140 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 7, but this is not intended to represent only one bus or type of bus.
The communication interface 1120 is used for communication between the terminal and other devices.
The memory 1130 may include a Random Access Memory (RAM), and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory. Optionally, the memory may also be at least one memory device located remotely from the processor.
The processor 1110 may be a general-purpose processor, and includes a Central Processing Unit (CPU), a Network Processor (NP), and the like; the integrated circuit may also be a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic device, or discrete hardware components.
An embodiment of the invention provides a computer-readable medium having non-volatile program code executable by a processor, the program code causing the processor to perform the steps of any of the method embodiments described above.
In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. The procedures or functions according to the embodiments of the invention are brought about in whole or in part when the computer program instructions are loaded and executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wirelessly (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., solid state disk (ssd)), among others.
Finally, it should be noted that: the above examples are only intended to illustrate the technical solution of the present invention, but not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; and such modifications or substitutions do not depart from the spirit and scope of the corresponding technical solutions of the embodiments of the present invention.
It is noted that, in this document, relational terms such as "first" and "second," and the like, may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The foregoing are merely exemplary embodiments of the present invention, which enable those skilled in the art to understand or practice the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (11)
1. A method for preventing system hang-up, comprising:
under the condition that the system is determined to enter a state to be started, sending a wake-up signal to a memory storing system starting codes to wake up the memory;
detecting whether the memory is woken up;
and if the memory is awakened, awakening a processor for starting the system so that the processor can read the system starting code from the memory.
2. The method of claim 1, wherein waking up a processor for booting the system comprises:
and sending a wake-up success signal to a control end of the processor so that the control end responds to the wake-up success signal and sends a wake-up signal to the processor to wake up the processor.
3. The method of claim 1, wherein sending a wake-up signal to a memory storing system boot code to wake up the memory comprises:
generating a wake-up signal according to a preset sleep time sequence of the memory;
and waking up the memory by utilizing the wake-up signal.
4. The method of preventing system hang-up as recited in claim 3,
the sleep time sequence of the memory is matched with the working time sequence of the system.
5. An apparatus for preventing system hang-up, comprising:
the first awakening module is used for sending an awakening signal to a memory storing system starting codes so as to awaken the memory;
the detection module is used for detecting whether the memory is awakened or not;
and the second wake-up module is used for waking up a processor for starting the system under the condition that the memory is woken up so that the processor can read the system starting code from the memory.
6. The apparatus according to claim 5, wherein the second wake-up module is specifically configured to send a wake-up success signal to the control end of the processor when the memory is woken up, so that the control end sends a wake-up signal to the processor in response to the wake-up success signal to wake up the processor.
7. The apparatus of claim 5, wherein the first wake-up module comprises:
the signal generating unit is used for generating a wake-up signal according to a preset sleep time sequence of the memory;
and the awakening unit is used for awakening the memory by utilizing the awakening signal.
8. The device for preventing system hang-up according to claim 7,
the sleep time sequence of the memory is matched with the working time sequence of the system.
9. A system boot apparatus capable of preventing a system hang-up, the apparatus comprising:
means for preventing hang-up of a system as claimed in any one of claims 5 to 8;
a memory for storing system boot code;
a processor for reading the system boot code to boot the system; wherein,
the device for preventing the system from being hung up is respectively connected with the memory and the processor.
10. A terminal comprises a processor, a communication interface, a memory and a communication bus, wherein the processor, the communication interface and the memory are communicated with each other through the communication bus; the memory has stored thereon a computer program operable on the processor, wherein the processor, when executing the computer program, performs the steps of the method of any of the preceding claims 1 to 4.
11. A computer-readable medium having non-volatile program code executable by a processor, wherein the program code causes the processor to perform the method of any of claims 1-4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910557348.3A CN110457072A (en) | 2019-06-25 | 2019-06-25 | Method, device, equipment and computer readable medium for preventing system hang-up |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910557348.3A CN110457072A (en) | 2019-06-25 | 2019-06-25 | Method, device, equipment and computer readable medium for preventing system hang-up |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110457072A true CN110457072A (en) | 2019-11-15 |
Family
ID=68480877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910557348.3A Pending CN110457072A (en) | 2019-06-25 | 2019-06-25 | Method, device, equipment and computer readable medium for preventing system hang-up |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110457072A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113110880A (en) * | 2020-01-10 | 2021-07-13 | 中移物联网有限公司 | System starting method and electronic equipment |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101454755A (en) * | 2005-05-26 | 2009-06-10 | Vns组合有限责任公司 | Computer system with increased operating efficiency |
| CN102193839A (en) * | 2010-03-12 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Electronic device and startup method thereof |
| EP2784662A1 (en) * | 2013-03-28 | 2014-10-01 | Dialog Semiconductor B.V. | Electronic circuit for and method of executing an application program stored in a One-Time-Programmable (OTP) memory in a System on Chip (SoC) |
| CN109885343A (en) * | 2019-02-25 | 2019-06-14 | 深圳忆联信息系统有限公司 | A kind of controller low-power consumption starting method, apparatus, computer equipment and storage medium |
-
2019
- 2019-06-25 CN CN201910557348.3A patent/CN110457072A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101454755A (en) * | 2005-05-26 | 2009-06-10 | Vns组合有限责任公司 | Computer system with increased operating efficiency |
| CN102193839A (en) * | 2010-03-12 | 2011-09-21 | 鸿富锦精密工业（深圳）有限公司 | Electronic device and startup method thereof |
| EP2784662A1 (en) * | 2013-03-28 | 2014-10-01 | Dialog Semiconductor B.V. | Electronic circuit for and method of executing an application program stored in a One-Time-Programmable (OTP) memory in a System on Chip (SoC) |
| CN109885343A (en) * | 2019-02-25 | 2019-06-14 | 深圳忆联信息系统有限公司 | A kind of controller low-power consumption starting method, apparatus, computer equipment and storage medium |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113110880A (en) * | 2020-01-10 | 2021-07-13 | 中移物联网有限公司 | System starting method and electronic equipment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110069280B (en) | Electronic device and firmware updating method thereof | |
| US7437575B2 (en) | Low power mode for device power management | |
| KR102395868B1 (en) | Electronic device and applacation controlling method thereof | |
| US9367446B2 (en) | Computer system and data recovery method for a computer system having an embedded controller | |
| TWI508489B (en) | Remote wake system and method | |
| CN110658985A (en) | Power button overlay for persistent memory enabled platform | |
| US7996580B2 (en) | System and method for notifying a host of a service required by a slave storage device | |
| US20240295913A1 (en) | Electronic device and method of responding to a trigger to wake up | |
| US8886974B2 (en) | Controller | |
| US9332064B2 (en) | Computer system and remote control method thereof | |
| CN110457072A (en) | Method, device, equipment and computer readable medium for preventing system hang-up | |
| CN106603526B (en) | WiFi/hotspot starting method and device | |
| US20170177065A1 (en) | Method and apparatus for providing power state information using in-band signaling | |
| CN107179819B (en) | Method for preventing battery from swelling and electronic device thereof | |
| CN111176408B (en) | SoC low-power-consumption processing method and device | |
| CN108132803B (en) | Timing keep-alive and awakening method, system, terminal and medium based on mobile terminal | |
| JP6698722B2 (en) | Embedded controller chips, systems and devices | |
| CN107179911B (en) | Method and equipment for restarting management engine | |
| CN113075992B (en) | Memory power-on method, device, equipment and computer readable storage medium | |
| US7103692B2 (en) | Method and apparatus for an I/O controller to alert an external system management controller | |
| CN111352660A (en) | Method and device for identifying application with wake-up lock | |
| US11663106B2 (en) | Systems and methods for mitigating failure to enter standby mode | |
| EP3069256A1 (en) | Techniques for processing custom events | |
| CN104348514B (en) | Integrated circuit, electronic device and operation method thereof | |
| CN111104286B (en) | Power consumption management method, server, and computer-readable storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20200915 Address after: 519015 Room 1001, Lianshan Lane, Jida Jingshan Road, Xiangzhou District, Zhuhai City, Guangdong Province Applicant after: Zhuhai Zero Boundary Integrated Circuit Co.,Ltd. Applicant after: GREE ELECTRIC APPLIANCES,Inc.OF ZHUHAI Address before: 519070 Guangdong city of Zhuhai Province Qianshan Applicant before: GREE ELECTRIC APPLIANCES,Inc.OF ZHUHAI |
|
| TA01 | Transfer of patent application right | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20191115 |
|
| RJ01 | Rejection of invention patent application after publication |