CN110446369A - Bonding structure, bonding method and the Package boxes comprising the bonding structure - Google Patents
Bonding structure, bonding method and the Package boxes comprising the bonding structure Download PDFInfo
- Publication number
- CN110446369A CN110446369A CN201910670181.1A CN201910670181A CN110446369A CN 110446369 A CN110446369 A CN 110446369A CN 201910670181 A CN201910670181 A CN 201910670181A CN 110446369 A CN110446369 A CN 110446369A
- Authority
- CN
- China
- Prior art keywords
- chip
- aperture
- pcb board
- quantum chip
- quantum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000000034 method Methods 0.000 title claims abstract description 26
- 238000009434 installation Methods 0.000 claims abstract description 28
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims abstract description 23
- 238000007789 sealing Methods 0.000 claims description 19
- 230000035515 penetration Effects 0.000 claims description 3
- 229910000679 solder Inorganic materials 0.000 description 16
- 238000010586 diagram Methods 0.000 description 6
- 238000004026 adhesive bonding Methods 0.000 description 5
- 230000005611 electricity Effects 0.000 description 5
- 238000011900 installation process Methods 0.000 description 3
- 230000008054 signal transmission Effects 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 238000000354 decomposition reaction Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000002093 peripheral effect Effects 0.000 description 2
- 239000011148 porous material Substances 0.000 description 2
- 230000004888 barrier function Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000004069 differentiation Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 230000000007 visual effect Effects 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K5/00—Casings, cabinets or drawers for electric apparatus
- H05K5/02—Details
- H05K5/03—Covers
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Light Receiving Elements (AREA)
Abstract
A kind of bonding structure, bonding method and the Package boxes comprising the bonding structure, bonding structure include: quantum chip；Pcb board is provided with aperture on the pcb board, the size of the aperture is greater than the size of the quantum chip to accommodate the quantum chip for being bonded with the quantum chip；Wherein, the quantum chip is located in the aperture of the pcb board and is electrically connected with the pcb board.By the way that aperture is arranged, quantum chip is placed in aperture, and the size of aperture is slightly larger than the size of quantum chip, so as to shorten wire length, reduce the impedance mismatch that microwave signal generates at bonding, improve signal quality, in addition back mounted mode is used, quantum chip is smoothly pushed in aperture from the pcb board back side and is bonded, bond strength is improved in such a way that the back side fastens, it avoids and existing is put into chip from pcb board front, it is insecure in conjunction with sample box base and thermally contact bad problem with pedestal that chip is easy to appear when installation.
Description
Technical field
The disclosure belongs to quantum chip encapsulation technology field, is related to a kind of bonding structure, bonding method and comprising the bonding
The Package boxes of structure, especially one kind can be used for bonding structure and its bonding side under pole low temperature environment (being, for example, less than 10mK)
Method, and the Package boxes comprising the bonding structure.
Background technique
In the implementation that Superconducting Quantum calculates, it is indispensable that quantum processor is attached with peripheral circuit
One step.Superconducting Quantum Processor Package boxes are the first stage arrangements being attached with quantum processor.How by superconduction
All kinds of performance pins of quantum processor are attached, are fanned out to, and guarantee that signal performance on route is done in reduction small as far as possible
Disturb the design challenges for just becoming industry.
In order to realize control signal and read the input and output of signal, usually by quantum chip by way of wire bonding
It is connected on pcb board, and transfers to be connected with peripheral circuit by pcb board.
Problem is that quantum chip is put into packaged sample box by existing installation method from top to bottom, is placed in pcb board
On, and by being glued on pcb board, it is easy to appear bonding out-of-flatness, unstable phenomenon may cause quantum chip and water occurs
Prosposition is moved, vibrates and is thermally contacted with pedestal bad.
Also, during quantum chip low temperature near from room temperature, it may occur that expand with heat and contract with cold, may cause contact not
It is good, thus optimize connection type be very it is necessary to.
Summary of the invention
(1) technical problems to be solved
Present disclose provides a kind of bonding structure, bonding method and comprising the Package boxes of the bonding structure, at least portion
Decompose technical problem certainly set forth above.
(2) technical solution
According to one aspect of the disclosure, a kind of bonding structure is provided, comprising: quantum chip；Pcb board is used for and this
Quantum chip is bonded, and is provided with aperture on the pcb board, and the size of the aperture is greater than the size of the quantum chip to accommodate
The quantum chip；Wherein, the quantum chip is located in the aperture of the pcb board and is electrically connected with the pcb board.
In some embodiments of the present disclosure, the length and width size or radial dimension of the aperture are corresponding for quantum chip
1.05~1.3 times of size；
Preferably, the length and width size or radial dimension of the aperture be quantum chip correspondingly-sized 1.05~
1.25 again；
Further preferably, the length and width size of the aperture or radial dimension be quantum chip correspondingly-sized 1.05~
1.15 again.
Optionally, the quantum chip upper surface is provided with chip contact or contact surface, is used for chip ground or chip
Signal wire connection；The pcb board upper surface is provided with circuit board contact pad or contact surface, is used for circuit board ground or chip signal
Line connection；The chip contact or contact surface and electricity for being grounded or signal wire is connect of the quantum chip and the pcb board
Road plate contact point or contact surface are correspondingly connected with.
Chip contact or contact surface and the circuit board for ground connection in some embodiments of the present disclosure, for ground connection
Contact point or contact surface are oppositely arranged；The electricity that chip contact or contact surface for signal wire connection are connect with for signal wire
Road plate contact point or contact surface are oppositely arranged.
In some embodiments of the present disclosure, the bonding plane of the quantum chip is put down with the plane that is bonded of the pcb board
Together.
A kind of bonding method another aspect of the present disclosure provides, comprising: prepare a quantum chip；Prepare one
Pcb board is provided with aperture on the pcb board, and the size of the aperture is greater than the size of the quantum chip to accommodate the quantum core
Piece；The quantum chip is installed from the pcb board back side, installation is in the aperture of the pcb board；And carry out lead
Bonding is electrically connected the quantum chip and the pcb board.
In some embodiments of the present disclosure, the quantum chip upper surface is provided with chip contact or contact surface, uses
It is connected in chip ground or chip signal line；The pcb board upper surface is provided with circuit board contact pad or contact surface, is used for circuit
Plate earthing or the connection of circuit board signal line；The method for carrying out wire bonding are as follows:
It is connect with the pcb board for circuit board in the quantum chip for the chip contact or contact surface of chip ground
Lead connection is carried out between the circuit board contact pad or contact surface on ground；
In the quantum chip for the chip contact or contact surface of the connection of chip signal line and the pcb board for electricity
Lead connection is carried out between the circuit board contact pad or contact surface of the connection of road partitioned signal line.
In some embodiments of the present disclosure, the quantum chip is installed from the pcb board back side, installation is to positioned at institute
State in the step in the aperture of pcb board include: by quantum chip be fixed on carrying support on, operation carrying support by quantum chip from
The back side of pcb board is installed, then installation carries out bonding planar registration operation to being located in the aperture of the pcb board, so that
The bonding plane of the quantum chip and the pcb board to be bonded plane concordant；It is fixed after the completion of planar registration operation to be bonded
The position of the carrying support.
According to the another aspect of the disclosure, a kind of Package boxes are provided, any bonding referred to comprising the disclosure
Structure.
In some embodiments of the present disclosure, Package boxes, further includes: pedestal is provided with the second aperture, and described
The position of two apertures is corresponding with the position of opening on the pcb board in the encapsulating structure, and energy is arranged in the size of second aperture
The quantum chip is accommodated to pass through；Top cover is oppositely arranged with the pedestal；And sealing cover, cooperate with second aperture real
The sealing of existing second aperture；
In some embodiments of the present disclosure, boss is provided on the pedestal, second aperture runs through the boss,
It is arranged fluted on the top cover, the depth of the groove is greater than the height of projection of the boss, the pedestal and the top cover shape
At an accommodating space, the accommodating space is for placing the bonding structure.
In some embodiments of the present disclosure, the depth of penetration of second aperture is equal to height and the institute of the sealing cover
State the sum of quantum chip thickness, the carrying support that the sealing cover is installed as quantum chip, the quantum chip back with it is described
Sealing cover is fixed.
(3) beneficial effect
It can be seen from the above technical proposal that the disclosure provide bonding structure, bonding method and include the bonding structure
Package boxes, have the advantages that
1, by the aperture on pcb board, the size of the aperture is greater than the size of the quantum chip to accommodate the quantum
Chip (such as state the length and width size of aperture or radial dimension is 1.05~1.3 times of quantum chip correspondingly-sized), setting is opened
Pore size is greater than the size of quantum chip, so as to avoid quantum chip is placed in caused lead on pcb board in the prior art
Quantum chip is placed in aperture and carries out wire bonding, shortens wire bond length by too long problem, reduces microwave letter
The impedance mismatch generated number at bonding, improves signal quality；
2, back mounted mode is used in the case where bore size is more bigger than quantum chip size simultaneously, by quantum core
Piece smoothly pushes in aperture from the pcb board back side, is then bonded quantum chip with pcb board, is fastened by the back side
Mode improves bond strength, and avoid it is existing be put into chip from pcb board front, when installation, is easy to appear chip and sample
Product box base combines insecure and thermally contacts bad phenomenon with pedestal；
3, it can be installed the cap on pedestal as chip in the way of the mounting bonding of the back side in Package boxes
Carrying support, quantum chip is first fixed on carrying before installation and is held in the palm upper (such as mode of gluing), operation carrying support is by quantum
Chip is installed along the second aperture from the back side of pcb board, then installation carries out key to being located in the aperture of the pcb board
Close planar registration operation so that the bonding plane of the quantum chip and the pcb board to be bonded plane concordant；Plane to be bonded
The position of the fixed carrying support after the completion of alignment operation, the operation for then carrying out bonding wire, which is realized, to be electrically connected, pre- advanced
The fixation of row quantum chip and carrying support, compared with existing in the side for carrying out realizing fixation during installation contact from top to bottom
For formula, the fastness of chip installation is effectively increased, and carries opening for support and the second aperture and quantum chip and pcb board
Pore size is matched, the problem of avoiding the chip damage that the slant setting chip in installation process may cause, in room
Always it is able to maintain good contact during temperature drop to low temperature, is more firmly mounted chip, and improves dissipating for chip
Hot property.
Detailed description of the invention
Fig. 1 is the diagrammatic cross-section of the bonding structure according to shown in one embodiment of the disclosure.
Fig. 2 is the vertical view carried out after bonding planar registration operation in the bonding method according to shown in one embodiment of the disclosure
Structural schematic diagram.
Fig. 3 is the plan structure carried out after wirebonding operations in the bonding method according to shown in one embodiment of the disclosure
Schematic diagram.
Fig. 4 is the decomposition texture schematic diagram of the Package boxes according to shown in one embodiment of the disclosure comprising bonding structure.
[symbol description]
1-PCB plate；
11- aperture；12- is bonded plane；
13- circuit board contact pad or contact surface；
2- quantum chip；
23- chip contact or contact surface；
3- lead；The gap 4-；
5- pedestal；
The second aperture of 51-；52- boss；
6- top cover；
61- observation window.
Specific embodiment
The mode that existing quantum chip is bonded with pcb board is usually the front installation quantum chip from pcb board,
Pcb board is one piece of complete plank, and quantum chip is placed on pcb board, is fixed during the two contact, fixed
Mode is, for example, gluing, and is fixed on pcb board according to installation from top to bottom by gluing and is easy to appear bonding out-of-flatness, loosely
Solid phenomenon, may cause quantum chip occur horizontal displacement, vibration and with pedestal thermo-contact it is bad the problems such as, especially low
Under temperature, the poor contact between pcb board may be led to due to expanding with heat and contract with cold by being originally bonded firm quantum chip, to influence to believe
Number output quality.
The disclosure proposes a kind of bonding structure, bonding method and the Package boxes comprising the bonding structure, by pcb board
Upper setting aperture, the size of the aperture are greater than the size of the quantum chip to accommodate the quantum chip, in some implementations
In example, the length and width size or radial dimension of aperture are 1.05~1.3 times of quantum chip correspondingly-sized, and bore size is arranged
Greater than the size of quantum chip, it is too long that quantum chip is placed in caused lead on pcb board so as to avoid in the prior art
Quantum chip is placed in aperture and carries out wire bonding by problem, so as to shorten wire bond length, reduces microwave signal
The impedance mismatch generated at bonding, improves signal quality, while by using back mounted mode, by quantum chip
It smoothly pushes in aperture from the pcb board back side, is then bonded quantum chip with pcb board, the side fastened by the back side
Formula improves bond strength, and avoid it is existing be put into chip from pcb board front, when installation, is easy to appear chip and sample
Box base combines insecure and thermally contacts bad phenomenon with pedestal.In Package boxes in the way of the mounting bonding of the back side
The carrying support that cap on pedestal can be installed as chip carries out key after the aperture of quantum chip support to pcb board
It closes, effectively increases installation fastness and bond strength, avoid what the slant setting chip in installation process may cause
The problem of chip damages, is able to maintain good contact always during room temperature is down to low temperature, is more firmly mounted chip,
And improve the heat dissipation performance of chip.
For the purposes, technical schemes and advantages of the disclosure are more clearly understood, below in conjunction with specific embodiment, and reference
The disclosure is further described in attached drawing.
First embodiment
In first exemplary embodiment of the disclosure, a kind of bonding structure is provided.
Fig. 1 is the diagrammatic cross-section of the bonding structure according to shown in one embodiment of the disclosure.
Shown in referring to Fig.1, the bonding structure of the disclosure, comprising: quantum chip 2；Pcb board 1 is used for and the quantum chip 2
It is bonded, is provided with aperture 11 on the pcb board 1, the size of the aperture 11 is greater than the size of the quantum chip 2 to accommodate
State quantum chip 2；Wherein, the quantum chip 2 is located in the aperture 11 of the pcb board 1 and is electrically connected with the pcb board 1.
In some embodiments of the present disclosure, as shown in Figure 1, the length and width size of the aperture or radial dimension y are amount
1.05~1.3 times of sub- chip correspondingly-sized x；
Preferably, the length and width size or radial dimension of the aperture be quantum chip correspondingly-sized 1.05~
1.25 again；
Further preferably, the length and width size of the aperture or radial dimension be quantum chip correspondingly-sized 1.05~
1.15 again.
Wherein the bore size of pcb board is set greater than the correspondingly-sized of quantum chip to accommodate quantum chip, aperture ruler
Be bigger degree for the very little size compared to quantum chip, avoid due to bore size it is excessive caused by quantum chip with
Lead too long the problem of leading to poor signal quality between pcb board, reduces the impedance mismatch that microwave signal generates at bonding,
Improve signal quality.
Fig. 2 is the vertical view carried out after bonding planar registration operation in the bonding method according to shown in one embodiment of the disclosure
Structural schematic diagram.Fig. 3 is the vertical view carried out after wirebonding operations in the bonding method according to shown in one embodiment of the disclosure
Structural schematic diagram.In Fig. 2, the contact point connected for signal wire or contact surface are illustrated with ellipse with square respectively, are used for
The contact point of ground connection or contact surface.In Fig. 3, illustrates lead 3 with two leads, be the purpose for insurance, prevent wherein one
Other one also may be implemented spare effect when problem occurs for lead, certainly, in the disclosure, can be an independent lead reality
The connection of existing quantum chip contact point corresponding with pcb board or contact surface.
In the present embodiment, referring to shown in Fig. 2 and Fig. 3,2 upper surface of quantum chip is provided with chip contact or connects
Contacting surface 23 is connected for chip ground or chip signal line；1 upper surface of pcb board is provided with circuit board contact pad or contact
Face 13 is connected for circuit board ground or chip signal line；The quantum chip 2 is with the pcb board 1 for ground connection or signal
The chip contact or contact surface of line connection are correspondingly connected with circuit board contact pad or contact surface.
The quantum chip 2 and the pcb board 1 for be grounded or chip contact or contact surface that signal wire is connect and
The meaning that circuit board contact pad or contact surface are correspondingly connected with are as follows: the quantum chip is used for the chip contact of chip ground or connects
Contacting surface and the pcb board are for carrying out lead connection between the circuit board contact pad or contact surface of circuit board ground；The quantum
Chip contact or contact surface of the chip for the connection of chip signal line are used for the electricity that circuit board signal line is connect with the pcb board
Lead connection is carried out between road plate contact point or contact surface.
In one embodiment, the bonding plane of the quantum chip and the pcb board to be bonded plane concordant, such as Fig. 2 institute
Show, due to pcb board 1 11 size of aperture be greater than quantum chip 2 correspondingly-sized to accommodate quantum chip 2, in quantum core
The bonding plane (the as upper surface of quantum chip) of piece 2 and the pcb board 1 be bonded plane 12 it is concordant after, in quantum chip 2
It is bonded between plane 12 that there are gaps 4 with pcb board 1.By making the plane that is bonded of both quantum chip 2 and pcb board 1 reach flat
Neat state is convenient for lead operation and shortens lead distance.
In one example, 2 upper surface of quantum chip is provided with chip ground solder joint and chip signal wire bonding point, described
Pcb board upper surface is provided with circuit board ground solder joint and circuit board signal wire bonding point, the chip ground solder joint and the circuit
Plate earthing solder joint is correspondingly connected with, and the chip signal wire bonding point is correspondingly connected with the circuit board signal wire bonding point.Implement one
In example, chip ground solder joint and the setting of chip signal wire bonding dot interlace, corresponding, circuit board ground solder joint and electricity on pcb board
Road partitioned signal wire bonding point is also staggered, and chip ground solder joint is oppositely arranged with circuit board ground solder joint, chip signal wire bonding point
It is oppositely arranged with circuit board signal wire bonding point, so that lead is apart from relatively short.
It should be noted that chip ground solder joint replaces with chip signal wire bonding point to be set in example as shown in Figure 2
Set, certainly, this only as an example, in other embodiments, the disclosure for be grounded or contact point that signal wire connects or connecing
The layout of contacting surface can be configured according to the actual situation.In addition, not making in the disclosure for the form of electrical contact or connection
It is specific to limit, it can be configured according to actual needs, be not limited to the form of solder joint.
In the example, as shown in figure 3, the chip ground solder joint is corresponding by lead 3 with the circuit board ground solder joint
Connection, the chip signal wire bonding point are correspondingly connected with the circuit board signal wire bonding point by lead 3.
Certainly, the bonding structure of the disclosure is greater than the quantum chip by the aperture on pcb board, the size of the aperture
To accommodate the quantum chip, (such as the length and width size or radial dimension for stating aperture is quantum chip correspondingly-sizeds to size
1.05~1.3 times), setting bore size is greater than the size of quantum chip, so as to avoid in the prior art quantum chip is set
In the problem that lead caused on pcb board is too long, quantum chip is placed in aperture and carries out wire bonding, shortens lead key
Close length, reduce the impedance mismatch that microwave signal generates at bonding, improve signal quality, further, by
The length and width size or radial dimension that aperture is set in preferred embodiment be 1.05~1.3 times of quantum chip correspondingly-sized with
And the position by the way that each corresponding solder joint is arranged is on the same line, so that lead distance further shortens, further subtracts
The impedance mismatch that small microwave signal generates at bonding, so that signal quality further increases.
Second embodiment
In second exemplary embodiment of the disclosure, a kind of bonding method is provided.
The bonding method of the present embodiment, comprising:
Step S21: prepare a quantum chip；
In the present embodiment, the shape of the quantum chip is rectangle (top view), and size is meant that length and width dimensions.At it
In its embodiment, quantum chip is also possible to other shapes, for example, round, polygon or ellipse etc..
Step S22: preparing a pcb board, be provided with aperture on the pcb board, and the size of the aperture is greater than the quantum core
The size of piece is to accommodate the quantum chip；
In the present embodiment, the aperture of pcb board corresponds to rectangle, it is of course also possible to be round, polygon or other shapes
Aperture, as long as meet the aperture size be greater than the quantum chip size to accommodate the quantum chip.
In some embodiments of the present disclosure, the length and width size or radial dimension of the aperture are corresponding for quantum chip
1.05~1.3 times of size；
Preferably, the length and width size or radial dimension of the aperture be quantum chip correspondingly-sized 1.05~
1.25 again；
Further preferably, the length and width size of the aperture or radial dimension be quantum chip correspondingly-sized 1.05~
1.15 again.
Above-mentioned size is arranged so that 11 size of aperture is slightly larger than the correspondingly-sized of quantum chip 2 and is unlikely to too greatly, to change sentence
It talks about, the position of quantum chip aligned apertures from below is placed in close to the pcb board back side, the size of the aperture makes institute
Stating quantum chip can be steadily into the aperture without touching at the edge of aperture.Certain bore size it is not too big so that
Quantum chip inside significantly shakes back and forth.
Step S23: the quantum chip is installed from the pcb board back side, installation to the aperture for being located at the pcb board
It is interior；
In one embodiment, the quantum chip is installed from the pcb board back side, installation is to positioned at the pcb board
It include: that quantum chip is fixed in carrying support in step in aperture, operation carrying support is by quantum chip from the back side of pcb board
It is installed, installation is in the aperture of the pcb board；Then bonding planar registration operation is carried out, so that the quantum core
The bonding plane of piece and the pcb board to be bonded plane concordant；The fixed carrying support after the completion of planar registration operation to be bonded
Position.
It should be noted that being slightly larger than the situation of quantum chip for the bore size on pcb board, if using existing
The mode of quantum chip is placed from pcb board front, on the one hand, carrying support is not fixed in advance with quantum chip, and quantum chip needs
It to be accurately placed in the aperture of pcb board and at the same time (such as serving as carrying using sealing cover in sealed box body with carrying support
Support) carry out gluing fix, realize that fixed fastness is not high in moving process, and will lead if quantum chip slightly tilts
Cause the touching of the verge of opening of chip and pcb board that chip is caused to damage.Therefore, the disclosure uses the side from back side installation quantum chip
Formula effectively prevents the above problem using front installation.
Step S24: carrying out wire bonding is electrically connected the quantum chip and the pcb board；
In the disclosure, step S24 include: the quantum chip for chip ground chip contact or contact surface with
The pcb board is for carrying out lead connection between the circuit board contact pad or contact surface of circuit board ground；In the quantum chip
Chip contact or contact surface for the connection of chip signal line are used for the circuit board that circuit board signal line is connect with the pcb board
Lead connection is carried out between contact point or contact surface.
In the present embodiment, the method for carrying out wire bonding are as follows: chip ground solder joint and institute in the quantum chip
It states and carries out lead between the circuit board ground solder joint of pcb board；In the chip signal wire bonding point and the pcb board of the quantum chip
Circuit board ground solder joint between carry out lead.
The bonding method of the present embodiment is in the case where bore size is more bigger than quantum chip size using back mounted
Mode smoothly pushes to quantum chip in aperture from the pcb board back side, and quantum chip and pcb board are then carried out lead key
It closes, bond strength is improved in such a way that the back side fastens, and there is good signal transmission quality, effectively prevented existing
Slave pcb board front be put into chip, it is insecure in conjunction with sample box base and connect with pedestal heat that when installation, is easy to appear chip
Touch bad problem.
3rd embodiment
In the third exemplary embodiment of the disclosure, a kind of Package boxes are provided, are appointed comprising what the disclosure referred to
A kind of bonding structure.
Fig. 4 is the decomposition texture schematic diagram of the Package boxes according to shown in one embodiment of the disclosure comprising bonding structure.
Referring to shown in Fig. 4, in the present embodiment, Package boxes, further includes: pedestal 5 is provided with the second aperture 51, institute
The position for stating the second aperture 51 is corresponding with 11 position of aperture on the pcb board 1 in the encapsulating structure, second aperture 51
Size setting can accommodate the quantum chip 2 and pass through；Top cover 6 is oppositely arranged with the pedestal 5；And sealing cover is (in Fig. 4 simultaneously
Do not illustrate), the sealing for realizing the second aperture 51 is cooperated with second aperture 51.
In the present embodiment, pedestal 5 is complementary with the one side shape that top cover 6 is opposite, and seal cap sealing is in second aperture 51
In, pedestal 5, top cover 6 and sealing cover form external sealing and the internal Package boxes with accommodating space.
In one embodiment, boss 52 is provided on the pedestal 5, second aperture 51 runs through the boss 52, institute
It states and is arranged on top cover 6 fluted (visual angle is blocked in Fig. 4), the depth of the groove is greater than the height of projection of the boss 52, institute
It states pedestal 5 and the top cover 6 forms an accommodating space, the accommodating space is for placing the bonding structure.
In the present embodiment, the shape of the second aperture 51 is in step-like, for example, " convex " shape.The side of step can be vertically
, it is also possible to inclined, the case where side of corresponding step is inclination, preferably step is tilted towards direction in the inner part, is kept away
Exempt from light leakage, helps to realize better seal effect and signal transmission.
In the present embodiment, as shown in figure 4, observation window 61 is additionally provided on the top cover 6 of Package boxes, convenient for observation quantum
The state of chip 2.It should be noted that in other embodiments, the top covers of the Package boxes can also without observation window or
With other settings.
In preferred embodiment of the present disclosure, the depth of penetration of second aperture is equal to height and the institute of the sealing cover
State the sum of quantum chip thickness, the carrying support that the sealing cover is installed as quantum chip, the quantum chip back with it is described
Sealing cover is fixed.
The cap on pedestal can be installed as chip in the way of the mounting bonding of the back side in Package boxes
Quantum chip first is fixed on to carry and be held in the palm upper (such as mode of gluing) by carrying support before installation, and operation carrying is held in the palm quantum core
Piece is installed along the second aperture from the back side of pcb board, then installation is bonded to being located in the aperture of the pcb board
Planar registration operation so that the bonding plane of the quantum chip and the pcb board to be bonded plane concordant；Plane pair to be bonded
The position of the fixed carrying support after the completion of neat operation, the operation for then carrying out bonding wire, which is realized, to be electrically connected, and is carried out in advance
The fixation of quantum chip and carrying support, compared with existing carrying out realizing fixed mode during installation contact from top to bottom
For, the fastness of chip installation is effectively increased, and carry support and the second aperture and the aperture of quantum chip and pcb board
Size is matched, the problem of avoiding the chip damage that the slant setting chip in installation process may cause, in room temperature
It is able to maintain good contact always during being down to low temperature, is more firmly mounted chip, and improves the heat dissipation of chip
Performance.
In conclusion present disclose provides a kind of bonding structure, bonding method and comprising the Package boxes of the bonding structure,
By the aperture on pcb board, the size of the aperture is greater than the size of the quantum chip to accommodate the quantum chip and (such as state
The length and width size or radial dimension of aperture are 1.05~1.3 times of quantum chip correspondingly-sized), setting bore size is greater than
The size of quantum chip, so as to avoid quantum chip is placed in the problem that caused lead is too long on pcb board in the prior art,
Quantum chip is placed in aperture and carries out wire bonding, shortens wire bond length, reduces microwave signal at bonding
The impedance mismatch of generation, improves signal quality；It is used simultaneously in the case where bore size is more bigger than quantum chip size
Back mounted mode smoothly pushes to quantum chip in aperture from the pcb board back side, then by quantum chip and pcb board
It is bonded, bond strength is improved in such a way that the back side fastens, and there is good signal transmission quality, effectively avoided
It is existing to be put into chip from pcb board front, it is easy to appear when installation that chip is insecure in conjunction with sample box base and and bottom
Seat thermally contacts bad technical problem.
It should be noted that the direction term mentioned in embodiment, such as "upper", "lower", "front", "rear", "left", "right"
Deng being only the direction with reference to attached drawing, not be used to limit the protection scope of the disclosure.Through attached drawing, identical element is by identical
Or similar appended drawing reference indicates.When may cause understanding of this disclosure and cause to obscure, conventional structure or structure will be omitted
It makes.
And the shape and size of each component do not reflect actual size and ratio in figure, and only illustrate the embodiment of the present disclosure
Content.In addition, in the claims, any reference symbol between parentheses should not be configured to the limit to claim
System.
The word of ordinal number such as " first ", " second ", " third " etc. used in specification and claim, with modification
Corresponding element, itself is not meant to that the element has any ordinal number, does not also represent the suitable of a certain element and another element
Sequence in sequence or manufacturing method, the use of those ordinal numbers are only used to enable an element and another tool with certain name
Clear differentiation can be made by having the element of identical name.
Furthermore word "comprising" or " comprising " do not exclude the presence of element or step not listed in the claims.Positioned at member
Word "a" or "an" before part does not exclude the presence of multiple such elements.Unless there are technology barrier or contradiction, this public affairs
The above-mentioned various embodiments opened can be freely combined to form other embodiment, these other embodiments are in the disclosure
Protection scope in.
Particular embodiments described above has carried out further in detail the purpose of the disclosure, technical scheme and beneficial effects
Describe in detail it is bright, it is all it should be understood that be not limited to the disclosure the foregoing is merely the specific embodiment of the disclosure
Within the spirit and principle of the disclosure, any modification, equivalent substitution, improvement and etc. done should be included in the guarantor of the disclosure
Within the scope of shield.
Claims (10)
1. a kind of bonding structure characterized by comprising
Quantum chip；
Pcb board is provided with aperture on the pcb board, the size of the aperture is greater than the amount for being bonded with the quantum chip
The size of sub- chip is to accommodate the quantum chip；
Wherein, the quantum chip is located in the aperture of the pcb board and is electrically connected with the pcb board.
2. bonding structure according to claim 1, which is characterized in that the length and width size or radial dimension of the aperture
It is 1.05~1.3 times of quantum chip correspondingly-sized；
Preferably, the length and width size or radial dimension of the aperture are 1.05~1.25 times of quantum chip correspondingly-sized；
Further preferably, the length and width size of the aperture or radial dimension are the 1.05~1.15 of quantum chip correspondingly-sized
Times；
Optionally, the quantum chip upper surface is provided with chip contact or contact surface, is used for chip ground or chip signal
Line connection；The pcb board upper surface is provided with circuit board contact pad or contact surface, is used for circuit board ground or circuit board signal line
Connection；The chip contact or contact surface and circuit for being grounded or signal wire is connect of the quantum chip and the pcb board
Plate contact point or contact surface are correspondingly connected with.
3. bonding structure according to claim 2, which is characterized in that chip contact or contact surface and use for ground connection
It is oppositely arranged in the circuit board contact pad or contact surface of ground connection；For signal wire connection chip contact or contact surface be used for
The circuit board contact pad or contact surface of signal wire connection are oppositely arranged.
4. bonding structure according to any one of claim 1 to 3, which is characterized in that the bonding of the quantum chip is flat
Face and the pcb board to be bonded plane concordant.
5. a kind of bonding method characterized by comprising
Prepare a quantum chip；
Prepare a pcb board, be provided with aperture on the pcb board, the size of the aperture is greater than the size of the quantum chip to accommodate
The quantum chip；
The quantum chip is installed from the pcb board back side, installation is in the aperture of the pcb board；And
Carrying out wire bonding is electrically connected the quantum chip and the pcb board.
6. bonding method according to claim 5, which is characterized in that the quantum chip upper surface is provided with chip contact
Point or contact surface are connected for chip ground or chip signal line；The pcb board upper surface is provided with circuit board contact pad or connects
Contacting surface is connected for circuit board ground or circuit board signal line；The method for carrying out wire bonding are as follows:
In the quantum chip for the chip contact or contact surface of chip ground and the pcb board for circuit board ground
Lead connection is carried out between circuit board contact pad or contact surface；
Circuit board is used for for the chip contact or contact surface of the connection of chip signal line and the pcb board in the quantum chip
Lead connection is carried out between the circuit board contact pad or contact surface of signal wire connection.
7. bonding method according to claim 5, which is characterized in that pacify the quantum chip from the pcb board back side
Dress, installation include: into the step in the aperture of the pcb board
Quantum chip is fixed in carrying support, operation carrying support installs quantum chip from the back side of pcb board, and installation is extremely
In the aperture of the pcb board, bonding planar registration operation is then carried out, so that the bonding plane of the quantum chip and institute
The bonding plane for stating pcb board is concordant；The position of the fixed carrying support after the completion of planar registration operation to be bonded.
8. a kind of Package boxes, which is characterized in that include bonding structure described in any one of Claims 1-4.
9. Package boxes according to claim 8, which is characterized in that further include:
Pedestal is provided with the second aperture, the aperture on the position of second aperture and the pcb board in the encapsulating structure
Position is corresponding, and the size setting of second aperture can accommodate the quantum chip and pass through；
Top cover is oppositely arranged with the pedestal；And
Sealing cover cooperates the sealing for realizing the second aperture with second aperture；
Optionally, boss is provided on the pedestal, second aperture runs through the boss, is provided on the top cover recessed
Slot, the depth of the groove are greater than the height of projection of the boss, and the pedestal and the top cover form an accommodating space, the accommodating
Space is for placing the bonding structure.
10. Package boxes according to claim 9, which is characterized in that the depth of penetration of second aperture is equal to described
The sum of the height of sealing cover and the quantum chip thickness, the carrying support that the sealing cover is installed as quantum chip, the amount
Sub- chip back is fixed with the sealing cover.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910670181.1A CN110446369A (en) | 2019-07-23 | 2019-07-23 | Bonding structure, bonding method and the Package boxes comprising the bonding structure |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910670181.1A CN110446369A (en) | 2019-07-23 | 2019-07-23 | Bonding structure, bonding method and the Package boxes comprising the bonding structure |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110446369A true CN110446369A (en) | 2019-11-12 |
Family
ID=68431341
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910670181.1A Pending CN110446369A (en) | 2019-07-23 | 2019-07-23 | Bonding structure, bonding method and the Package boxes comprising the bonding structure |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN110446369A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SE545246C2 (en) * | 2022-03-10 | 2023-06-07 | Scalinq Ab | A packaging arrangement for a quantum processor |
Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10335566A (en) * | 1997-04-02 | 1998-12-18 | Dainippon Printing Co Ltd | Resin-sealed semiconductor device and circuit member used therein, and manufacture of resin-sealed semiconductor device |
| US20020079572A1 (en) * | 2000-12-22 | 2002-06-27 | Khan Reza-Ur Rahman | Enhanced die-up ball grid array and method for making the same |
| US20030143781A1 (en) * | 2002-01-31 | 2003-07-31 | Mclellan Neil Robert | Encapsulated integrated circuit package and method of manufacturing an integrated circuit package |
| CN1484302A (en) * | 2002-09-17 | 2004-03-24 | 华泰电子股份有限公司 | High radiation miniature package for semiconductor chip |
| CN101101880A (en) * | 2006-07-03 | 2008-01-09 | 矽品精密工业股份有限公司 | Heat-radiation type package structure and its method for making |
| EP1914803A1 (en) * | 2006-10-20 | 2008-04-23 | Broadcom Corporation | Low profile ball grid array (BGA) package witth exposed die and method of making same |
| KR20080079745A (en) * | 2007-02-28 | 2008-09-02 | 주식회사 옵토필 | Led package base having double heat sink structure of lead-flame and heat sink plate and method of fabricating thereof |
| JP2013168669A (en) * | 2013-04-18 | 2013-08-29 | Agere Systems Inc | Quad flat no-lead (qfn) integrated circuit (ic) package with enhanced paddle and method of designing the same |
| CN103531549A (en) * | 2013-10-24 | 2014-01-22 | 桂林微网半导体有限责任公司 | Semiconductor chip packaging structure and packaging method |
| CN103943573A (en) * | 2013-12-31 | 2014-07-23 | 西安汐特电子科技有限公司 | Novel integrated circuit internal packaging method |
| FR3015111A1 (en) * | 2013-12-16 | 2015-06-19 | Centre Nat Etd Spatiales | METHOD AND DEVICE FOR PREPARING AN INTEGRATED CIRCUIT DIAGNOSTIC SAMPLE |
| CN105702696A (en) * | 2016-04-12 | 2016-06-22 | 华天科技（昆山）电子有限公司 | Packaging structure of image sensing chip and manufacturing method for packaging structure |
| CN207353227U (en) * | 2017-12-28 | 2018-05-11 | 合肥本源量子计算科技有限责任公司 | A kind of quantum chip packaging device |
| CN108735678A (en) * | 2018-07-27 | 2018-11-02 | 合肥本源量子计算科技有限责任公司 | A kind of quantum bare chip stereo encapsulation structure and its packaging method |
-
2019
- 2019-07-23 CN CN201910670181.1A patent/CN110446369A/en active Pending
Patent Citations (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10335566A (en) * | 1997-04-02 | 1998-12-18 | Dainippon Printing Co Ltd | Resin-sealed semiconductor device and circuit member used therein, and manufacture of resin-sealed semiconductor device |
| US20020079572A1 (en) * | 2000-12-22 | 2002-06-27 | Khan Reza-Ur Rahman | Enhanced die-up ball grid array and method for making the same |
| US20030143781A1 (en) * | 2002-01-31 | 2003-07-31 | Mclellan Neil Robert | Encapsulated integrated circuit package and method of manufacturing an integrated circuit package |
| CN1484302A (en) * | 2002-09-17 | 2004-03-24 | 华泰电子股份有限公司 | High radiation miniature package for semiconductor chip |
| CN101101880A (en) * | 2006-07-03 | 2008-01-09 | 矽品精密工业股份有限公司 | Heat-radiation type package structure and its method for making |
| EP1914803A1 (en) * | 2006-10-20 | 2008-04-23 | Broadcom Corporation | Low profile ball grid array (BGA) package witth exposed die and method of making same |
| KR20080079745A (en) * | 2007-02-28 | 2008-09-02 | 주식회사 옵토필 | Led package base having double heat sink structure of lead-flame and heat sink plate and method of fabricating thereof |
| JP2013168669A (en) * | 2013-04-18 | 2013-08-29 | Agere Systems Inc | Quad flat no-lead (qfn) integrated circuit (ic) package with enhanced paddle and method of designing the same |
| CN103531549A (en) * | 2013-10-24 | 2014-01-22 | 桂林微网半导体有限责任公司 | Semiconductor chip packaging structure and packaging method |
| FR3015111A1 (en) * | 2013-12-16 | 2015-06-19 | Centre Nat Etd Spatiales | METHOD AND DEVICE FOR PREPARING AN INTEGRATED CIRCUIT DIAGNOSTIC SAMPLE |
| CN103943573A (en) * | 2013-12-31 | 2014-07-23 | 西安汐特电子科技有限公司 | Novel integrated circuit internal packaging method |
| CN105702696A (en) * | 2016-04-12 | 2016-06-22 | 华天科技（昆山）电子有限公司 | Packaging structure of image sensing chip and manufacturing method for packaging structure |
| CN207353227U (en) * | 2017-12-28 | 2018-05-11 | 合肥本源量子计算科技有限责任公司 | A kind of quantum chip packaging device |
| CN108735678A (en) * | 2018-07-27 | 2018-11-02 | 合肥本源量子计算科技有限责任公司 | A kind of quantum bare chip stereo encapsulation structure and its packaging method |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SE545246C2 (en) * | 2022-03-10 | 2023-06-07 | Scalinq Ab | A packaging arrangement for a quantum processor |
| SE2230067A1 (en) * | 2022-03-10 | 2023-06-07 | Scalinq Ab | A packaging arrangement for a quantum processor |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN204243365U (en) | Electric connector | |
| CN106463892B (en) | Connector | |
| JP3198932U (en) | Electrical connector | |
| CN110474183B (en) | Card edge connector and circuit board combination for memory module card | |
| JPH04229696A (en) | Electronic circuit package assembly capable of being plugged in edge-type connector, and heat radiator | |
| CN212303640U (en) | Quantum chip packaging hardware | |
| TWM454048U (en) | Mounting socket for mobile phone | |
| TW200840150A (en) | Probe card including a plurality of connectors and method of bonding the connectors to a substrate of the probe card | |
| CN110446369A (en) | Bonding structure, bonding method and the Package boxes comprising the bonding structure | |
| WO2021185237A1 (en) | Circuit board assembly and electronic device | |
| WO2016179942A1 (en) | Locating card support and mobile communication terminal | |
| CN105957846A (en) | Optical module | |
| CN205790482U (en) | Power supply connector | |
| US20200106219A1 (en) | Plug system | |
| CN104183654A (en) | Semiconductor detector head and a method for manufacturing the same | |
| WO2018090516A1 (en) | Electronic device | |
| CN210868365U (en) | Bonding structure and packaging box body comprising same | |
| CN210868366U (en) | Bonding structure and packaging box body comprising same | |
| CN207320441U (en) | Electric connector | |
| CN203166744U (en) | Power source supply module | |
| CN105914515B (en) | Dual-purpose connector plug and its assemble method | |
| CN105185749A (en) | Double-sided encapsulation shell for parallel seam welding | |
| CN110446368A (en) | Bonding structure, bonding method and the Package boxes comprising the bonding structure | |
| CN110473794A (en) | Expansible quantum chip package box structure and preparation method thereof | |
| CN211210224U (en) | Totally enclosed metal casing at output back heat dissipation |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |