[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

CN110335816A - Aluminium interconnection structure and forming method thereof - Google Patents

Aluminium interconnection structure and forming method thereof Download PDF

Info

Publication number
CN110335816A
CN110335816A CN201910618451.4A CN201910618451A CN110335816A CN 110335816 A CN110335816 A CN 110335816A CN 201910618451 A CN201910618451 A CN 201910618451A CN 110335816 A CN110335816 A CN 110335816A
Authority
CN
China
Prior art keywords
aluminium
material layer
metal material
interconnection structure
containing metal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN201910618451.4A
Other languages
Chinese (zh)
Inventor
黑泽和则
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huaian Imaging Device Manufacturer Corp
Original Assignee
Huaian Imaging Device Manufacturer Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huaian Imaging Device Manufacturer Corp filed Critical Huaian Imaging Device Manufacturer Corp
Priority to CN201910618451.4A priority Critical patent/CN110335816A/en
Publication of CN110335816A publication Critical patent/CN110335816A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32133Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
    • H01L21/32135Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321After treatment
    • H01L21/3213Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
    • H01L21/32139Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528Geometry or layout of the interconnection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/53204Conductive materials
    • H01L23/53209Conductive materials based on metals, e.g. alloys, metal silicides

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Geometry (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

A kind of aluminium interconnection structure and forming method thereof, which comprises provide semiconductor substrate, the semiconductor substrate surface is sequentially formed with metal material layer and patterned mask layer, and the metal material layer includes aluminium-containing metal material layer;Etch the metal material layer;Remove the patterned mask layer;The aluminium interconnection structure is cleaned in 25 DEG C to 40 DEG C of temperature condition deionised waters.The structure and method reduce a possibility that hole is generated in the aluminum metallic material layer, improve the electrical connection properties and reliability of aluminium interconnection structure.

Description

Aluminium interconnection structure and forming method thereof
Technical field
This application involves field of semiconductor manufacture, it particularly relates to a kind of aluminium interconnection structure and forming method thereof.
Background technique
In integrated circuit fabrication, chip interior connects semiconductor devices using metal interconnecting wires, current common use The metal material for making metal interconnecting wires includes aluminium, copper, tungsten etc..
Fig. 1 to Fig. 3 is the structural schematic diagram for forming each step of aluminium interconnection structure method in the prior art, the method packet It includes: with reference to Fig. 1, semiconductor substrate 110 being provided, the first barrier layer 120 is sequentially formed in the semiconductor substrate 110, contain aluminium Metal material layer 130 and the second barrier layer 140, wherein first barrier layer 120 is titanium layer, titanium nitride layer or titanium layer With perhaps a variety of combination aluminium-containing metal material the layer 130 such as metallic aluminium or aluminium of any one in titanium nitride layer Alloy material, second barrier layer 140 be titanium layer, in titanium nitride layer or titanium layer and titanium nitride layer any one or it is more The combination of kind.Mask layer 150 then is formed on 140 surface of the second barrier layer, the mask layer 150 is, for example, to pattern Photoresist layer.The mask layer 150 is used to define the positions and dimensions of the aluminium interconnection structure.
With reference to Fig. 2, under the protection of mask layer 150, it is sequentially etched second barrier layer 140, aluminium-containing metal material layer 130 and first barrier layer 120 with continued reference to Fig. 3 the mask layer 150 is removed using cineration technics, form the aluminium interconnection Structure.
However, as shown in figure 4, the method that the prior art forms the aluminium interconnection structure, is easy in the aluminiferous metals material The side wall of the bed of material 130 forms hole 160, influences the electrical connection properties of the aluminium interconnection structure.Accordingly, it is desirable to provide a kind of new The forming method of aluminium interconnection structure.
Summary of the invention
Technical scheme technical problems to be solved are: being easy containing for the forming method of existing aluminium interconnection structure Aluminum metallic material layer side wall generates the defect of hole, provides a kind of forming method of improved aluminium interconnection structure, contains described in elimination The hole of aluminum metallic material layer side wall.
The one side of the application provides a kind of forming method of aluminium interconnection structure, comprising:
Semiconductor substrate is provided, the semiconductor substrate surface is sequentially formed with metal material layer and patterned exposure mask Layer, the metal material layer includes aluminium-containing metal material layer;Etch the metal material layer;Remove the patterned mask layer; The aluminium interconnection structure is cleaned in 25 DEG C to 40 DEG C of temperature condition deionised waters.
In some embodiments of the present application, the technique for removing the patterned mask layer is cineration technics, wherein is carried out The gas of the cineration technics includes H2O and O2
In some embodiments of the present application, the aluminium-containing metal material layer is formed using sputter deposition craft, wherein institute State sputter deposition craft 350 DEG C to 380 DEG C at a temperature of carry out.
In some embodiments of the present application, the metal material layer is etched using dry etch process, wherein described dry The etching gas of method etching technics includes Cl2, CCl4And BCl3One or more of.
In some embodiments of the present application, the etching gas of the dry etch process further includes N2And CHF3In one Kind is a variety of.
In some embodiments of the present application, the etching pressure range of the dry etch process is from 8mt to 20mt.
In some embodiments of the present application, the Cl2Or CCl4Or BCl3Range of flow from 30sccm to 50sccm, the N2Or CHF3Range of flow be 5sccm to 15sccm.
In some embodiments of the present application, the aluminium-containing metal material layer is made of Al-Cu alloy.
In some embodiments of the present application, the metal material layer includes being sequentially formed in the semiconductor substrate surface The first barrier layer, aluminium-containing metal material layer and the second barrier layer.
The another aspect of the application provides a kind of aluminium interconnection structure, what the aluminium interconnection structure was provided by above-mentioned first aspect Any one method is formed.
Aluminium interconnection structure and forming method thereof described in the embodiment of the present application, has adjusted the cleaning process of the deionized water, The aluminium interconnection structure is cleaned under the conditions of 25 DEG C to 40 DEG C of temperature, is reduced in the aluminium-containing metal material layer and is generated hole A possibility that.Further, H is used in the technique for being ashed the photoetching agent pattern2O/O2As podzolic gas;At 350 DEG C extremely The sputter deposition craft of aluminium-containing metal material layer is carried out in the range of 380 DEG C;In the technique for etching the metal material layer, adjust Nitrogen or CHF is added in the component of the whole etching gas3Equal gases, and the flow of etching gas is adjusted, etching temperature etc., A possibility that generating hole in the aluminum metallic material layer is further decreased, the electrical connection properties of aluminium interconnection structure and reliable are improved Property.
Other feature will be set forth in part in the description in the application.By the elaboration, make the following drawings and The content of embodiment narration becomes apparent for those of ordinary skills.Inventive point in the application can pass through Practice is sufficiently illustrated using method described in detailed example discussed below, means and combinations thereof.
Detailed description of the invention
Exemplary embodiment disclosed in this application is described in detail in the following drawings.Wherein identical appended drawing reference is in attached drawing Several views in indicate similar structure.Those of ordinary skill in the art will be understood that these embodiments be non-limiting, Exemplary embodiment, the purpose that attached drawing is merely to illustrate and describes, it is no intended to it limits the scope of the present disclosure, other modes Embodiment may also similarly complete the intention of the invention in the application.It should be appreciated that the drawings are not drawn to scale.Wherein:
Fig. 1 to Fig. 3 is a kind of structural schematic diagram of each step of aluminium interconnection structure production method of the prior art;
Fig. 4 is the structural schematic diagram for the aluminium interconnection structure side wall hole that the prior art is formed;
Fig. 5 is the schematic diagram of the used tool of sputtered aluminum depositing operation in the disclosure;
Fig. 6 is the schematic diagram that aluminium-containing metal material layer side wall generates AlCl.
Fig. 7 is for the process flow chart of the forming method of aluminium interconnection structure described in the embodiment of the present application.
Specific embodiment
Following description provides the specific application scene of the application and requirements, it is therefore an objective to those skilled in the art be enable to make It makes and using the content in the application.To those skilled in the art, to the various partial modifications of the disclosed embodiments Be it will be apparent that and without departing from the spirit and scope of the disclosure, the General Principle that will can be defined here Applied to other embodiments and application.Therefore, the embodiment the present disclosure is not limited to shown in, but it is consistent most wide with claim Range.
Technical solution of the present invention is described in detail below with reference to embodiment and attached drawing.
The method for forming aluminium interconnection structure is included in the semiconductor substrate surface and sequentially forms metal material layer and pattern The mask layer of change, wherein the metal material layer includes aluminium-containing metal material layer;And the etching metal material layer, remove institute State patterned mask layer.After etching the metal material layer, and the removal patterned mask layer and etc. after, It further include cleaning step, with the pollution of film layer or aluminium interconnection structure surface after the removal progress step and impurity.Wherein, shape Technique at the metal material layer is, for example, gas-phase deposition, for example, sputter deposition craft;Etch the metal material The technique of layer is, for example, dry etch process;The patterned mask layer is, for example, photoresist layer, removes the patterned mask The technique of layer is, for example, cineration technics.The cleaning step is, for example, deionized water cleaning.
Inventor is the study found that the hole that the method is generated in aluminium-containing metal material layer side wall has with Multiple factors It closes.
It is found in the research of inventor, described hole is primarily generated at the side wall of the aluminium-containing metal material layer, described Aluminium-containing metal material layer be, for example, metallic aluminium or aluminium alloy, the alloy of the aluminium such as made of Al-Cu alloy.Contain described in formation The technique of aluminum metallic material layer is, for example, sputter deposition craft, and Fig. 5 show a kind of schematic diagram of sputtering deposition device, including chamber Body 20, the semiconductor substrate 21 are arranged on the plummer 22 of 20 bottom of cavity, pass through coil at the top of the cavity 20 Electric and magnetic fields are generated, the intracorporal sputter gas of the chamber will be passed through and be changed into plasma, thereby executing the sputtering sedimentation Technique.The sputter deposition craft is related to power, pressure, the parameters such as temperature.
Inventor is the study found that the formation of aluminium-containing metal material layer Hole is related with the temperature of sputter deposition craft.Phase High sputtering sedimentation temperature can lead to and form more holes on the side wall of aluminium-containing metal material layer, and therefore cause higher Aperture density.This is because, the granularity for being formed by aluminium grain in aluminium-containing metal material layer is smaller when sputter temperature increases, Therefore the specific surface area (gross area possessed by unit mass substance) of aluminium grain is larger, this can dramatically increase chlorine, the substances such as fluorine The time that area and chlorine for contacting and interact with aluminium etc. pass through between aluminium grain.As a result in aluminiferous metals Material layer side wall forms more readily soluble impurity (such as AlCl), so as to cause more holes in aluminium-containing metal material layer It is formed.
Inventor is the study found that etch the technique also formation with aluminium-containing metal material layer Hole of the metal material layer There is substantial connection.For example, in dry etch process, when the aluminium-containing metal material layer being etched is aluminium or acieral (such as Al- When Cu), the etching gas generally includes chlorine (Cl2)。
And Cl2It may be a key factor of hole formation on the side wall for cause aluminium-containing metal material layer.Such as Fig. 6 institute Show, Cl2Gas can enter the boundary of the aluminium grain on the side wall of aluminium-containing metal material layer, make on aluminium-containing metal material layer side wall Aluminium grain be changed into the (amount of the chlorine of or compound, concrete form and infiltration and in the position of conjugate 280 containing AlCl It is related with the ratio of aluminium element to set chlorine element).AlCl is generally formed by ionic bond, therefore water-soluble or aqueous solution In, cause to generate hole on the side wall of the aluminium-containing metal material layer.
In addition, in etching technics and subsequent cleaning process, etching and some impurity or dirt in cleaning environment Dye object (such as oxygen (O2) and moisture (H2O the combination that)) also can promote or help Cl atom or ion and metallic aluminium, makes institute The aluminium atom and Cl atom or ions binding for stating aluminium-containing metal material layer side wall cause in the aluminium-containing metal material layer that makes Hole is formed on side wall.For example, inventors have found that in the case that other conditions are constant, if also containing oxygen in environment, moisture etc. When, the density of the hole formed on aluminium-containing metal material layer side wall dramatically increases.
In the technique for being ashed the patterned mask layer, the gas including oxygen and fluorine is generallyd use, for example including CF4With O2Podzolic gas.However, inventor is the study found that CF4Presence the formation of hole on side wall can be made more serious.This may Caused by being since following procedure has occurred on the side wall of aluminium-containing metal material layer: the aluminium grain on side wall or by proximal wall The AlCl of upper formation is in CF4Under the action of can be further converted to AlF.Compared with AlCl, AlF is more soluble in water Or in aqueous solution.Moreover, under certain conditions, such as at high temperature, the migration of AlF may accelerate, this makes hole type At the problem of it is more serious.Therefore, CF4Presence may cause and form more holes in aluminium-containing metal material layer.
In addition, inventor is the study found that the temperature of deionized water cleaning has the formation of aluminium-containing metal material layer Hole There is highly important influence.Higher temperature can be such that the reactivity of many substances increases, and such as penetrate into etching process containing aluminium Chlorine in metal material layer, the elements such as fluorine can have higher reactivity, therefore be easier to dissolve under high temperature water environment, cause More holes are formed in aluminium-containing metal material layer.
In view of above description, the formation of aluminium-containing metal material layer Hole is the coefficient result of many factors.To institute The improvement and optimization for stating technique in various factors can effectively reduce the formation of aluminium-containing metal material layer Hole.
Therefore, the embodiment of the present application provides a kind of forming method of aluminium interconnection structure, and the method can be reduced containing aluminium The formation of metal material layer Hole.It is the forming method of aluminium interconnection structure described in the embodiment of the present application with reference to shown in attached drawing 7 Process flow chart, the method includes step S1 provides semiconductor substrate, and the semiconductor substrate surface is sequentially formed with gold Belong to material layer and patterned mask layer, the metal material layer include aluminium-containing metal material layer;Step S2 etches the metal Material layer;Step S3 removes the patterned mask layer;Step S4, deionized water under the conditions of 25 DEG C to 40 DEG C of temperature Clean the aluminium interconnection structure.
The aluminium interconnection structure formed is with reference to shown in attached drawing 6, including semiconductor substrate 210, is located at the semiconductor and serves as a contrast Metal material layer on bottom 210, wherein the metal material layer includes first be sequentially located in the semiconductor substrate 210 Barrier layer 220, aluminium-containing metal material layer 230 and the second barrier layer 240, it is described wherein, first barrier layer 220 be titanium Any one in layer, titanium nitride layer or titanium layer and titanium nitride layer or a variety of combinations, the aluminium-containing metal material layer 230 Such as metallic aluminium perhaps aluminium alloy material second barrier layer 240 be titanium layer, titanium nitride layer or titanium layer and titanium nitride layer In any one or a variety of combinations.
As previously mentioned, temperature increases, the chlorine in aluminium-containing metal material layer, the elements such as fluorine can have higher reactivity, Therefore it is easier to dissolve under high temperature water environment, causes to form more holes in aluminium-containing metal material layer, therefore appropriate reduction The temperature of deionized water cleaning can substantially reduce the formation of hole.Therefore the process of deionized water cleaning will be in temperature low as far as possible Lower progress, and also to guarantee the effect of cleaning simultaneously.In the embodiment of the present application, the temperature of deionized water cleaning should be controlled at 25 DEG C To in the range of 40 DEG C, preferably 30 DEG C to 35 DEG C, to reduce the formation of hole to the greatest extent, and guarantee the effect of cleaning simultaneously.Hair The study found that when the temperature of deionized water cleaning is greater than 40 DEG C, the quantity that hole is formed in aluminium-containing metal material layer increases bright people Add, moreover, temperature is higher, the hole formed in aluminium-containing metal material layer is more.Such as the temperature of deionized water cleaning is at 60 DEG C When aluminium-containing metal material layer in the hole that is formed be significantly more than the temperature of deionized water cleaning at 40 DEG C.
In some embodiments of the present application, the technique of the patterned mask layer is removed for cineration technics, described in progress The gas of cineration technics includes H2O and O2.Wherein, the H2O is vaporous water.The embodiment of the present application is it has been noted that in grey chemical industry Skill gas includes CF4And O2In the case where, CF4The aluminium-containing metal material layer side wall can be made to form AlF and promote the shape of hole At.Therefore, it includes H that the present embodiment, which uses,2O and O2Podzolic gas, it is entirely avoided in the aluminium-containing metal material layer side wall shape At AlF, the formation of the aluminium-containing metal material layer side wall hole can be substantially reduced.
In some embodiments of the application, in addition to using H2O/O2To replace CF4/O2Except, control cineration technics Temperature can also limit the formation of hole in an appropriate low-level, such as ashing temperature is 180 degrees Celsius to 250 Celsius Degree, optionally, for example, 180 degrees Celsius, 200 degrees Celsius, 225 degrees Celsius, 250 degrees Celsius.Inventor is the study found that when ashing When temperature is greater than 250 degrees Celsius, the aluminium-containing metal material layer side wall hole increases.
In one embodiment of the application, using including H2O and O2Podzolic gas, wherein the H2O and O2Flow Than being 2-4: 1, such as 3: 1 generations that can preferably limit aluminium-containing metal material layer side wall cavity.
In the specific embodiment of the application, using including H2O and O2Podzolic gas, wherein the H2The stream of O Amount range is 450-500sccm, O2Flow be 150-200sccm, ashing temperature be 200 degrees Celsius, reaction cavity pressure be 700mt to 1000mt.The technique limits the generation in aluminium-containing metal material layer side wall cavity.
In some embodiments of the application, the metal material layer, the metal material are etched using dry etch process Layer includes aluminium-containing metal material layer.The etching gas for etching the metal material layer includes Cl base gas, the Cl base gas Including chlorine, carbon tetrachloride (CCl4), boron chloride (BCl3) one or more of mixing.Optionally, the etching gas Body includes Cl2With carbon tetrachloride (CCl4), boron chloride (BCl3) one of or two kinds of mixing.
Due to Cl2Presence may be in conjunction with the Al atom of aluminium-containing metal material layer side wall to forming ease of solubility Therefore the substances such as AlCl in some embodiments of the present disclosure, have advanced optimized the dry etch process.It is specific next It says, the etching gas for etching the metal material layer should have than pressure lower under regular situation and higher etching temperature, The combination of Cl in aluminium atom and environment to reduce the aluminium-containing metal material layer side wall.In some embodiments of the present application, Pressure in above-mentioned etching technics can be in the range of 8mt to 20mt, and preferably 10mt to 15mt.Inventor studies hair Existing, in the case that other technological parameters of etching technics are constant, etching pressure is smaller, and the cavity of aluminium-containing metal material layer side wall is got over It is few.
In some embodiments of the present application, the etching temperature is between 30 degrees Celsius to 50 degrees Celsius, in addition, institute The flow for stating chlorine can be in 30sccm (standard cubic centimeters per minute) to the range of 50sccm It is interior, and preferably from 35sccm to 45sccm, the carbon tetrachloride (CCl4) or boron chloride (BCl3) flow can be In the range of 30sccm to 50sccm.In the case that inventor is the study found that other technological parameters of etching technics are constant, chlorine Flow it is smaller, aluminium-containing metal material layer side wall cavity it is fewer.
In some embodiments of the present application, the etching gas can be Cl2With the group of one or more other gases It closes, such as Cl2And BCl3Combination.In a specific embodiment, the etching gas includes Cl2And BCl3, wherein instead Answering cavity pressure is 12-15mt, Cl2Flow be 40sccm, BCl3Flow be 45sccm, in an inert atmosphere, for example, Under the helium atmosphere of 8sccm, dry etching is carried out, the aperture density on the aluminium-containing metal material layer side wall can be made further to drop It is low.
In addition, the etching gas can also include other gases, such as nitrogen in some embodiments of the present application (N2), fluoroform (CHF3) in any one or a variety of combinations, the N2Or CHF3Range of flow be 5sccm to 15sccm.In some embodiments of the present application, the etching gas may include Cl2And N2;Or Cl2With BCl3And N2;Or Cl2And BCl3And N2And CHF3, the side of the aluminium-containing metal material layer can be significantly reduced in the etching gas Aperture density on wall.
The sputter deposition craft of the aluminium-containing metal material layer also will affect the shape of the aluminium-containing metal material layer Hole At, therefore the parameter by optimizing the aluminium-containing metal material layer sputter deposition craft, the especially temperature of sputter deposition craft, The formation of hole can be further reduced.Inventor is the study found that sputter temperature raising can lead in the aluminium-containing metal material layer It is middle to form more holes.Therefore, in some embodiments, the sputter temperature of the aluminium-containing metal material layer is 350 DEG C to 380 DEG C, and preferably 360 DEG C to 370 DEG C of range.It is splashed by carrying out the aluminium-containing metal material layer under the conditions of temperature Depositing operation is penetrated, the aluminium grain in the aluminium-containing metal material layer can keep relatively large granularity, this leads to aluminium grain Specific surface area is relatively small.In this way, C12The time passed through between aluminium grain is reduced, and the contact with aluminium grain is also less, therefore The chance of the formation such as AlCl, AlF is reduced, therefore reduces a possibility that hole is formed in the aluminium-containing metal material layer. In the specific embodiment of the application, inert gas, example are used in the sputter deposition craft of the aluminium-containing metal material layer Auxiliary gas such as Ar gas as sputter deposition craft, sputtering power are, for example, 1kw to 2kw, such as 1.2kw, 1.5kw, 1.8kw.Other technological parameters can be selected in the prior art in the sputter deposition craft of the aluminium-containing metal material layer Some known technologies.
The application also provides a kind of aluminium interconnection structure, using the forming method shape of aluminium interconnection structure described in the embodiment of the present application At.
Aluminium interconnection structure and forming method thereof described in the embodiment of the present application, has adjusted the cleaning process of the deionized water, The aluminium interconnection structure is cleaned under the conditions of 25 DEG C to 40 DEG C of temperature, is reduced in the aluminium-containing metal material layer and is generated hole A possibility that.Further, H is used in the technique for being ashed the photoetching agent pattern2O/O2As podzolic gas;At 350 DEG C extremely The sputter deposition craft of aluminium-containing metal material layer is carried out in the range of 380 DEG C;In the technique for etching the metal material layer, adjust Nitrogen or CHF is added in the component of the whole etching gas3Equal gases, and the flow of etching gas is adjusted, etching temperature etc., Further decrease a possibility that hole is generated in the aluminum metallic material layer.
It should be noted that in practice, the sequence of above-mentioned optimization is only applicable to some embodiments, rather than the disclosure is all Embodiment.That is, in the case that certain other embodiments or, some factor with lower influence or priority may be It is more important than the factor of certain high influences or priority to reduce hole formation aspect.In addition, according to actual needs, may be implemented State one or more of optimization or adaptation step or all, it or they can independently carry out or suitable with any other Method improves combination progress.
In addition, in some embodiments, aluminium interconnection structure is manufactured using in above-mentioned one or more Optimized Measures.With It is compared by the aluminium interconnection structure that common process manufactures, the aluminium interconnection structure of constructed according to the present disclosure has the hole significantly reduced Formation and lower aperture density, to improve the electrical connection properties and reliability of aluminium interconnection structure.
In conclusion after reading this detailed disclosures, it will be understood by those skilled in the art that aforementioned detailed disclosure Content can be only presented in an illustrative manner, and can not be restrictive.Although not explicitly described or shown herein, this field skill Art personnel are understood that improve and modify it is intended to include the various reasonable changes to embodiment.These change, improve and It modifies and is intended to be proposed by the disclosure, and in the spirit and scope of the exemplary embodiment of the disclosure.
It should be appreciated that term that the present embodiment uses " and/or " it include associated listing one or more of project It is any or all combination.It, can be with it should be appreciated that when an element is referred to as " connection " or " coupling " to another element It is directly connected or is coupled to another element, or there may also be intermediary elements.
Similarly, it should be understood that when the element of such as layer, region or semiconductor substrate etc is referred to as in another yuan , can directly on the other element when part " upper ", or there may also be intermediary elements.In contrast, term is " directly Ground " indicates no intermediary element.It is also understood that term " including ", " including ", " including " and/or " including ", makes herein Used time indicates that there are documented feature, entirety, step, operation, element and/or component, but presence or additional one is not precluded Other a or multiple features, entirety, step, operation, element, component and/or their group.
It is also understood that although term first, second, third, etc. can be used herein to describe various elements, these Element should not be limited by these terms.These terms are only used to distinguish an element with another element.Therefore, exist In the case where not being detached from the teachings of the present invention, first element in some embodiments can be referred to as in other embodiments Second element.Identical reference label or identical reference designator indicate identical element throughout the specification.
In addition, by reference to as Utopian graphical representation of exemplary cross sectional view and/or plane diagram example is described Property embodiment.Therefore, because with the shape illustrated not being both foreseeable caused by such as manufacturing technology and/or tolerance.Cause Exemplary embodiment, should not be interpreted as being limited to the shape in region out shown here, but should include by for example making by this The deviation in shape caused by making.For example, the etching area for being shown as rectangle would generally have circular or curved spy Sign.Therefore, region shown in figure is substantially schematical, and shape is not configured to show the practical shape in the region of device Shape is also not to limit the range of exemplary embodiment.
In conclusion after reading this detailed disclosures, it will be understood by those skilled in the art that aforementioned detailed disclosure Content can be only presented in an illustrative manner, and can not be restrictive.Although not explicitly described or shown herein, this field skill Art personnel are understood that improve and modify it is intended to include the various reasonable changes to embodiment.These change, improve and It modifies and is intended to be proposed by the disclosure, and in the range of the exemplary embodiment of the disclosure.

Claims (10)

1. a kind of forming method of aluminium interconnection structure, comprising:
Semiconductor substrate is provided, the semiconductor substrate surface is sequentially formed with metal material layer and patterned mask layer, institute Stating metal material layer includes aluminium-containing metal material layer;
Etch the metal material layer;
Remove the patterned mask layer;
The aluminium interconnection structure is cleaned in 25 DEG C to 40 DEG C of temperature condition deionised waters.
2. the forming method of aluminium interconnection structure as described in claim 1, which is characterized in that remove the patterned mask layer Technique is cineration technics, wherein the gas for carrying out the cineration technics includes H2O and O2
3. the forming method of aluminium interconnection structure as described in claim 1, which is characterized in that form institute using sputter deposition craft State aluminium-containing metal material layer, wherein the sputter deposition craft 350 DEG C to 380 DEG C at a temperature of carry out.
4. the forming method of aluminium interconnection structure as described in claim 1, which is characterized in that etch institute using dry etch process State metal material layer, wherein the etching gas of the dry etch process includes Cl2, CCl4And BCl3One of or it is more Kind.
5. the forming method of aluminium interconnection structure as claimed in claim 4, which is characterized in that the etching of the dry etch process Gas further includes N2And CHF3One or more of.
6. the forming method of aluminium interconnection structure as claimed in claim 5, which is characterized in that the etching of the dry etch process Pressure range is from 8mt to 20mt.
7. the forming method of aluminium interconnection structure as claimed in claim 6, which is characterized in that the Cl2Or CCl4Or BCl3 Range of flow from 30sccm to 50sccm, the N2Or CHF3Range of flow be 5sccm to 15sccm.
8. the forming method of aluminium interconnection structure as described in claim 1, which is characterized in that the aluminium-containing metal material layer is Made of Al-Cu alloy.
9. the forming method of aluminium interconnection structure as described in claim 1, which is characterized in that the metal material layer includes successively It is formed in the first barrier layer of the semiconductor substrate surface, aluminium-containing metal material layer and the second barrier layer.
10. a kind of aluminium interconnection structure, which is characterized in that formed using any one method in claim 1-9.
CN201910618451.4A 2019-07-09 2019-07-09 Aluminium interconnection structure and forming method thereof Pending CN110335816A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201910618451.4A CN110335816A (en) 2019-07-09 2019-07-09 Aluminium interconnection structure and forming method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201910618451.4A CN110335816A (en) 2019-07-09 2019-07-09 Aluminium interconnection structure and forming method thereof

Publications (1)

Publication Number Publication Date
CN110335816A true CN110335816A (en) 2019-10-15

Family

ID=68145120

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201910618451.4A Pending CN110335816A (en) 2019-07-09 2019-07-09 Aluminium interconnection structure and forming method thereof

Country Status (1)

Country Link
CN (1) CN110335816A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5946589A (en) * 1997-10-09 1999-08-31 Chartered Semiconductor Manufacturing, Ltd. Elimination of void formation in aluminum based interconnect structures
CN100521071C (en) * 2003-07-11 2009-07-29 Nxp股份有限公司 Method of manufacturing a semiconductor device and an apparatus for use in such a method
CN102738064A (en) * 2011-04-12 2012-10-17 南亚科技股份有限公司 Method for fabricating metal redistribution layer
CN102782113A (en) * 2010-03-05 2012-11-14 朗姆研究公司 Cleaning solution for sidewall polymer of damascene processes

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5946589A (en) * 1997-10-09 1999-08-31 Chartered Semiconductor Manufacturing, Ltd. Elimination of void formation in aluminum based interconnect structures
CN100521071C (en) * 2003-07-11 2009-07-29 Nxp股份有限公司 Method of manufacturing a semiconductor device and an apparatus for use in such a method
CN102782113A (en) * 2010-03-05 2012-11-14 朗姆研究公司 Cleaning solution for sidewall polymer of damascene processes
CN102738064A (en) * 2011-04-12 2012-10-17 南亚科技股份有限公司 Method for fabricating metal redistribution layer

Similar Documents

Publication Publication Date Title
KR100239026B1 (en) Dry etching method
KR100309617B1 (en) A method of etching aluminum and an aluminum alloy using hydrogen chloride, chlorine-containing etching solution, and nitrogen
JP4690512B2 (en) Method for reducing polymer deposition on etched vertical metal lines, corrosion of etched metal lines and corrosion during wet cleaning of etched metal features
US6319842B1 (en) Method of cleansing vias in semiconductor wafer having metal conductive layer
KR19980071031A (en) Manufacturing Method of Semiconductor Device
US5378309A (en) Method for controlling the etching profile of a layer of an integrated circuit
KR20160033050A (en) Method of processing a semiconductor device and chip package
US5667630A (en) Low charge-up reactive ion metal etch process
JP3682067B2 (en) Method for etching conductive lines without undercut
TWI257645B (en) Barrier metal re-distribution process for resistivity reduction
US6824655B2 (en) Process for charged particle beam micro-machining of copper
WO2024164749A1 (en) Metal interconnection line and manufacturing method therefor
CN110335816A (en) Aluminium interconnection structure and forming method thereof
KR102562321B1 (en) Method for Dry Etching of Copper Thin Films
JPH04302423A (en) Dry etching method
JP3941629B2 (en) Etching method of metal wiring
JPH0590225A (en) Manufacture of semiconductor device
US20210313192A1 (en) Method of patterning a metal film with improved sidewall roughness
US7157381B2 (en) Method for providing whisker-free aluminum metal lines or aluminum alloy lines in integrated circuits
US6177337B1 (en) Method of reducing metal voids in semiconductor device interconnection
JPS62154628A (en) Dry etching method
JPH05121378A (en) Method of manufacturing semiconductor device
JPH05234995A (en) Forming method for aluminum alloy wiring
JP3067196B2 (en) Method for manufacturing semiconductor device
JP4620964B2 (en) Metal film pattern forming method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WD01 Invention patent application deemed withdrawn after publication

Application publication date: 20191015

WD01 Invention patent application deemed withdrawn after publication