CN110299406A - A kind of low power consumption insulation gate regions bipolar junction transistor - Google Patents
A kind of low power consumption insulation gate regions bipolar junction transistor Download PDFInfo
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- CN110299406A CN110299406A CN201910692880.6A CN201910692880A CN110299406A CN 110299406 A CN110299406 A CN 110299406A CN 201910692880 A CN201910692880 A CN 201910692880A CN 110299406 A CN110299406 A CN 110299406A
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- drift region
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- 238000009413 insulation Methods 0.000 title claims abstract description 81
- 238000005036 potential barrier Methods 0.000 claims abstract description 64
- 239000000758 substrate Substances 0.000 claims description 11
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims 2
- 229910052760 oxygen Inorganic materials 0.000 claims 2
- 239000001301 oxygen Substances 0.000 claims 2
- 230000000694 effects Effects 0.000 abstract description 6
- 230000005465 channeling Effects 0.000 abstract description 4
- 238000002513 implantation Methods 0.000 abstract description 4
- 230000002708 enhancing effect Effects 0.000 abstract description 3
- 239000004065 semiconductor Substances 0.000 abstract description 2
- 238000010586 diagram Methods 0.000 description 7
- 230000015556 catabolic process Effects 0.000 description 4
- 230000007423 decrease Effects 0.000 description 2
- 230000005684 electric field Effects 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
- 230000001737 promoting effect Effects 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
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- H01L29/0611—
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- H01L29/0619—
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- H01L29/7394—
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Abstract
The present invention relates to technical field of semiconductor device, in particular to a kind of low power consumption insulation gate regions bipolar junction transistor, including the drift region N-, the side of the drift region N- is equipped with collector area, the other side of the drift region N- is equipped with gate regions, side by the gate regions close to collector area is equipped with emitter region, is equipped with insulation tank potential barrier close to the side of collector area in the emitter region, and the insulation tank potential barrier is bonded with emitter region.When the present invention is in the conductive state, for hole distribution in the drift region N-, insulation tank potential barrier will not block electronic current, but can block most hole current, hole storage thus may be implemented, hole density i.e. in the drift region N- will increase, then can increase from the electronics of MOS Channeling implantation, conductance modulation effect enhancing, in this way, the conducting resistance of transistor device can be reduced, while in the case where keeping the not increased situation of switching loss, reducing conduction loss.
Description
Technical field
The present invention relates to technical field of semiconductor device, in particular to a kind of low power consumption insulation gate regions bipolar transistor
Pipe.
Background technique
LIGBT (gate regions bipolar junction transistor) is a kind of hybrid power electronic device with fastest developing speed at present, is had
MOS input, bipolar output function, the input impedance of existing MOSFET is high, control power is small, driving circuit is simple, switching speed
Advantage high, switching loss is small, but there is the current density of bipolar power transistor to beat, saturation pressure reduction, current handling capability it is strong
The advantages of, it is that other power devices cannot compare at high pressure, high current, three aspect of high speed, therefore be field of power electronics reason
The switching device thought.
When by conductance modulation, low saturation voltage drop, conduction loss can be reduced, but also substantially increases device simultaneously
Switching loss, this is because there are a large amount of electronics, hole in unspent drift region, detaching for these ions is very slow.
Summary of the invention
It is an object of the invention to improve the deficiency in the presence of the prior art, it is double to provide a kind of low power consumption insulation gate regions
Bipolar transistor significantly drops to conduction loss in the case where being promoted by a small margin or not promoting transistor device switching loss,
To reduce the total losses of transistor device on the whole.
In order to achieve the above-mentioned object of the invention, the embodiment of the invention provides following technical schemes:
The side of a kind of low power consumption insulation gate regions bipolar junction transistor, including the drift region N-, the drift region N- is equipped with
The other side of collector area, the drift region N- is equipped with gate regions, and the side by the gate regions close to collector area is equipped with transmitting
Polar region is equipped with insulation tank potential barrier, and the insulation tank potential barrier and emitter close to the side of collector area in the emitter region
Area's fitting.
Further, for the better implementation present invention, the collector area is provided with the area collector N+, the current collection
The upper layer in the pole area N+ is equipped with the area collector P+.
Further, in order to which better implementation is of the invention, p-type base area, and institute are additionally provided with below the emitter region
P-type base area is stated between the gate regions and insulation tank potential barrier.
Further, for the better implementation present invention, the emitter region is provided with hair close to the side of gate regions
It the area emitter-base bandgap grading N+ and is bonded with gate regions, the side of insulation tank potential barrier is provided with the area emitter P+ and is pasted with insulation tank potential barrier
It closes, and the area emitter N+ is bonded with the area emitter P+.
Further, for the better implementation present invention, the drift region N- is issued equipped with buried oxide layer.
Further, for the better implementation present invention, the buried oxide layer lower section is equipped with P type substrate.
Another embodiment, the buried oxide layer lower section are equipped with N-type substrate.
Further, for the better implementation present invention, between the insulation tank potential barrier and collector area, the drift region N-
Top is additionally provided with the drift region P-.
Compared with prior art, beneficial effects of the present invention:
The present invention is by being added insulation tank potential barrier, the case where being promoted by a small margin or not promoting transistor device switching loss
Under, conduction loss is significantly dropped to, to reduce the total losses of transistor device on the whole, improves conduction loss and switching loss
Between tradeoff；When transistor device is in the conductive state, hole distribution will not be hindered in the drift region N-, insulation tank potential barrier
Electron current is powered off, but most hole current can be blocked, hole storage, i.e. sky in the drift region N- thus may be implemented
Cave density will increase, then can increase from the electronics of MOS Channeling implantation, conductance modulation effect enhancing reduces conduction loss.
Detailed description of the invention
In order to illustrate the technical solution of the embodiments of the present invention more clearly, below will be to needed in the embodiment attached
Figure is briefly described, it should be understood that the following drawings illustrates only certain embodiments of the present invention, therefore is not construed as pair
The restriction of range for those of ordinary skill in the art without creative efforts, can also be according to this
A little attached drawings obtain other relevant attached drawings.
Fig. 1 is the LIGBT structural schematic diagram that the present invention has insulation tank potential barrier；
Fig. 2 is traditional LIGBT structural schematic diagram；
Fig. 3 is the present invention with electronics flowing direction schematic diagram in the LIGBT structure of insulation tank potential barrier；
Fig. 4 is the superjunction LIGBT structural schematic diagram that the present invention has insulation tank potential barrier；
Fig. 5 is traditional superjunction LIGBT structural schematic diagram；
Fig. 6 is the present invention with electronics flowing direction schematic diagram in the superjunction LIGBT structure of insulation tank potential barrier；
Fig. 7 is the hole density curve of the LIGBT body structure surface of tradition LIGBT structure and the present invention with insulation tank potential barrier
Figure；
Fig. 8 is the hole of the superjunction LIGBT body structure surface of traditional superjunction LIGBT structure and the present invention with insulation tank potential barrier
Densogram；
Fig. 9 is the IV performance diagram of different LIGBT structures；
Figure 10 is the compromise curve graph between the saturation voltage drop and switching loss of different LIGBT structures；
Figure 11 is the breakdown voltage curve graph of different LIGBT structures；
Figure 12 is the IC/IV characteristic curve that different depth position in LIGBT structure is arranged in insulation tank potential barrier.
Main element symbol description
1-P type substrate, 2- buried oxide layer, the drift region 3-N-, the area 4- collector N+, the area 5- collector P+, 6- insulation tank potential barrier,
The area 7- emitter P+, the area 8- emitter N+, the gate regions 9-, 10-P type base area.
Specific embodiment
Below in conjunction with attached drawing in the embodiment of the present invention, technical solution in the embodiment of the present invention carries out clear, complete
Ground description, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.Usually exist
The component of the embodiment of the present invention described and illustrated in attached drawing can be arranged and be designed with a variety of different configurations herein.Cause
This, is not intended to limit claimed invention to the detailed description of the embodiment of the present invention provided in the accompanying drawings below
Range, but it is merely representative of selected embodiment of the invention.Based on the embodiment of the present invention, those skilled in the art are not doing
Every other embodiment obtained under the premise of creative work out, shall fall within the protection scope of the present invention.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined in a attached drawing, does not then need that it is further defined and explained in subsequent attached drawing.
Embodiment 1:
The present invention is achieved through the following technical solutions, as shown in Figure 1, a kind of low power consumption insulation gate regions bipolar transistor
Pipe, the buried oxide layer 2 including P type substrate 1, above P type substrate 1, the drift region N- 3 above buried oxide layer 2, the drift region N-
3 side is equipped with collector area C, and the other side of the drift region N- 3 is equipped with gate regions 9, on 9 side of gate regions close to collector area
The side of C is equipped with emitter region E, is equipped with insulation tank potential barrier 6 close to the side of collector area C in the emitter region E, and described
Insulation tank potential barrier 6 is bonded with emitter region E.
The collector area C is provided with the area collector N+ 4, and the upper layer in the area the collector N+ 4 is equipped with the area collector P+ 5.
P-type base area 10 is additionally provided with below the emitter region E, and the p-type base area 10 is in the gate regions 9 and insulation tank potential barrier 6
Between, the emitter region E is provided with the area emitter N+ 8 close to the side of gate regions 9 and is bonded with gate regions 9, close to insulation
The side of slot potential barrier 6 is provided with the area emitter P+ 7 and is bonded with insulation tank potential barrier 6, and the area emitter N+ 8 and the area emitter P+ 7
Fitting.
It is illustrated in figure 2 traditional LIGBT structure, insulation tank gesture as shown in Figure 1 is added in traditional LIGBT structure
6 are built, which is specifically located at the drift region N- 3 close to the place of emitter region E.If the direction of arrow in Fig. 3 is electricity
The flow direction of son, electronics flows through the drift region N- 3 of 10 lower section of p-type base area 10 to p-type base area from MOS Channeling implantation, same with this
When, due to hole flow direction and electronics on the contrary, therefore hole can flow to the area emitter P+ 7.
When this transistor is in the conductive state, hole distribution is in the drift region N- 3, and therefore, insulation tank potential barrier 6 will not block
Electronic current, but most hole current can be blocked, hole storage, i.e. sky in the drift region N- 3 thus may be implemented
Cave density will increase, then can increase from the electronics of MOS Channeling implantation, conductance modulation effect enhancing.In this way, may be used
To reduce the conducting resistance of transistor device, in the case where switching loss is promoted by a small margin or do not promoted, it is greatly lowered and leads
Logical loss improves the tradeoff between conduction loss and switching loss to reduce the total losses of transistor device on the whole.
P type substrate 1 is selected for LIGBT structure, is in order to which using surface field technology (RESURF) is reduced, which is high in design
The most widely used reality in pressure, low on-resistance device, therefore do not repeated herein.
Embodiment 2:
It is illustrated in figure 5 traditional superjunction LIGBT structure, as shown in figure 4, the superjunction LIGBT structure that the present embodiment proposes,
Including N-type substrate 11, the buried oxide layer 12 above N-type substrate 11, the drift region N- 13 above buried oxide layer 12, the N- drift
The side in area 13 is equipped with collector area C, and the other side of the drift region N- 13 is equipped with gate regions 19, on 19 side of gate regions close to collection
The side of electrode district C is equipped with emitter region E, is equipped with insulation tank potential barrier 6 close to the side of collector area C in the emitter region E,
And the insulation tank potential barrier 6 is bonded with emitter region E.The collector area C is provided with the area collector N+ 14, the collector N+
The upper layer in area 14 is equipped with the area collector P+ 15.P-type base area 20, and the p-type base area 20 are additionally provided with below the emitter region E
Between the gate regions 19 and insulation tank potential barrier 6, the emitter region E is provided with emitter N+ close to the side of gate regions 19
It area 18 and is bonded with gate regions 19, the side of insulation tank potential barrier 6 is provided with the area emitter P+ 17 and is pasted with insulation tank potential barrier 6
It closes, and the 18 domain area emitter P+ 17, the area emitter N+ is bonded.Between the insulation tank potential barrier 6 and collector area C, the drift region N- 13
Top is additionally provided with the drift region P- 16.
When the dose concentration of boron, phosphorus, the arsenic adulterated in the drift region N- 13, the drift region P- 16 etc. is sufficiently high, such as Fig. 6
Shown in electronics flow to direction, hole nearly all flows into the drift region P- 16, and insulation tank potential barrier 6 blocks the entire drift region P-
16, so that the drift region P- 16 and p-type base stage 20 completely cut off, the blocking effect and ion storage in hole can be enhanced in this way, and then subtract
Small conduction voltage drop.N-type substrate 11 is selected for superjunction LIGBT structure, is because superjunction LIGBT structure, which can replace, reduces surface
Electric field technology reduces conduction loss.
Fig. 7 illustrates the hole of the LIGBT body structure surface in traditional LIGBT structure and embodiment 1 with insulation tank potential barrier
Distribution, Fig. 8 illustrate the superjunction LIGBT body structure surface in traditional superjunction LIGBT structure and embodiment 2 with insulation tank potential barrier
Hole distribution.
In traditional LIGBT structure, from emitter to collector, hole density is continued to decline, this is answered by carrier
It closes between p-type base stage and the drift region N- caused by the formation of depletion region.Then insulation tank potential barrier is had as shown in Figure 7
The distribution of LIGBT structure hollow cave is more uniform.Therefore, insulation tank potential barrier can increase the drift region N- close to the hole of emitter region
Density.
In traditional superjunction LIGBT structure, the drift region P- hole density is very uniform, this is because the doping of the drift region P-
It is dense, Carrier recombination probability is reduced, in addition, there is no depletion region between p-type base stage and the drift region P-.However as schemed
There is higher hole close in the entire drift region N- and the drift region P- in superjunction LIGBT structure shown in 8 with insulation tank potential barrier
Degree.
Fig. 9 respectively shows traditional LIGBT structure, the LIGBT structure with insulation tank potential barrier, tradition superjunction LIGBT knot
The IV characteristic curve of structure, superjunction LIGBT structure with insulation tank potential barrier.Wherein N- drift doping concentration in LIGBT structure
For 2e15cm-3, Ig=800A/cm2When, the saturation voltage drop Vce (sat) of traditional LIGBT structure is 1.36V, has insulation tank gesture
The LIGBT structure Vce (sat) at base is 1.2V, the Vce compared with traditional LIGBT structure of the LIGBT structure with insulation tank potential barrier
(sat) reduce 11.76%.
N- drift doping concentration is 5e15cm in superjunction LIGBT structure-3, Ig=800A/cm2When, traditional superjunction LIGBT
The Vce (sat) of structure is 1.28V, and the superjunction LIGBT structure Vce (sat) with insulation tank potential barrier is 1.02V, has insulation tank
The LIGBT structure of potential barrier Vce (sat) compared with traditional superjunction LIGBT structure reduces 20.31%.
It should be noted that the Vce (sat) of the superjunction LIGBT structure with insulation tank potential barrier is than having insulation tank potential barrier
LIGBT structure reduction much, be because for superjunction LIGBT structure, hole current mainly flows into the drift region P-, with
P-type base stage separates, therefore the hole storage effect of superjunction LIGBT structure and Vce (sat) reduction situation can be than LIGBT structures
It is good.
Figure 10 respectively shows traditional LIGBT structure, the LIGBT structure with insulation tank potential barrier, tradition superjunction LIGBT knot
Structure, superjunction LIGBT structure with insulation tank potential barrier conduction loss and switching loss between compromise curved line relation.Wherein
N- drift doping concentration is 2e15cm in LIGBT structure-3, Ig=800A/cm2When, the Eoff (switch of traditional LIGBT structure
Loss) it is 0.416mJ, the Eoff of the LIGBT structure with insulation tank potential barrier is 0.445mJ.N- drifts about in superjunction LIGBT structure
Area's doping concentration is 2e15cm-3, the Eoff of traditional superjunction LIGBT structure is 0.344mJ, the superjunction with insulation tank potential barrier
The Eoff of LIGBT structure is 0.359mJ.
It should be noted that the carrier close to emitter region can be depleted faster, so this opens transistor
It closes loss to have little effect, the LIGBT structure with insulation tank potential barrier is mainly stored in the drift region N- close to emitter
The carrier in area, as shown in Figure 2；Entirety is obtained for the drift region P- in the superjunction LIGBT structure with insulation tank potential barrier to change
It is kind, it exhausts and occurs mainly in the drift region N- and the drift region P-.Carrier close to collector area is easy to be removed, with close hair
The carrier of emitter region is the same, therefore insulation tank potential barrier is added and does not almost have when reducing conduction loss for switching loss
Have an impact.
Figure 11 respectively shows traditional LIGBT structure, the LIGBT structure with insulation tank potential barrier, tradition superjunction LIGBT knot
The voltage breakdown characteristic of structure, superjunction LIGBT structure with insulation tank potential barrier, LIGBT structure/superjunction with insulation tank potential barrier
Influence of the LIGBT structure compared with traditional LIGBT structure/superjunction LIGBT structure, to field distribution are as follows: slight to reduce N- drift
The electric field strength in area is moved, potential decline causes breakdown voltage slightly to reduce.Therefore with the structure of insulation tank potential barrier and traditional
Structure is compared, and can be improved to the tradeoff of conduction loss and switching loss, while will not sacrifice breakdown characteristics.
Figure 12 illustrates the IC/IV characteristic that different depth position in LIGBT structure is arranged in insulation tank potential barrier, when extension thickness
When degree is 3um, insulation tank potential barrier setting depth is 2.4um, Vce (sat) reaches minimum value, therefore insulation tank potential barrier is in LIGBT
Setting position in structure is different, can also reach different effect.
The above description is merely a specific embodiment, but scope of protection of the present invention is not limited thereto, any
Those familiar with the art in the technical scope disclosed by the present invention, can easily think of the change or the replacement, and should all contain
Lid is within protection scope of the present invention.Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (8)
1. a kind of low power consumption insulation gate regions bipolar junction transistor, it is characterised in that: including the drift region N-, the drift region N-
Side is equipped with collector area, and the other side of the drift region N- is equipped with gate regions, close to the side of collector area by the gate regions
Equipped with emitter region, insulation tank potential barrier, and the insulation tank potential barrier are equipped with close to the side of collector area in the emitter region
It is bonded with emitter region.
2. a kind of low power consumption insulation gate regions bipolar junction transistor according to claim 1, it is characterised in that: the current collection
Polar region is provided with the area collector N+, and the upper layer in the area the collector N+ is equipped with the area collector P+.
3. a kind of low power consumption insulation gate regions bipolar junction transistor according to claim 1, it is characterised in that: the transmitting
P-type base area is additionally provided with below polar region, and the p-type base area is between the gate regions and insulation tank potential barrier.
4. a kind of low power consumption insulation gate regions bipolar junction transistor according to claim 3, it is characterised in that: the transmitting
Polar region is provided with the area emitter N+ close to the side of gate regions and is bonded with gate regions, and the side close to insulation tank potential barrier is provided with
It the area emitter P+ and is bonded with insulation tank potential barrier, and the area emitter N+ is bonded with the area emitter P+.
5. a kind of low power consumption insulation gate regions bipolar junction transistor according to claim 1, it is characterised in that: the N- drift
Shifting area is issued equipped with buried oxide layer.
6. a kind of low power consumption insulation gate regions bipolar junction transistor according to claim 5, it is characterised in that: described to bury oxygen
Layer lower section is equipped with P type substrate.
7. a kind of low power consumption insulation gate regions bipolar junction transistor according to claim 5, it is characterised in that: described to bury oxygen
Layer lower section is equipped with N-type substrate.
8. a kind of low power consumption insulation gate regions bipolar junction transistor according to claim 7, it is characterised in that: the insulation
The drift region P- is additionally provided between slot potential barrier and collector area, above the drift region N-.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910692880.6A CN110299406A (en) | 2019-07-30 | 2019-07-30 | A kind of low power consumption insulation gate regions bipolar junction transistor |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201910692880.6A CN110299406A (en) | 2019-07-30 | 2019-07-30 | A kind of low power consumption insulation gate regions bipolar junction transistor |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009176891A (en) * | 2008-01-23 | 2009-08-06 | Fuji Electric Device Technology Co Ltd | Semiconductor device |
| US20120061726A1 (en) * | 2010-09-09 | 2012-03-15 | Denso Corporation | Lateral insulated-gate bipolar transistor |
| CN106876455A (en) * | 2017-02-28 | 2017-06-20 | 电子科技大学 | A kind of double trench gate SOI LIGBT device architectures of low turn-off power loss |
| CN107170815A (en) * | 2017-05-11 | 2017-09-15 | 电子科技大学 | A kind of landscape insulation bar double-pole-type transistor |
-
2019
- 2019-07-30 CN CN201910692880.6A patent/CN110299406A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009176891A (en) * | 2008-01-23 | 2009-08-06 | Fuji Electric Device Technology Co Ltd | Semiconductor device |
| US20120061726A1 (en) * | 2010-09-09 | 2012-03-15 | Denso Corporation | Lateral insulated-gate bipolar transistor |
| CN106876455A (en) * | 2017-02-28 | 2017-06-20 | 电子科技大学 | A kind of double trench gate SOI LIGBT device architectures of low turn-off power loss |
| CN107170815A (en) * | 2017-05-11 | 2017-09-15 | 电子科技大学 | A kind of landscape insulation bar double-pole-type transistor |
Non-Patent Citations (1)
| Title |
|---|
| HANG MENG,ET.AL: "A low loss SOI lateral trench IGBT and superjunction device with insulated trench barrier", 《2014 12TH IEEE INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED CIRCUIT TECHNOLOGY (ICSICT)》 * |
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