CN110223655A - Gate driving circuit and display device - Google Patents
Gate driving circuit and display device Download PDFInfo
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- CN110223655A CN110223655A CN201910574123.9A CN201910574123A CN110223655A CN 110223655 A CN110223655 A CN 110223655A CN 201910574123 A CN201910574123 A CN 201910574123A CN 110223655 A CN110223655 A CN 110223655A
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- 241001269238 Data Species 0.000 claims description 3
- 238000005265 energy consumption Methods 0.000 abstract description 8
- 239000004973 liquid crystal related substance Substances 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 10
- 230000000694 effects Effects 0.000 description 6
- 238000004140 cleaning Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
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- 238000005516 engineering process Methods 0.000 description 2
- 239000011521 glass Substances 0.000 description 2
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- 230000002093 peripheral effect Effects 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
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- 238000002834 transmittance Methods 0.000 description 1
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3696—Generation of voltages supplied to electrode drivers
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
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- Crystallography & Structural Chemistry (AREA)
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- Computer Hardware Design (AREA)
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- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Abstract
The invention discloses a kind of gate driving circuits, including multistage drive element of the grid, first auxiliary unit, and second auxiliary unit, first auxiliary unit is coupled to before multistage drive element of the grid, and the second auxiliary unit is coupled to after multistage drive element of the grid, wherein, in first waiting interval in each frame period, multiple control signal and multiple gate drive signals are reset to reset level under the control of reset signal by multistage drive element of the grid.Energy consumption is reduced, the number of enabling signal is reduced, and the removing of noise has been carried out to entire circuit in waiting interval, circuit has been simplified, conducive to the realization of display device narrow frame.
Description
Technical field
The present invention relates to field of display technology, and in particular to a kind of gate driving circuit and display device.
Background technique
Liquid crystal display device is change the phenomenon that being changed under the action of electric field using the orientation of liquid crystal molecule
The display device of light source light transmittance.Due to having the advantages that display is high-quality, small in size and low in energy consumption, liquid crystal display device is
It is widely used in the mobile terminal of such as mobile phone and the large scale display panel of such as flat panel TV.Liquid on existing market
Crystal display is largely projection-type liquid crystal display comprising liquid crystal display panel and backlight module (backlight module).
The working principle of liquid crystal display panel is liquid crystal molecule to be placed among the parallel glass substrate of two panels, and apply on two panels glass substrate
Add driving voltage to control the direction of rotation of liquid crystal molecule, generation picture is modulated to the luminous of backlight module.
The development of liquid crystal display device in recent years presents the development trend of high integration, low cost, integrative display
Driving is increasingly becoming the research hotspot of flat panel display.So-called integrative display driving circuit refers to gate driving circuit and source
The peripheral circuits such as pole driving circuit are realized together with pixel switch pipe using switching tube (Thin Film Transistor, TFT)
It is made in TFT substrate.It compares with traditional circuit (IC) driving method, can not only be subtracted using the method for integrated gate driving
The quantity and its press seal program of few peripheral driver chip reduce cost, and make display periphery more slim, so that display
Device mould group is more compact, and mechanically and electrically reliability is enhanced.
The basic functional principle of liquid crystal display panel and driving circuit are as follows: gate driving circuit is upper by what is be electrically connected with grid line
Pull transistor sends out gate drive signal to grid line, sequentially opens the TFT of every a line, then simultaneously by source electrode drive circuit
The pixel unit of one full line is charged to respectively required voltage, to show different grayscale.I.e. first by the grid of the first row
Driving circuit, which passes through to pull up transistor, opens the thin film transistor (TFT) of the first row, then by source electrode drive circuit to the picture of the first row
Plain unit charges.When the pixel unit of the first row is charged, gate driving circuit just closes the row thin film transistor (TFT), so
The gate driving circuit of the second row is pulled up transistor by it and opens the thin film transistor (TFT) of the second row afterwards, then by source drive electricity
It charges to the pixel unit of the second row on road.So sequentially go down, when the pixel unit for last line of having substituted the bad for the good, just again
It charges to the pixel unit of the first row.
In the prior art, it mostly uses two sets of pull-down circuits to work alternatively, the upper of frame head is done using enabling signal STV signal
The drop-down with postamble is drawn, the number that this results in the switch transistor T FT that gate driving circuit uses is more, and the area of occupancy is also opposite
It is larger, it is unfavorable for the narrow frame design of liquid crystal display device；The number of enabling signal STV is more in circuit simultaneously, is unfavorable for essence
Simple circuit.
Therefore, it is necessary to provide improved technical solution to overcome the above technical problem existing in the prior art.
Summary of the invention
In order to solve the above-mentioned technical problems, the present invention provides a kind of gate driving circuit and display devices, reduce energy
Consumption, reduces the number of enabling signal, and carried out the removing of noise to entire circuit in waiting interval, has simplified electricity
Road, conducive to the realization of display device narrow frame.
A kind of gate driving circuit provided according to the present invention characterized by comprising multistage drive element of the grid is used
In generating multiple control signal, and root according to pre-driver signal and postposition driving signal in the sweep interval in each frame period
Corresponding multiple gate drive signals are provided according to the multiple control signal；First auxiliary unit is coupled to the multistage grid
Before driving unit, believe for providing the pre-driver according to reset signal in first waiting interval in each frame period
Number；And second auxiliary unit, it is coupled to after the multistage drive element of the grid, for being waited the second of each frame period
The postposition driving signal is provided according to the reset signal in section, wherein in first Accreditation Waiting Area in each frame period
In, the multistage drive element of the grid is under the control of the reset signal by the multiple control signal and the multiple grid
The resetting of pole driving signal.
Preferably, first waiting interval of second waiting interval in each frame period and adjacent next frame period
Overlapping.
Preferably, every grade of drive element of the grid includes: pull-up module, is connect with first node, according to pull up signal and height
Level signal charges to first node, to generate the same level control signal；First output module, with the pull-up module phase
It is connected in the first node, the same level gate drive signal is generated according to clock signal；Second output module, with the pull-up module
It is connected in the first node, the same level transmitting signal is generated according to clock signal；Pull-down module is connect with the first node,
Described the same level control signal is pulled down to low level according to pulldown signal；And drop-down maintenance module, with the first node, sheet
Grade transmitting signal output end, the same level gate drive signal output end, higher level's transmitting signal input part, higher level's gate drive signal are defeated
Enter end and the connection of higher level's control signal input, receive first voltage signal or second voltage signal, and when receiving
The same level and supervisory each output signal and control signal are maintained at low level when voltage signal is high level signal, wherein institute
Stating one of first voltage signal and the second voltage signal is high level signal, wherein another is low level signal,
One of the first voltage signal and the second voltage signal are received by the drive element of the grid of odd level,
In another drive element of the grid by even level receive.
Preferably, the pull-up module includes: the 11st switching tube, and control terminal receives the pull up signal, the first access
End receives the high level signal, and alternate path end is connect to export the control signal with the first node.
Preferably, first output module includes: second switch, and control terminal is connect with the first node, and first
For receiving the clock signal, alternate path end is connect with output end to export the same level gate drive signal path terminal；
First capacitor is connected between the control terminal of the second switch and alternate path end.
Preferably, second output module includes: the 5th switching tube, and control terminal is connect with the first node, and first
Path terminal is connect with output end for receiving the clock signal, alternate path end to export the same level transmitting signal.
Preferably, the pull-down module includes: the tenth switching tube, and control terminal receives the pulldown signal, the first path terminal
It is connect with the first node, alternate path end is for receiving second low level signal.
Preferably, the drop-down maintenance module includes: the 12nd switching tube, and control terminal and the first path terminal are all connected with voltage
Signal input part, alternate path end connect second node；7th switching tube, control terminal connect the second node, the first access
End connects the first node, and alternate path end connects the second low level signal input terminal；First switch tube, control terminal connect institute
First node is stated, the first path terminal connects the second node, and alternate path end connects the second low level signal input terminal；
9th switching tube, the control terminal connection second node, the first path terminal connection the second low level signal input terminal, second
Path terminal connects the same level transmitting signal output end；8th switching tube, control terminal connect the second node, and the first path terminal passes through
9th switch transistor T 9 connects the second low level signal input terminal, and alternate path end connects higher level and transmits signal input
End；4th switching tube, control terminal connect the second node, and the first path terminal connects the same level gate drive signal output end, the
Two path terminals connect the first low level signal input terminal；Third switching tube, control terminal connect the second node, the first path terminal
Higher level's gate drive signal input terminal is connected, alternate path end connects described the same level and transmits signal output end；6th switching tube, control
End processed connects the second node, and the first path terminal connects higher level's control signal input, and alternate path end connects described the same level
Transmit signal output end.
Preferably, the drop-down maintenance module further include: the 13rd switching tube, control terminal connect reset signal input terminal,
First path terminal connects the same level gate drive signal output end, and alternate path end connects the first low level signal input terminal；Tenth
Four switching tubes, control terminal connect the reset signal input terminal, and the first path terminal connects the first node, and alternate path end connects
Connect the second low level signal input terminal.
A kind of display device provided according to the present invention characterized by comprising above-mentioned gate driving circuit is used for
Multiple gate drive signals are provided；Source electrode drive circuit, for providing multiple luma datas；And display panel, the display
Panel includes the multiple pixel units and a plurality of grid line and multiple data lines for being arranged in array, wherein the display panel
The multiple gate drive signal is received via a plurality of grid line, so that the multiple pixel unit is selected by row, and
The multiple luma data is received by column via the multiple data lines, to be supplied to selected pixel unit to realize image
Display.
The beneficial effects of the present invention are: the present invention reduces grid by the modification to drive element of the grid working method
The quantity of required switch transistor T FT, is conducive to the realization of display device narrow frame in driving unit.Simultaneously in operating circuit head and the tail two
The auxiliary units of several ranks is respectively done at end, using the time of auxiliary unit work as waiting interval, when by the drop-down in former frame period
Between and a later frame period pull-up time-interleaving, reduce the number of required enabling signal, simplify circuit structure；And this is opened
Dynamic signal can also carry out noise cleaning to entire circuit in the waiting interval of circuit, optimize display effect.
The present invention can be simultaneously to each output signal of the drive element of the grid of the same level and upper level by first voltage signal
It is pulled down, therefore the first voltage signal of high level, the grid of antithesis several levels can be provided to the drive element of the grid of odd level
Pole driving unit provides low level second voltage signal, so only needs the drop-down maintenance module for opening half, so that it may realize
The low pressure of each output signal in entire circuit is maintained, energy consumption is further reduced.Circuit can also be believed by first voltage simultaneously
Number and second voltage signal realize frame data switching.
Detailed description of the invention
By referring to the drawings to the description of the embodiment of the present invention, above-mentioned and other purposes of the invention, feature and
Advantage will be apparent from.
Fig. 1 shows a kind of easy structure schematic diagram of display device provided in an embodiment of the present invention；
Fig. 2 shows the working timing figures of gate driving circuit provided in an embodiment of the present invention；
Fig. 3 shows the structural schematic diagram of part gate driving circuit in Fig. 1；
Fig. 4 shows the circuit diagram of drive element of the grid provided in an embodiment of the present invention；
Fig. 5 shows the working timing figure of drive element of the grid provided in an embodiment of the present invention；
Fig. 6 shows the analog result schematic diagram of gate driving circuit provided in an embodiment of the present invention.
Specific embodiment
To facilitate the understanding of the present invention, a more comprehensive description of the invention is given in the following sections with reference to the relevant attached drawings.In attached drawing
Give presently preferred embodiments of the present invention.But the present invention can be realized by different forms, however it is not limited to be retouched herein
The embodiment stated.Opposite, purpose of providing these embodiments is keeps the understanding to the disclosure more thorough complete
Face.
Unless otherwise defined, all technical and scientific terms used herein and belong to technical field of the invention
The normally understood meaning of technical staff is identical.Used term is intended merely to description specifically in the description of the invention herein
Embodiment purpose, it is not intended that in limitation the present invention.
In the following, referring to attached drawing, the present invention is described in detail.
Fig. 1 shows a kind of easy structure schematic diagram of display device provided in an embodiment of the present invention.
In the present embodiment, display device, which is arranged or is connected to such as personal computer, tablet computer, individual digital, to be helped
The electronic products such as reason, mobile phone, camera and TV.As shown in Figure 1, display device includes array of display 100, gate driving circuit
200 and source electrode drive circuit 300.
Array of display 100 includes multi-strip scanning line SL1~SLn, multiple data lines DL1~DLm and multiple pixel units
P11~Pnm, wherein m, n respectively represent the quantity of scan line and data line, and m, n are all positive integer.In the present embodiment, it sweeps
It retouches and is parallel to each other between line SL1~SLn, be parallel to each other between data line DL1~DLm, and data line DL1~DLm is perpendicular to
Scan line SL1~SLn.Pixel unit P11~Pnm is respectively arranged at interlocking for scan line SL1~SLn and data line DL1~DLm
Place, and each pixel unit P11~Pnm is coupled to corresponding scan line and data line.For example, pixel unit P11 is coupling
It is bonded to scan line SL1 and data line DL1；Pixel unit Pnm is coupled to scan line SLn and data line DLm, and so on.Picture
Plain unit P11~Pnm may include any is suitble to using luminescence component of the invention, such as light emitting diode (light
Emitting diode, LED), Organic Light Emitting Diode (organic light emitting diode, OLED), miniature hair
Optical diode (such as mini LED, micro LED) etc..
Source electrode drive circuit is coupled to multiple data lines DL1~DLm, for providing multiple luma datas.
Gate driving circuit 200 is coupled to multi-strip scanning line SL1~SLn.Gate driving circuit 200 includes that multistage grid drives
Moving cell 210, first auxiliary (dummy) unit 220 and the second auxiliary unit 230.Drive element of the grid 210 include A1~
An。
Wherein, the output end quantity of multistage drive element of the grid 210 is identical as the quantity of scan line, in each frame week
Multiple control signal is generated according to pre-driver signal and postposition driving signal in the sweep interval of phase, and according to the multiple control
Signal processed provides corresponding multiple gate drive signals；First auxiliary unit 220 be coupled to multistage drive element of the grid 210 it
Before, for providing pre-driver signal according to reset signal in first waiting interval in each frame period；Second auxiliary unit
230 are coupled to after multistage drive element of the grid 210, in second waiting interval in each frame period according to reset signal
Postposition driving signal is provided.
Further, in a preferred embodiment of the invention, it is coupled with before multistage drive element of the grid 210 more
First auxiliary unit 220 of grade is coupled with the second multistage auxiliary unit 230 after multistage drive element of the grid 210.For
Drive element of the grid 210 at different levels can be controlled by preceding k grades of drive element of the grid 210 and be started, by latter i grades of gate driving list
210 control of member stops.Wherein, k, i are positive integer.
It should be noted that the driving relationship between above-mentioned each drive element of the grid and each auxiliary unit is only of the invention
A kind of embodiment in other embodiments of the invention can be according to each gate driving of the appropriate adjustments such as specific panel layout
Driving relationship between unit and each auxiliary unit, is not described herein.
Further, the number of the value of k and each first auxiliary unit 220 before multistage drive element of the grid 210
Measure equal, the numerical value of i is equal with the quantity of each second auxiliary unit 230 being located at after multistage drive element of the grid 210, and i
Exemplary values related with the quantity of clock signal clk in circuit to the value of k, being not limited in the present embodiment.
In the present embodiment, the first auxiliary unit 220 and the second auxiliary unit 230 and drive element of the grid 210 at different levels
Circuit structure is identical.Although circuit structure is identical, drive element of the grid 210 at different levels and the first auxiliary unit 220 and
The size of component in two auxiliary units 230 can be identical or not identical.For example, in one embodiment, gate driving lists at different levels
The breadth length ratio of the transistor of the output subelement of member 210 can be greater than or equal to each first auxiliary unit 220 and each second auxiliary is single
The breadth length ratio of the transistor of the output subelement of member 230.Such configuration may make drive element of the grid 210 at different levels to be capable of providing
Output with larger current value, to drive pixel unit P11~Pnm on scan line SL1~SLn, and auxiliary unit B/C is mentioned
The output of confession need only can be delivered to next stage drive element of the grid, therefore can reduce the area of layout.
With reference to Fig. 2, Fig. 2 shows the working timing figures of gate driving circuit provided in an embodiment of the present invention.As shown in Fig. 2,
Each frame period can be divided into waiting interval (including the first waiting interval and second waiting interval) and sweep interval.Grids at different levels drive
Dynamic circuit reset control signal and gate drive signal in the first waiting interval, and utilize the first auxiliary unit and the second auxiliary
Unit generates pre-driver signal and postposition driving signal respectively；Gate driving circuits at different levels provide multiple be used in sweep interval
Drive the gate drive signal of pixel unit.
Further, second waiting interval in each frame period is Chong Die with first waiting interval in adjacent next frame period.
In the present embodiment, multistage the first auxiliary unit 220 and multistage second auxiliary is respectively done at operating circuit head and the tail both ends
Unit 230 is helped, using the time of the first auxiliary unit 220 and the work of multistage second auxiliary unit 230 as waiting interval, with
By the pull-up time-interleaving of the fall times in former frame period and a later frame period, reduce the number of required enabling signal, letter
Circuit structure is changed.
With reference to Fig. 3 and Fig. 4, with k be equal to for 4, i is equal to 2 to the structure of drive element of the grid in gate driving circuit into
Row explanation, Fig. 3 show the structural schematic diagram of part gate driving circuit in Fig. 1.
As shown in figure 3, in one embodiment of the invention, gate driving circuit 200 is one-sided configuration.Of the invention
In another embodiment, gate driving circuit 200 is sided configuration, and multistage drive element of the grid 210 includes two groups of gate drivings
Unit, and it is respectively arranged at the left and right sides of display panel.It is said by taking the gate driving circuit of one-sided configuration 200 as an example below
It is bright.
In the present embodiment, drive element of the grid 210 at different levels include: clock signal input terminal 1, high level signal input terminal
2, the first low level signal input terminal 3, reset signal input terminal 4, the second low level signal input terminal 5, voltage signal inputs
6, higher level transmits signal input part 7, pull up signal input terminal 13, pulldown signal input terminal 14, the input of higher level's gate drive signal
End 8, higher level's control signal input 9, the same level transmitting signal output end 10, the same level gate drive signal output end 11 and the same level
Control signal output 12, grid of the same level gate drive signal output end for pixel unit in output driving display panel drive
Dynamic signal.
Specifically, the clock signal input terminal 1 of n-th grade of drive element of the grid 210, for receiving corresponding the same level clock letter
Number CLK；High level signal input terminal 2, for receiving high level signal VGH；First low level signal input terminal 3, for receiving
First low level signal VGL；Reset signal input terminal 4, for receiving reset signal RST；Second low level signal input terminal 5,
For receiving the second low level signal VSQ；Voltage signal inputs 6, for receiving first voltage signal V1 or second voltage letter
Number V1 '；Higher level transmits signal input part 7, for receiving the transmitting signal of (n-1)th grade of gate driving circuit output；Pull up signal
Input terminal 13, for receiving the transmitting signal of the n-th -4 grades gate driving circuits output, using as the upper of the same level drive element of the grid
Draw signal；Pulldown signal input terminal 14, for receiving the transmitting signal of the n-th+2 grades gate driving circuits output, using as the same level
The pulldown signal of drive element of the grid；Higher level's gate drive signal input terminal 8, it is defeated for receiving (n-1)th grade of gate driving circuit
Gate drive signal out；Higher level's control signal input 9, for receiving the control letter of (n-1)th grade of gate driving circuit output
Number；The same level transmits signal output end 10, exports n-th grade of transmitting signal Zn；The same level gate drive signal output end 11, output n-th
Grade gate drive signal Gn；The same level control signal output 12 exports n-th grade of control signal Qn.
Further, one of first voltage signal V1 and second voltage signal V1 ' are high level signal, wherein separately
One is low level signal.Meanwhile one of first voltage signal V1 and second voltage signal V1 ' are driven by the grid of odd level
Moving cell 210 receives, wherein another received by the drive element of the grid 210 of even level.In a preferred embodiment of the present invention
In, first voltage signal V1 is high level signal, and second voltage signal V1 ' is low level signal；The gate driving list of odd level
Member 210 receives first voltage signal V1, and the drive element of the grid 210 of even level receives second voltage signal V1 '.
Preferably, gate driving circuit disclosed in this invention can pass through first voltage signal V1 and second voltage signal
V1 ' realizes the switching between frame data.
It should be noted that n involved in chip pin port and various types of signal described in Fig. 3 is only for convenience
The title reference for describing and carrying out.As in (n-1)th grade, the n-th -4 grades and the n-th+2 grades etc of description, n also with specific value
It is unrelated, only represent the respective drive chip of previous stage on the basis of the same level driving chip, preceding level Four and rear two-stage.In addition,
The signal wire CLKn of the clock signal input terminal CLK connection of each chip representation signal bus here, for being not at the same level
Drive element of the grid is respectively increased corresponding clock signal, and for example kth grade drive element of the grid provides clock signal clk k, is the
K+1 grades of drive element of the grid provide clock signal clk k+1, provide clock signal clk k+2 for+2 grades of drive element of the grid of kth
Deng.
Further, in Fig. 3 be only part of grid pole driving unit between connection relationship diagram, each gate driving list
Member is respectively used to provide corresponding gate drive signal for the pixel unit in display panel, such as Gk, Gk+1, Gk+2 and Gk+
3.It is readily comprehensible, it can refer to the drive element of the grid that the connection relationship between the drive element of the grid in Fig. 1 associates other grades out
Between connection relationship, do not remake excessive explanation herein.
Preferably, reset signal RST is also that the pull up signal of the first auxiliary unit of the first order and afterbody second assist
The pulldown signal of unit.
Further, each first auxiliary unit 220, each second auxiliary unit 230 and the part of grid pole in Fig. 1 are driven
For moving cell, transmitting signal of the above-mentioned pull up signal input terminal to receive the output of upper level gate driving circuit, by upper
Pull up signal of the transmitting signal of level-one gate driving circuit output as the same level gate driving circuit；Above-mentioned pulldown signal input
The transmitting signal to receive the output of next stage gate driving circuit is held, with the transmitting letter exported by next stage gate driving circuit
Pulldown signal number as the same level gate driving circuit.And for each first auxiliary unit 220 and the second auxiliary unit 230
It says, the gate drive signal input terminal of the same level gate drive signal output end and upper level can be not provided with, to save layout
Space and cost.
Fig. 4 shows the circuit diagram of drive element of the grid provided in an embodiment of the present invention.
As shown in figure 4, drive element of the grid 210 includes pull-up module 211 interconnected, and first is defeated in the present embodiment
Module 212 out, the second output module 213, pull-down module 214 and drop-down maintenance module 215.
The input terminal of pull-up module 211 is for receiving pull up signal and high level signal VGH, output end and first node Q
Connection, for being pre-charged according to pull up signal to first node Q to generate the same level control signal.
In the present embodiment, pull-up module 211 includes the 11st switch transistor T 11, and the control terminal of the 11st switch transistor T 11 receives
The i.e. preceding level Four of pull up signal transmits signal Zn-4, and the first path terminal receives high level signal VGH, and alternate path end and the same level control
Signal output end, that is, first node Q connection.
First output module 212 is connected to first node Q with pull-up module 211, generates the same level grid according to clock signal clk
Pole driving signal Gn.
In the present embodiment, the first output module 212 includes second switch T2 and first capacitor C1, second switch T2's
Control terminal is connect with first node Q, the first path terminal for receiving clock signal clk, alternate path end connect with output end with
Export the same level gate drive signal Gn.First capacitor C1 is connected between the control terminal of second switch T2 and alternate path end.
Wherein, first capacitor C1 is the parasitic capacitance between the control terminal and alternate path end of second switch T2.Certainly,
It will be appreciated by those skilled in the art that can also be arranged between the control terminal and alternate path end of second switch T2
Separate storage capacitor, at this point, first capacitor C1 is the parasitic capacitance between the control terminal and alternate path end of second switch T2
The sum of with separate storage capacitor.
Second output module 213 is connected to first node Q with pull-up module 211, generates the same level according to clock signal clk and passes
Delivery signal Zn.
In the present embodiment, the second output module 213 includes the 5th switch transistor T 5, the control terminal and first of the 5th switch transistor T 5
Node Q connection, the first path terminal are connect with output end for receiving clock signal clk, alternate path end to export the same level transmitting
Signal Zn.
Preferably, the transmitting signal with the first auxiliary unit 220 output of multistage drive element of the grid 210 coupling is preposition
Driving signal, for controlling the multistage starting of drive element of the grid 210 or pull-up；With the of the coupling of multistage drive element of the grid 210
The transmitting signal of two auxiliary units 230 output is postposition driving signal, for control multistage drive element of the grid 210 stop or under
It draws.
Pull-down module 214 is connect with first node Q, while receiving pulldown signal and the second low level signal VSQ, is used for root
The second low level signal VSQ is provided to first node Q to drag down the current potential of first node Q according to pulldown signal.
In embodiment itself, pull-down module 214 includes the tenth switch transistor T 10, after the control terminal of the tenth switch transistor T 10 receives
The transmitting signal Zn+2 of two-stage, the first path terminal are connect with first node Q, and alternate path end is for receiving the second low level signal
VSQ.When the transmitting signal Zn+2 of rear two-stage is high level, the conducting of the tenth switch transistor T 10 mentions the second low level signal VSQ
First node Q is supplied to drag down the current potential of first node Q.
Maintenance module 215 is pulled down to believe with the same level control signal output, higher level's control signal input, the same level transmitting respectively
Number output end, higher level transmit signal input part, the same level gate drive signal output end and higher level's gate drive signal input terminal and connect
It connects, for receiving first voltage signal V1 or second voltage signal V1 ', the first low level signal VGL and the second low level letter
Number VSQ, when voltage signal V1 or the V1 ' received is high level signal, the first low level signal VGL is provided to this
Grade gate drive signal output end, and the second low level signal VSQ is provided to the same level control signal output, higher level's control letter
Number input terminal, the same level transmitting signal output end, higher level transmit signal input part and higher level's gate drive signal input terminal, incite somebody to action this
Grade control signal Q, higher level control signal Qn-1, the same level transmitting signal Zn, higher level's transmitting signal Zn-1, the same level gate drive signal
Gn and higher level's gate drive signal Gn-1 maintain low level state.
Further, when receiving the low level signal in first voltage signal V1 and second voltage signal V1 ', drop-down
Maintenance module 215 does not start.
In the present embodiment, drop-down maintenance module 215 includes multiple switch pipe, wherein the control terminal of the 12nd switch transistor T 12
Voltage signal inputs are all connected with the first path terminal, alternate path end connects second node QB, to when the electricity received
When pressure signal V1 or V1 ' is high level signal, by second node QBCurrent potential be pulled to high level.The control of 7th switch transistor T 7
End connection second node QB, the first path terminal connection first node Q, the second low level signal input terminal of alternate path end connection,
For in second node QBThe current potential of first node Q maintained when for high level equal with the second low level signal VSQ low
Current potential.The control terminal of first switch tube T1 connects first node Q, and the first path terminal connects second node QB, alternate path end connects
The second low level signal input terminal is connect, is used for second node Q when first node Q is high levelBCurrent potential maintain and the
Two low level signal VSQ equal low potential, shutdown drop-down maintenance module 215, i.e., preceding level Four transmitting signal Zn-4 is high level
When, drop-down maintenance module 215 is turned off by first switch tube T1.The control terminal of 9th switch transistor T 9 connects second node QB, the
One path terminal connects the second low level signal input terminal, and alternate path end connects the same level transmitting signal output end, to second
Node QBFor the same level transmitting signal Zn is maintained the low potential equal with the second low level signal VSQ when high potential.8th opens
The control terminal for closing pipe T8 connects second node QB, the first path terminal by the 9th switch transistor T 9 connect the second low level signal input
End, alternate path end connects higher level and transmits signal input part, in second node QBFor higher level is transmitted signal when high potential
Zn-1 maintains the low potential equal with the second low level signal VSQ.The control terminal of 4th switch transistor T 4 connects second node QB,
First path terminal connects the same level gate drive signal output end, and alternate path end connects the first low level signal input terminal, to
In second node QBFor the same level gate drive signal Gn to be maintained to the low electricity equal with the first low level signal VGL when high potential
Position.The control terminal of third switch transistor T 3 connects second node QB, the first path terminal connection higher level's gate drive signal input terminal, the
Two path terminals connect the same level transmitting signal output end, i.e., connect the second low level signal input terminal by the 9th switch transistor T 9, use
In second node QBHigher level's gate drive signal Gn-1 maintained when for high potential equal with the second low level signal VSQ
Low potential.The control terminal of 6th switch transistor T 6 connects second node QB, the first path terminal connection higher level's control signal input, the
Two path terminals connect the same level transmitting signal output end, i.e., connect the second low level signal input terminal by the 9th switch transistor T 9, use
In second node QBFor higher level's control signal Qn-1 is maintained the low electricity equal with the second low level signal VSQ when high potential
Position.
It should be noted that the same level control signal output described herein corresponds to first node Q, the same level control
Signal corresponds to the electric potential signal on first node Q.Similarly, higher level controls signal and corresponds on the first node Qn-1 of upper level
Electric potential signal.Further, above-mentioned pull up signal is the enabling signal for driving drive element of the grid at different levels to start to work, on
Stating pulldown signal is the stop signal for driving drive element of the grid at different levels to stop working；It is connected with the first auxiliary unit 220
The pull-up or enabling signal of part of grid pole driving unit 210 correspond to the pre-driver signal of the first auxiliary unit 220 output, with
The drop-down of the connected part of grid pole driving unit 210 of second auxiliary unit 230 or stop signal correspond to the second auxiliary unit 230
The postposition driving signal of output.
The embodiment of the present invention can be by each output signal (the same level/upper level gate drive signal, sheet of the same level and upper level
Grade/upper level transmitting signal and the same level/upper level controls signal Q) current potential pull down maintenance module 215 with level-one and carry out low electricity
It is flat to keep, so only need the drop-down maintenance module 215 for opening half, so that it may realize in entire circuit each output signal it is low
Pressure maintains, and helps to reduce energy consumption.
Preferably, the first low level signal VGL and the second low level signal VSQ is two different low electricity of reference of current potential
Pressure.The present embodiment can satisfy unlike signal in the gate driving circuit by the low voltage signal of two different potentials of setting
It is different require, improve drive effect on the basis of, also reduce energy consumption.
Further, drop-down maintenance module 215 further includes the 13rd switch transistor T 13 and the 14th switch transistor T 14.13rd
The control terminal of switch transistor T 13 connects reset signal input terminal, and the first path terminal connects the same level gate drive signal output end, and second
Path terminal connects the first low level signal input terminal, to when reset signal RST is high level by the same level gate drive signal
Gn maintains the low potential equal with the first low level signal VGL.The control terminal connection reset signal of 14th switch transistor T 14 is defeated
Enter end, the first path terminal connects first node Q, and alternate path end connects the second low level signal input terminal, to believe in resetting
The current potential of first node Q is maintained the low potential equal with the second low level signal VSQ when being high level by number RST.
Preferably, in the present embodiment, reset signal RST is the pull up signal of the first auxiliary unit of the first order 220 and last
The pulldown signal of the second auxiliary unit of level-one 230, therefore, reset signal RST is only in the postamble drop-down that previous frame image is shown
Between and frame head pull-up time for show of this frame image for high level, so in first Accreditation Waiting Area in each frame period in the present embodiment
In, multistage drive element of the grid 210 carries out noise cleaning to entire driving circuit under the control of reset signal RST, i.e., will
Multiple control signal Qn and multiple gate drive signal Gn resets to reset level, and then optimizes the display effect that image is shown.
Further, above-mentioned reset level is the original levels of multiple control signal Qn and multiple gate drive signal Gn.
Further, the working time of auxiliary unit described in above-mentioned first waiting interval corresponding diagram 1, i.e. former frame
The overlapping time section for the pull-up time that the fall times and a later frame image that image is shown are shown.
It is illustrated in conjunction with concrete operating principle of the Fig. 5 to the drive element of the grid in the present embodiment, Fig. 5 shows the present invention
The working timing figure for the drive element of the grid that embodiment provides.
As shown in figure 5, a duty cycle of each drive element of the grid 210 includes four periods: being used in the present embodiment
1., for exporting the same level gate drive signal Gn and the same level transmitting believe in the first time period being pre-charged to first node Q
The third period of the second time period of number Zn 2., for being pulled down to the same level gate drive signal Gn is 3. and to second
Node QBIt is pulled up and is 4. carried out the 4th period of low-voltage maintenance to signal each in circuit.
Wherein, first time period 1. in, pull up signal i.e. before level Four transmitting signal Zn-4 be high level, the 14th switch
Pipe T14 conducting, the transmitting signal Zn+2 of rear two-stage are low level, and the shutdown of the tenth switch transistor T 10, first node Q is raised supreme
High potential corresponding to level signal VGH, second switch T2 and the conducting of the 5th switch transistor T 5.Clock signal clk is low at this time
Level, therefore, the same level gate drive signal Gn and the same level transmitting signal Zn output are low level, and first switch tube T1 is connected, the
Two node QBCurrent potential be pulled down to the second low level signal VSQ and correspond to current potential, drop-down maintenance module 215 turns off.
Second time period 2. in, pull up signal i.e. before level Four transmitting signal Zn-4 become low level, the 14th switching tube
T14 shutdown, first capacitor C1 electric discharge, to higher current potential, second switch T2 and the 5th is switched the ground of first node Q
Pipe T5 is sufficiently conductive, and clock signal clk is high level, so the same level gate drive signal Gn and the same level transmitting signal Zn output are
High level.
In time period, the transmitting signal Zn+2 of rear two-stage is still low level, the shutdown of the tenth switch transistor T 10, second node
QBCurrent potential be low level.
The third period 3. in, first capacitor C1 discharge off, the current potential of first node Q reduces, but second opens at this time
It closes pipe T2 and the 5th switch transistor T 5 is still connected, clock signal clk becomes low level, therefore the same level gate drive signal Gn and sheet
Grade transmitting signal Zn output is low level.
In time period, the transmitting signal Zn+2 of rear two-stage is still low level, the shutdown of the tenth switch transistor T 10, second node
QBCurrent potential be low level.
The 4th period 4. in, the current potential of first node Q further decreases, and the transmitting signal Z (n+2) of rear two-stage is
High level, the conducting of the tenth switch transistor T 10, the current potential of first node Q Xia La not be low level, first switch tube TI shutdown.When for
When the drive element of the grid of even level, low level second voltage signal V1 ', the shutdown of the 12nd switch transistor T 12, the second section are received
Point QBCurrent potential be level, drop-down maintenance module 215 do not start.When for the drive element of the grid of odd level, high level is received
First voltage signal V1, the 12nd switch transistor T 12 conducting, second node QBCurrent potential be pulled high to high level, drop-down maintains
Module 215 starts, and the 7th switch transistor T 7 conducting, first node Q maintains low level state.Third switch transistor T the 3, the 4th simultaneously
Switch transistor T 4, the 6th switch transistor T 6, the 8th switch transistor T 8 and the conducting of the 9th switch transistor T 9, control signal Qn-1, the same level for higher level
Transmitting signal Zn, higher level's transmitting signal Zn-1, the same level gate drive signal Gn and higher level's gate drive signal Gn-1 maintain low
Level state.
This embodiment reduces the quantity of the switch transistor T FT needed for drive element of the grid, are conducive to lesser narrow frame and set
Meter.Simultaneously the first voltage signal of high level, the gate driving of antithesis several levels can be provided to the drive element of the grid of odd level
Unit provides low level second voltage signal, it is only necessary to open the drop-down maintenance module of half, so that it may realize to entire circuit
In each output signal low pressure maintain, further reduce energy consumption.
Fig. 6 shows the analog result schematic diagram of gate driving circuit provided in an embodiment of the present invention.
As shown in fig. 6, gate driving circuit disclosed in the present embodiment has good operational effect, adjacent two are being carried out
When opening image data driving, the waiting interval between previous frame postamble and this frame frame head corresponds to technology provided by the present invention
The runing time of (dummy) unit is assisted in scheme, while noise cleaning is carried out to circuit in the waiting interval, so that driving
The output voltage of circuit is steadily clean, further improves the display effect of display device.
To sum up, the technical solution disclosed in the embodiment of the present invention is opened needed on the one hand reducing in drive element of the grid
The quantity for closing pipe, is conducive to the realization of display device narrow frame.The auxiliary list of several ranks is respectively made at operating circuit head and the tail both ends simultaneously
Member, it is upper by the fall times in former frame period and a later frame period using the time of auxiliary unit work as waiting interval
Time-interleaving is drawn, reduces the number of required enabling signal, simplifies circuit structure；And the enabling signal is (corresponding herein
Reset signal) can also in the waiting interval of circuit to entire circuit carry out noise cleaning, optimize display effect.It is another
Aspect, the present invention can provide the first voltage signal of high level, the grid of antithesis several levels to the drive element of the grid of odd level
Driving unit provides low level second voltage signal, it is only necessary to open the drop-down maintenance module of half, so that it may realize to entire
The low pressure of each output signal maintains in circuit, further reduces energy consumption.
It should be noted that herein, contained the terms "include", "comprise" or its any other variant are intended to
Non-exclusive inclusion, so that the process, method, article or equipment including a series of elements is not only wanted including those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or equipment
Intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in process, method, article or equipment including the element.
Finally, it should be noted that obviously, the above embodiment is merely an example for clearly illustrating the present invention, and simultaneously
The non-restriction to embodiment.For those of ordinary skill in the art, it can also do on the basis of the above description
Other various forms of variations or variation out.There is no necessity and possibility to exhaust all the enbodiments.And thus drawn
The obvious changes or variations that Shen goes out are still in the protection scope of this invention.
Claims (10)
1. a kind of gate driving circuit characterized by comprising
Multistage drive element of the grid, for being believed in the sweep interval in each frame period according to pre-driver signal and postposition driving
Number generate multiple control signal, and according to the multiple control signal provide accordingly multiple gate drive signals；
First auxiliary unit is coupled to before the multistage drive element of the grid, in first Accreditation Waiting Area in each frame period
It is interior to provide the pre-driver signal according to reset signal；And
Second auxiliary unit is coupled to after the multistage drive element of the grid, in second Accreditation Waiting Area in each frame period
It is interior to provide the postposition driving signal according to the reset signal；
Wherein, in first waiting interval in each frame period, the multistage drive element of the grid is in the reset signal
Control under the multiple control signal and the multiple gate drive signal are reset.
2. gate driving circuit according to claim 1, which is characterized in that second waiting interval in each frame period
It is Chong Die with first waiting interval in adjacent next frame period.
3. gate driving circuit according to any one of claim 1 or 2, which is characterized in that every grade of gate driving
Unit includes:
Pull-up module is connect with first node, according to pull up signal and high level signal, is charged to first node, to produce
Raw the same level controls signal；
First output module is connected in the first node with the pull-up module, generates the same level grid according to clock signal and drives
Dynamic signal；
Second output module is connected in the first node with the pull-up module, generates the same level transmitting letter according to clock signal
Number；
Pull-down module is connect with the first node, and described the same level control signal is pulled down to low level according to pulldown signal；With
And
Pull down maintenance module, with the first node, the same level transmitting signal output end, the same level gate drive signal output end, on
Grade transmitting signal input part, higher level's gate drive signal input terminal and the connection of higher level's control signal input, receive the first electricity
Press signal or second voltage signal, and when the voltage signal received is high level signal by the same level and supervisory each output
Signal and control signal are maintained at low level,
Wherein, one of the first voltage signal and the second voltage signal are high level signal, wherein another be
Low level signal,
One of the first voltage signal and the second voltage signal are connect by the drive element of the grid of odd level
It receives, wherein another drive element of the grid by even level receives.
4. gate driving circuit according to claim 3, which is characterized in that the pull-up module includes:
11st switching tube, control terminal receive the pull up signal, and the first path terminal receives the high level signal, alternate path
End is connect to export the control signal with the first node.
5. gate driving circuit according to claim 3, which is characterized in that first output module includes:
Second switch, control terminal are connect with the first node, and for the first path terminal for receiving the clock signal, second is logical
Terminal is connect to export the same level gate drive signal with output end；
First capacitor is connected between the control terminal of the second switch and alternate path end.
6. gate driving circuit according to claim 3, which is characterized in that second output module includes:
5th switching tube, control terminal are connect with the first node, and for the first path terminal for receiving the clock signal, second is logical
Terminal is connect to export the same level transmitting signal with output end.
7. gate driving circuit according to claim 3, which is characterized in that the pull-down module includes:
Tenth switching tube, control terminal receive the pulldown signal, and the first path terminal is connect with the first node, alternate path end
For receiving second low level signal.
8. gate driving circuit according to claim 3, which is characterized in that the drop-down maintenance module includes:
12nd switching tube, control terminal and the first path terminal are all connected with voltage signal inputs, and alternate path end connects the second section
Point；
7th switching tube, control terminal connect the second node, and the first path terminal connects the first node, and alternate path end connects
Connect the second low level signal input terminal；
First switch tube, control terminal connect the first node, and the first path terminal connects the second node, and alternate path end connects
Connect the second low level signal input terminal；
9th switching tube, control terminal connect the second node, and the first path terminal connects the second low level signal input terminal,
Alternate path end connects the same level transmitting signal output end；
8th switching tube, control terminal connect the second node, and the first path terminal is connected described by the 9th switch transistor T 9
Second low level signal input terminal, alternate path end connect higher level and transmit signal input part；
4th switching tube, control terminal connect the second node, and the first path terminal connects the same level gate drive signal output end, the
Two path terminals connect the first low level signal input terminal；
Third switching tube, control terminal connect the second node, and the first path terminal connects higher level's gate drive signal input terminal, the
Two path terminals connect described the same level and transmit signal output end；
6th switching tube, control terminal connect the second node, and the first path terminal connects higher level's control signal input, and second is logical
Terminal connects described the same level and transmits signal output end.
9. gate driving circuit according to claim 3, which is characterized in that the drop-down maintenance module further include:
13rd switching tube, control terminal connect reset signal input terminal, and the first path terminal connects the output of the same level gate drive signal
End, alternate path end connect the first low level signal input terminal；
14th switching tube, the control terminal connection reset signal input terminal, the first path terminal connection first node, second
Path terminal connects the second low level signal input terminal.
10. a kind of display device characterized by comprising
Gate driving circuit according to any one of claim 1 to 9, for providing multiple gate drive signals；
Source electrode drive circuit, for providing multiple luma datas；And
Display panel, the display panel include the multiple pixel units and a plurality of grid line and a plurality of data for being arranged in array
Line,
Wherein, the display panel receives the multiple gate drive signal via a plurality of grid line, thus by row selection
The multiple pixel unit, and the multiple luma data is received by column via the multiple data lines, to be supplied to choosing
Fixed pixel unit is to realize that image is shown.
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| CN201910574123.9A CN110223655A (en) | 2019-06-28 | 2019-06-28 | Gate driving circuit and display device |
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| CN201910574123.9A CN110223655A (en) | 2019-06-28 | 2019-06-28 | Gate driving circuit and display device |
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| JP2017229074A (en) * | 2002-12-25 | 2017-12-28 | 株式会社半導体エネルギー研究所 | Shift register, semiconductor device, and display device |
| CN107591139A (en) * | 2017-09-22 | 2018-01-16 | 京东方科技集团股份有限公司 | Scan trigger element, gate driving circuit and its driving method and display device |
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| JP2017229074A (en) * | 2002-12-25 | 2017-12-28 | 株式会社半導体エネルギー研究所 | Shift register, semiconductor device, and display device |
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Address after: 215301, 1, Longteng Road, Kunshan, Jiangsu, Suzhou Applicant after: InfoVision Optoelectronics(Kunshan)Co.,Ltd. Address before: 215301, 1, Longteng Road, Kunshan, Jiangsu, Suzhou Applicant before: INFOVISION OPTOELECTRONICS (KUNSHAN) Co.,Ltd. |
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