CN110164361B

CN110164361B - Pixel driving circuit and driving method thereof, and display panel

Info

Publication number: CN110164361B
Application number: CN201910487031.7A
Authority: CN
Inventors: 陈瑶; 高超; 李海燕; 陈燕武; 古涛
Original assignee: BOE Technology Group Co Ltd; Chongqing BOE Optoelectronics Technology Co Ltd
Current assignee: BOE Technology Group Co Ltd; Chongqing BOE Optoelectronics Technology Co Ltd
Priority date: 2019-06-05
Filing date: 2019-06-05
Publication date: 2020-12-25
Anticipated expiration: 2039-06-05
Also published as: CN110164361A; WO2020244309A1

Abstract

The embodiment of the invention discloses a pixel driving circuit, a driving method thereof and a display panel. The pixel driving circuit includes: the pixel driving circuit conducts the charging sub-circuit through an input pre-charging signal and pre-charges the voltage stabilizing sub-circuit through a first data signal input by the charging sub-circuit, and a first voltage value of the pre-charged voltage stabilizing sub-circuit is smaller than or equal to a threshold voltage. The embodiment of the invention solves the problem that the pixel driving circuit has low applicability due to long charging time in the process of driving the luminous pixel of the existing display panel.

Description

Pixel driving circuit and driving method thereof, and display panel

Technical Field

The present disclosure relates to but not limited to the field of display technologies and circuit technologies, and more particularly, to a pixel driving circuit and a driving method thereof, and a display panel.

Background

With the development and wide application of display technology, display devices can be configured with different types of light emitting devices, and the display devices are developing towards higher resolution and refresh frequency based on higher requirements of users on display effects.

Micro (Micro) Light Emitting Diodes (LEDs) are miniaturized LED arrays. In a Display panel (hereinafter, referred to as a Micro LED panel) using Micro LEDs as light emitting devices, each Micro LED can be regarded as a Pixel (Pixel), and can be independently driven to light each Micro LED. However, the conventional pixel driving circuit of the Micro LED panel has the following problems: the gate of a Driving Thin Film Transistor (DTFT) for controlling the current of the Micro LED has a large voltage stabilizing capacitance and a small charging current, resulting in a long charging time, and thus the pixel driving circuit is not suitable for a display panel with high resolution and high refresh rate.

Disclosure of Invention

In order to solve the above technical problems, embodiments of the present invention provide a pixel driving circuit, a driving method thereof, and a display panel, so as to solve the problem that the pixel driving circuit of the existing Micro LED panel has low applicability due to long charging time in the process of driving the Micro LED.

An embodiment of the present invention provides a pixel driving circuit, including: a charging sub-circuit and a voltage-stabilizing sub-circuit;

the parallel pre-charging signal end and the parallel scanning signal end are respectively electrically connected with the first input end of the charging sub-circuit, the second input end of the charging sub-circuit is electrically connected with the data signal end, and the output end of the charging sub-circuit is electrically connected with the first input end of the voltage-stabilizing sub-circuit;

a second input end of the voltage stabilizing sub-circuit is electrically connected with a power supply voltage through a pixel transistor, and an output end of the voltage stabilizing sub-circuit is electrically connected with a common voltage;

the pixel driving circuit is used for conducting the charging sub-circuit through a pre-charging signal input by a first input end of the charging sub-circuit, and pre-charging the voltage stabilizing sub-circuit through a first data signal input by a second input end of the conducting charging sub-circuit, wherein a first voltage value of the first input end of the voltage stabilizing sub-circuit after pre-charging is smaller than or equal to a threshold voltage for conducting the voltage stabilizing sub-circuit.

Optionally, in the pixel driving circuit as described above, the charging sub-circuit includes: a first NMOS transistor having a gate electrically connected to a first input of the charge sub-circuit, a drain electrically connected to a second input of the charge sub-circuit, and a source electrically connected to an output of the charge sub-circuit.

Optionally, in the pixel driving circuit as described above, the voltage regulation sub-circuit includes: the positive electrode of the voltage stabilizing capacitor and the grid electrode of the pixel driving transistor are electrically connected to the output end of the charging sub-circuit in parallel, the negative electrode of the voltage stabilizing capacitor and the source electrode of the pixel driving transistor are electrically connected to the common voltage in parallel, the drain electrode of the pixel driving transistor is electrically connected to the cathode electrode of the pixel transistor, and the anode electrode of the pixel transistor is electrically connected to the power supply voltage.

Optionally, in the pixel driving circuit as described above, a voltage value of the first data signal is less than or equal to the first voltage value.

Optionally, in the pixel driving circuit as described above, the pixel driving circuit further includes:

the switching sub-circuit is connected between the first input end of the voltage stabilizing sub-circuit and the grid electrode of the pixel driving transistor, the first input end of the switching sub-circuit is electrically connected with a reference signal end used for outputting a reference signal, the second input end of the switching sub-circuit is electrically connected to the first input end of the voltage stabilizing sub-circuit, and the output end of the switching sub-circuit is electrically connected to the grid electrode of the pixel driving transistor;

the pixel driving circuit is further configured to turn off the switch sub-circuit when the reference signal indicates that the charging sub-circuit is turned on by the pre-charge signal, and turn on the switch sub-circuit when the reference signal indicates that the charging sub-circuit is turned on by the scan signal.

Optionally, in the pixel driving circuit as described above, the switch sub-circuit includes a P-type metal oxide semiconductor PMOS transistor and a second NMOS transistor, a gate of the PMOS transistor is electrically connected to the first input terminal of the switch sub-circuit, a source of the PMOS transistor is electrically connected to the power supply voltage, a drain of the PMOS transistor is electrically connected to a gate of the second NMOS transistor, a drain of the second NMOS transistor is electrically connected to the second input terminal of the switch sub-circuit, and a source of the NMOS transistor is electrically connected to the output terminal of the switch sub-circuit;

the pixel driving circuit is further configured to provide a high level to the reference signal to turn off the PMOS transistor and the second NMOS transistor when the precharge signal turns on the charge circuit, and provide a low level to the reference signal to turn on the PMOS transistor and the second NMOS transistor when the clock signal turns on the charge circuit.

Optionally, in the pixel driving circuit as described above, a voltage value of the first data signal is greater than the first voltage value.

An embodiment of the present invention further provides a driving method for a pixel driving circuit, where the driving method is implemented by using any one of the pixel driving circuits described above, and the driving method includes:

turning on a charging sub-circuit by inputting a pre-charge signal to the charging sub-circuit during a first time period;

and the switched-on charging electronic circuit pre-charges the voltage stabilizing sub-circuit through the input first data signal, and after pre-charging, a first voltage value of a first input end of the voltage stabilizing sub-circuit is less than or equal to a threshold voltage for switching on the voltage stabilizing sub-circuit.

Optionally, in the driving method of the pixel driving circuit, the method further includes:

turning on the charging sub-circuit by inputting a scan signal to the charging sub-circuit in a second period of time;

and the switched-on charging electronic circuit displays and charges the voltage stabilizing sub-circuit through an input second data signal so as to switch on the voltage stabilizing sub-circuit and start a pixel transistor, and after the pixel transistor is started, a second voltage value of a first input end of the voltage stabilizing sub-circuit is equal to a voltage value of the second data signal.

Alternatively, in the driving method of the pixel driving circuit as described above,

the charging time of the second time period is as follows:

t2≈RC*Ln[(V_data-V₁)/(V_data-aV_data)]；

wherein RC is the charging constant of the voltage-stabilizing capacitor, and V_dataA target voltage value for charging the regulator sub-circuit for the second time period, the Vth₁And a is the initial voltage value of the voltage stabilizing sub-circuit in the second time period, and a is the charging saturation coefficient of the voltage stabilizing sub-circuit.

the first time period is a time period from a falling edge of a frame ending signal of each frame to a falling edge of a frame starting signal of the next frame, or the first time period is a time period from a preset time to a falling edge of a frame starting signal of the first frame;

the second time period is a time period from a preset time after a rising edge or a falling edge of a frame start signal of each frame to a time point when a voltage value of the voltage stabilizing sub-circuit for displaying and charging reaches a voltage value of the second data signal.

the voltage value of the first data signal in the first time period is less than or equal to the first voltage value.

Alternatively, in the driving method of the pixel driving circuit as described above, the voltage-stabilizing sub-circuit includes a charging voltage-stabilizing capacitor and a pixel driving transistor, a parallel positive electrode of the voltage-stabilizing capacitor and a parallel gate electrode of the pixel driving transistor are electrically connected to an output terminal of the charging sub-circuit, a parallel negative electrode of the voltage-stabilizing capacitor and a parallel source electrode of the pixel driving transistor are electrically connected to the common voltage, a drain electrode of the pixel driving transistor is electrically connected to a cathode electrode of the pixel driving transistor, and an anode electrode of the pixel driving transistor is electrically connected to the power supply voltage; the voltage value of the first data signal in the first period is greater than the first voltage value, and the pixel driving circuit further includes:

the switching sub-circuit is connected between the first input end of the voltage stabilizing sub-circuit and the grid electrode of the pixel driving transistor, the first input end of the switching sub-circuit is electrically connected with a reference signal end used for outputting a reference signal, the second input end of the switching sub-circuit is electrically connected to the first input end of the voltage stabilizing sub-circuit, and the output end of the switching sub-circuit is electrically connected to the grid electrode of the pixel driving transistor; the driving method further includes:

indicating by the output reference signal to open the switching sub-circuit, thereby opening the regulation sub-circuit, during the first time period;

and in the second time period, the switching sub-circuit is turned on through the output reference signal instruction, so that the voltage stabilizing sub-circuit is turned on.

An embodiment of the present invention further provides a display panel, including: pixel transistors arranged in an array, and a pixel drive circuit as claimed in any one of the above;

the pixel transistors are electrically connected with the pixel driving circuits in a one-to-one correspondence mode, wherein the pixel transistors in the ith row and the jth column are coupled with the ith row of scanning lines and the jth column of data lines through the corresponding pixel driving circuits.

Embodiments of the present invention further provide a computer-readable storage medium, where executable instructions are stored, and when executed by a processor, the computer-readable storage medium implements a driving method of a pixel driving circuit according to any one of the above descriptions.

The pixel driving circuit comprises a charging sub-circuit and a voltage stabilizing sub-circuit, wherein a pre-charging signal end and a scanning signal end which are connected in parallel are respectively and electrically connected with a first input end of the charging sub-circuit, a second input end of the charging sub-circuit is electrically connected with a data signal end, an output end of the charging sub-circuit is electrically connected with a first input end of the voltage stabilizing sub-circuit, and the voltage stabilizing sub-circuitThe second input terminal of the circuit is connected to the supply voltage V via the pixel transistor_DDElectrically connected with output terminal connected with common voltage V_SSThe pixel driving circuit with the above structure can turn on the charging sub-circuit by the pre-charging signal CH inputted from the first input terminal of the charging sub-circuit, and pre-charge the voltage-stabilizing sub-circuit by the first Data signal Data1 inputted from the second input terminal of the turned-on charging sub-circuit, after pre-charging, the first voltage value V of the first input terminal of the voltage-stabilizing sub-circuit₁Is less than or equal to the threshold voltage V for turning on the regulator sub-circuit_th(ii) a Before the pixel driving circuit provided by the embodiment of the invention is combined with the existing display time sequence to display and drive the pixel transistor, namely in the first period of time before the scanning signal Gate is started, the voltage stabilizing sub-circuit is precharged by the precharge signal CH, so that the precharged first voltage value V is enabled to be the first voltage value V₁Not greater than its threshold voltage V_thThus, when the scanning signal Gate is turned on, the voltage stabilizing sub-circuit is charged and charged to reach the voltage value V for controlling the pixel transistor current_dataIs formed by a first voltage value V₁(V₁Less than or equal to V_th) Charging to V_dataInstead of charging from 0V to V_dataThe charging time of the voltage-stabilizing sub-circuit in the display charging stage can be reduced to a great extent, so that the pixel driving circuit and the pixel transistor driven by the pixel driving circuit are wide in application range and can be applied to a display panel with high resolution and high refreshing frequency.

Drawings

The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the example serve to explain the principles of the invention and not to limit the invention.

FIG. 1 is a schematic diagram of a pixel driving circuit of a conventional display panel;

fig. 2 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention;

FIG. 3 is a schematic diagram illustrating a display timing sequence of the display panel;

FIG. 4 is a schematic diagram illustrating a display timing sequence for driving a display panel by using a pixel driving circuit according to an embodiment of the present invention;

fig. 5 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the present invention;

fig. 6 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the present invention;

fig. 7 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the invention;

FIG. 8 is a schematic diagram illustrating another display timing sequence for driving a display panel by using a pixel driving circuit according to an embodiment of the present invention;

fig. 9 is a flowchart of a driving method of a pixel driving circuit according to an embodiment of the invention;

fig. 10 is a flowchart of another driving method of a pixel driving circuit according to an embodiment of the invention;

fig. 11 is a schematic structural diagram of a display panel according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail below with reference to the accompanying drawings. It should be noted that the embodiments and features of the embodiments in the present application may be arbitrarily combined with each other without conflict.

The steps illustrated in the flow charts of the figures may be performed in a computer system such as a set of computer-executable instructions. Also, while a logical order is shown in the flow diagrams, in some cases, the steps shown or described may be performed in an order different than here.

Fig. 1 is a schematic structural diagram of a pixel driving circuit in a conventional display panel. As shown in fig. 1, the pixel driving circuit is, for example, a pixel driving circuit in a Micro LED panel, and the pixel driving circuit includes a transistor T1, a capacitor C1, a pixel driving transistor DTFT, and a light emitting transistor D1, the D1 is, for example, a Micro LED transistor, wherein T1 and DTFT are, for example, N-Metal-Oxide-Semiconductor (N-Metal-Oxide-Semiconductor, abbreviated as "Micro-LED"): NMOS) transistor, the grid of T1 is connected with the scanning line of the display panel and used for accessing the scanning signal Gate, the drain is connected with the Data line of the display panel and used for accessing the Data signal Data, the source is connected with the anode of the capacitor C1 and the grid of the DTFT in parallel, the cathode of the capacitor C1 and the source of the DTFT are connected with the common voltage V in parallel_SSThe common voltage V_SSFor example, a low voltage, the drain of DTFT is connected to the cathode of a light emitting transistor D1, the anode of the light emitting transistor D1 is connected to a power supply voltage V_DDThe V is_DDSuch as a high voltage.

The working principle of the pixel driving circuit in the conventional display panel shown in fig. 1 is as follows: after the scan signal Gate is turned on, the Data signal Data charges the capacitor C1 from 0 volts (V) to the turn-on voltage V of DTFT_thAt this point, DTFT is on and D1 can be lit, capacitor C1 continues to charge, from V_thIs charged to the voltage value (i.e., V) of the data signal_data) The V is_dataA specific voltage that is the DTFT turn-on level; the scanning signal Gate is closed, and the capacitor C1 is stabilized to V_dataUntil the end of the current frame. Since the display brightness of the Micro LED is related to the current and the current is related to the DTFT opening degree, the DTFT opening degree is controlled, namely V is controlled_dataCan control the display brightness of the Micro LED. However, for the pixel driving circuit shown in FIG. 1, charging the capacitor C1 to turn on the DTFT and continue charging to the current that controls the Micro LED (i.e., D1) by the DTFT requires charging the capacitor C1 from 0V to V_dataAnd the charging current is usually small, which results in a long charging time of the capacitor C1, and thus the pixel driving circuit has a poor application range, and is not suitable for a display panel with high resolution and high refresh frequency.

The following specific embodiments of the present invention may be combined, and the same or similar concepts or processes may not be described in detail in some embodiments.

Fig. 2 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention. The pixel driving circuit 100 provided in this embodiment may include: a charging sub-circuit 110 and a voltage regulation sub-circuit 120.

Image of an embodiment of the inventionIn the pixel driving circuit 100, the precharge signal terminal P is connected in parallel_CHAnd a scanning signal terminal P_GateAre electrically connected to the first input terminal 110a of the charging sub-circuit 110, and the second input terminal 110b of the charging sub-circuit 110 is electrically connected to the data signal terminal P_DataThe output terminal 110c is electrically connected to the first input terminal 120a of the regulator sub-circuit 120. The scanning signal terminal P in the pixel driving circuit 100_GateFor outputting a scan signal Gate, which can be a signal for controlling the pixel transistor 130 in the display panel to turn on, the pre-charge signal terminal P_CHFor outputting a pre-charge signal CH, and the parallel pre-charge signal terminal P_CHAnd a scanning signal terminal P_GateOutputting a scanning signal Gate or a pre-charging signal CH in a time-sharing manner; in addition, the data signal terminal P of the pixel driving circuit 100 is set_DataFor outputting data signals, and the voltage values of the output data signals may be different at different time periods when the pixel driving circuit 100 operates.

In addition, in the embodiment of the invention, the second input terminal 120b of the voltage-stabilizing sub-circuit 120 is connected to the power voltage V through the pixel transistor 130_DDElectrically connected to output terminal 120c and common voltage V_SSAnd (6) electrically connecting.

Based on the structure of the pixel driving circuit 100 shown in fig. 2, the pixel driving circuit 100 in the embodiment of the invention is configured to turn on the charging sub-circuit 110 by the precharge signal CH input from the first input terminal 110a of the charging sub-circuit 110, and to precharge the voltage regulator sub-circuit 120 by the first Data signal Data1 input from the second input terminal 110b of the charging sub-circuit 110 that is turned on, and then the first voltage value V of the first input terminal 120a of the voltage regulator sub-circuit 120 is obtained after the precharge₁Is less than or equal to the threshold voltage V for turning on the regulator sub-circuit 120_th. In the embodiment of the present invention, the charging sub-circuit 110 is connected through the pre-charging signal terminal P_CHWhen the input pre-charge signal CH is conducted, the data signal terminal P_DataThe output first Data signal Data1 is used to pre-charge the regulator sub-circuit 120, and in this operation state, the pixel driving circuit 100 is required to turn off the regulator sub-circuit 120.

Can be seen by referring to fig. 2In the pixel driving circuit 100 according to the embodiment of the invention, the first input terminal 110a of the electronic circuit 110 is electrically connected to the scan signal terminal P_GateAnd is also electrically connected to the scan signal terminal P_GateParallel pre-charge signal terminal P_CHThat is, not only the scan signal Gate but also the precharge signal CH can be input through the first input terminal 110a of the charging sub-circuit 110, and the signals input through the first input terminal 110a of the charging sub-circuit 110 from the two signal terminals (Gate and CH) are not input simultaneously, but input in a time-sharing manner. In practical applications, the first input terminal 110a may be connected to a scan line and a pre-charge signal line of a display panel, respectively, and in the pixel driving circuit 100, the display brightness of the pixel transistor 130, that is, the current of the pixel transistor 130, is controlled by the voltage magnitude (i.e., the voltage at point N1) for charging the voltage regulator sub-circuit 120.

As shown in FIG. 2, the pixel driving circuit 100 can input the pre-charge signal CH to the first input terminal 110a of the charging sub-circuit 110, and the charging mode can include two stages, namely, a pre-charge stage and a charging stage for normal display (hereinafter, referred to as a display charging stage), wherein the pre-charge stage operates according to the following principle: in the pre-charge time period t1, the pre-charge signal CH is pulled high to turn on the charging sub-circuit 110, and the first Data signal Data1 is input through the second input terminal 110b to charge the voltage-stabilizing sub-circuit 120, and since the pixel transistor 130 is not turned on in the pre-charge phase, the voltage value of the first Data signal Data1 input in the pre-charge phase can be set to be less than or equal to the threshold voltage V_thI.e. the first voltage value V of the regulator sub-circuit 120 after pre-charging₁Is also less than or equal to the threshold voltage V_thIn the pixel driving circuit 100 shown in FIG. 2, the voltage value at the node N1 is V (N1)₁。

When the pixel driving circuit 100 according to the embodiment of the present invention is used to drive the pixel transistor 130 of the display panel, the pre-charge process of the pre-charge stage may be performed in a period of time before the pixel transistor 130 is turned on in each frame, so that the first voltage value of the voltage-stabilizing sub-circuit 120 is obtained after the pre-charge process is completedV₁Can reach or approach the threshold voltage V_thThus, after the display charging phase is turned on, the requirement for charging the regulator sub-circuit 120 is from V₁Charging to V_dataIt is apparent that the principle of controlling the current of the pixel transistor 130 after the precharge phase is added is: the voltage regulator 120 is charged in a manner from V₁Charging to V_dataCompared with the pixel driving circuit of the conventional display panel shown in fig. 1, the principle of controlling the current of the light emitting transistor D1 is as follows: the capacitor C1 is charged from 0V to V_data(ii) a The pixel driving circuit 100 provided by the embodiment of the invention can obviously reduce the voltage variation for charging the voltage regulator sub-circuit 120 in the display charging stage, and it can be seen that the voltage variation required to be charged in the display charging stage reduces V₁Thus, the charging time of the regulator sub-circuit 120 can be reduced to a large extent.

FIG. 3 is a schematic diagram of a display timing sequence in a display panel, wherein the timing sequence for scanning pixel transistors in the display panel generally comprises: a Start Vertical (STV), an end of frame (RST), a Gate, and a Data signal Data, and fig. 3 illustrates the effect of the charging mode on the voltage level of the node N1 in the circuit. The RST is pulled high when each frame is finished, meanwhile, the Gate is pulled high, the pixel transistor in the display panel is discharged, the RST is pulled low after the discharge is finished, the next frame starts after a certain time, the STV is pulled high to indicate that the current frame is started, the STV is pulled low after a preset time period, and then the pixel transistor starts to be started through the Gate, wherein the time period from the STV to the STV and the time period from the STV to the Gate can be preset through software. In the pixel driving circuit of the conventional display panel shown in fig. 1, the capacitor C1 is charged only by the scan signal Gate and the DTFT for controlling the D1 current is turned on, so that the on time of the entire pixel driving circuit is also from the time when the Gate is pulled up, that is, from the time of the dotted line in fig. 3, the capacitor C1 is charged, and the charging is from 0V to V_dataThe current of the light emitting transistor D1 can be controlled, the charging time is long, and the time within one frame is occupiedAnd is also long and not suitable for high resolution and high refresh rate display panels.

Fig. 4 is a schematic diagram of a display timing sequence for driving a display panel by using a pixel driving circuit according to an embodiment of the present invention, in the display timing sequence shown in fig. 4, the pixel driving circuit 100 according to an embodiment of the present invention is used, and in combination with the display timing sequence of the existing display panel, fig. 4 also illustrates a frame start signal STV, a frame end signal RST, a scanning signal Gate, and a Data signal Data, and illustrates an influence of a charging manner of the pixel driving circuit 100 on a voltage value of a node N1 in the circuit. Since the pixel driving circuit 100 of the embodiment of the invention adds the pre-charge function, the voltage regulator 120 can be charged to a certain voltage value (i.e. the first voltage value V) in advance by the pre-charge signal before the Gate of the scan signal is pulled up₁) In conjunction with the display timing sequence shown in fig. 3, after RST of each frame is pulled down, that is, after each frame is discharged, the voltage stabilizing sub-circuit 120 for the next frame to be turned on starts to be precharged, for example, after RST of the previous frame is pulled down for a short time, the precharge signal CH is pulled up to turn on the charging sub-circuit 110, the first Data signal Data1 is input through the second input terminal 110b, that is, the voltage stabilizing sub-circuit 120 is charged, and after STV of the current frame is pulled down, the precharge process is ended, for example, the voltage value of the first Data signal Data1 is set to be less than or equal to the threshold voltage V_thI.e. the first voltage value V of the regulator sub-circuit 120 after pre-charging₁Is also less than or equal to the threshold voltage V_thThe precharge period is t 1; after the precharge is finished, that is, after the STV and the CH are pulled down, a short time may exist before the Gate is pulled up, in the time period t', the precharge signal CH is pulled down, the charging sub-circuit 110 is turned off, and no data signal is input to the second input terminal 110 b; subsequently, after the Gate is pulled high, display charging is started.

Comparing the conventional display timing shown in fig. 3 with the display timing shown in fig. 4, which is driven by the pixel driving circuit 100 provided by the embodiment of the present invention, it can be seen that:

first, with the pixel driving circuit 100 provided by the embodiment of the invention, before the Gate is turned on, the voltage value of the regulator sub-circuit 120 (equivalent to that of the node N1 in fig. 4) is regulatedVoltage value) has reached V₁And the V is₁Less than or equal to a threshold voltage V_thThe voltage regulator sub-circuit 120 is not turned on, i.e., the pixel transistor 130 is not turned on;

second, after the Gate is turned on, the regulator sub-circuit 120 is charged from V₁Charging to V_dataI.e. the current controlling the pixel transistor 130 can be reached, see the voltage value of N1 in fig. 3 and 4, where N1 in fig. 3 is 0V at the moment when the Gate is pulled up, and N1 in fig. 4 is V at the moment when the Gate is pulled up₁N1 from 0V to V_dataIs significantly longer than N1 from V₁To reach V_dataThe time of (d);

thirdly, the pixel driving circuit 100 and the pixel transistor 130 provided by the embodiment of the invention are used for pre-charging, and the pre-charging is started before the frame is turned on by adopting the display timing sequence of the existing display panel, so that the effective display time of the current frame is not occupied, and the pixel driving circuit 100 and the pixel transistor 130 can be applied to the display panel with high resolution and high refresh frequency by reasonably planning the pre-charging time.

The pixel driving circuit 100 according to the embodiment of the present invention includes a charging sub-circuit 110 and a voltage-stabilizing sub-circuit 120, which are connected in parallel to a pre-charge signal terminal P_CHAnd a scanning signal terminal P_GateAre electrically connected to the first input terminal 110a of the charging sub-circuit 110, and the second input terminal 110b of the charging sub-circuit 110 is electrically connected to the data signal terminal P_DataThe output terminal 110c is electrically connected to the first input terminal 120a of the regulator sub-circuit 120, and the second input terminal 120b of the regulator sub-circuit 120 is connected to the power supply voltage V via the pixel transistor 130_DDElectrically connected to output terminal 120c and common voltage V_SSElectrically connected, the pixel driving circuit 100 with the above-mentioned structure can turn on the charging sub-circuit 110 by the pre-charging signal CH inputted from the first input terminal 110a of the charging sub-circuit 110, pre-charge the voltage-stabilizing sub-circuit 120 by the first Data signal Data1 inputted from the second input terminal 110b of the turned-on charging sub-circuit 110, and after pre-charging, the first voltage value V of the first input terminal 120a of the voltage-stabilizing sub-circuit 120₁Is less than or equal to the threshold voltage V for turning on the regulator sub-circuit 120_th(ii) a By using the present inventionBefore the pixel driving circuit 100 according to the embodiment of the invention performs the display driving on the pixel transistor 130 in combination with the existing display timing, i.e. in the first period of time before the scan signal Gate is turned on, the sub-regulator circuit 120 is precharged by the precharge signal CH, so that the precharged first voltage value V is equal to the precharged first voltage value V₁Not greater than its threshold voltage V_thThus, the regulator circuit 120 is charged and charged to the voltage value V for controlling the current of the pixel transistor 130 when the scan signal Gate is turned on_dataIs formed by a first voltage value V₁(V₁Less than or equal to V_th) Charging to V_dataInstead of charging from 0V to V_dataTherefore, the pixel driving circuit 100 and the pixel transistor 130 driven by the pixel driving circuit are widely applicable, and can be applied to a display panel with high resolution and high refresh rate.

The above embodiments of the present invention have described the operation of the pixel driving circuit 100 in the pre-charge phase. In practical applications, the pixel driving circuit 100 according to the embodiment of the invention is further configured to turn on the charging sub-circuit 110 by the scan signal Gate input from the first input terminal 110a of the charging sub-circuit 110, and display and charge the voltage-stabilizing sub-circuit 120 by the second Data signal Data2 input from the second input terminal 110b of the turned-on charging sub-circuit 110 to turn on the voltage-stabilizing sub-circuit 120 and turn on the pixel transistor 130, wherein the second voltage value at the first input terminal 110a of the voltage-stabilizing sub-circuit 120 after the pixel transistor 130 is turned on is equal to the voltage value of the second Data signal Data2, and the voltage value of the second Data signal Data2 is the voltage value V controlling the current of the pixel transistor 130_data. In the embodiment of the present invention, the charge sub-circuit 110 passes through the scanning signal terminal P_GateWhen the input scanning signal Gate is turned on, the data signal terminal P_DataThe action of the outputted second Data signal Data2 controls the brightness of the turned-on pixel transistor 130, and in this operating state, the pixel driving circuit 100 is required to turn on the voltage-stabilizing sub-circuit 120 and light up the pixel transistor 130.

The above-mentioned charging process by the scanning signal Gate is the pixel driving circuit 100In the working process of the display charging stage, the working principle of the display charging stage is as follows: during the display charging time period t2, the scan signal Gate is pulled high to turn on the charging sub-circuit 110, the second Data signal Data2 inputted through the second input terminal 110b turns on the voltage-stabilizing sub-circuit 120, and if the voltage value V of the second Data signal Data2 is V_dataGreater than V_thThen the regulator sub-circuit 120 is driven from V₁Charging to V_dataCompared with the prior driving circuit in which the DTFT is charged from 0V to V_dataThe charging time is saved to a great extent, if V_dataLess than V_thThe regulator sub-circuit 120 is not turned on.

In practical applications, the regulator sub-circuit 120 charges to a voltage value V for controlling the current of the pixel transistor 130_dataThereafter, the voltage is stabilized to V during a period in which the pixel transistor 130 is turned on in one frame time_data(V_data>V_th) The turned-off period of the pixel transistor 130 after being turned on is stabilized to V₁To the end of a frame. After one frame is finished, RST is pulled high, after the voltage stabilizing sub-circuit 120 discharges to 0V, RST is pulled low again, then the pre-charging process of the next frame is started, and the pre-charging, display charging and voltage stabilizing are repeatedly cycled until one frame is finished and the discharging process after one frame is finished.

Optionally, fig. 5 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the present invention. In the pixel driving circuit 100 provided in the embodiment of the present invention, the charging sub-circuit 110 may include: a first NMOS transistor 111, a gate G of the first NMOS transistor 111₁A first input terminal 110a electrically connected to the charge circuit 110, a drain D₁A second input terminal 110b electrically connected to the charging circuit 110, a source S₁Is electrically connected to the output terminal 110c of the charge electronics circuit 110.

In the charging sub-circuit 110 having the structure shown in fig. 5, the first NMOS transistor 111 may pass through the gate G thereof₁Pre-charge signal terminals P respectively connected in parallel_CHAnd a scanning signal terminal P_GateIs electrically connected and passes through the two parallel ports (P)_CHAnd P_Gate) The precharge signal CH and the scanning signal Gate are switched on in a time-sharing manner so as to control the first NMOS crystalThe transistor 111 is turned on and off when its gate G is turned off₁When a high level signal is asserted, such as the precharge signal CH or the scan signal Gate is pulled up to the turn-on voltage of the first NMOS transistor 111, the first NMOS transistor 111 is turned on, and the drain D is turned on₁The data signal on the electrically connected data line may charge the regulator sub-circuit 120 through the first NMOS transistor 111.

Optionally, in the pixel driving circuit 100 provided in the embodiment of the present invention, the voltage regulator sub-circuit 120 may include: a voltage stabilizing capacitor 121 and a pixel driving transistor 122, the pixel driving transistor 122 can be, for example, an NMOS transistor, the anode of the voltage stabilizing capacitor 122 and the gate G of the pixel driving transistor 122_DElectrically connected in parallel to the output terminal 110c of the charge circuit 110, the cathode of the voltage-stabilizing capacitor 121 and the source S of the pixel driving transistor 122_DParallel electrical connection to a common voltage V_SSDrain D of pixel driving transistor 122_DIs electrically connected to the cathode of the pixel transistor 130, and the anode of the pixel transistor 130 is electrically connected to a power supply voltage V_DD。

In the structure of the voltage regulator sub-circuit 120, the turn-on voltage of the pixel driving transistor 122 is the threshold voltage V of the voltage regulator sub-circuit_thWhen the voltage regulator sub-circuit 120 (i.e. the voltage regulator capacitor 121) is charged to a voltage greater than the threshold voltage V_thAt this time, the pixel driving transistor 122 is turned on and the drain D thereof_DAnd source S_DIs turned on to turn on the pixel transistor 130 connected thereto, the current (i.e., the display brightness) of the pixel transistor 130 is controlled by the degree of turning on the pixel driving transistor 122, and the degree of turning on the pixel driving transistor 122 is controlled by the regulated voltage V of the regulator sub-circuit 120_dataAnd (5) controlling. Accordingly, by controlling the voltage value V of the second Data signal Data2_dataThe display luminance of the pixel transistor 130 can be controlled.

In the above embodiment of the present invention, since the pre-charge stage of the pixel driving circuit 100 is configured in combination with the existing display timing, the pixel transistor 130 is not turned on in the pre-charge stage, i.e. the display timing requires the pixel transistor 130 to be turned on in the display charge stage (i.e. after the Gate is turned on).

In one implementation manner of the embodiment of the present invention, the voltage value of the first Data signal Data1 charged to the voltage regulation sub-circuit 120 may be controlled to be less than or equal to the first voltage value V in the precharge control phase₁That is, the pixel transistor 130 will not be turned on in the pre-charge stage due to the first voltage value V₁Less than or equal to a threshold voltage V_thTherefore, the voltage value of the pre-charge stage voltage-stabilizing sub-circuit 120 is not greater than the threshold voltage V_th。

In another implementation manner of the embodiment of the present invention, the voltage value of the first Data signal Data1 for charging the voltage regulation sub-circuit 120 may also be greater than the first voltage value V₁V is reached due to charging of the regulator sub-circuit 120₁It takes a certain time to control the length of the time period t1 of the pre-charge phase by calculating the charging time of the regulator sub-circuit 120, i.e. by setting the duration of the pre-charge signal CH pulling up to control the first voltage value V of the regulator sub-circuit 120 in the pre-charge phase₁. In this implementation, since the voltage value of the first data signal for precharging the regulator sub-circuit 120 is large, this manner charges the regulator sub-circuit 120 up to V₁Is relatively small, for example, the first voltage value of the regulator sub-circuit 120 after completing the pre-charging is required to be less than or equal to the threshold voltage V_thSetting V_thAt 5V, the first data signal with a voltage value of 5V or 10V is used to pre-charge the regulator sub-circuit 120, and the charging time required for the first data signal with 10V to charge the regulator sub-circuit 120 to 5V is significantly smaller. This implementation may further compress the time of precharging within each frame, improving the resolution and refresh rate of the display panel, but if the precharge phase charging time is set slightly longer, there may be a risk that the pixel transistor 130 is turned on during the precharge phase.

Optionally, fig. 6 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the present invention. In the pixel driving circuit 100 according to the embodiment of the invention, when the voltage value of the first data signal is greater than the first voltage value V₁In order to avoid the unreasonable pre-charging time settingThe pixel transistor 130 is turned on during the pre-charge stage, and the pixel driving circuit 100 shown in fig. 6 may further include:

a first input terminal 120a connected to the voltage-stabilizing sub-circuit 120 and a gate G of the pixel driving transistor 122_DA first input terminal 140a of the switch sub-circuit 140 is electrically connected to a reference signal terminal for outputting a reference signal, a second input terminal 140b is electrically connected to the first input terminal 120a of the voltage-stabilizing sub-circuit, and an output terminal 140c is electrically connected to the gate G of the pixel driving transistor 122_D。

Based on the structure of the pixel driving circuit 100 shown in fig. 6, the pixel driving circuit 100 according to the embodiment of the present invention is further configured to turn off the switch sub-circuit 140 when the reference signal indicates that the charging sub-circuit 110 is turned on by the precharge signal CH, and turn on the switch sub-circuit 140 when the reference signal indicates that the charging sub-circuit 110 is turned on by the scan signal Gate.

In the embodiment of the present invention, the reference signal may indicate whether the input signal of the pixel driving circuit 100 currently turning on the charging sub-circuit 110 is the precharge signal CH or the scan signal Gate, if the input signal of the currently turning on charging sub-circuit 110 is the precharge signal CH, in order to avoid the first data signal from precharging the voltage stabilizing sub-circuit 120, the voltage value of the voltage stabilizing sub-circuit 120 is greater than V due to charging_thThe pre-charge stage can turn off the switch sub-circuit 140 according to the indication of the reference signal, so that the pixel driving transistor 122 in the regulator sub-circuit 120 is not turned on, and therefore, the pixel transistor 130 is not turned on.

Optionally, fig. 7 is a schematic structural diagram of another pixel driving circuit according to an embodiment of the present invention. Based on the structure of the pixel driving circuit 100 shown in fig. 6, the switch sub-circuit 140 in the embodiment of the present invention may include: a P-Metal-Oxide-Semiconductor (PMOS) transistor 141 and a second NMOS transistor 142, the gate G of the PMOS transistor 141_PElectrically connected to the first input terminal 140a, source S of the switch sub-circuit 140_PIs electrically connected to a supply voltage V_DDDrain electrode D_PAnd the gate G of the second NMOS141₂An electrical connection of the firstDrain electrode D of two NMOS₂Electrically connected to the second input terminal 140b, source S, of the switch sub-circuit 140₂Is electrically connected to output terminal 140c, i.e. source S, of switch sub-circuit 140₂And the gate G of the pixel driving transistor 122_DAnd (6) electrically connecting.

Based on the structure of the pixel driving circuit 100 shown in fig. 7, the pixel driving circuit 100 according to the embodiment of the invention is further configured to provide a high level to the reference signal to turn off the PMOS transistor 141 and the second NMOS transistor 142 after the precharge signal CH turns on the charge sub-circuit, and provide a low level to the reference signal to turn on the PMOS transistor 141 and the second NMOS transistor 142 when the scan signal Gate turns on the charge sub-circuit 110.

In the pixel driving circuit 100 according to the embodiment of the present invention, the reference signal accessed by the first input end 140a of the switch sub-circuit 140 is, for example, a frame start signal STV in the display timing sequence shown in fig. 3 and 4, that is, the reference signal end may be P_STVThe time period positions of the precharge phase and the display charge phase are known from the changes of the high level and the low level of the reference signal STV. As shown in fig. 8, another display timing sequence for driving the display panel by using the pixel driving circuit according to the embodiment of the invention is shown, and the display timing sequence shown in fig. 8 is added to the voltage value of the node N2 in the pixel driving circuit 100 based on fig. 4. The timing for driving the pixel transistor 130 using the pixel driving circuit 100 shown in fig. 7 may be:

precharge phase t 1: before the start of a frame (i.e., before the STV is pulled high) and after the end of the discharge of the previous frame (i.e., after the RST is pulled low), the precharge phase is turned on, and during the precharge period t1, the STV is pulled high so that both the PMOS transistor 141 and the second NMOS transistor 142 are turned off, so that the current cannot reach the node N2 in the circuit 100 shown in fig. 7, and it can be seen that N1 is raised from 0V to V during the period₁N2 is always 0V at t1, i.e., the pixel driving transistor 122 is not turned on at t1, and the pixel transistor 130 is not turned on;

time period t': the display timing is usually set to have a time period t' after the frame start signal of one frame is pulled low and before the first scan signal Gate is pulled high, wherein the STV is pulled highThe duration and the length of the time period t' can be configured through software, and the precharging process is required to be finished before the scanning signal Gate is started; STV is pulled low, i.e. indicating the end of the precharge phase, which is pulled low to turn on both the PMOS transistor 141 and the second NMOS transistor 142, during a time period t ', the precharge signal CH is pulled low, the first NMOS transistor 111 is turned off, the charging sub-circuit 110 is turned off, during the time period t', the PMOS transistor 141 and the second NMOS transistor 142 are always in the on state, and V (N1) ═ V (N2) ═ V₁And V is₁Less than or equal to V_th；

Charging phase t2 is shown: the scan signal Gate is pulled high to turn on the first NMOS transistor 111, the second Data signal Data2 passes through the first NMOS transistor 111 and turns on the pixel driving transistor 122, and the voltage value of the second Data signal Data2 is the voltage value V for controlling the turn-on degree of the pixel driving transistor 122_dataIf the voltage value V of the second Data signal Data2_dataGreater than V_thThen the regulator sub-circuit 120 is driven from V₁Charging to V_dataCompared with the prior driving circuit in which the DTFT is charged from 0V to V_dataThe charging time is saved to a great extent, if V_dataLess than V_thThen the pixel driving transistor 122 is not turned on;

and (3) voltage stabilization: after t2 ends, the voltage stabilizing capacitor 121 stabilizes the voltage to V during the period of time in which the pixel transistor 130 is turned on in one frame time_data(V_data>V_th) The voltage-stabilizing capacitor 121 is at V for the remaining period, i.e., the period in which the pixel transistor 130 is not lit after scanning_dataNo output (i.e. voltage V of second Data signal Data 2)_data0V) is maintained at a voltage value V₁To the end of a frame. After one frame is finished, RST is pulled high, after the voltage stabilizing capacitor 121 is discharged to 0V, RST is pulled low again, then the pre-charging process of the next frame is started, and the discharging process of pre-charging, display charging and voltage stabilizing to one frame end and one frame end is repeatedly circulated.

It should be noted that, in the embodiments of the present invention, the input structure and manner of the frame ending signal RST for each frame may be, as shown in fig. 7, the pixel driving circuit 100 further includes a third NMOS transistor 150, and the third NMOS transistorDrain D of three NMOS transistors 150₃Electrically connected to a high voltage V_GHThe high voltage V_GHE.g., 20V or more, source S₃Electrically connected to the scan signal Gate, the Gate G₃An end-of-frame signal terminal P electrically connected to the signal for outputting the end-of-frame signal RST_RSTAt the end of each frame, by pulling RST high, the pixel transistors 130 in each row are discharged, i.e., the discharge process described in the above embodiment, and after the discharge is ended, RST is pulled low, the precharge phase in the next frame is started.

In the pixel driving circuit 100 provided in the above embodiment of the present invention, the pixel transistor 130 may be a Micro LED driven by a single point, because the pixel driving circuit 100 has a pre-charging function, the pixel driving circuit 100 is applied to a display panel to form a pixel structure capable of being charged in advance, and the voltage stabilizing capacitor 121 of the pixel driving transistor 122 for controlling the current of the Micro LED is charged in advance through the pixel driving circuit 100 disposed in the non-display area of the display panel to reduce the charging time in the display stage, that is, the pixel driving circuit 100 provided in the embodiment of the present invention may be applied to a display panel with high resolution and high refresh frequency; the problem that the applicability of an existing pixel driving circuit is low due to the fact that the voltage stabilizing capacitor of the DTFT grid electrode for controlling the current of the Micro LED is large and the charging current is small when the pixel driving circuit of the existing Micro LED panel drives the Micro LED is solved.

In practical applications, since the pixel driving circuit 100 in the embodiments of the present invention has the function of charging in advance, the gate G of the pixel driving transistor 122 for controlling the current of the pixel transistor 130 is supplied with the second Data signal Data2_DThe charging time for charging the regulated voltage 121 is calculated as follows:

the voltage at each time of the voltage stabilizing capacitor 121 is:

V_t＝V₀+(V₁-V₀)*(1-e^-t/RC) (1)

as can be obtained from equation (1), the charging time of the voltage stabilizing capacitor 121 is:

t＝RC*Ln[(V₁-V₀)/(V₁-V_t)] (2)

in the above equations (1) and (2), t is any time within the charging period, V_tTo obtain the voltage value, V, on the voltage-stabilizing capacitor 121 after the time t₁To complete the voltage value on the regulated capacitor 121 after charging, V0 is the initial voltage value of the regulated capacitor 121, and may be, for example, 0V, RC is the charging constant of the regulated capacitor 121, RC is the equivalent resistance value and the equivalent capacitance value in the charging circuit part (i.e., the regulated sub-circuit 120) except for the short circuit of the power supply part, R is ohm, and when C is farad, the RC time constant is second(s).

In addition, considering that the time required for the voltage stabilizing capacitor 121 to be fully saturated is infinite, after 3 RC cycles, the voltage stabilizing capacitor 121 may be considered to be charged to 95%, that is, the voltage stabilizing capacitor 121 is considered to be fully charged. Therefore, the conventional pixel driving circuit does not have a voltage stabilizing capacitor for performing early charging, and the voltage stabilizing capacitor is charged from 0V to V_dataAnd after the extraction charging is performed in the pixel driving circuit 100 of the present embodiment, from V₁Charging to V_dataThe second time period t2 is:

t ≈ RC ≈ Ln [ (V) without advanced charging_data-0)/(V_data-0.95V_data)]；

T2 ≈ RC ≈ Ln [ (V) charged in advance_data-V₁)/(V_data-0.95V_data)]；

Therefore, it can be seen that with the pixel driving circuit 100 provided by the embodiment of the present invention, the charging time that can be saved in the display charging stage is:

△t≈RC*Ln[V_data/(V_data-V₁)]；

in practical applications, the RC value of the actual circuit design and the V of the pixel driving transistor 122 may be determined according to the actual circuit design_thThe charging time that the pixel driving circuit 100 can reduce in the display charging phase, and the specific values of the refresh rate and the resolution that can be improved are calculated.

Based on the pixel driving circuit 100 provided in the above embodiment of the present invention, an embodiment of the present invention further provides a driving method of a pixel driving circuit, where the driving method is executed by the pixel driving circuit 100 provided in any of the above embodiments of the present invention, as shown in fig. 9, which is a flowchart of the driving method of the pixel driving circuit provided in the embodiment of the present invention, and the driving method includes the following steps:

s210, inputting a pre-charge signal to a charging sub-circuit to turn on the charging sub-circuit in a first time period;

and S220, the turned-on charging sub-circuit pre-charges the voltage stabilizing sub-circuit through the input first data signal, and the first voltage value of the first input end of the pre-charged voltage stabilizing sub-circuit is less than or equal to the threshold voltage for turning on the voltage stabilizing sub-circuit.

The driving method provided by the embodiment of the present invention is executed by the pixel driving circuit 100 in any one of the implementations shown in fig. 2, fig. 5 to fig. 7, and the specific structure of the pixel driving circuit 100, wherein the functions implemented by each sub-circuit and the electronic element have been described in detail in the above embodiments, and therefore, are not described again here. In the driving method provided by the embodiment of the invention, the timing relationship between the precharge signal CH, the scan signal Gate, the STV and the RST in the first time period t1, and the relationship between the voltage value of the first input terminal 120a of the regulator sub-circuit 120 (i.e., the node N1 in the circuit) and the timing can be shown with reference to the timing sequence shown in fig. 4.

The driving method provided by the embodiment of the invention has a pre-charging stage in the driving process, and the working principle of the pre-charging stage is as follows: in the pre-charge period (i.e. the first period t1), the pre-charge signal CH is pulled high to turn on the charging sub-circuit 110 and charge the voltage-stabilizing sub-circuit 120 through the input first Data signal Data1, and since the pixel transistor 130 is not lighted in the pre-charge stage, the voltage value of the input first Data signal Data1 in the pre-charge stage can be set to be less than or equal to the threshold voltage V_thI.e. the first voltage value V of the regulator sub-circuit 120 after pre-charging₁Is also less than or equal to the threshold voltage V_thAs shown in FIG. 2, the voltage value of point N1 in the pixel driving circuit 100, i.e. V (N1) is V₁。

When the driving method provided by the embodiment of the present invention is used to drive the pixel transistor 130 of the display panel,the precharge process of the precharge phase described above, i.e., the above-described S210 to S220, may be performed for a period of time (i.e., the first time period t1) before the pixel transistor 130 is turned on in each frame, so that the first voltage value V of the regulator sub-circuit 120 after the completion of the precharge is₁Can reach or approach the threshold voltage V_thThus, after the display charging phase is turned on, the requirement for charging the regulator sub-circuit 120 is from V₁Charging to V_dataIt is apparent that the principle of controlling the current of the pixel transistor 130 after the precharge phase is added is: the voltage regulator 120 is charged in a manner from V₁Charging to V_dataCompared with the conventional driving method of the display panel shown in fig. 1, the principle of controlling the current of the light emitting transistor D1 is as follows: the capacitor C1 is charged from 0V to V_data(ii) a The driving method provided by the embodiment of the invention can obviously reduce the voltage variation for charging the voltage stabilizing sub-circuit 120 in the display charging stage, and it can be seen that the voltage variation needing to be charged in the display charging stage reduces V₁Thus, the charging time of the regulator sub-circuit 120 can be reduced to a large extent.

It should be noted that, the difference between the display timing (as shown in fig. 4) for driving the pixel transistor 130 of the display panel by using the driving method provided by the embodiment of the present invention and the conventional display timing shown in fig. 3 is that the above embodiment of the present invention has been described in detail, and therefore, the description thereof is omitted.

Based on the hardware structure of the pixel driving circuit 100 provided in the above embodiments of the present invention, in the first period of time, the charging sub-circuit 110 is turned on by inputting the precharge signal CH to the charging sub-circuit 110, the turned-on charging sub-circuit 110 precharges the voltage-stabilizing sub-circuit 120 by the input first Data signal Data1, and the first voltage value V of the first input end 120a of the voltage-stabilizing sub-circuit 120 is precharged after the precharge₁Is less than or equal to the threshold voltage V for turning on the regulator sub-circuit 120_th(ii) a The driving method provided by the embodiment of the invention is adopted to combine the existing display time sequence to carry out display driving on the pixel transistor 130Before, i.e. in the first period of time before the scan signal Gate is turned on, the sub-regulator circuit 120 is precharged by the precharge signal CH to make the precharged first voltage value V₁Not greater than its threshold voltage V_thThus, the regulator circuit 120 is charged and charged to the voltage value V for controlling the current of the pixel transistor 130 when the scan signal Gate is turned on_dataIs formed by a first voltage value V₁(V₁Less than or equal to V_th) Charging to V_dataInstead of charging from 0V to V_dataTherefore, the driving method of the pixel driving circuit has a wide application range for driving the pixel transistor 130, and can be applied to a display panel with high resolution and high refresh rate.

The driving method provided by the above embodiment of the present invention has been described for the operation of the pixel driving circuit 100 in the pre-charging stage. In practical applications, the driving method provided in the embodiment of the present invention further includes an operation mode of a display charging stage, as shown in fig. 10, which is a flowchart of another driving method of a pixel driving circuit provided in the embodiment of the present invention, and on the basis of the embodiment shown in fig. 9, the driving method provided in the embodiment of the present invention may further include the following steps:

s230, turning on the charging sub-circuit by inputting a scan signal to the charging sub-circuit in a second period;

and S240, the turned-on charging sub-circuit displays and charges the voltage-stabilizing sub-circuit through the input second data signal so as to turn on the voltage-stabilizing sub-circuit and turn on the pixel transistor, wherein the second voltage value of the first input end of the voltage-stabilizing sub-circuit after the pixel transistor is turned on is equal to the voltage value of the second data signal.

In the embodiment of the present invention, the above-mentioned charging process by the scan signal Gate is a working process of the pixel driving circuit 100 in a display charging stage, and the working principle of the display charging stage is as follows: during the display charging period (i.e. the second period t2), the scan signal Gate is pulled high to turn on the charging sub-circuit 110, and the input second data signal Dat is passeda2 turning on the voltage-stabilizing sub-circuit 120 if the voltage value V of the second Data signal Data2_dataGreater than V_thThen the regulator sub-circuit 120 is driven from V₁Charging to V_dataCompared with the prior driving circuit in which the DTFT is charged from 0V to V_dataThe charging time is saved to a great extent, if V_dataLess than V_thThe regulator sub-circuit 120 is not turned on.

It should be noted that, referring to the display Timing sequence shown in fig. 4, the first time period T1 in the embodiment of the present invention is a time period from a falling edge of the frame end signal RST of each frame to a falling edge of the frame start signal STV of the next frame, and it should be particularly noted that, for the first frame used for display, the first time period T1 may be a time period from a preset time to a falling edge of the frame start signal STV of the first frame, wherein the first frame may be a first frame start signal STV set by a Timing Controller (T-Con) chip, for example, the first frame start signal STV output by a rear end is set by the input of a T-Con reference front end input signal, and the first time period T1 used for display of the first frame may be set based on the first frame start signal STV; the second time period t2 may be a preset time after the rising edge or the falling edge of the frame start signal STV of each frame until the voltage value of the voltage stabilizing sub-circuit 120 for displaying charging reaches the voltage value V of the second data signal_dataIn between, it can be seen that there may be a period t 'between the end of the first period t1 and the beginning of the second period t2, the length of which period t' and the duration of which STV is high may both be set by software.

In practical applications, the voltage regulator 120 is charged to the voltage value V for controlling the current of the pixel transistor 130 by the driving method described above_dataThereafter, the voltage is stabilized to V during a period in which the pixel transistor 130 is turned on in one frame time_data(V_data>V_th) The turned-off period of the pixel transistor 130 after being turned on is stabilized to V₁To the end of a frame. RST is pulled high after one frame is finished, RST is pulled low again after the voltage stabilizing sub-circuit 120 discharges to 0V, then the pre-charging process of the next frame is started, and the pre-charging, display charging and voltage stabilizing are repeatedly circulated to oneThe discharging process after the frame end and one frame end, i.e., the process of displaying by the display panel, is executed in a loop from S210 to S240, and the process of stabilizing voltage and discharging.

It should be noted that, when the structure of the pixel driving circuit 100 for executing the driving method provided by the embodiment of the present invention is the pixel driving circuit 100 shown in fig. 5, the operation manner of the pixel driving circuit 100 in the precharge phase (i.e., the first time period t1) and the display charging phase (i.e., the second time period t2) has been described in detail in the above embodiment, and therefore, no further description is provided herein.

In one implementation manner of the embodiment of the present invention, the voltage value of the first Data signal Data1 charged to the voltage regulator sub-circuit 120 may be controlled to be less than or equal to the first voltage value V during the precharge phase (i.e., the first time period t1)₁That is, the pixel transistor 130 will not be turned on in the pre-charge stage due to the first voltage value V₁Less than or equal to a threshold voltage V_thTherefore, the voltage value of the pre-charge stage voltage-stabilizing sub-circuit 120 is not greater than the threshold voltage V_th。

In another implementation manner of the embodiment of the present invention, the voltage value of the first Data signal Data1 for charging the voltage regulation sub-circuit 120 may also be greater than the first voltage value V₁V is reached due to charging of the regulator sub-circuit 120₁It takes a certain time to control the length of the first time period t1 by calculating the charging time of the regulator sub-circuit 120, i.e. by setting the duration of the precharge signal CH pulling high, to control the first voltage value V of the regulator sub-circuit 120 in the precharge phase₁. In this implementation, since the voltage value of the first data signal for precharging the regulator sub-circuit 120 is large, this manner charges the regulator sub-circuit 120 up to V₁Is also relatively small. The implementation mode can be further advancedThe precharge time per frame is compressed in one step to improve the resolution and refresh rate of the display panel, but if the precharge phase charging time is set to be slightly longer, there is a risk that the pixel transistor 130 is turned on during the precharge phase.

In view of the risks in the foregoing implementation, the risks may also be avoided by adding a switch sub-circuit 140 to the pixel driving circuit 100, and in the pixel driving circuit 100, the voltage stabilizing sub-circuit 120 may include: a voltage stabilizing capacitor 121 and a pixel driving transistor 122, the pixel driving transistor 122 can be, for example, an NMOS transistor, the anode of the voltage stabilizing capacitor 122 and the gate G of the pixel driving transistor 122_DElectrically connected in parallel to the output terminal 110c of the charge circuit 110, the cathode of the voltage-stabilizing capacitor 121 and the source S of the pixel driving transistor 122_DParallel electrical connection to a common voltage V_SSDrain D of pixel driving transistor 122_DThe cathode of the pixel transistor 130 is electrically connected, and the anode of the pixel transistor 130 is electrically connected to a power supply voltage V_DD(ii) a In addition, the pixel driving circuit 100 further includes: a first input terminal 120a connected to the voltage-stabilizing sub-circuit 120 and a gate G of the pixel driving transistor 122_DA first input terminal 140a of the switch sub-circuit 140 is electrically connected to a reference signal terminal for outputting a reference signal, a second input terminal 140b is electrically connected to the first input terminal 120a of the regulator sub-circuit 120, and an output terminal 140c is electrically connected to the gate G of the pixel driving transistor 122 of the regulator sub-circuit 120_D. The circuit structure of the switch sub-circuit 140 can refer to the specific structure of the pixel driving circuit 100 shown in fig. 6 and 7, the driving method thereof, and the working processes in the first time period t1, the second time period t2, and the time period t' which are described in detail in the above embodiments, and therefore, they are not described again here. Based on the structure of the switch sub-circuit 140, the driving method provided by the embodiment of the invention may include the following steps:

the switching-off of the switch sub-circuit 140 and thus the switching-off of the regulator sub-circuit 120 are instructed by the outputted reference signal during the first time period t1, that is, the regulator sub-circuit 120 is always in the off state during the first time period t1, and the pixel transistor 130 is not lighted;

the switch sub-circuit 140 is turned on by the output reference signal instruction in the second time period t2, so as to turn on the voltage-stabilizing sub-circuit 120, i.e. the voltage-stabilizing sub-circuit 120 is turned on and the pixel transistor 130 is lighted in the second time period t 2.

Optionally, since the driving method provided by each of the above embodiments of the present invention includes a pre-charging phase (i.e. the first time period t1), the charging time of the second time period in the embodiment of the present invention is:

t2≈RC*Ln[(V_data-V₁)/(V_data-aV_data)]； (3)

wherein RC is the charging constant, V, of the voltage-stabilizing capacitor 121_dataTarget voltage value, V, for charging the regulator sub-circuit for a second time period₁The initial voltage value of the voltage-stabilizing sub-circuit in the second time period and the actual voltage value of the voltage-stabilizing sub-circuit completing charging in the first time period are obtained, a is the charging saturation coefficient of the voltage-stabilizing sub-circuit, and a and V are_dataThe product of (a) may be considered to be the actual voltage value at which the regulation sub-circuit completes charging, and a may be, for example, 95%.

In the driving method provided by the embodiment of the invention, the second time period t2 is the time period that the gate G of the pixel driving transistor 122 controlling the current of the pixel transistor 130 is supplied by the second Data signal Data2_DThe charging time for charging the regulated voltage 121 is calculated as follows:

the voltage at each time of the voltage stabilizing capacitor 121 is:

V_t＝V₀+(V₁-V₀)*(1-e^-t/RC) (1)

t＝RC*Ln[(V₁-V₀)/(V₁-V_t)] (2)

in the above equations (1) and (2), t is any time within the charging period, V_tTo obtain the voltage value, V, on the voltage-stabilizing capacitor 121 after the time t₁To complete the charging of the voltage value on the voltage-stabilizing capacitor 121, V0 is the initial voltage value of the voltage-stabilizing capacitor 121, which may be 0V, for example, and RC is the charging constant of the voltage-stabilizing capacitor 121.

In addition, considering that the time required for the voltage stabilizing capacitor 121 to be fully saturated is infinite, after 3 RCs, the voltage stabilizing capacitor 121 may be considered to be charged to 95%, that is, a in the formula (3) is 95%, that is, the voltage stabilizing capacitor 121 is considered to be fully charged. Therefore, the conventional pixel driving circuit does not have a voltage stabilizing capacitor for performing early charging, and the voltage stabilizing capacitor is charged from 0V to V_dataAnd after the extraction charging is performed in the pixel driving circuit 100 of the present embodiment, from V₁Charging to V_dataThe second time period t2 is:

t ≈ RC ≈ Ln [ (V) without advanced charging_data-0)/(V_data-0.95V_data)]；

T2 ≈ RC ≈ Ln [ (V) charged in advance_data-V₁)/(V_data-0.95V_data)]；

Therefore, it can be seen that, by using the driving method provided by the embodiment of the present invention, the charging time that can be saved in the display charging stage is:

△t≈RC*Ln[V_data/(V_data-V₁)]；

Based on the pixel driving circuit 100 provided in the above embodiment of the present invention, an embodiment of the present invention further provides a display panel, as shown in fig. 11, which is a schematic structural diagram of the display panel provided in the embodiment of the present invention. The display panel 10 provided in the embodiment of the present invention may include: pixel transistors 130 arranged in an array, and pixel drive circuit 100 as described above in any of the embodiments shown in fig. 2, 5 to 7; the liquid crystal display device further includes data lines D and scan lines G, wherein the pixel transistors 130 are electrically connected to the pixel driving circuits 100 in a one-to-one correspondence, and a connection manner of each pixel transistor 130 and the corresponding pixel driving circuit 100 can refer to the structure in any one of the embodiments shown in fig. 2 and fig. 5 to fig. 7, wherein the pixel transistor 130 in the ith row and the jth column is coupled to the ith row of scan lines and the jth column of data lines through the corresponding pixel driving circuit 100.

In the display panel shown in fig. 11, n rows and m columns of pixel transistors 130 are illustrated, and n rows of scanning lines G1-Gn and m columns of data lines D1-Dm, it can be seen that the pixel transistors 130 in the ith row and the jth column are coupled to the ith row of scanning lines Gi and the jth column of data Dj through the corresponding pixel driving circuits 100. The pixel driving circuit 100 provided in the above embodiment of the present invention is configured in the display panel 10 provided in the embodiment of the present invention, and the functions and achieved beneficial effects of the pixel driving circuit 100 are the same as those of the above embodiment, that is, the pixel driving circuit 100 can provide the pre-stored electric function to shorten the charging time in the display charging stage, that is, the display panel 10 provided in the embodiment of the present invention can be a display panel with high resolution and high refresh rate.

Embodiments of the present invention further provide a computer-readable storage medium, where the computer-readable storage medium stores executable instructions, and when the executable instructions are executed by a processor, the computer-readable storage medium can implement the driving method of the pixel driving circuit provided in any of the above embodiments of the present invention. The implementation of the computer-readable storage medium provided in the embodiment of the present invention is substantially the same as the driving method of the pixel driving circuit provided in the above-mentioned embodiment of the present invention, and details thereof are not repeated herein.

Although the embodiments of the present invention have been described above, the above description is only for the convenience of understanding the present invention, and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims

1. A pixel driving circuit, comprising: a charging sub-circuit and a voltage-stabilizing sub-circuit;

the parallel pre-charging signal end and the parallel scanning signal end are respectively and electrically connected with the first input end of the charging sub-circuit, the second input end of the charging sub-circuit is electrically connected with the data signal end, and the output end of the charging sub-circuit is electrically connected with the first input end of the voltage-stabilizing sub-circuit;

the pixel driving circuit is used for conducting the charging sub-circuit through a pre-charging signal input by a first input end of the charging sub-circuit, and pre-charging the voltage stabilizing sub-circuit through a first data signal input by a second input end of the conducting charging sub-circuit, wherein a first voltage value of the first input end of the voltage stabilizing sub-circuit after pre-charging is smaller than or equal to a threshold voltage for conducting the voltage stabilizing sub-circuit;

the voltage regulation sub-circuit includes: a voltage stabilizing capacitor and a pixel driving transistor, wherein the anode of the voltage stabilizing capacitor and the grid electrode of the pixel driving transistor are electrically connected to the output end of the charging sub-circuit in parallel, the cathode of the voltage stabilizing capacitor and the source electrode of the pixel driving transistor are electrically connected to the common voltage in parallel, the drain electrode of the pixel driving transistor is electrically connected to the cathode of the pixel transistor, and the anode of the pixel transistor is electrically connected to the power supply voltage;

the pixel driving circuit further includes:

2. The pixel driving circuit according to claim 1, wherein the charging circuit comprises: a first NMOS transistor having a gate electrically connected to a first input of the charge sub-circuit, a drain electrically connected to a second input of the charge sub-circuit, and a source electrically connected to an output of the charge sub-circuit.

3. The pixel driving circuit according to any one of claims 1 to 2, wherein a voltage value of the first data signal is less than or equal to the first voltage value.

4. The pixel driving circuit according to claim 1, wherein the switch sub-circuit comprises a P-type metal oxide semiconductor (PMOS) transistor and a second NMOS transistor, the PMOS transistor having a gate electrically connected to the first input terminal of the switch sub-circuit, a source electrically connected to the power supply voltage, a drain electrically connected to the gate of the second NMOS, a drain electrically connected to the second input terminal of the switch sub-circuit, and a source electrically connected to the output terminal of the switch sub-circuit;

5. The pixel driving circuit according to claim 1-2, wherein the voltage value of the first data signal is greater than the first voltage value.

6. A driving method of a pixel driving circuit, wherein the driving method is performed using the pixel driving circuit according to any one of claims 1 to 5, the driving method comprising:

7. The method for driving the pixel driving circuit according to claim 6, further comprising:

8. The driving method of a pixel driving circuit according to claim 6,

the charging time of the second time period is as follows:

t2≈RC*Ln[(V_data-V₁)/(V_data-aV_data)]；

9. The driving method of a pixel driving circuit according to claim 6,

10. The method for driving the pixel driving circuit according to any one of claims 6 to 9,

11. The driving method of the pixel driving circuit according to any one of claims 6 to 9, wherein the voltage stabilizing sub-circuit comprises a charging voltage stabilizing capacitor and a pixel driving transistor, wherein an anode of the voltage stabilizing capacitor and a gate of the pixel driving transistor are connected in parallel and electrically connected to an output terminal of the charging sub-circuit, a cathode of the voltage stabilizing capacitor and a source of the pixel driving transistor are connected in parallel and electrically connected to the common voltage, a drain of the pixel driving transistor is connected to a cathode of the pixel driving transistor, and an anode of the pixel driving transistor is connected to the power supply voltage; the voltage value of the first data signal in the first period is greater than the first voltage value, and the pixel driving circuit further includes:

12. A display panel, comprising: pixel transistors arranged in an array, and a pixel drive circuit as claimed in any one of claims 1 to 5;

13. A computer readable storage medium storing executable instructions which, when executed by a processor, implement a method of driving a pixel drive circuit as claimed in any one of claims 6 to 11.