CN110148656A - LED epitaxial structure and preparation method thereof - Google Patents
LED epitaxial structure and preparation method thereof Download PDFInfo
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- CN110148656A CN110148656A CN201910444061.XA CN201910444061A CN110148656A CN 110148656 A CN110148656 A CN 110148656A CN 201910444061 A CN201910444061 A CN 201910444061A CN 110148656 A CN110148656 A CN 110148656A
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- 238000002360 preparation method Methods 0.000 title abstract description 5
- 239000004065 semiconductor Substances 0.000 claims abstract description 138
- 230000004888 barrier function Effects 0.000 claims abstract description 101
- 239000000758 substrate Substances 0.000 claims description 48
- 229910002601 GaN Inorganic materials 0.000 claims description 31
- 238000004519 manufacturing process Methods 0.000 claims description 25
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 19
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 18
- 229910052757 nitrogen Inorganic materials 0.000 claims description 9
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 7
- AUCDRFABNLOFRE-UHFFFAOYSA-N alumane;indium Chemical compound [AlH3].[In] AUCDRFABNLOFRE-UHFFFAOYSA-N 0.000 claims description 7
- 229910052733 gallium Inorganic materials 0.000 claims description 7
- 230000000903 blocking effect Effects 0.000 claims description 3
- 230000005611 electricity Effects 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims 1
- 230000006911 nucleation Effects 0.000 claims 1
- 238000010899 nucleation Methods 0.000 claims 1
- 230000000694 effects Effects 0.000 abstract description 16
- 238000002347 injection Methods 0.000 abstract description 16
- 239000007924 injection Substances 0.000 abstract description 16
- 239000011777 magnesium Substances 0.000 description 21
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 8
- 229910052749 magnesium Inorganic materials 0.000 description 8
- 229910017083 AlN Inorganic materials 0.000 description 4
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 4
- 229910052782 aluminium Inorganic materials 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 4
- 239000004411 aluminium Substances 0.000 description 4
- RNQKDQAVIXDKAG-UHFFFAOYSA-N aluminum gallium Chemical compound [Al].[Ga] RNQKDQAVIXDKAG-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 230000003760 hair shine Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 238000005215 recombination Methods 0.000 description 2
- 230000006798 recombination Effects 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 150000001875 compounds Chemical class 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005265 energy consumption Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 230000007704 transition Effects 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- Led Devices (AREA)
Abstract
This application involves a kind of LED epitaxial structures and preparation method thereof.LED epitaxial structure includes n type semiconductor layer, multiple quantum well layer and multiple layer.Multiple layer is set to the surface that multiple quantum well layer deviates from n type semiconductor layer.Multiple layer includes multiple electronic barrier layers and multiple p type semiconductor layers, electronic barrier layer and the alternately laminated setting of p type semiconductor layer.P type semiconductor layer is for providing hole.On the one hand, compared to the prior art in electronic barrier layer, electronic barrier layer in multiple layer it is thinner, the hole of p type semiconductor layer more easily passes electronic barrier layer injection multiple quantum well layer, improves the injection effect in hole.On the other hand, multilayer p type semiconductor layer is interspersed is set between multilayer electronic barrier layer, can increase the concentration in hole.The concentration in hole increases, and further promotes the injection effect in hole.
Description
Technical field
This application involves LED technology fields, more particularly to a kind of LED epitaxial structure and preparation method thereof.
Background technique
Light emitting diode (Light-EmittingDiode, LED) is a kind of semiconductor electronic component that can be luminous.Because of tool
There are the advantages such as small in size, low energy consumption, the service life is long, driving voltage is low and be favourably welcome, is widely used in the neck such as indicator light, display screen
Domain.The crystal quality of epitaxial wafer is therefore, to improve crystal quality where influencing the emphasis of chip yield, improves shining for chip
Efficiency is the key that prepare high brightness, high light efficiency LED device at present.
In the epitaxial layer structure of LED, gallium nitride semiconductor material is to prepare the outer Yanzhong LED, shine be by electronics with
Hole is compound in quantum well, however hole relative weight is about 1800 times of electronics relative weight, therefore hole is relative to electronics
For, under extra electric field, the effect of hole injection can be much smaller than the injection effect of electronics, how promote the injection effect in hole
It is a problem to be solved.
Summary of the invention
Based on this, it is necessary to aiming at the problem that how to promote the injection effect in hole, provide a kind of LED epitaxial structure and its
Production method.
A kind of LED epitaxial structure and preparation method thereof includes n type semiconductor layer, multiple quantum well layer and multiple layer.Institute
State the side that n type semiconductor layer is set to substrate.The multiple quantum well layer is set to the n type semiconductor layer away from the substrate
Side.The multiple layer is set to the surface that the multiple quantum well layer deviates from the n type semiconductor layer.The multilayer knot
Structure layer includes multiple electronic barrier layers and multiple p type semiconductor layers.The electronic barrier layer and the p type semiconductor layer alternating layer
Folded setting.
In one embodiment, the electronic barrier layer includes the p-type aluminium indium gallium nitrogen layer for mixing Mg, and wherein the concentration of Mg is 1
×1016atoms/cm3-1×1023atoms/cm3。
In one embodiment, the thickness range of the electronic barrier layer is 0.35nm-50nm.
In one embodiment, the electronic barrier layer with a thickness of 2nm.
In one embodiment, the p type semiconductor layer includes the p-type gallium nitride layer for mixing Mg, wherein the concentration of Mg be 1 ×
1016atoms/cm3-1×1023atoms/cm3。
In one embodiment, the p type semiconductor layer with a thickness of 0.35nm-50nm.
In one embodiment, the p type semiconductor layer with a thickness of 2nm.
In one embodiment, the alternately laminated number of the electronic barrier layer and the p type semiconductor layer is 2-15.
In one embodiment, the LED epitaxial structure further includes nucleating layer.The nucleating layer is set to the substrate
Side, and the n type semiconductor layer is set to the side that the nucleating layer deviates from the substrate.
In one embodiment, the LED epitaxial structure further includes buffer layer.The buffer layer is set to the nucleating layer
Away from the surface of the substrate, and the n type semiconductor layer is set to the surface that the buffer layer deviates from the nucleating layer.
In one embodiment, the LED epitaxial structure further includes contact layer.The contact layer is set to the multilayer knot
Structure layer deviates from the surface of the multiple quantum well layer.
A kind of production method of LED epitaxial structure, the production method include:
N type semiconductor layer is formed in the side of substrate.
Multiple quantum well layer is formed away from the side of the substrate in the n type semiconductor layer.
Multiple layer, the multilayered structure are formed away from the surface of the n type semiconductor layer in the multiple quantum well layer
Layer includes multiple electronic barrier layers and multiple p type semiconductor layers, and the electronic barrier layer and the p type semiconductor layer are alternately laminated
Setting.
In one embodiment, multilayered structure is formed away from the surface of the n type semiconductor layer in the multiple quantum well layer
Layer, the multiple layer include multiple electronic barrier layers and multiple p type semiconductor layers, the electronic barrier layer and the p-type
The step of semiconductor layer alternately laminated setting, including being formed in the multiple quantum well layer away from the surface of the n type semiconductor layer
The electronic barrier layer.The p type semiconductor layer is formed away from the surface of the multiple quantum well layer in the electronic barrier layer.It hands over
For circulate operation the step of the multiple quantum well layer forms the electronic barrier layer away from the surface of the n type semiconductor layer and
In the step of electronic barrier layer forms the p type semiconductor layer away from the surface of the multiple quantum well layer.
In one embodiment, it is operated in alternate cycles and deviates from the table of the n type semiconductor layer in the multiple quantum well layer
Face forms the step of electronic barrier layer and forms the P away from the surface of the multiple quantum well layer in the electronic barrier layer
In the step of type semiconductor layer, the number of the alternate cycles is 2-15.
In one embodiment, before the side of substrate forms n type semiconductor layer, the production method further includes in institute
The side for stating substrate forms nucleating layer, and the n type semiconductor layer is set to the side that the nucleating layer deviates from the substrate.
In one embodiment, form nucleating layer in the side of the substrate, and the n type semiconductor layer be set to it is described
For nucleating layer after the side of the substrate, the production method further includes deviating from the surface of the substrate in the nucleating layer
Buffer layer is formed, and the n type semiconductor layer is set to the surface that the buffer layer deviates from the nucleating layer.
In one embodiment, multilayered structure is formed away from the surface of the n type semiconductor layer in the multiple quantum well layer
Layer, the multiple layer include multiple electronic barrier layers and multiple p type semiconductor layers, the electronic barrier layer and the p-type
After the alternately laminated setting of semiconductor layer, the production method further includes in the multiple layer away from the multiple quantum well layer
Surface formed contact layer.
The LED epitaxial structure provided by the present application, including n type semiconductor layer, multiple quantum well layer and multiple layer.Institute
State the side that n type semiconductor layer is set to substrate.The multiple quantum well layer is set to the n type semiconductor layer away from the substrate
Side.The multiple layer is set to the surface that the multiple quantum well layer deviates from the n type semiconductor layer.The multilayer knot
Structure layer includes multiple electronic barrier layers and multiple p type semiconductor layers, the electronic barrier layer and the p type semiconductor layer alternating layer
Folded setting.P type semiconductor layer is for providing hole.On the one hand, compared to the prior art in electronic barrier layer, the multilayer knot
The electronic barrier layer in structure layer it is thinner, the hole of p type semiconductor layer more easily passes the electronic blocking
Layer injects the multiple quantum well layer, improves the injection effect in the hole.On the other hand, multilayer p type semiconductor layer is interspersed sets
It is placed between the multilayer electronic barrier layer, the concentration in the hole can be increased.The concentration in the hole increases, and further mentions
The injection effect in lift-off cave.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the LED epitaxial structure provided in the application one embodiment；
Fig. 2 is the structural schematic diagram of the LED epitaxial structure provided in another embodiment of the application；
Fig. 3 is the structural schematic diagram of the LED epitaxial structure provided in another embodiment of the application；
Fig. 4 is the structural schematic diagram of the LED epitaxial structure provided in another embodiment of the application；
Fig. 5 is the flow chart of the production method of the LED epitaxial structure provided in the application one embodiment；
Fig. 6 is the flow chart of the production method of the LED epitaxial structure provided in another embodiment of the application.
Drawing reference numeral:
LED epitaxial structure 10
Substrate 100
Buffer layer 110
Fill and lead up layer 200
Defect barrier layer 210
2nd AlN layer 211
Second GaN layer 212
N type semiconductor layer 300
Multiple quantum well layer 400
Well layer 410
Barrier layer 420
Electronic barrier layer 500
First AlN layer 510
First GaN layer 520
P type semiconductor layer 600
Specific embodiment
In order to make the above objects, features, and advantages of the present application more apparent, with reference to the accompanying drawing to the application
Specific embodiment be described in detail.Many details are explained in the following description in order to fully understand this Shen
Please.But the application can be implemented with being much different from other way described herein, those skilled in the art can be not
Similar improvement is done in the case where violating the application intension, therefore the application is not limited by following public specific implementation.
It is herein component institute serialization number itself, such as " first ", " second " etc., is only used for distinguishing described object,
Without any sequence or art-recognized meanings.And " connection ", " connection " described in the application, unless otherwise instructed, include directly and
It is indirectly connected with (connection).In the description of the present application, it is to be understood that term " on ", "lower", "front", "rear", " left side ",
The orientation of the instructions such as " right side ", "vertical", "horizontal", "top", "bottom", "inner", "outside", " clockwise ", " counterclockwise " or position are closed
System indicates to be based on the orientation or positional relationship shown in the drawings, being merely for convenience of description the application and simplifying description
Or imply that signified device or element must have a particular orientation, be constructed and operated in a specific orientation, therefore cannot understand
For the limitation to the application.
In this application unless specifically defined or limited otherwise, fisrt feature in the second feature " on " or " down " can be with
It is that the first and second features directly contact or the first and second features pass through intermediary mediate contact.Moreover, fisrt feature exists
Second feature " on ", " top " and " above " but fisrt feature be directly above or diagonally above the second feature, or be merely representative of
First feature horizontal height is higher than second feature.Fisrt feature can be under the second feature " below ", " below " and " below "
One feature is directly under or diagonally below the second feature, or is merely representative of first feature horizontal height less than second feature.
Referring to Figure 1, it includes n type semiconductor layer 200, Multiple-quantum that the embodiment of the present application, which provides a kind of LED epitaxial structure 10,
Well layer 300 and multiple layer 400.The n type semiconductor layer 200 is set to the side of substrate 100.The multiple quantum well layer
300 are set to the side that the n type semiconductor layer 200 deviates from the substrate 100.The multiple layer 400 is set to described
Multiple quantum well layer 300 deviates from the surface of the n type semiconductor layer 200.The multiple layer 400 includes multiple electronic barrier layers
410 and multiple p type semiconductor layers 420.The electronic barrier layer 410 and the alternately laminated setting of the p type semiconductor layer 420.
The LED epitaxial structure 10 provided by the embodiments of the present application includes n type semiconductor layer 200,300 and of multiple quantum well layer
Multiple layer 400.The multiple layer 400 is set to the multiple quantum well layer 300 away from the n type semiconductor layer 200
Surface.The multiple layer 400 includes multiple electronic barrier layers 410 and multiple p type semiconductor layers 420, institute
State electronic barrier layer 410 and the alternately laminated setting of the p type semiconductor layer 420.P type semiconductor layer 420 is for providing hole.One
Aspect, compared to the prior art in electronic barrier layer, the thickness of the electronic barrier layer 410 in the multiple layer 400
Degree is thinner, and the hole of p type semiconductor layer 420 more easily passes the electronic barrier layer 410 and injects the multiple quantum well layer
300, improve the injection effect in the hole.On the other hand, multilayer p type semiconductor layer 420 is interspersed is set to the multilayer electricity
Between sub- barrier layer 410, the concentration in the hole can be increased.The concentration in the hole increases, and further promotes the note in hole
Enter effect.
In one embodiment, the substrate 100 is Sapphire Substrate, Si substrate or SiC substrate etc..
In one embodiment, the n type semiconductor layer 200 is formed in the side of the substrate 100.The N-type is partly led
Body layer 200 is the N-type GaN layer of doped silicon, and the N-type GaN layer provides electronics.The N-shaped gallium nitride thickness 0.5 μm -3 μm it
Between, guarantee to provide enough electronics.The doping concentration of silicon is 1 × 10 in the n type semiconductor layer 20017atoms/cm3-1×
1021atoms/cm3。
In one embodiment, the multiple quantum well layer 300 includes at least one layer of barrier layer 320 and at least one layer of well layer
310.When the multiple quantum well layer 300 only has one layer of barrier layer 320 and one layer of well layer 310, the well layer 310
Between the barrier layer 320 and the n type semiconductor layer 200.When the multiple quantum well layer 300 has barrier layer described in multilayer
320 and multilayer described in well layer 310 when, on the direction perpendicular to the substrate 100,320 layers of the well layer 310 and the barrier layer
Stack of alternating distribution.
It is 5-15 that the alternatively distributed number of plies, which is laminated, with the barrier layer 320 in the well layer 310.
In one embodiment, the well layer 310 is InxGa (1-x) N, wherein x=0.20-0.22.The well layer 310
With a thickness of 2nm-3nm.The barrier layer 320 is to mix the GaN of Si.The barrier layer 320 with a thickness of 10nm-12nm, to improve
The recombination rate of electrons and holes is stated, luminous efficiency is improved.
In one embodiment, the electronic barrier layer 410 includes the p-type aluminium indium gallium nitrogen layer for mixing Mg, wherein the concentration of Mg
It is 1 × 1016atoms/cm3-1×1023atoms/cm3。
The energy band of the electronic barrier layer 410 has to be larger than the energy level of electron transition, to stop electronics overflow.In a reality
It applies in example, the energy band of the electronic barrier layer 410 is greater than 3.4eV.
Mg is adulterated in the aluminium indium gallium nitrogen layer obtains p-type aluminium indium gallium nitrogen layer.In one embodiment, p-type aluminium indium gallium nitrogen layer
It is N layers of AlxInyGa (1-x-y).Energy band corresponding to N layers of the AlxInyGa (1-x-y) has to be larger than 3.4eV.
In one embodiment, the thickness range of the electronic barrier layer 410 is 0.35nm-50nm, to stop electronics to overflow
Stream.
In one embodiment, the electronic barrier layer 410 with a thickness of 2nm, to guarantee the electronic barrier layer 410
Energy band is greater than 3.4eV, stops electronics overflow.Meanwhile the hole can inject the multiple quantum well layer 300.
In one embodiment, the p type semiconductor layer 420 includes the p-type gallium nitride layer for mixing Mg, and wherein the concentration of Mg is
1×1016atoms/cm3-1×1023atoms/cm3。
In one embodiment, the p type semiconductor layer 420 with a thickness of 0.35nm-50nm, to provide hole, guarantee
The multiple quantum well layer 300 shines.
In one embodiment, the p type semiconductor layer 420 with a thickness of 4nm, hole is provided, guarantees the Multiple-quantum
Well layer 300 shines.
In one embodiment, the alternately laminated number of the electronic barrier layer 410 and the p type semiconductor layer 420 is
2-15.Multilayer p type semiconductor layer 420 is interspersed to be set between the multilayer electronic barrier layer 410, and the hole can be increased
Concentration.The electronic barrier layer 410 is interspersed to be set between the multilayer p type semiconductor layer 420, can with multilayer barrier electronics,
Electronics overflow is avoided, the luminous efficiency of the LED epitaxial structure 10 is improved.
In one embodiment, the electronic barrier layer 410 with a thickness of 2nm.The thickness of the p type semiconductor layer 420
For 4nm.The alternately laminated number of the electronic barrier layer 410 and the p type semiconductor layer 420 is 10 layers.Compared to existing skill
Electronic barrier layer in art, thinner, the p type semiconductor layer of the electronic barrier layer 410 in the multiple layer 400
420 hole more easily passes the electronic barrier layer 410 and injects the multiple quantum well layer 300, improves the hole
Injection effect.On the other hand, multilayer p type semiconductor layer 420 is interspersed is set between the multilayer electronic barrier layer 410, can
To increase the concentration in the hole.The concentration in the hole increases, and further promotes the injection effect in hole.
Please also refer to Fig. 2, in one embodiment, the LED epitaxial structure 10 further includes nucleating layer 110.It is described at
Stratum nucleare 110 is set to the side of the substrate 100, and the n type semiconductor layer 200 is set to the nucleating layer 110 away from institute
State the side of substrate 100.
The nucleating layer 110 can be one or more of gallium nitride, aluminium nitride or aluminum gallium nitride.Wherein gallium nitride, nitrogen
The content range for changing aluminium in aluminium or aluminum gallium nitride can be from 0.1%-99.9%.
Please also refer to Fig. 3, in one embodiment, the LED epitaxial structure 10 further includes buffer layer 120.It is described slow
It rushes layer 120 and is set to the surface that the nucleating layer 110 deviates from the substrate 100, and the n type semiconductor layer 200 is set to institute
State the surface that buffer layer 120 deviates from the nucleating layer 110.
The buffer layer 120 is gallium nitride, and the buffer layer thickness reduces bottom defect and extend between 0.5 μm -5 μm
To the multiple layer 400.
Please also refer to Fig. 4, in one embodiment, the LED epitaxial structure 10 further includes contact layer 500.It is described to connect
Contact layer 500 is set to the surface that the multiple layer 400 deviates from the multiple quantum well layer 300.
The contact layer 500 guarantees the circulation of carrier for being connected with other structures.
The contact layer 500 is to mix magnesium p-type gallium nitride.The magnesium p-type gallium nitride of mixing is formed in 700 DEG C of -1000 DEG C of temperature
Under, it is described mix magnesium p-type gallium nitride layer with a thickness of 20nm.The concentration for mixing magnesium of the contact layer 500 is higher, convenient for carrier
Circulation.
Fig. 5 is referred to, the embodiment of the present application provides a kind of production method of LED epitaxial structure 10, the production method packet
It includes:
S100 forms n type semiconductor layer 200 in the side of substrate 100.
S200 forms multiple quantum well layer 300 away from the side of the substrate 100 in the n type semiconductor layer 200.
S300 forms multiple layer away from the surface of the n type semiconductor layer 200 in the multiple quantum well layer 300
400, the multiple layer 400 includes multiple electronic barrier layers 410 and multiple p type semiconductor layers 420, the electronic barrier layer
410 with the alternately laminated setting of the p type semiconductor layer 420.
A kind of production method of LED epitaxial structure 10 provided by the embodiments of the present application forms N-type in the side of substrate 100
Semiconductor layer 200.Multiple quantum well layer 300 is formed away from the side of the substrate 100 in the n type semiconductor layer 200.Described
Multiple quantum well layer 300 forms multiple layer 400, the multiple layer 400 away from the surface of the n type semiconductor layer 200
Including multiple electronic barrier layers 410 and multiple p type semiconductor layers 420, the electronic barrier layer 410 and the p type semiconductor layer
420 alternately laminated settings.Electronics resistance in multiple layer 400 described in the production method of the LED epitaxial structure 10
Barrier 410 it is thinner, the hole of p type semiconductor layer 420 more easily pass the electronic barrier layer 410 inject it is described
Multiple quantum well layer 300 improves the injection effect in the hole.On the other hand, multilayer p type semiconductor layer 420 is interspersed is set to
Between the multilayer electronic barrier layer 410, the concentration in the hole can be increased.The concentration in the hole increases, and further mentions
The injection effect in lift-off cave.
In the step S100, the n type semiconductor layer 200 is the N-type GaN layer of doped silicon, and the N-type GaN layer mentions
Supplied for electronic.The N-shaped gallium nitride thickness guarantees to provide enough electronics between 0.5 μm -3 μm.In the n type semiconductor layer
The doping concentration of silicon is 1 × 10 in 20017atoms/cm3-1×1021atoms/cm3.The formation temperature of the n type semiconductor layer 200
Degree is between 900 DEG C -1150 DEG C.
In one embodiment, the S200 includes:
S210 forms the well layer 310 away from the side of the substrate 100 in the n type semiconductor layer 200.
S220 forms the barrier layer 320 away from the side of the n type semiconductor layer 200 in the well layer 310.
S230, alternate cycles operate the step S210 and step S220.
In one embodiment, the operation temperature of the step S210 is 780 DEG C -830 DEG C.The operation of the step S220
Temperature is 850 DEG C -930 DEG C.
In one embodiment, in the step S230, the number of the alternate cycles is 5-15.
In one embodiment, the well layer 310 is InxGa (1-x) N, wherein x=0.20-0.22.The well layer 310
With a thickness of 2nm-3nm.The barrier layer 320 is to mix the GaN of Si.The barrier layer 320 with a thickness of 10nm-12nm, to improve
The recombination rate of electrons and holes is stated, luminous efficiency is improved.
Please also refer to Fig. 6, in one embodiment, the step S300 includes:
S310 forms the electronic blocking away from the surface of the n type semiconductor layer 200 in the multiple quantum well layer 300
Layer 410.
S320 forms the P-type semiconductor away from the surface of the multiple quantum well layer 300 in the electronic barrier layer 410
Layer 420.
S330, alternate cycles operate the step S310 and step S320.
In one embodiment, the operation temperature of the step S310 and the step S320 are 1000 DEG C.
In one embodiment, in the step S330, the number of the alternate cycles is 2-15.
In one embodiment, the electronic barrier layer 410 includes the p-type aluminium indium gallium nitrogen layer for mixing Mg, wherein the concentration of Mg
It is 1 × 1016atoms/cm3-1×1023atoms/cm3。
In one embodiment, the thickness range of the electronic barrier layer 410 is 0.35nm-50nm, to stop electronics to overflow
Stream.
In one embodiment, the electronic barrier layer 410 with a thickness of 2nm, to guarantee the electronic barrier layer 410
Energy band is greater than 3.4eV, stops electronics overflow.Meanwhile the hole can inject the multiple quantum well layer 300.
In one embodiment, the p type semiconductor layer 420 includes the p-type gallium nitride layer for mixing Mg, and wherein the concentration of Mg is
1×1016atoms/cm3-1×1023atoms/cm3。
In one embodiment, the p type semiconductor layer 420 with a thickness of 0.35nm-50nm, to provide hole, guarantee
The multiple quantum well layer 300 shines.
In one embodiment, the p type semiconductor layer 420 with a thickness of 4nm, hole is provided, guarantees the Multiple-quantum
Well layer 300 shines.
In one embodiment, in the step S300, the electronic barrier layer 410 and the p type semiconductor layer 420
Alternately laminated number be 2-15.Electronic barrier layer in compared to the prior art, the electricity in the multiple layer 400
Sub- barrier layer 410 it is thinner, the hole of p type semiconductor layer 420 more easily passes the electronic barrier layer 410 and injects
The multiple quantum well layer 300, improves the injection effect in the hole.On the other hand, multilayer p type semiconductor layer 420 is interspersed sets
It is placed between the multilayer electronic barrier layer 410, the concentration in the hole can be increased.The concentration in the hole increases, into one
Step promotes the injection effect in hole.
In one embodiment, before the step S100, the production method further include:
S010 forms nucleating layer 110 in the side of the substrate 100, and the n type semiconductor layer 200 be set to it is described
Nucleating layer 110 deviates from the side of the substrate 100.
The operation temperature of the step S010 is between 450-900 DEG C.The nucleating layer 110 can be gallium nitride, nitrogen
Change one or more of aluminium or aluminum gallium nitride.Wherein the content range of aluminium can be from gallium nitride, aluminium nitride or aluminum gallium nitride
0.1%-99.9%.
In one embodiment, after the step S010, the production method further include:
S020 forms buffer layer 120 away from the surface of the substrate 100 in the nucleating layer 110, and the N-type is partly led
Body layer 200 is set to the surface that the buffer layer 120 deviates from the nucleating layer 110.
The operation temperature of the step S020 is between 900 DEG C -1150 DEG C.The buffer layer 120 is gallium nitride, described
Buffer layer thickness reduces bottom defect and extends to the multiple layer 400 between 0.5 μm -5 μm.
In one embodiment, after the step S300, the production method further include:
S400 forms contact layer 500 away from the surface of the multiple quantum well layer 300 in the multiple layer 400.
The contact layer 500 guarantees the circulation of carrier for being connected with other structures.
The contact layer 500 is to mix magnesium p-type gallium nitride.The magnesium p-type gallium nitride of mixing is formed in 700 DEG C of -1000 DEG C of temperature
Under, it is described mix magnesium p-type gallium nitride layer with a thickness of 20nm.The concentration for mixing magnesium of the contact layer 500 is higher, convenient for carrier
Circulation.
Each technical characteristic of embodiment described above can be combined arbitrarily, for simplicity of description, not to above-mentioned reality
It applies all possible combination of each technical characteristic in example to be all described, as long as however, the combination of these technical characteristics is not deposited
In contradiction, all should be considered as described in this specification.
The several embodiments of the application above described embodiment only expresses, but it cannot be understood as to this Shen
Please the scope of the patents limitation.It should be pointed out that for those of ordinary skill in the art, not departing from the application design
Under the premise of, various modifications and improvements can be made, these belong to the protection scope of the application.Therefore, the application patent
The scope of protection shall be subject to the appended claims.
Claims (17)
1. a kind of LED epitaxial structure characterized by comprising
N type semiconductor layer (200), is set to the side of substrate (100)；
Multiple quantum well layer (300) is set to the side that the n type semiconductor layer (200) deviate from the substrate (100)；
Multiple layer (400) is set to the surface that the multiple quantum well layer (300) deviate from the n type semiconductor layer (200),
The multiple layer (400) includes multiple electronic barrier layers (410) and multiple p type semiconductor layers (420), the electronic blocking
Layer (410) and the p type semiconductor layer (420) alternately laminated setting.
2. LED epitaxial structure as described in claim 1, which is characterized in that the electronic barrier layer (410) includes the P for mixing Mg
Type aluminium indium gallium nitrogen layer, wherein the concentration of Mg is 1 × 1016atoms/cm3-1×1023atoms/cm3。
3. LED epitaxial structure as claimed in claim 2, which is characterized in that the thickness range of the electronic barrier layer (410) is
0.35nm-50nm。
4. LED epitaxial structure as claimed in claim 3, which is characterized in that the electronic barrier layer (410) with a thickness of 2nm.
5. LED epitaxial structure as described in claim 1, which is characterized in that the p type semiconductor layer (420) includes the P for mixing Mg
Type gallium nitride layer, wherein the concentration of Mg is 1 × 1016atoms/cm3-1×1023atoms/cm3。
6. LED epitaxial structure as claimed in claim 5, which is characterized in that the p type semiconductor layer (420) with a thickness of
0.35nm-50nm。
7. LED epitaxial structure as claimed in claim 6, which is characterized in that the p type semiconductor layer (420) with a thickness of
4nm。
8. LED epitaxial structure as described in claim 1, which is characterized in that the electronic barrier layer (410) and the p-type half
The alternately laminated number of conductor layer (420) is 2-15.
9. LED epitaxial structure as described in claim 1, which is characterized in that further include:
Nucleating layer (110), is set to the side of the substrate (100), and the n type semiconductor layer (200) be set to it is described at
Stratum nucleare (110) deviates from the side of the substrate (100).
10. LED epitaxial structure as claimed in claim 9, which is characterized in that further include:
Buffer layer (120) is set to the surface that the nucleating layer (110) deviate from the substrate (100), and the N-type semiconductor
Layer (200) is set to the surface that the buffer layer (120) deviate from the nucleating layer (110).
11. LED epitaxial structure as claimed in claim 10, which is characterized in that further include:
Contact layer (500) is set to the surface that the multiple layer (400) deviate from the multiple quantum well layer (300).
12. a kind of production method of LED epitaxial structure, which is characterized in that the production method includes:
N type semiconductor layer (200) are formed in the side of substrate (100)；
Multiple quantum well layer (300) are formed away from the side of the substrate (100) in the n type semiconductor layer (200)；
Multiple layer (400) are formed away from the surface of the n type semiconductor layer (200) in the multiple quantum well layer (300), institute
Stating multiple layer (400) includes multiple electronic barrier layers (410) and multiple p type semiconductor layers (420), the electronic barrier layer
(410) with the p type semiconductor layer (420) alternately laminated setting.
13. production method as claimed in claim 12, which is characterized in that deviate from the N-type in the multiple quantum well layer (300)
The surface of semiconductor layer (200) forms multiple layer (400), and the multiple layer (400) includes multiple electronic barrier layers
(410) and multiple p type semiconductor layers (420), the electronic barrier layer (410) and the p type semiconductor layer (420) are alternately laminated
Setting steps, comprising:
The electronic barrier layer is formed away from the surface of the n type semiconductor layer (200) in the multiple quantum well layer (300)
(410)；
The p type semiconductor layer is formed away from the surface of the multiple quantum well layer (300) in the electronic barrier layer (410)
(420)；
Alternate cycles operation forms the electricity away from the surface of the n type semiconductor layer (200) in the multiple quantum well layer (300)
The step of sub- barrier layer (410) and the electronic barrier layer (410) away from the multiple quantum well layer (300) surface formed institute
The step of stating p type semiconductor layer (420).
14. production method as claimed in claim 13, which is characterized in that alternate cycles are operated in the multiple quantum well layer
(300) the step of forming the electronic barrier layer (410) away from the surface of the n type semiconductor layer (200) and in the electronics
It is described in the step of barrier layer (410) forms the p type semiconductor layer (420) away from the surface of the multiple quantum well layer (300)
The number of alternate cycles is 2-15.
15. production method as claimed in claim 12, which is characterized in that form n type semiconductor layer in the side of substrate (100)
(200) before, the production method further include:
Nucleating layer (110) are formed in the side of the substrate (100), and the n type semiconductor layer (200) is set to the nucleation
Layer (110) deviates from the side of the substrate (100).
16. production method as claimed in claim 15, which is characterized in that form nucleating layer in the side of the substrate (100)
(110), and the n type semiconductor layer (200) is set to the nucleating layer (110) after the side of the substrate (100),
The production method further include:
Buffer layer (120) are formed away from the surface of the substrate (100) in the nucleating layer (110), and the n type semiconductor layer
(200) it is set to the surface that the buffer layer (120) deviate from the nucleating layer (110).
17. production method as claimed in claim 16, which is characterized in that deviate from the N-type in the multiple quantum well layer (300)
The surface of semiconductor layer (200) forms multiple layer (400), and the multiple layer (400) includes multiple electronic barrier layers
(410) and multiple p type semiconductor layers (420), the electronic barrier layer (410) and the p type semiconductor layer (420) are alternately laminated
After setting, the production method further include:
Contact layer (500) are formed away from the surface of the multiple quantum well layer (300) in the multiple layer (400).
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111599902A (en) * | 2020-06-23 | 2020-08-28 | 东南大学 | Light-emitting diode with hole injection structure electron barrier layer |
| CN113838954A (en) * | 2021-09-16 | 2021-12-24 | 福建兆元光电有限公司 | LED epitaxy and manufacturing method thereof |
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| CN102931306A (en) * | 2012-11-06 | 2013-02-13 | 华灿光电股份有限公司 | Light emitting diode epitaxial wafer |
| CN103311394A (en) * | 2013-06-09 | 2013-09-18 | 东南大学 | GaN-based LED and epitaxial growth method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102931306A (en) * | 2012-11-06 | 2013-02-13 | 华灿光电股份有限公司 | Light emitting diode epitaxial wafer |
| CN103311394A (en) * | 2013-06-09 | 2013-09-18 | 东南大学 | GaN-based LED and epitaxial growth method thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111599902A (en) * | 2020-06-23 | 2020-08-28 | 东南大学 | Light-emitting diode with hole injection structure electron barrier layer |
| CN111599902B (en) * | 2020-06-23 | 2022-02-11 | 东南大学 | Light-emitting diode with hole injection structure electron barrier layer |
| CN113838954A (en) * | 2021-09-16 | 2021-12-24 | 福建兆元光电有限公司 | LED epitaxy and manufacturing method thereof |
| CN113838954B (en) * | 2021-09-16 | 2023-12-29 | 福建兆元光电有限公司 | LED (light-emitting diode) epitaxy and manufacturing method thereof |
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Application publication date: 20190820 |