CN110085509B

CN110085509B - Preparation method of uniform thick film SOI (silicon on insulator) silicon chip

Info

Publication number: CN110085509B
Application number: CN201810075830.9A
Authority: CN
Inventors: 党启森
Original assignee: SHENYANG SILICON TECHNOLOGY CO LTD
Current assignee: SHENYANG SILICON TECHNOLOGY CO LTD
Priority date: 2018-01-26
Filing date: 2018-01-26
Publication date: 2022-10-11
Anticipated expiration: 2038-01-26
Also published as: CN110085509A

Abstract

A preparation method of a uniform thick film SOI silicon chip comprises the following steps: (1) selecting an SOI silicon wafer; (2) edge processing; (3) removing the surface damage layer to obtain the low-defect TMSOI; (4) cleaning by a wet method; (5) chemically etching by HCl to obtain a high-quality thin film SOI silicon chip; (6) depositing a required film; (7) and (6) cooling. Compared with the prior art, the SOI has the uniformity of less than 3 percent, has better uniformity, can remove the damaged layer and the rough phenomenon on the silicon surface of the top layer of the SOI after the TM-SOI process, prepares the high-quality thick-film SOI, and has simpler preparation process and excellent technical effect. The method has expectable huge economic value and social value.

Description

Preparation method of uniform thick film SOI (silicon on insulator) silicon chip

The technical field is as follows:

the invention relates to the technical field of thick film SOI silicon chip application, and particularly provides a preparation method of a uniform thick film SOI silicon chip.

Background art:

SOI is a new type of silicon-based semiconductor material with a unique "Si/insulating layer/Si" three-layer structure. The device and the substrate are isolated from each other by the insulating buried layer (usually SiO 2) in all media, and the device has the advantages of small parasitic capacitance, high running speed, small electric leakage and low power consumption, and meanwhile, the latch-up effect is eliminated, the interference of pulse current of the substrate is inhibited, and the occurrence of soft errors is reduced. Therefore, SOI (silicon on insulator) is widely used.

As a method for manufacturing a thick-film SOI, a bonding method is generally used, in which an oxide film is formed on at least one of two silicon wafers, and the two silicon wafers are bonded at room temperature to form a bonded body. Then annealing is carried out to make the bonding surface firm. And then removing the top silicon wafer to the required film thickness by grinding and polishing. The process method is simple and convenient for mass production. However, the film thickness uniformity was poor and only 10% could be achieved. The requirement for the uniformity of the film thickness of automotive electronics and power devices is high, which limits the application field of the preparation method, and the technical effect of the preparation method needs to be improved urgently.

The invention content is as follows:

the invention aims to provide a preparation method of a thick-film SOI silicon wafer with excellent technical effect and uniformity.

The invention provides a preparation method of a uniform thick film SOI silicon chip, which is characterized by comprising the following steps: the operation is carried out according to the following requirements in sequence:

(1) selecting an SOI silicon chip formed by TMSOI;

(2) removing the edge of the TMSOI to ensure that the subsequent process grows into single crystal Si;

(3) completely removing the surface damage layer to obtain a low-defect TMSOI;

(4) replacing the surface layer of the thin film SOI by wet cleaning to remove surface impurities;

(5) removing surface defects through HCl chemical etching, simultaneously reducing the roughness of the surface defects, improving the uniformity and obtaining a high-quality thin film SOI silicon wafer; the method comprises the following specific steps:

a. loading a TMSOI silicon chip into a sealed reaction chamber;

b. introducing hydrogen into the reaction chamber, heating at 1000-1200 ℃ for 10-60 seconds, and removing a natural oxide layer and impurities on the surface of the silicon wafer in situ; wherein the hydrogen flow is 10-100L/min;

c. introducing anhydrous HCl and hydrogen into the reaction chamber in a mixed atmosphere, and etching the silicon layer on the surface of the reaction chamber;

d. closing the anhydrous HCL, continuously introducing hydrogen into the reaction chamber, removing impurities and residual HCl in the reaction chamber, and cooling to a deposition temperature;

(6) introducing mixed atmosphere of hydrogen, a silicon deposition chemical source and a doping source to deposit the required film;

(7) closing the mixed atmosphere of the silicon deposition chemical source and the doping source, continuously blowing hydrogen to remove the silicon deposition chemical source and the doping source, and cooling; the SOI silicon wafer with the top silicon film thickness of 1-20 μm and good uniformity is obtained.

The preparation method of the uniform thick film SOI silicon chip also has the following preferable technical requirements:

in the small step c of the step (5), the specific requirements for removing the surface defects, reducing the roughness and improving the uniformity and obtaining the high-quality thin film SOI silicon wafer by HCl chemical etching are as follows: etching temperature: 800-1200 ℃, pressure of 1-760torr, time: 5-120 seconds, the flow rate of anhydrous HCL is 0.01-20L/min, and the flow rate of hydrogen is 10-100L/min.

Introducing mixed atmosphere of hydrogen, a silicon deposition chemical source and a doping source in the step (6), wherein the specific requirements of depositing the required film are as follows: the deposition temperature is 900-1250 deg.C, the pressure is 1-760torr, and the hydrogen flow is 10-100L/min.

The silicon deposition chemical source used in the step (6) is one or a combination of the following: silane, trichlorosilane, dichlorosilane, silicon tetrachloride; the doping source is a P-type doping source or an N-type doping source; the concentration of the doping source is 10-1000ppm. Further preferred requirements are: the P-type doping source is diborane, and the N-type doping source is phosphine or arsine.

The requirement of cooling to room temperature after deposition in step (7) is as follows: closing the mixed atmosphere of the silicon deposition chemical source and the doping source, continuously blowing hydrogen to remove the silicon deposition chemical source and the doping source, firstly cooling to 850 ℃, taking out the SOI and placing the SOI in a transmission cavity; filling nitrogen into the conveying cavity, cooling to room temperature, and taking out; the cooling time is about 2-5min.

The requirements of the step (4) are as follows: the chemical liquid is SC1 and SC2; the time is 20min-40min; the surface layer is replaced by SC1 to remove surface impurities, and a clean TM SOI is obtained, wherein the thickness of the SOI surface layer is about 0-15A.

The specific requirements of the step (2) and the step (3) are as follows:

(2) if SiO2 exists at the edge of the SOI, removing the SiO2 at the edge of the clean TMSOI in an edge chamfering mode to ensure that the subsequent process grows to be single crystal Si; if the SOI edge is Si, this step is omitted;

(3) and (3) completely removing the surface damage layer of the TMSOI by adopting a chemical mechanical polishing mode through coarse grinding, fine grinding and polishing to obtain the TMSOI with low defect.

The invention has the following advantages:

1. the invention aims at the method for preparing the high-quality uniform thick-film SOI silicon chip, and aims to achieve the purposes that the uniformity is less than 3%, the damaged layer and the roughness of the top silicon surface of the SOI are completely removed, and the high-quality thick-film SOI is prepared. Firstly, an SOI with good film thickness uniformity is obtained by using a TM-SOI intelligent cutting method, the TM-SOI mode effectively improves the microwave absorption rate and accelerates the film separation, and meanwhile, the stripping surface is a good mirror surface, and the film thickness uniformity of the top layer is higher. And then, a chemical mechanical polishing mode is utilized, and the surface damage layer is completely removed through coarse grinding, fine grinding and polishing, so that the uniform TMSOI with low defects is obtained. Then, HCl is utilized to etch the SOI top layer silicon, the crystal lattice defect is further repaired while the silicon surface layer is corroded, the rough surface is removed, the silicon surface layer can be matched with CMP, and the film thickness uniformity is improved. Finally, a silicon deposition chemical source and a doping source are introduced, and the required film thickness is deposited.

2. Compared with a thick film SOI formed by bonding and grinding and polishing, the uniformity of the method adopted by the invention is improved from less than 10% to less than 3%. Compared with the prior art, the SOI has the uniformity of less than 3 percent, has better uniformity, can remove the damaged layer and the rough phenomenon on the silicon surface of the top layer of the SOI after the TM-SOI process, prepares the high-quality thick-film SOI, and has simpler preparation process and excellent technical effect. The method has expectable huge economic value and social value.

3. In the present invention, the film thickness uniformity was corrected three times: first, surface correction is performed by CMP, then, secondary surface correction is performed by HCL, and finally, third correction is performed on film thickness and uniformity by using silicon growth. Therefore, the uniformity is greatly improved.

4. According to the invention, wet cleaning is used for removing surface impurities, then H2 high-temperature baking is carried out on the surface of the silicon wafer, so that a natural oxide layer on the surface layer of the SOI is effectively removed, and a good surface state is provided for subsequent silicon deposition through HCl corrosion.

5. The method has repeatability, and when the thickness of the top silicon needs to be thickened again, the silicon can be continuously deposited on the basis of the original SOI silicon chip, and the quality of the top silicon is ensured.

6. The invention can control the conductivity type and the carrier concentration of SOI silicon deposition according to requirements.

7. According to the invention, after wet cleaning, the silicon wafer is carried out in the sealed cavity, so that the contact with the outside is avoided, particles on the surface of the silicon wafer are reduced, and the cleanliness of the silicon wafer is improved.

In conclusion, the invention has expectable huge economic value and social value.

Description of the drawings:

FIG. 1 is a schematic view of a process flow for preparing an SOI silicon wafer by using TM-SOI technology;

FIG. 2 is a second schematic process flow diagram of the process for preparing SOI silicon wafer by using TM-SOI technology;

FIG. 3 is a third schematic process flow diagram for preparing an SOI silicon wafer by using TM-SOI technology;

FIG. 4 is a fourth schematic view showing a process flow of manufacturing an SOI silicon wafer using the TM-SOI technology;

FIG. 5 is a fifth process flow diagram of the fabrication of SOI wafers using TM-SOI technology;

FIG. 6 is a schematic view of the substrate after the treatment of steps (2), (3), (4) and (5);

FIG. 7 is a diagram corresponding to step (6).

The specific implementation mode is as follows:

supplementary explanation:

fig. 1-5 are schematic views of the process flow for preparing SOI silicon wafer by TM-SOI technology, wherein:

FIG. 1 illustrates the formation of a thin film layer and a residual layer by ion implantation of ions or molecular ions against the front surface of an original silicon wafer; as shown in fig. 1, ions or molecular ions 06 are first implanted by an ion implantation method against the front surface 05 of the original silicon wafer 01 to form an implanted ion separation layer 03. The implanted ion separation layer 03 separates the original silicon wafer 01 into two regions: one is an implanted region containing implanted ions or molecular ions 06, this is the thin film layer 02; one is the region that contains no implanted or molecular ions 06, which is defined as the residual layer 04.

FIG. 2 illustrates bonding an original silicon wafer to a target silicon wafer to form a bonded structure; as shown in fig. 2, by using the wafer bonding method and combining with appropriate surface plasma treatment, the bonding surfaces of the original silicon wafer 01 and the target silicon wafer 07 can obtain enough bonding strength to join the original silicon wafer 01 and the target silicon wafer 07 into a bonded structure 10.

FIG. 3 illustrates the formation of a bonded structure by heating with a heating device; as shown in fig. 3, the energy absorption capability of the implanted ion separation layer 03 is emphasized in the thin film separation effect, so that when non-activated non-heat, such as microwave, is irradiated, the temperature of the bonding structure 10 is first raised to the transition temperature by the heating device 09, thereby increasing the microwave absorption efficiency of the implanted ion separation layer 03, and simultaneously increasing the absorption of the original silicon wafer 01 to the microwave, so as to facilitate the energy transfer to the implanted ion separation layer 03, thereby achieving a large area and uniform and efficient thin film transfer.

FIG. 4 shows a bonding structure subjected to irradiation with a high-frequency alternating electric or magnetic field; as shown in fig. 4, the bonded structure 10 of the original silicon wafer 01 and the target silicon wafer 07 at the stable transition temperature is then subjected to irradiation 08 with a high-frequency alternating electric or magnetic field. Because the injected ions, molecular ions 06 or ions generated by fragmentation after impact will generate atomic bond pairs with the original silicon wafer 01 atoms by weak bonding, and because of the poor negative electricity, the silicon wafer 01 atoms generate electric dipoles, so the silicon wafer can induce high-frequency alternating electric field or magnetic field irradiation 08, and can combine with the same atoms fragmented from other places to form gas molecules again, and the gas molecules filled seeds are formed at the places. Based on such nuclei, atoms migrating between the cells are captured and polymerized into bubbles.

FIG. 5 shows the transfer of a thin film layer to a target silicon wafer to effect thin film lift-off; as shown in fig. 5, the dielectric constant and the dissipation factor of the original silicon wafer 01 are increased, so that the carriers generated by the dopant source are effectively induced into an accompanying current in the high-frequency alternating electric field or magnetic field, and rapidly flow, and a large amount of heat energy is generated, and the heat energy is directly transferred to the surrounding injected ion gas molecules in an inelastic collision manner, so as to rapidly increase the kinetic energy of the gas molecules, and rapidly increase the volume strain caused by the original bubbles. And finally forming an air bubble layer and splitting.

FIG. 6 shows the edge processed by (2); (3) removing the surface damage layer; (4) cleaning by a wet method; (5) after the treatment of the HCl chemical etching step, obtaining a high-quality thin film SOI silicon wafer;

FIG. 7 shows that step (6) is performed under certain temperature and pressure to grow silicon film by silicon deposition;

the reference numerals for the structures of the parts in fig. 7 have the following meanings: 01-original silicon wafer; 02-a thin film layer; 03-implanting an ion separation layer; 04-the residual layer; 05-front surface of original silicon wafer; 06-molecular ions; 07-a target silicon wafer; 08-irradiation by high-frequency alternating electric field or magnetic field; 09-a heating device; 10-a bonded structure; 11-a top silicon film; 12-silicon deposited top silicon film.

Example 1

A preparation method of a uniform thick film SOI silicon chip is characterized by comprising the following steps: the operation is carried out according to the following requirements in sequence:

(1) selecting an SOI silicon chip formed by TMSOI;

(2) removing the edge of the TMSOI to ensure that the single crystal Si is grown by the subsequent process; the concrete requirements are as follows: if SiO2 exists at the edge of the SOI, removing the SiO2 at the edge of the clean TMSOI in an edge chamfering mode to ensure that the single crystal Si is grown in the subsequent process; if the SOI edge is Si, this step is omitted;

(3) removing all the surface damage layers to obtain a low-defect TMSOI; the concrete requirements are as follows: and (3) completely removing the surface damage layer of the TMSOI by adopting a chemical mechanical polishing mode through coarse grinding, fine grinding and polishing to obtain the TMSOI with low defect.

(4) Replacing the surface layer of the thin film SOI by using wet cleaning to remove surface impurities; the time length requirement for using a long wet cleaning is: the chemical liquid is SC1 and SC2; the time is 20min-40min;

a. loading a TMSOI silicon chip into a sealed reaction chamber;

c. introducing a mixed atmosphere of anhydrous HCl and hydrogen into the reaction chamber, and etching the silicon layer on the surface; the concrete requirements are as follows: the etching temperature is 800-1200 ℃, the pressure is 1-760torr, the etching time is 5-120 seconds, the flow rate of anhydrous HCL is 0.01-20 liters/minute, and the flow rate of hydrogen is 10-100 liters/minute;

(6) introducing mixed atmosphere of hydrogen, a silicon deposition chemical source and a doping source to deposit the required film; wherein the deposition temperature is 900-1250 ℃, and the deposition pressure is 1-760torr; the hydrogen flow is 10-100L/min; the silicon deposition chemistry source (i.e., deposition chemistry feedstock) used is one or a combination of the following: silane, trichlorosilane, dichlorosilane, silicon tetrachloride; the doping source is a P-type doping source or an N-type doping source; the concentration of the doping source is 10-1000ppm. Further preferred requirements are: the P-type doping source is diborane, and the N-type doping source is phosphine or arsine.

(7) Closing the mixed atmosphere of the silicon deposition chemical source and the doping source, continuously blowing hydrogen to remove the silicon deposition chemical source and the doping source, and cooling; the SOI silicon wafer with the top silicon film thickness of 1-20 μm and good uniformity is obtained. The specific requirements for cooling to room temperature after deposition are: closing the mixed atmosphere of the silicon deposition chemical raw material and the doping source, continuously blowing hydrogen to remove the silicon deposition chemical source and the doping source, firstly cooling to 850 ℃, taking out the SOI and placing the SOI in a transfer cavity; filling nitrogen into the conveying cavity, cooling to room temperature, and taking out; the cooling time is about 2-5min.

The embodiment has the following advantages:

1. the embodiment aims at the method for preparing the high-quality uniform thick-film SOI silicon chip, and aims to achieve the purposes that the uniformity is less than 3%, the damaged layer and the roughness of the top silicon surface of the SOI are completely removed, and the high-quality thick-film SOI is prepared. Firstly, the TM-SOI intelligent cutting method is used for obtaining the SOI with good film thickness uniformity, the TM-SOI mode effectively improves the microwave absorption rate and accelerates the film separation, and meanwhile, the stripping surface is a good mirror surface, and the film thickness uniformity of the top layer is high. And then, a chemical mechanical polishing mode is utilized, and the surface damage layer is completely removed through coarse grinding, fine grinding and polishing, so that the uniform TMSOI with low defects is obtained. And then HCl is utilized to etch the SOI top layer silicon, the crystal lattice defect is further repaired while the silicon surface layer is corroded, the rough surface is removed, and the silicon surface layer can be matched with CMP (chemical mechanical polishing) to improve the film thickness uniformity. Finally, a silicon deposition chemical source and a doping source are introduced, and the required film thickness is deposited.

2. Compared with a thick film SOI formed by bonding and grinding and polishing, the uniformity of the method adopted by the embodiment is improved from less than 10% to less than 3%. Compared with the prior art, the SOI in the embodiment has the uniformity of less than 3 percent, has better uniformity, can remove the damaged layer and the rough phenomenon on the silicon surface of the top layer of the SOI after the TM-SOI process, prepares the high-quality thick-film SOI, and has simpler preparation process and excellent technical effect. The method has expectable huge economic value and social value.

3. In this example, the film thickness uniformity was corrected three times: first, surface correction is performed by CMP, then, secondary surface correction is performed by HCL, and finally, third correction is performed on film thickness and uniformity by using silicon growth. Therefore, the uniformity is greatly improved.

4. In the embodiment, wet cleaning is used for removing surface impurities, then H2 high-temperature baking is carried out on the surface of the silicon wafer, so that a natural oxide layer on the surface layer of the SOI is effectively removed, and a good surface state is provided for subsequent silicon deposition through HCl corrosion.

5. The embodiment has repeatability, and when the thickness of the top layer silicon needs to be thickened again, the silicon can be continuously deposited on the basis of the original SOI silicon wafer, and the quality of the top layer silicon is ensured.

6. This embodiment allows for control of the conductivity type and carrier concentration of the SOI silicon deposition as desired.

7. In the embodiment, after wet cleaning, the silicon wafer is carried out in the sealed cavity, so that the silicon wafer is prevented from contacting the outside, particles on the surface of the silicon wafer are reduced, and the cleanliness of the silicon wafer is improved.

In summary, the embodiment has predictable huge economic value and social value.

Example 2

Preparing 3 pieces of SOI wafer materials with the diameter of 200mm after cracking by using TM-SOI technology, carrying out CMP treatment on the pieces, and carrying out coarse grinding, fine grinding and polishing to completely remove surface damage layers of the pieces so as to obtain the TMSOI with low defects. Then, the surface layer of the thin film SOI is replaced by wet cleaning of 40Min using chemical liquids SC1 and SC2 to remove surface impurities. Then placing the film in a reaction chamber of an epitaxial furnace, and specifically comprising the following steps: heating to 1100 deg.C, introducing 80slm hydrogen for 20s, and baking to remove oxide layer. Then heated to 1150 c and chemical vapor polished by introducing 0.5slm of HCl. And after 10s, blowing hydrogen to remove impurities and HCl, cooling to 1050 ℃, pumping to 40torr at low pressure, introducing SiH2Cl2 of 400sccm, and depositing for 60 s. And finally, stopping introducing SiH2Cl2, blowing hydrogen to remove the SiH2Cl2, closing the silicon deposition chemical source, continuously blowing the hydrogen to remove the silicon deposition chemical source, cooling to 850 ℃, taking out the SOI which is finished by the steps and placing the SOI in a transfer cavity. And filling nitrogen into the transmission cavity, cooling, and taking out the silicon wafer after cooling to room temperature. Table 1 shows the measurement data of the top silicon film thickness, and table 2 shows the measurement data of the root mean square Microroughness (RMS Microroughness).

TABLE 1 measurement data of top silicon film thickness in example 2

Table 2 test data for root mean square microroughness (RMS) in example 2

Example 3

Preparing 3 pieces of SOI wafer materials with the diameter of 200mm after cracking by using TM-SOI technology, carrying out CMP treatment on the pieces, and carrying out coarse grinding, fine grinding and polishing to completely remove surface damage layers of the pieces so as to obtain the TMSOI with low defects. Then, the surface layer of the thin film SOI is replaced by wet cleaning with 30Min using chemical liquids SC1 and SC2 to remove surface impurities. Then placing the reaction chamber in an epitaxial furnace, and specifically comprising the following steps: raising the temperature to 1150 ℃, introducing 60slm hydrogen for 10s, and baking the surface to remove the oxide layer. Chemical vapor polishing was performed by introducing 0.3slm of HCl. After 15s, blowing hydrogen to remove impurities and HCl, cooling to 1100 ℃, introducing SiHCl3 of 12g/min and PH3 of 50sccm under normal pressure, and depositing for 300 s. And finally, stopping introducing SiHCl3, blowing hydrogen to remove the SiHCl3, closing the mixed atmosphere of the silicon deposition chemical source and the doping source, continuously blowing the hydrogen to remove the silicon deposition chemical source and the doping source, cooling to 850 ℃, taking out the SOI which is finished by the steps, and placing the SOI in a transfer cavity. And filling nitrogen into the transmission cavity, cooling, and taking out the silicon wafer after cooling to room temperature. Table 3 shows the thickness measurement data of the top silicon film; table 4 shows the root mean square Microroughness (RMS Microroughness) test data.

TABLE 3 measurement data of top silicon film thickness in example 3

Table 4 root mean square microroughness (RMS) test data in example 3

Claims

1. A preparation method of a uniform thick film SOI silicon chip is characterized by comprising the following steps: the operation is carried out according to the following requirements in sequence:

(1) selecting an SOI silicon chip formed by TMSOI;

(3) removing all the surface damage layers to obtain a low-defect TMSOI;

a. loading a TMSOI silicon wafer into a sealed reaction chamber;

c. introducing a mixed atmosphere of anhydrous HCl and hydrogen into the reaction chamber, and etching the silicon layer on the surface of the reaction chamber;

d. closing anhydrous HCl, continuously introducing hydrogen into the reaction chamber, removing impurities and residual HCl in the reaction chamber, and cooling to a deposition temperature;

(7) closing the mixed atmosphere of the silicon deposition chemical source and the doping source, continuously blowing hydrogen to remove the silicon deposition chemical source and the doping source, and cooling; obtaining an SOI silicon chip with the top silicon film thickness of 1-20 mu m and good uniformity;

introducing mixed atmosphere of hydrogen, a silicon deposition chemical source and a doping source in the step (6), wherein the specific requirements of depositing the required film are as follows: the deposition temperature is 900-1250 ℃, the pressure is 1-760torr during deposition, and the hydrogen flow is 10-100 liters/min;

the requirements of the step (4) are as follows: the chemical liquid is SC1 and SC2; the time is 20min-40min;

replacing the surface layer under the action of SC1 to remove surface impurities to obtain a clean TMSOI, wherein the removal thickness of the SOI surface layer is 0-15 angstroms;

the specific requirements of the step (2) and the step (3) are as follows:

(2) if SiO is present at the SOI edge ₂ Removing the edge SiO of the clean TMSOI by edge chamfering ₂ To ensure that the subsequent process grows as single crystal Si; if the SOI edge is Si, this step is omitted;

(3) adopting a chemical mechanical polishing mode, and removing all surface damage layers of the TMSOI through coarse grinding, fine grinding and polishing to obtain the TMSOI with low defect;

in the small step c of the step (5), the specific requirements for removing the surface defects, reducing the roughness and improving the uniformity and obtaining the high-quality thin film SOI silicon wafer by HCl chemical etching are as follows:

etching temperature: 800-1200 ℃, pressure of 1-760torr, time: 5-120 seconds, the flow rate of anhydrous HCl is 0.01-20 liters/minute, and the flow rate of hydrogen is 10-100 liters/minute.

2. The method of preparing a uniform thick film SOI wafer as defined in claim 1 wherein: the silicon deposition chemical source used in the step (6) is one or a combination of the following: silane, trichlorosilane, dichlorosilane, silicon tetrachloride; the doping source is a P-type doping source or an N-type doping source; the concentration of the doping source is 10-1000ppm.

3. The method of preparing a uniform thick film SOI wafer as defined in claim 2 wherein: the P-type doping source is diborane, and the N-type doping source is phosphine or arsine.

4. The method of preparing a uniform thick film SOI wafer as defined in claim 3 wherein:

the requirement of cooling to room temperature after deposition in step (7) is as follows: closing the mixed atmosphere of the silicon deposition chemical source and the doping source, continuously blowing hydrogen to remove the silicon deposition chemical source and the doping source, firstly cooling to 850 ℃, taking out the SOI and placing the SOI in a transmission cavity; filling nitrogen into the conveying cavity, cooling to room temperature, and taking out; the cooling time is 2-5min.