CN110034193A - Multi-fine-grid IBC battery with Topcon passivation structure and preparation method thereof - Google Patents
Multi-fine-grid IBC battery with Topcon passivation structure and preparation method thereof Download PDFInfo
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- CN110034193A CN110034193A CN201910269915.5A CN201910269915A CN110034193A CN 110034193 A CN110034193 A CN 110034193A CN 201910269915 A CN201910269915 A CN 201910269915A CN 110034193 A CN110034193 A CN 110034193A
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- 238000002360 preparation method Methods 0.000 title claims abstract description 15
- 238000002161 passivation Methods 0.000 title abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 34
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims abstract description 34
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 29
- 239000000377 silicon dioxide Substances 0.000 claims abstract description 17
- 235000012239 silicon dioxide Nutrition 0.000 claims abstract description 7
- 239000011159 matrix material Substances 0.000 claims description 30
- 229920005591 polysilicon Polymers 0.000 claims description 16
- 238000009792 diffusion process Methods 0.000 claims description 15
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 7
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 7
- 238000005245 sintering Methods 0.000 claims description 7
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 6
- 238000000151 deposition Methods 0.000 claims description 6
- 230000008021 deposition Effects 0.000 claims description 6
- 238000004518 low pressure chemical vapour deposition Methods 0.000 claims description 6
- 229910052698 phosphorus Inorganic materials 0.000 claims description 6
- 239000011574 phosphorus Substances 0.000 claims description 6
- 238000007650 screen-printing Methods 0.000 claims description 4
- 210000002268 wool Anatomy 0.000 claims description 4
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- 230000004913 activation Effects 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 238000000137 annealing Methods 0.000 claims description 3
- 229910052796 boron Inorganic materials 0.000 claims description 3
- 235000008216 herbs Nutrition 0.000 claims description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 3
- 238000012545 processing Methods 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- 230000006798 recombination Effects 0.000 abstract description 4
- 238000005215 recombination Methods 0.000 abstract description 4
- 239000000758 substrate Substances 0.000 abstract description 4
- 238000006243 chemical reaction Methods 0.000 abstract description 3
- 230000005641 tunneling Effects 0.000 abstract 2
- 238000000034 method Methods 0.000 description 3
- 230000005540 biological transmission Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 238000012546 transfer Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 239000003245 coal Substances 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007613 environmental effect Effects 0.000 description 1
- 230000000415 inactivating effect Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000003208 petroleum Substances 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0216—Coatings
- H01L31/02161—Coatings for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/02167—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/02168—Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells the coatings being antireflective or having enhancing optical properties for the solar cells
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022433—Particular geometry of the grid contacts
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022441—Electrode arrangements specially adapted for back-contact solar cells
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
- H01L31/0352—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions
- H01L31/035272—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their shape or by the shapes, relative sizes or disposition of the semiconductor regions characterised by at least one potential jump barrier or surface barrier
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- H01L31/186—Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
- H01L31/1864—Annealing
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Abstract
The invention aims to disclose a multi-fine-gate IBC battery with a Topcon passivation structure and a preparation method thereof, wherein the multi-fine-gate IBC battery comprises an N-type monocrystalline silicon substrate, wherein a front surface N + doped layer and an antireflection layer are sequentially arranged on the front surface of the N-type monocrystalline silicon substrate, a silicon dioxide tunneling layer is arranged on the back surface of the N-type monocrystalline silicon substrate, an N-type polycrystalline silicon doped layer and a P-type polycrystalline silicon doped layer are respectively arranged on the back surface of the silicon dioxide tunneling layer, the back surface of the N-type polycrystalline silicon doped layer is connected with a negative electrode, and the back surface of the P-type polycrystalline; a Topcon passivation structure is formed by adopting an ultrathin silicon dioxide layer and a doped polycrystalline silicon layer on the back surface, the width proportion of a back P-type emitter is increased, a plurality of thin grid lines are designed on the basis of the widened P-type emitter, the minority carrier recombination rate of the back surface of the battery is reduced, and the open-circuit voltage is improved; series resistance and recombination rate in a minority carrier collecting path in the emitter are reduced, and the conversion efficiency of the battery is further improved.
Description
Technical field
The present invention relates to a kind of IBC battery and preparation method thereof, in particular to a kind of how thin grid of Topcon passivating structure
IBC battery and preparation method thereof.
Background technique
As the petering out of the fossil energies such as coal, petroleum, environmental protection consciousness grow to even greater heights, people recognize further
The importance of Renewable Energy Development.Solar energy is inexhaustible as a kind of clean renewable energy.Exploitation
With using solar energy, the pollution to environment can be greatly reduced, while sufficient energy is provided for the mankind, relative to wind energy, underground heat
The advantages that other new energy such as energy and tide energy, solar energy is high, resource distribution is extensive and safe and reliable with availability, at
For most promising one of the energy.
Interdigitation back contacts (IBC) solar cell is one of highest industrialization solar cell of current transfer efficiency, the electricity
Pond is using N-shaped monocrystalline silicon as substrate, and p-n junction and metal electrode are all placed in cell backside with interdigital shape, and front hides without electrode
Light, and absorption of the battery to light is improved by surface wool manufacturing and increase antireflection layer, obtain very high short circuit current
And photoelectric conversion efficiency.
The technical solution of existing IBC battery are as follows: cleaning and texturing is carried out to silicon wafer first, then battery front surface is subtracted
Secondly reflection and Passivation Treatment are respectively formed p-type emitter and N-type back surface field (BSF) by mask technique in cell backside,
Finally in cell backside silk-screen printing anode and cathode, cell piece is finally made by high temperature sintering.Wherein, cell backside is blunt
Change realizes that passivation effect is general, and dark saturation current is larger using silicon nitride or silica.
Meanwhile back side emitter pole and N-type back surface field (BSF) size ratio generally 800 in existing IBC battery structure:
200, in the actual process, ratio shared by emitter can be higher, and the size ratio for obtaining highest transfer efficiency is 1400:200,
The increase of emitter width can increase less the collection probability in sub- hole, but also increase few son simultaneously and collected laterally by positive electrode
Series resistance in transmission process.
It is accordingly required in particular to which a kind of how thin grid IBC battery and preparation method thereof of Topcon passivating structure, above-mentioned to solve
Existing problem.
Summary of the invention
The purpose of the present invention is to provide how thin grid IBC battery of a kind of Topcon passivating structure and preparation method thereof, needles
To the deficiencies in the prior art, solve the problems, such as that the poor caused lower and few son of open-circuit voltage of cell backside inactivating performance is collected
The larger problem of series resistance in path increases few sub- collection probability, reduces the series resistance in transmission process.
Technical problem solved by the invention can be realized using following technical scheme:
In a first aspect, the present invention provides a kind of how thin grid IBC battery of Topcon passivating structure, which is characterized in that it is wrapped
N type single crystal silicon matrix is included, is disposed with front surface N+ doped layer and antireflection layer in the front of the n type single crystal silicon matrix,
The back side of the n type single crystal silicon matrix is provided with silica tunnel layer, the back side of the silica tunnel layer is set respectively
It is equipped with N-type polycrystalline silicon doped layer and p-type polysilicon doped layer, the N-type polycrystalline silicon doped layer back side is connected with negative electrode, described
The p-type polysilicon doped layer back side is connected with positive electrode.
In one embodiment of the invention, the front surface N+ doped layer with a thickness of 0.1-0.5 μm.
In one embodiment of the invention, the antireflection layer with a thickness of 60-80nm, refractive index 1.8-2.5.
In one embodiment of the invention, the silica tunnel layer with a thickness of 1-3nm.
In one embodiment of the invention, the doping concentration of the N-type polycrystalline silicon doped layer is 1 × 1020cm-3-1×
1021cm-3, with a thickness of 20-100nm, width is 100-600 μm.
In one embodiment of the invention, the doping concentration of the p-type polysilicon doped layer is 1 × 1020cm-3-1×
1021cm-3, with a thickness of 20-100nm, width is 700-1600 μm.
Second aspect, the present invention provide a kind of preparation method of the how thin grid IBC battery of Topcon passivating structure, feature
It is, it includes the following steps:
S1, it selects n type single crystal silicon piece as matrix, and carries out two-sided making herbs into wool processing；
S2, phosphorus diffusion is carried out to n type single crystal silicon front side of matrix using low-voltage high-temperature diffusion furnace；
S3, it anneals at a temperature of 700-1000 DEG C, while thermally grown generation layer of silicon dioxide tunnel layer；
S4, using LPCVD equipment n type single crystal silicon matrix backside deposition boron-doping polysilicon layer；
S5, using PECVD device in n type single crystal silicon matrix front and back sides silicon nitride film；
S6, laser slotting is carried out using silicon nitride layer of the laser slotting equipment to N-type region；
S7, using LPCVD equipment n type single crystal silicon matrix backside deposition p-doped polysilicon layer；
S8, annealing activation is adulterated at a temperature of 700-1000 DEG C boron and phosphorus；
S9, silk-screen printing silver paste and aluminium paste are carried out to n type single crystal silicon matrix, forms positive electrode and negative electrode；
S10, it cell piece is put into sintering furnace is sintered, sintering temperature is 700-1000 DEG C, finally obtains IBC battery.
In one embodiment of the invention, the n type single crystal silicon matrix with a thickness of 140-180 μm, resistivity 1-
10Ω/□。
In one embodiment of the invention, in step s 2, diffusion temperature is 800-1100 DEG C, diffusion time 10-
50 minutes, the square resistance of N+ doped layer was 100-160 Ω/ after diffusion, and junction depth is 0.1-0.5 μm.
In one embodiment of the invention, in step s 5, film thickness 40-80nm；Refractive index is 1.8-2.5.
How thin grid IBC battery of Topcon passivating structure of the invention and preparation method thereof, compared with prior art, passes through
Topcon passivating structure is overleaf formed using ultra-thin silicon dioxide layer and doped polysilicon layer, increases back side p-type emitter
Width ratio designs a plurality of thin grid line on the basis of the p-type emitter widened, and reduces cell backside and lacks sub- recombination rate, promotion is opened
Road voltage；Reduce few son in emitter and battery conversion is further promoted by the series resistance and recombination rate in electrode collecting path
Efficiency achieves the object of the present invention.
The features of the present invention sees the detailed description of the drawings of the present case and following preferable embodiment and obtains clearly
Solution.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the how thin grid IBC battery of Topcon passivating structure of the invention；
Fig. 2 is the schematic diagram of the how thin grid IBC battery preparation method of Topcon passivating structure of the invention.
Specific embodiment
In order to be easy to understand the technical means, the creative features, the aims and the efficiencies achieved by the present invention, tie below
Conjunction is specifically illustrating, and the present invention is further explained.
Embodiment
As shown in Figure 1, the how thin grid IBC battery of Topcon passivating structure of the invention, it includes n type single crystal silicon matrix 1,
It is disposed with front surface N+ doped layer 2 and antireflection layer 3 in the front of n type single crystal silicon matrix 1, in n type single crystal silicon matrix 1
The back side is provided with silica tunnel layer 4, and the back side of silica tunnel layer 4 is respectively arranged with N-type polycrystalline silicon doped layer 5 and P
Type doped layer of polysilicon 6,5 back side of N-type polycrystalline silicon doped layer are connected with negative electrode 8, and 6 back side of p-type polysilicon doped layer is connected with
Positive electrode 7.
In the present embodiment, front surface N+ doped layer 2 with a thickness of 0.1-0.5 μm.
In the present embodiment, antireflection layer 3 with a thickness of 60-80nm, refractive index 1.8-2.5.
In the present embodiment, silica tunnel layer 4 with a thickness of 1-3nm.
In the present embodiment, the doping concentration of N-type polycrystalline silicon doped layer 5 is 1 × 1020cm-3-1×1021cm-3, with a thickness of
20-100nm, width are 100-600 μm；The doping concentration of p-type polysilicon doped layer 6 is 1 × 1020cm-3-1×1021cm-3, thick
Degree is 20-100nm, and width is 700-1600 μm.
As shown in Fig. 2, the preparation method of the how thin grid IBC battery of Topcon passivating structure of the invention, it includes as follows
Step:
S1, select n type single crystal silicon piece as matrix, and carry out two-sided making herbs into wool processing, n type single crystal silicon matrix with a thickness of
140-180 μm, resistivity is 1-10 Ω/；
S2, phosphorus diffusion, diffusion temperature 800-1100 are carried out to n type single crystal silicon front side of matrix using low-voltage high-temperature diffusion furnace
DEG C, diffusion time is 10-50 minutes, and the square resistance of N+ doped layer is 100-160 Ω/ after diffusion, and junction depth is 0.1-0.5 μ
m；
S3, it anneals at a temperature of 700-1000 DEG C, while thermally grown generation layer of silicon dioxide tunnel layer；
S4, using LPCVD equipment n type single crystal silicon matrix backside deposition boron-doping polysilicon layer；
S5, using PECVD device in n type single crystal silicon matrix front and back sides silicon nitride film, film thickness 40-80nm；Refraction
Rate is 1.8-2.5；
S6, laser slotting is carried out using silicon nitride layer of the laser slotting equipment to N-type region；
S7, using LPCVD equipment n type single crystal silicon matrix backside deposition p-doped polysilicon layer；
S8, annealing activation is adulterated at a temperature of 700-1000 DEG C boron and phosphorus；
S9, silk-screen printing silver paste and aluminium paste are carried out to n type single crystal silicon matrix, forms positive electrode and negative electrode；
S10, it cell piece is put into sintering furnace is sintered, sintering temperature is 700-1000 DEG C, finally obtains IBC battery.
The above shows and describes the basic principles and main features of the present invention and the advantages of the present invention.The technology of the industry
Personnel are it should be appreciated that the present invention is not limited to the above embodiments, and the above embodiments and description only describe this
The principle of invention, without departing from the spirit and scope of the present invention, various changes and improvements may be made to the invention, these changes
Change and improvement all fall within the protetion scope of the claimed invention, the claimed scope of the invention by appended claims and its
Equivalent thereof.
Claims (10)
1. a kind of how thin grid IBC battery of Topcon passivating structure, which is characterized in that it includes n type single crystal silicon matrix, described
The front of n type single crystal silicon matrix is disposed with front surface N+ doped layer and antireflection layer, in the back of the n type single crystal silicon matrix
Face is provided with silica tunnel layer, and the back side of the silica tunnel layer is respectively arranged with N-type polycrystalline silicon doped layer and p-type
Doped layer of polysilicon, the N-type polycrystalline silicon doped layer back side are connected with negative electrode, the connection of the p-type polysilicon doped layer back side
There is positive electrode.
2. the how thin grid IBC battery of Topcon passivating structure as described in claim 1, which is characterized in that the front surface N+
Doped layer with a thickness of 0.1-0.5 μm.
3. the how thin grid IBC battery of Topcon passivating structure as described in claim 1, which is characterized in that the antireflection layer
With a thickness of 60-80nm, refractive index 1.8-2.5.
4. the how thin grid IBC battery of Topcon passivating structure as described in claim 1, which is characterized in that the silica
Tunnel layer with a thickness of 1-3nm.
5. the how thin grid IBC battery of Topcon passivating structure as described in claim 1, which is characterized in that the N-type polycrystalline silicon
The doping concentration of doped layer is 1 × 1020cm-3-1×1021cm-3, with a thickness of 20-100nm, width is 100-600 μm.
6. the how thin grid IBC battery of Topcon passivating structure as described in claim 1, which is characterized in that the p-type polysilicon
The doping concentration of doped layer is 1 × 1020cm-3-1×1021cm-3, with a thickness of 20-100nm, width is 700-1600 μm.
7. a kind of preparation method of the how thin grid IBC battery of Topcon passivating structure, which is characterized in that it includes the following steps:
S1, it selects n type single crystal silicon piece as matrix, and carries out two-sided making herbs into wool processing；
S2, phosphorus diffusion is carried out to n type single crystal silicon front side of matrix using low-voltage high-temperature diffusion furnace；
S3, it anneals at a temperature of 700-1000 DEG C, while thermally grown generation layer of silicon dioxide tunnel layer；
S4, using LPCVD equipment n type single crystal silicon matrix backside deposition boron-doping polysilicon layer；
S5, using PECVD device in n type single crystal silicon matrix front and back sides silicon nitride film；
S6, laser slotting is carried out using silicon nitride layer of the laser slotting equipment to N-type region；
S7, using LPCVD equipment n type single crystal silicon matrix backside deposition p-doped polysilicon layer；
S8, annealing activation is adulterated at a temperature of 700-1000 DEG C boron and phosphorus；
S9, silk-screen printing silver paste and aluminium paste are carried out to n type single crystal silicon matrix, forms positive electrode and negative electrode；
S10, it cell piece is put into sintering furnace is sintered, sintering temperature is 700-1000 DEG C, finally obtains IBC battery.
8. the preparation method of the how thin grid IBC battery of Topcon passivating structure as claimed in claim 7, which is characterized in that institute
State n type single crystal silicon matrix with a thickness of 140-180 μm, resistivity is 1-10 Ω/.
9. the preparation method of the how thin grid IBC battery of Topcon passivating structure as claimed in claim 7, which is characterized in that
In step S2, diffusion temperature is 800-1100 DEG C, and diffusion time is 10-50 minutes, and the square resistance of N+ doped layer is after diffusion
100-160 Ω/, junction depth are 0.1-0.5 μm.
10. the preparation method of the how thin grid IBC battery of Topcon passivating structure as claimed in claim 7, which is characterized in that
In step S5, film thickness 40-80nm；Refractive index is 1.8-2.5.
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Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110634964A (en) * | 2019-09-26 | 2019-12-31 | 苏州腾晖光伏技术有限公司 | Efficient crystalline silicon solar cell and preparation method thereof |
| CN112103364A (en) * | 2020-10-13 | 2020-12-18 | 中国科学院宁波材料技术与工程研究所 | Selective emitter structure, preparation method and application thereof |
| CN114464686A (en) * | 2021-12-28 | 2022-05-10 | 浙江爱旭太阳能科技有限公司 | Novel tunneling passivation contact structure battery and preparation method thereof |
| CN115207137A (en) * | 2022-09-16 | 2022-10-18 | 金阳(泉州)新能源科技有限公司 | Combined passivation back contact battery and preparation method thereof |
| CN117594673A (en) * | 2024-01-18 | 2024-02-23 | 隆基绿能科技股份有限公司 | Back contact battery and photovoltaic module |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117594673A (en) * | 2024-01-18 | 2024-02-23 | 隆基绿能科技股份有限公司 | Back contact battery and photovoltaic module |
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