CN110011724A

CN110011724A - A kind of method of reseptance of ship automatic identification system, receiver and telecommunication satellite

Info

Publication number: CN110011724A
Application number: CN201910313900.4A
Authority: CN
Inventors: 周昊苏; 陆文斌; 吕振彬; 周雷; 曾媛; 秦夷; 朱秋菊
Original assignee: Shanghai Aerospace Measurement Control Communication Institute
Current assignee: Shanghai Aerospace Measurement Control Communication Institute
Priority date: 2019-04-18
Filing date: 2019-04-18
Publication date: 2019-07-12
Anticipated expiration: 2039-04-18
Also published as: CN110011724B

Abstract

The invention discloses a kind of method of reseptance of ship automatic identification system, receiver and telecommunication satellites.Wherein, method of reseptance is the following steps are included: AIS rf signal reception, filter and amplification, analog-to-digital conversion, multi-Level Orthogonal down coversion and filtering extraction, storage, constant false alarm rate inspection, carrier synchronization, matched filtering, symbol synchronization, whitening filtering, demodulating and decoding；Receiver includes radio-frequency front-end processing module and baseband signal processing module, radio-frequency front-end processing module is used to carry out intermediate frequency filtering to the received radiofrequency signal of institute and power amplifier, radio frequency sampling, quadrature frequency conversion and filtering extraction processing obtain baseband signal, and baseband signal processing module is for detecting the AIS message in AIS baseband signal, synchronizing, demodulating and decoding.The present invention is with demodulation performance is excellent, economizes on resources, the technical characterstic of collision alarm processing.

Description

Receiving method of ship automatic identification system, receiver and communication satellite

Technical Field

The invention belongs to the technical field of ship satellite communication, and particularly relates to a receiving method, a receiver and a communication satellite of an automatic ship identification system.

Background

The intercommunication and identification among ships are the prerequisite for the safety of marine navigation and the management of ship traffic. In order to avoid the loss of human lives and properties and the pollution of marine ecological environment caused by ship collision, an Automatic Identification System (AIS) for ships is developed. The AIS operates in the offshore very high frequency band (30 MHz-300 MHz), while the AIS transmitter can only cover an area of about 40 nautical miles in diameter due to the limited height of shore-based, shipborne antennas. With the rapid development of socioeconomic, the trade and political interactions between countries are becoming more and more frequent. The increase of boats and ships quantity leads to the increase of ocean accident rate, and pirate's brisk is rampant day by day in addition, and ocean vessel's navigation safety receives huge threat, therefore, the marine administrative department expects to carry out real-time supervision and tracking to ocean vessel's navigation urgently, improves vessel's navigation's security.

Ships in the global range can be monitored and tracked in real time through the networking satellite, and therefore the navigation safety of ocean-going ships is guaranteed. However, AIS satellite-borne receivers face new technical problems: (1) in a land/sea-based AIS system, relative operation speeds between ships and between the ships and a shore base station are low, and generated Doppler frequency offset is small, so that the Doppler frequency offset is not considered as a main performance influence factor by the conventional AIS signal demodulation algorithm. However, the operation speed of the satellite is very fast compared to the operation speed of the ship, so that the AIS signals transmitted by the ship and received by the satellite-borne receiver generate large doppler frequency offset, and the large doppler frequency offset deteriorates the performance of the existing AIS signal demodulation algorithm. (2) Land/sea based AIS systems employ ad-hoc time division multiple access (sottdma) access technology to coordinate ship communications within an area, avoiding message collisions within the sottdma cells. However, due to the wide field of view of the satellite-borne receiver, many SOTDMA cells can be covered, and currently there is no corresponding mechanism for coordinating communication between cells and a satellite. Therefore, AIS signals transmitted by ships in different sottdma cells may arrive at the satellite-borne receiver at the same time, resulting in message collisions, and the colliding AIS signals may affect the demodulation performance of each other. (3) In land/sea based AIS systems, the distances between the vessels and the shore base stations are close. The AIS signal transmission time delay is short, and transmission can be finished in one time slot. The 14bit transmission delay reserved in the ITU-R M.1371 technical standard can completely meet the requirements of the land/sea-based AIS system. However, as the distance between the satellite-borne receiver and the ship is long, the transmission time of the AIS signal is prolonged, and the transmission often needs to cross a time slot to be ended. Therefore, the on-board receiver cannot know the specific arrival time of the AIS signal, whether or not the satellite is equipped with coordinated Universal Time (UTC). Therefore, the satellite-borne receiver needs to detect whether the AIS signal arrives, otherwise, the subsequent processing module is always in a working state, and unnecessary resource waste is caused. (4) The land/sea-based AIS system has short signal transmission distance and low link loss. However, for the satellite-borne receiver, because the AIS signal transmission distance is long and the link loss is large, the signal-to-noise ratio of the AIS signal received by the satellite is low, and the requirement on the performance of the demodulation algorithm is high, whereas the demodulation performance of the conventional demodulation algorithm under the low signal-to-noise ratio is poor.

Disclosure of Invention

The technical purpose of the invention is to provide a receiving method, a receiver and a communication satellite of an automatic ship identification system, which have the technical characteristics of excellent demodulation performance, resource saving and collision signal processing.

In order to solve the problems, the technical scheme of the invention is as follows:

the invention provides a receiving method of an automatic ship identification system, which comprises the following steps:

s1: receiving an AIS radio frequency signal sent by an automatic ship identification system, and directly sampling the AIS radio frequency signal to obtain an AIS baseband signal;

s2: performing frame synchronization on the AIS baseband signal to determine an accurate data starting position of the AIS baseband signal;

s3: acquiring carrier frequency estimation and timing error estimation of the AIS baseband signal according to the AIS baseband signal, and synchronizing the AIS baseband signal according to the carrier frequency estimation and the timing error estimation;

s4: and demodulating and decoding the AIS baseband signal by a cyclic redundancy check error correction decoder to obtain the message content in the AIS radio frequency signal.

According to an embodiment of the present invention, the step S1 specifically includes the following steps:

s11: receiving the AIS radio frequency signal, and performing intermediate frequency filtering and amplification on the AIS radio frequency signal;

s12: performing radio frequency direct sampling on the intermediate frequency filtered and amplified AIS radio frequency signal to obtain a digitized AIS digital signal;

s13: and carrying out multi-stage orthogonal down-conversion and decimation filtering on the AIS digital signal to obtain the AIS baseband signal.

According to an embodiment of the present invention, the step S3 specifically includes the following steps:

s31: acquiring the carrier frequency estimation according to the spectral line characteristic of the second-order cyclic cumulant of the GMSK signal, and carrying out carrier synchronization according to the carrier frequency estimation;

s32: performing matched filtering on the AIS baseband signal according to a first term of a continuous phase modulation signal Laurent expansion;

s33: acquiring the timing error estimation according to the AIS baseband signal, and carrying out code element synchronization according to the timing error estimation;

s34: and whitening colored noise on the AIS baseband signal after the code element synchronization to obtain a data bit and a frame check bit signal of the AIS baseband signal so as to send the data bit and the frame check bit signal to the cyclic redundancy check error correction decoder for demodulation and decoding.

According to an embodiment of the present invention, after the step S1 is executed and before the step S2 is executed, the method further includes the step a 1:

storing the AIS baseband signal;

detecting whether the AIS baseband signal is stored based on a constant false alarm rate: if the AIS baseband signal exists, performing the steps S2 to S4; and if the AIS baseband signal does not exist, executing working standby.

According to an embodiment of the present invention, the crc decoder performs the demodulation decoding on the AIS baseband signal based on a Viterbi algorithm, wherein the crc decoder is a crc noncoherent Viterbi decoder, the crc noncoherent Viterbi decoder is provided with a crc shift register, and the step S4 specifically includes the following steps:

s41: establishing an extended state of the cyclic redundancy check error correction decoder according to a branch metric state of the Viterbi algorithm and a state of the cyclic redundancy check shift register, and then establishing a state transfer table of the cyclic redundancy check error correction decoder according to the extended state;

the path metric of the expansion state corresponding to the initial state of the cyclic redundancy check shift register at the time of 0 is set to be 0, and the initial state is 0 xFFFF; setting the path metric of all the expansion states except the initial state at the 0 moment to be minus infinity; the number of continuous 1 and the number of interpolation 0 of all the expansion states at the 0 moment are set to be 0;

s42: calculating a transfer variable of each expansion state at the n moment according to the path metric and the possible transition state of each expansion state at the n moment;

s43: selecting an optimal path according to the possible transition path metric value of each expansion state at the n +1 moment, and updating the state of each transition variable;

s44: obtaining a most possible decoding sequence corresponding to the AIS baseband signal by finding and backtracking an optimal path in all path metrics of which the state of the cyclic redundancy check shift register is 0x0000 from time 184 to time 188;

s45: and analyzing the content of the decoding sequence to obtain the message content corresponding to the AIS baseband signal.

After the step S4 is executed, the method further includes a step S5:

s51: performing parameter estimation according to the decoding sequence to obtain estimated values of amplitude, phase, frequency offset and time delay of the AIS baseband signal;

s52: reconstructing the decoding sequence according to the decoding sequence and the estimated values of the amplitude, the phase, the frequency offset and the time delay to obtain an AIS reconstruction signal;

s53: removing the AIS reconstruction signal from the stored AIS baseband signal.

According to an embodiment of the present invention, the AIS baseband signals include a first baseband signal and a second baseband signal, the first baseband signal is a baseband signal corresponding to a channel of 161.975MHz, and the second baseband signal is a baseband signal corresponding to a channel of 162.025MHz, wherein the first baseband signal and the second baseband signal are processed through the steps S2 to S4, respectively, to obtain message contents of different channels.

The invention also provides a receiver of the automatic ship identification system, which comprises: the system comprises a radio frequency front-end processing module and a baseband signal processing module, wherein the baseband signal processing module comprises a frame synchronization unit, a preprocessing module and a cyclic redundancy check error correction decoder;

the radio frequency front-end processing module is used for receiving an AIS radio frequency signal sent by an automatic ship identification system, directly sampling the AIS radio frequency signal and acquiring an AIS baseband signal;

the frame synchronization unit is used for carrying out frame synchronization on the AIS baseband signal so as to determine the accurate data starting position of the AIS baseband signal;

the preprocessing module is further used for acquiring carrier frequency estimation and timing error estimation of the AIS baseband signal according to the AIS baseband signal and synchronizing the AIS baseband signal according to the carrier frequency estimation and the timing error estimation;

and the cyclic redundancy check error correction decoder is used for demodulating and decoding the AIS baseband signal to obtain the message content in the AIS radio frequency signal.

According to an embodiment of the present invention, the rf front-end processing module includes a filtering amplifying unit, an analog-to-digital converting unit, and a digital down-conversion and decimation filtering unit;

the filtering and amplifying unit is used for receiving the AIS radio frequency signal and carrying out intermediate frequency filtering and amplification on the AIS radio frequency signal;

the analog-to-digital conversion unit is used for carrying out radio frequency direct sampling on the AIS radio frequency signal subjected to the intermediate frequency filtering and the amplification to obtain a digitized AIS digital signal;

the digital down-conversion and decimation filtering unit is used for carrying out multi-stage orthogonal down-conversion and decimation filtering on the AIS digital signal to obtain the AIS baseband signal.

According to an embodiment of the present invention, the preprocessing module includes a carrier synchronization unit, a matched filtering unit, a symbol synchronization unit, and a whitening filtering unit;

the carrier synchronization unit is used for acquiring the carrier frequency estimation according to the spectral line characteristic of the GMSK signal second-order cyclic cumulant and carrying out carrier synchronization according to the carrier frequency estimation;

the matched filtering unit is used for performing matched filtering on the AIS baseband signal according to a first term of a continuous phase modulation signal source expansion;

the code element synchronization unit is used for acquiring the timing error estimation according to the AIS baseband signal and carrying out code element synchronization according to the timing error estimation;

and the whitening filtering unit is used for whitening colored noise of the AIS baseband signal after the code element synchronization to obtain a data bit and a frame check bit signal of the AIS baseband signal so as to send the data bit and the frame check bit signal to the cyclic redundancy check error correction decoder for demodulation and decoding.

According to an embodiment of the present invention, the baseband signal processing module further includes a memory and a constant false alarm rate detector;

the memory is used for storing the AIS baseband signal;

the constant false alarm rate detector is used for detecting whether the AIS baseband signal is stored or not based on the constant false alarm rate: if the AIS baseband signal exists, executing the processing of the AIS baseband signal by the baseband signal processing module; and if the AIS baseband signal does not exist, the baseband signal processing module works and waits.

According to an embodiment of the present invention, the cyclic redundancy check error correction decoder performs the demodulation decoding on the AIS baseband signal based on a Viterbi algorithm, wherein the cyclic redundancy check error correction decoder is a cyclic redundancy check error correction noncoherent Viterbi decoder, and the cyclic redundancy check error correction noncoherent Viterbi decoder is provided with a cyclic redundancy check shift register;

the expansion state of the cyclic redundancy check error correction decoder is an expansion state constructed according to the branch measurement state of the Viterbi algorithm and the state of the cyclic redundancy check shift register, and the state transfer table of the cyclic redundancy check error correction decoder is a state transfer table constructed according to the expansion state; the path metric of the expansion state corresponding to the initial state of the cyclic redundancy check shift register at the time of 0 is set to be 0, and the initial state is 0 xFFFF; setting the path metric of all the expansion states except the initial state at the 0 moment to be minus infinity; the number of continuous 1 and the number of interpolation 0 of all the expansion states at the 0 moment are set to be 0;

the cyclic redundancy check error correction decoder is used for calculating a transfer variable of each expansion state at the n moment according to the path metric and the possible transition-out state of each expansion state at the n moment, selecting an optimal path according to the possible transition path metric value of each expansion state at the n +1 moment, and updating the state of each transfer variable;

the crc decoder is further configured to find and trace back an optimal path among all path metrics from time 184 to time 188, where the state of the crc shift register is 0x0000, to obtain a most likely decoded sequence corresponding to the AIS baseband signal;

the baseband signal processing module further comprises a message analyzing unit, and the message analyzing unit is used for analyzing the content of the decoding sequence to obtain the message content corresponding to the AIS baseband signal.

According to an embodiment of the present invention, the baseband signal processing module further includes a signal reconstruction and cancellation module, where the signal reconstruction and cancellation module is configured to perform parameter estimation according to the decoding sequence to obtain an estimated value of amplitude, phase, frequency offset, and time delay of the AIS baseband signal, and reconstruct the decoding sequence according to the decoding sequence and the estimated value of amplitude, phase, frequency offset, and time delay to obtain an AIS reconstructed signal; the signal reconstruction and cancellation module is further configured to cancel the AIS reconstruction signal from the stored AIS baseband signal.

According to an embodiment of the present invention, the AIS baseband signals include a first baseband signal and a second baseband signal, the first baseband signal is a baseband signal corresponding to a channel of 161.975MHz, and the second baseband signal is a baseband signal corresponding to a channel of 162.025MHz, where the receiver is provided with two baseband signal processing modules, which are respectively configured to process the first baseband signal and the second baseband signal to obtain message contents of different channels.

The invention also provides a communication satellite of the automatic ship identification system, which comprises the receiver of the automatic ship identification system in any one embodiment.

Due to the adoption of the technical scheme, compared with the prior art, the invention has the following advantages and positive effects:

(1) according to the invention, the AIS baseband signal is synchronized through carrier frequency estimation and timing error estimation, and the AIS baseband signal is demodulated and decoded through the cyclic redundancy check error correction decoder, so that the technical problems of signal demodulation deterioration due to large Doppler frequency offset and poor demodulation performance under low signal-to-noise ratio are solved, and the technical effect of excellent demodulation and decoding performance is achieved;

(2) the invention utilizes the state transfer characteristic of the cyclic redundancy shift check register when the receiving end carries out error detection operation, namely: if no error bit exists between the data bit and the frame check bit in the transmission process, the cyclic redundancy check register is changed from an initial state of 0xFFFF to 0x0000, the invention introduces a cyclic redundancy check error correction concept, combines a branch measurement state of the Viterbi algorithm with the state of the cyclic redundancy check register, and determines the optimal path of the Viterbi algorithm in an expanded state based on the state transfer characteristic of the cyclic redundancy check register during error-free transmission, thereby ensuring that the path can pass through cyclic redundancy check, reducing the frame error rate of a decoding algorithm, and improving the decoding and demodulating performance;

(3) according to the invention, the AIS baseband signal is stored, whether the AIS baseband signal exists is detected based on the constant false alarm rate, if the AIS baseband signal exists, the signal is processed, otherwise, the AIS baseband signal is in standby operation, the technical problem that when the AIS radio frequency signal arrives cannot be known is solved, and the technical effect of saving resources is achieved;

(4) the invention reconstructs the demodulated and decoded baseband signals to obtain the reconstructed signals, and eliminates the demodulated and decoded baseband signals in the stored AIS baseband signals, thereby solving the technical problem that the demodulation performance is influenced by the message collision among the AIS radio frequency signals and achieving the technical effect of receiving and demodulating a plurality of AIS radio frequency signals which collide with each other.

Drawings

FIG. 1 is a time slot structure diagram of an AIS signal of an automatic identification system for a ship;

FIG. 2 is a graph of a Gaussian low pass filter impulse response;

FIG. 3 is a high level block diagram of the on-board AIS receiver of the present invention;

FIG. 4a is a schematic diagram of the spectrum of an RF signal before direct sampling at 48MHz in accordance with the present invention;

FIG. 4b is a schematic diagram of the spectrum of the RF signal after the 48MHz RF direct sampling of the present invention;

FIG. 5 is a schematic block diagram of the digital down conversion and decimation filtering unit of the present invention

FIG. 6 is a block diagram of a CIC filter;

fig. 7 is a block diagram of a structure of a direct type FIR filter;

FIG. 8 is a block diagram of the constant false alarm rate detector of the present invention;

FIG. 9a is a spectral plot of a GMSK signal prior to frequency domain filtering for second-order cyclic cumulant;

FIG. 9b is a spectral diagram of a GMSK signal after second-order cyclic cumulant frequency domain filtering according to the present invention;

FIG. 10 is a block diagram of a CRC error correction non-coherent Viterbi decoder of the present invention;

FIG. 11 is a block diagram of an extended state structure of a CRC error correction decoder of the present invention;

FIG. 12 is a schematic diagram of an AIS message collision for an AIS receiver of the present invention;

FIG. 13 is a block diagram of the structure of the waveform reconstruction rotation demodulation of the present invention;

fig. 14 is a block diagram of the structure of the separation of two AIS radio frequency signals according to the present invention.

Detailed Description

The receiving method, the receiver and the communication satellite of the automatic ship identification system according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. Advantages and features of the present invention will become apparent from the following description and from the claims.

International telecommunication Union assigns to AIS systemTwo channels, AIS1(CH87B, 161.975MHz) and AIS2(CH88B, 162.025MHz), respectively. The ITU-R m.1371-5 standard specifies 1min as 1 frame, divided into 2250 slots. Each slot is approximately 26.67ms, since the AIS system has a symbol transmission rate R_b9.6kbps, and thus the data length of each slot is 256 bits. The information data in the AIS is transmitted in a packet mode according to the high-level data link control structure standard. The AIS slot structure is shown in fig. 1.

The detailed analysis of the information content in fig. 1 is as follows:

rising edge: the buffering time for the start-up of the rf receiver is approximately 800 mus.

Training sequence: for the transceiving end clock alignment, symbol synchronization, also called bit synchronization code. The training sequence is a set of information sequences with the length of 24 bits, which are alternated between '0' and '1'. When the training sequence is detected, the receiving end can quickly realize the code element synchronization.

Start flag: '01111110', indicates the start of the message, packed by a standard HDLC structure.

Data bit: the information content indicating the real transmission in the data packet is usually 168 bits in length, and if the length of the data to be transmitted exceeds 168 bits, a plurality of time slots need to be selected for carrying out packet transmission on the data.

Frame check sequence: the check code is a check code obtained by performing cyclic redundancy check on data bits, and the length of the check code is 16 bits. The generator polynomial used by the AIS system to calculate the check code is CCITT-16 defined in the international standard ISO/IEC 13239: 2002.

End mark: indicating the end of a data transmission of a slot, has the same data structure as the start flag.

Buffering position: including 4-bit interpolation padding, 14-bit distance delay and 6-bit synchronization jitter, and a total length of 24 bits.

The following problems need to be noted in the process of packaging the AIS information data:

bit filling: for a data stream of 184bit length composed of data bits and frame check sequence, if 5 '1's are continuously present, then 1 '0' must be inserted later, so as to prevent the start mark or the end mark from appearing in the data stream, because if '01111110' appears in the demodulated data, the subsequent signal processing will be wrong when looking for the start mark or the end mark.

HDLC byte inversion: the AIS standard specifies that data to be transmitted is segmented, and 8-bit information bits are arranged in order from high to low as one byte, and when transmitting, the information bits in the byte are transmitted in order from low to high.

AIS adopts binary GMSK modulation (modulation index is 0.5), and time-bandwidth product BT_bBetween 0.4 and 0.5 (nominal 0.4), the AIS baseband signal expression is

Wherein, α_nIs a reverse non-return-to-zero encoded sequence, α_n∈{±1}，T_bIs the symbol period. g (t) represents the Gaussian low-pass filter impulse response, as shown in FIG. 2 (BT)_b＝0.4)。

Example 1

Referring to fig. 3, the present embodiment provides a receiving method of an automatic ship identification system, including the following steps:

s4: and the cyclic redundancy check error correction decoder demodulates and decodes the AIS baseband signal to obtain the message content in the AIS radio frequency signal.

The present embodiment will now be described in detail:

1) step S1: receiving an AIS radio frequency signal sent by an automatic identification system of a ship, directly sampling the AIS radio frequency signal, and acquiring an AIS baseband signal:

specifically, the AIS baseband signals include a first baseband signal and a second baseband signal, the first baseband signal is a baseband signal corresponding to a channel of 161.975MHz, and the second baseband signal is a baseband signal corresponding to a channel of 162.025MHz, where the first baseband signal and the second baseband signal are processed through steps S2 to S4, respectively, to obtain message contents of different channels.

Specifically, step S1 specifically includes the following steps: s11: receiving the AIS radio frequency signal, and carrying out intermediate frequency filtering and amplification on the AIS radio frequency signal; s12: carrying out radio frequency direct sampling on the AIS radio frequency signal subjected to the intermediate frequency filtering and amplification to obtain a digitized AIS digital signal; s13: and carrying out multi-stage orthogonal down-conversion and decimation filtering on the AIS digital signal to obtain an AIS baseband signal.

In step S11, the received original AIS radio frequency signal is subjected to intermediate frequency filtering and amplification by a filter and an amplifier.

In step S12, the AIS radio frequency signal is directly sampled by the analog-to-digital converter ADC, the a/D is made to be as close to the antenna as possible based on the idea of software radio, taking 48MHz as the radio frequency direct sampling rate as an example, the frequency spectrum schematic diagrams of the radio frequency signal before and after sampling are respectively shown in fig. 4a and 4 b;

in step S13, a digital down-conversion and decimation filtering module performs multi-stage orthogonal down-conversion and decimation filteringThe functional block diagram of the down-conversion and decimation filtering module is shown in fig. 5, where the analog signal r (t) is filtered and amplified by f_sSampling the intermediate frequency at a sampling frequency of 48MHz, obtaining a digital signal r (n) through an A/D converter, obtaining a low-intermediate frequency complex signal containing AIS1 and AIS2 after quadrature down-conversion and low-pass filtering, separating channels through complex quadrature down-conversion and low-pass filtering, and outputting complex baseband signals r of two channels AIS1 and AIS2_I1(n)+jr_Q1(n) and r_I2(n)+jr_Q2(n)。

Since the AIS baseband system design requires that the data rate of the output complex baseband signal is 8 times the AIS signal symbol rate, i.e. 76.8kHz, filtering and extraction must be included in the down-conversion process, and the total extraction factor D is 48MHz/76.8kHz 625. In order to reduce the hardware resource overhead, a multi-stage filtering extraction method is adopted, and the resource consumption of the filter can be effectively reduced by reducing the data rate. The decimation filtering is therefore contained in two blocks, filtering decimation (I) and filtering decimation (II), respectively.

In this embodiment, the total decimation factor D is 625 and is decomposed into D₁×D₂×D₃The decimation filtering (I) module includes two filtering (25 th-order CIC filtering and FIR1 low-pass filtering, respectively), two decimation (25 times decimation by D1 and 5 times decimation by D2), and the decimation filtering (II) module includes two low-pass filtering (low-pass FIR2 and low-pass FIR3 filtering) and one decimation by D3 by 5 times decimation.

Compared with a common FIR low-pass filter, the CIC filter is simpler, saves a plurality of multiplier resources and simplifies hardware. In the CIC filter structure adopted in this embodiment, as shown in fig. 6, the CIC filter is essentially a low-pass FIR filter with coefficients of 1.

Fig. 7 is a block diagram showing the structure of a direct FIR filter, which is composed of a multiplier, a multi-bit adder, and a shift register. It can be seen from fig. 7 that k shift registers and multipliers and k-1 adders are required for k-th order FIR filters.

Signal passingAfter CIC filtering extraction, the data rate is reduced to f_s1＝f_s/D₁1.92 MHz. From the input signal spectrum, the passband frequency of the FIR1 at this time is taken to be f, taking into account the Doppler shift of the signal within + -4kHz_p135 kHz; to prevent aliasing of the signal resulting from decimation, the stopband cut-off frequency f_a1Determined by a decimation factor, i.e. f_a1＝f_s1/2D₂192kHz, delta is taken from the stop-band attenuation according to the index₁The filter order designed according to the above conditions is 19 th order (less hardware resource consumption) at 45 dB.

FIR2 passband frequency f_p210kHz, the stop-band cut-off frequency is determined by a decimation factor, i.e. f_a2＝f_s2/2D₃A 25-order filter with a passband attenuation of 3dB and a stopband attenuation of 45dB is obtained at 38.4kHz, requiring at least 25 multipliers from a direct filter structure perspective.

In FIR3 low pass filter design, the passband frequency satisfies f_p3≥B_b10kHz (including doppler shift of 4kHz maximum) and stop band frequency as close as possible to the signal's cut-off frequency, the stop band attenuation is 55dB, and a 28 th order filter is satisfactory.

If the baseband signals are to be obtained, the AIS1 and AIS2 need to be respectively subjected to down-conversion, and because the two frequency channels are close to each other and the 25kHz distance is smaller relative to the sampling rate, a hierarchical down-conversion method is adopted, that is, two AIS narrowband signals on the two frequency channels are regarded as multi-channel broadband signals, and are subjected to first quadrature down-conversion, and then the two channels are separated through complex quadrature down-conversion.

Finally, after the AIS signal passes through a frame system of radio frequency sampling and digital down conversion, two paths of complex signals r with the data rate of 76.8kHz are obtained_I1(n)+jr_Q1(n) and r_I2(n)+jr_Q2(n), and steps S2 to S4 are performed, respectively.

2) Preferably, the method further comprises the step a1 after the step S1 is executed and before the step S2 is executed: storing the AIS baseband signal; whether AIS baseband signals are stored or not is detected based on the constant false alarm rate: if the AIS baseband signal exists, performing steps S2 to S4; and if the AIS baseband signal does not exist, executing working standby.

And storing the AIS baseband signal through a storage module.

Conventional satellite-borne receivers do not know the specific arrival times of the AIS signals and therefore need to detect the AIS signals. For a satellite-borne receiver with a height of 600km, the transmission delay of the AIS signal is between 2ms and 9.43ms (corresponding to 19.2 bits to 90.5 bits), already exceeding the 14bit transmission delay reserved by the slot structure.

A24-bit training sequence (0101.. 0101) composed of '0' and '1' alternately is subjected to NRZI coding to obtain a sequence { -1-1+ 1.. 1-1+1+1 }. It can be seen that the period of the NRZI encoded training sequence is 4T_bWhen fourier transform is performed, the spectral energy is concentrated at f 1/4T_bInteger multiple frequency point and mainly f ═ 1/4T_bAt two frequency points. Based on this characteristic, the AIS signal constant false alarm detector is structured as shown in fig. 8, and the length of the signal detected by the detector is 24 bits each time.

The constant false alarm signal detection comprises the following specific steps: first, the false alarm probability P of the detection algorithm is given_fCalculating a threshold value lambda₀. Threshold lambda₀And false alarm probability P_fThe relationship betweenN_σRepresenting the number of samples used to estimate the noise power. Then, according to the formulaEstimating the noise power, wherein k₀N/4 Ro. Finally, the detection characteristic quantity is definedWhen in useWhen it is, then recognizeOtherwise, the AIS signal is considered not detected. And if the AIS signal is detected for three times continuously, determining that the AIS signal reaches, and performing subsequent signal processing work.

3) S2: frame synchronization is carried out on the AIS baseband signal so as to determine the accurate data starting position of the AIS baseband signal:

in this embodiment, frame synchronization needs to be performed on the AIS baseband signal first to find an accurate start position of the data bit. Specifically, the frame synchronization process is as follows:

first, 64T before and after the initial positioning position is selected_bCarrying out 1-bit differential operation on a received signal with the length to obtain △ r (t), then carrying out local GMSK modulation on prior information (a training sequence and a starting mark) in a time slot structure of an AIS signal, carrying out 1-bit differential operation to obtain △ s (t), finally carrying out correlation operation on △ r (t) and △ s (t), and obtaining the position of the maximum value, namely the last sampling point of the ending bit '0' of the starting mark ('01111110'), so as to realize frame synchronization.

4) S3: acquiring carrier frequency estimation and timing error estimation of the AIS baseband signal according to the AIS baseband signal, and synchronizing the AIS baseband signal according to the carrier frequency estimation and the timing error estimation:

specifically, step S3 specifically includes the following steps: s31: acquiring carrier frequency estimation according to the spectral line characteristic of the second-order cyclic cumulant of the GMSK signal, and carrying out carrier synchronization according to the carrier frequency estimation; s32: performing matched filtering on the AIS baseband signal according to the first term of the continuous phase modulation signal Laurent expansion; s33: acquiring a timing error estimation according to the AIS baseband signal, and carrying out code element synchronization according to the timing error estimation; s34: and whitening colored noise of the AIS baseband signal after symbol synchronization to obtain a data bit and frame check bit signal of the AIS baseband signal so as to send the AIS baseband signal to a cyclic redundancy check error correction decoder for demodulation and decoding.

In step S31, it is necessary to perform carrier synchronization on the frame-synchronized signal. The present embodiment uses GMSThe spectral characteristics of the second order cyclic accumulation of the K signal estimate the carrier frequency. The second-order conjugate cycle cumulant of GMSK signal is C_r(f,τ₀)＝<E{r(t)r(t+τ₀)}e^-j2πft>_t. Wherein, tau₀Which is indicative of the time delay,<·>_trepresenting a time average. At tau₀0 and E_b/N₀In the case of 15dB, the line of the second order cyclic accumulation of the GMSK signal (2048 point fourier transform) is shown in fig. 9 a. In FIG. 9a, the two peaks represent the two second-order cyclic frequencies of the GMSK signal respectively, which are f₁＝2△f+1/2T_bAnd f₂＝2△f-1/2T_b. Accordingly, an estimate of the Doppler frequency offset may be obtained

To further improve the frequency estimation performance, the present embodiment introduces frequency domain filtering, since the interval between two second order cyclic frequencies is fixed to 1/T_bDesigning a window function:

wherein, the length of the window function is taken as L ═ f_b/(f_sN) +1, where the sampling rate is f_sSymbol rate of f_bThe signal is subjected to N-point fourier transform. At tau₀0 and E_b/N₀In the case of 15dB, the line of the second order cyclic accumulation of the GMSK signal (2048 point fourier transform) is frequency domain filtered as shown in fig. 9 b. The signal spectrum will have a higher spectral peak at twice the carrier frequency of the signal, which is the frequency point f₁And f₂The two peaks are combined, so the precision is higher, and the influence of interference and noise is smaller. Further, carrier frequency compensation is performed to shift the received signal to the vicinity of 0 intermediate frequency.

In step S32, the baseband signal after carrier synchronization is matched and filtered by a matched filter, and the matched filter is designed based on the continuous phase modulation signal source expansion.

Based on the Laurent expansion, the AIS baseband signal s (t) can be rewritten as:

wherein,representing a linear modulated pulse signal h_k(t) } (M2, L3) { α_k,nIs associated with the information sequence α_nThe correlation function. Since the energy of the signal is mostly concentrated on the first term of the Laurent expansion, it can be based on h₀(t) designing a matched filter and

in steps S33 and S34, symbol synchronization and extraction are performed on the matched and filtered signal, and colored noise whitening is performed after extraction, wherein timing error isThis can be estimated by the following equation:

wherein,

L₀indicates the number of symbols (L) used for joint estimation₀＝64)，R_oRepresenting the over-sampling rate (R) of a discrete signal_oX (t) denotes the output of the matched filter, and is based on the timing errorThe difference estimate decimates the received signal from 8 times over-sampling to 1 time sampling, which is fed into a whitening filter, which may be a 5-tap FIR filter, with the purpose of whitening the matched filtered noise.

5) S4: and the cyclic redundancy check error correction decoder demodulates and decodes the AIS baseband signal to obtain the message content in the AIS radio frequency signal.

Specifically, the crc decoder demodulates and decodes the AIS baseband signal based on the Viterbi algorithm, and sends the whitened and filtered data bits and frame check bit signals to the crc noncoherent Viterbi decoder, as shown in fig. 10. Wherein, the crc decoder is a crc non-coherent Viterbi decoder, and the crc non-coherent Viterbi decoder is provided with a crc shift register, and the step S4 specifically includes the following steps:

s41: establishing an extended state of the cyclic redundancy check error correction decoder according to a branch measurement state of a Viterbi algorithm and a state of a cyclic redundancy check shift register, and establishing a state transfer table of the cyclic redundancy check error correction decoder according to the extended state;

the path metric of an expansion state corresponding to the initial state of the cyclic redundancy check shift register at the time of 0 is set to be 0, and the initial state is 0 xFFFF; setting the path metrics of all the expansion states except the initial state at the 0 moment to be negative infinity; the number of continuous 1 and the number of interpolation 0 of all expansion states at the time of 0 are set to be 0;

s42: calculating the transfer variable of each expansion state at the n moment according to the path measurement and the possible transfer-out state of each expansion state at the n moment;

s44: finding and backtracking an optimal path in all path metrics of which the state of the cyclic redundancy check shift register is 0x0000 from the moment 184 to the moment 188 to obtain a most possible decoding sequence corresponding to the AIS baseband signal;

The specific demodulation and decoding steps are as follows:

step S41: initialization, an extended state table and an extended state transition table are established according to fig. 11. The path metric Λ [0 (A; X) for all propagation states (A, X) at time 0]Is set to be minus infinity. According to the international standard, the initial state A of the cyclic redundancy check shift register₀All 1's, therefore, the state of the 0-time CRC shift register is set to A₀Metric path of extended state of (A) Λ 0₀；X)]Is set to 0. The number P [0 (A; X) of consecutive '1's present in the sequence corresponding to the survivor path to reach the propagation state (A, X)]Is set to 0. The number S [0 ] (A; X) of interpolated '0' S appearing in the sequence corresponding to the survivor path to reach the extended state (A, X)]Is set to 0. Propagation of the states (A, X) possible transition path metric Λ at the input of bit c_trans[0,(A；X),(b；c)]Is set to 0. Number P of consecutive '1's corresponding to the transition path metric possible for the extended state (A, X) at the input of bit c_trans[0,(A；X),(b；c)]Is set to 0. The number S of interpolation '0' S corresponding to the transition path metrics possible for the expanded state (A, X) at the time of bit c input_trans[0,(A；X),(b；c)]Is set to 0.

Step S42: transition variable calculation, for an expansion state (A, X) at time n, if P [ n, (A; X)]P means that the input bit at the next time is an interpolation bit. At this time, for an impossible transition path such as b ═ {0,1}, its transition variable Λ is_trans[n,(A；X),(b；c)]Is set to be minus infinity. For possible transfer paths such as b ═ SB, the transfer variables are calculated

Λ_trans[n,(A；X),(b；c)]＝Λ[n,(A；X)]+λ_n+1((b；c))

Wherein,

wherein,represents the filter coefficients and is correlated with the whitening filter coefficients,indicating the length of the filter. Conversely, if P [ n, (A; X)]Not equal to 5 means that the input bit at the next time is an information bit. In this case, for an impossible transfer path such as b ═ SB, the transfer variable Λ is set_trans[n,(A；X),(SB；c)]Is set to be minus infinity. For possible transition paths such as b ═ 0,1, its transition variable Λ is calculated_trans[n,(A；X),(b；c)]. For variable P_trans[n,(A；X),(b；c)]And is set to 0 when b is {0, SB } and is set to P [ n, (a; X) when b is1]+1. When b is {0,1}, variable S_trans[n,(A；X),(b；c)]Is S [ n, (A; X)]And when b is SB, the variable S_trans[n,(A；X),(b；c)]Is S [ n, (A; X)]+1。

Step S43: and (3) state change, namely selecting the largest path from all transfer paths entering the extended state as a survivor path by comparing the extended state (A, X) at the moment of n +1, and storing corresponding path information and path measurement. Using the transfer variable Lambda in the survivor path_trans[n,(A；X),(b；c)]，P_trans[n,(A；X),(b；c)]，S_trans[n,(A；X),(b；c)]Λ n +1 for extended state (A, X) at time n +1, (A; X)]，P[n+1,(A；X)]，S[n+1,(A；X)]。

Step S44: backtracking decoding by finding the time S_min+N_minTo time S_max+N_maxAnd determining a unique survivor path at the position of the maximum value of all the states (0, X) and backtracking to obtain the most possible transmitting sequence of the received signal. The expression is as follows:

and the following limiting conditions are satisfied:

and tracing back from the end position of the maximum path to obtain a decoding sequence. The message content of the broadcast can be obtained by sending the decoded sequence to a message parser module.

6) Preferably, after the step S4 is executed, the method further includes the step S5: s51: performing parameter estimation according to the decoding sequence to obtain estimated values of amplitude, phase, frequency offset and time delay of the AIS baseband signal; s52: reconstructing the decoding sequence according to the decoding sequence and the estimated values of amplitude, phase, frequency offset and time delay to obtain an AIS reconstruction signal; s53: the AIS reconstructed signal is eliminated from the stored AIS baseband signal.

Since the coverage area of a satellite is very wide and the radius of an SOTDMA cell is 20 nautical miles (1 nautical miles is 1.852 kilometer), the number of SOTDMA cells in the coverage area of the satellite is relatively small.

There is no coordination mechanism between the SOTDMA cells, so that AIS signals transmitted by multiple cells may arrive at the satellite-borne receiver at the same time, resulting in message collision. There are two main types of message collisions: (1) the satellite-borne receiver receives messages sent by ships of different cells in the same time slot; (2) due to the fact that the difference of the transmission time delay is large, the satellite-borne receiver receives messages sent by ships of different cells in adjacent time slots.

The satellite-borne receiver has a large coverage area, and only the situation that the satellite receives the messages of the cell 1 and the cell 2 is considered to explain the phenomenon of message collision. As shown in fig. 12, there are a number of ships in each cell (assuming that the ships in each cell are labeled a, b, c, respectively.). The ships in each cell orderly transmit messages under the SOTDMA access rule. Message 1-a represents the message sent by the ship labeled a within cell 1, and vice versa. The message location in fig. 12 well embodies this feature in consideration of the fact that the location of the cell is relatively fixed in a short time, and thus the distance from the cell to the satellite is relatively fixed, i.e., the variation of the message transmission delay in the same cell is small. Collisions of message 1-a with message 2-a are of a first type, while collisions of message 1-c with message 2-b are of a second type. Message 1-b and message 2-c are not collided because cell 2 and cell 1 have no messages to send in the corresponding time slot.

Obviously, it is impossible to have only two cells in the satellite coverage area working, and the collision of the satellite-borne receiver messages is a normal state. Therefore, the signal model received by the satellite-borne receiver is expressed as

Wherein, I_cThe number of the AIS signals received by the satellite-borne receiver is shown. A. the_i、τ_i、△f_iAnd theta_iRespectively representing the ith AIS signal s_i(t) channel gain, propagation delay, doppler shift, and initial phase of the carrier.

When the signal-to-interference ratio satisfies a certain condition, decoding of the interference signal is still possible. Assuming that there are K AIS signals in the mixed signal, the signal power is arranged from high to low as AIS signal 1, AIS signal 2, … …, and AIS signal K corresponds to message 1, message 2, … …, and message K, respectively. The structure of the waveform reconstruction rotation demodulation is shown in fig. 13. Firstly, demodulating the signal of the message 1, and performing signal parameter estimation by using the information sequence of the message 1 obtained by demodulation as auxiliary data, thereby obtaining the amplitude, phase, frequency offset and time delay estimation value of the AIS signal 1. And reconstructing the AIS signal 1 by utilizing the information sequence of the message 1 obtained by demodulation and the parameter estimation value thereof, and eliminating the component of the AIS signal 1 from the mixed signal. And then, demodulating an information sequence of the message 2 in the mixed signal, and estimating the amplitude, the phase, the frequency offset and the time delay estimation value of the AIS signal 2. The AIS signal 2 is reconstructed and eliminated from the mixed signal. Which in turn demodulates message 3, message 4, … …, and message K.

The waveform reconstruction rotation demodulation algorithm is specifically described by taking the case of aliasing of two signals of the mixed AIS signal model as an example. After the strong signal is demodulated, the strong signal is reconstructed, the reconstructed strong signal is eliminated from the received mixed signal, and the remaining signals are demodulated for the second time. The demodulation process for weak signals is identical to the demodulation process for strong signals.

Received signal at t-nT_b+iT_sThe sampling point of time is

Wherein s is₁(t)、s₂(t) represents an AIS baseband signal, A₁、A₂Represents amplitude and A₁>A₂，τ₁、τ₂Indicating propagation delay, △ f₁、△f₂Representing the Doppler frequency offset, θ₁、θ₂Is the carrier initial phase. w is a_n[i]Mean 0 and variance σ²Complex white gaussian noise w (t) at t ═ nT_b+iT_sThe sample point of time.

The implementation of the hybrid AIS signal splitting architecture is shown in fig. 14. In the context of figure 14, it is shown,a signal estimation sequence representing the AIS strong signal demodulated by the above demodulation algorithm,and representing the AIS strong signal Doppler frequency offset rough estimation result. The cut-off frequency of the low-pass filter in the strong signal demodulation decoding module and the weak signal demodulation decoding module is 0.25 pi in consideration of Doppler frequency offset. Since the doppler frequency offset of the strong signal in the mixed signal of the low-pass filter in the input strong signal reconstruction cancellation module has been estimated and compensated, the cut-off frequency of the low-pass filter is set to 0.125 pi.

Neglecting the influence of intersymbol interference, weak signals and noise, symbol synchronization and extracted signal z_nIs expressed as

Wherein, △ f₁₂Representing the residual frequency offset in a strong signal. Although strong signals estimate the over-frequency offset during demodulationBut is offset △ f from the actual frequency₁There are still differences between them. Theta₁Is the phase shift of a strong signal.

Information estimation sequence for demodulating and decoding output of strong signalIs pretreated to obtain

Wherein,is a sequence ofNRZI encoded sequences. When estimating the sequenceIn agreement with the original information sequence a1,andsame as that ofAnd z_nBy bitwise conjugate multiplication, then can obtain

Obviously, by y_nThe amplitude, frequency offset and initial phase of the strong signal can be accurately estimated. The discrete strong signal can be reconstructed by using the timing error estimation in the code element synchronization and extraction module

After the strong signal reconstruction is completed, the sampling point corresponding to the reconstructed signal needs to be aligned with the sampling point of the mixed signal. The weak signal is obtained by eliminating the component of the strong signal from the mixed signal. The weak signal is then demodulated, which is the same as the strong signal. The demodulation and separation of the two AIS signals are realized through the process. The performance of the separation algorithm can be evaluated by the CRC check pass rate of the demodulated strong and weak signals. The signal-to-interference ratio is between 3-10dB, assuming that the received mixed signal contains a strong signal and a weak signal. Based on the strong signal, the signal-to-noise ratio is E_b/N₀＝15dB。The Doppler frequency offset of the strong signal and the weak signal is in the interval [ -4kHz,4kHz]And (4) internal random selection. The initial phases of the carriers of the strong and weak signals are randomly chosen within the interval 0, 2 pi). The delay difference between the weak signal and the strong signal floats within 50 sample points. 1000 groups of data are provided for separation processing, and the passing condition of CRC check after demodulation is shown in Table 1.

TABLE 1

In the table, "strong signal" indicates that the strong signal in the mixed signal passes CRC check after demodulation; the 'weak signal' means that the strong and weak signals in the mixed signal can pass CRC check after demodulation. As can be seen from the statistical results in Table 1, when the signal-to-interference ratio of the strong and weak signals is 4-6dB, the probability that the strong and weak signals can pass the CRC after being separated by the structure in FIG. 14 exceeds 85%. At SIR of 5dB, the throughput of strong signals is 99.3%, already approaching 100%. The probability of passing strong and weak signals at the same time is up to 94.4% when SIR is 5 dB. Thus, the receiver proposed by the present invention is excellent in separation performance.

The AIS receiving method has the following technical advantages:

in the embodiment, the AIS baseband signal is synchronized through carrier frequency estimation and timing error estimation, and is demodulated and decoded through the cyclic redundancy check error correction decoder, so that the technical problems of signal demodulation deterioration due to large Doppler frequency offset and poor demodulation performance under low signal-to-noise ratio are solved, and the technical effect of excellent demodulation and demodulation performance is achieved;

the present embodiment utilizes the state transition characteristic of the cyclic redundancy shift check register when performing error detection operation at the receiving end, that is: if no error bit exists between the data bit and the frame check bit in the transmission process, the cyclic redundancy check register is changed from an initial state of 0xFFFF to 0x0000, the embodiment introduces a cyclic redundancy check error correction concept, combines a branch measurement state of the Viterbi algorithm with a state of the cyclic redundancy check register, and determines the optimal path of the Viterbi algorithm in an expanded state based on the state transfer characteristic of the cyclic redundancy check register during error-free transmission, so that the path can pass through cyclic redundancy check, the frame error rate of a decoding algorithm is reduced, and the decoding and demodulation performance is improved;

according to the embodiment, the AIS baseband signals are stored, whether the AIS baseband signals exist or not is detected based on the constant false alarm rate, if the AIS baseband signals exist, the signals are processed, otherwise, the AIS baseband signals are in standby operation, the technical problem that when the AIS radio frequency signals arrive cannot be known is solved, and the technical effect of saving resources is achieved;

according to the embodiment, the demodulated and decoded baseband signals are reconstructed to obtain the reconstructed signal, and the demodulated and decoded baseband signals are eliminated in the stored AIS baseband signals, so that the technical problem that the demodulation performance is influenced by message collision among the AIS radio-frequency signals is solved, and the technical effect of receiving and demodulating the plurality of the AIS radio-frequency signals which collide with each other is achieved.

Example 2

Referring to fig. 3, the present embodiment provides a receiver of an automatic ship identification system according to embodiment 1, including: the system comprises a radio frequency front-end processing module and a baseband signal processing module, wherein the baseband signal processing module comprises a frame synchronization unit, a preprocessing module and a cyclic redundancy check error correction decoder;

the radio frequency front-end processing module is used for receiving the AIS radio frequency signals sent by the automatic ship identification system, directly sampling the AIS radio frequency signals and acquiring AIS baseband signals;

the preprocessing module is also used for acquiring carrier frequency estimation and timing error estimation of the AIS baseband signal according to the AIS baseband signal and synchronizing the AIS baseband signal according to the carrier frequency estimation and the timing error estimation;

The present embodiment will now be described in detail:

specifically, the AIS baseband signals include a first baseband signal and a second baseband signal, the first baseband signal is a baseband signal corresponding to a channel of 161.975MHz, and the second baseband signal is a baseband signal corresponding to a channel of 162.025MHz, where the receiver is provided with two baseband signal processing modules, which are respectively configured to process the first baseband signal and the second baseband signal to obtain message contents of different channels.

Specifically, the receiver of the present embodiment includes a radio frequency front-end processing module and two baseband signal processing modules. Before sending the signals received by the antenna to the baseband signal processing module, the baseband signal processing module needs to perform receiving processing on the signals by using a radio frequency front-end processing module directly connected to the antenna, and then the baseband signal processing module extracts the AIS messages from the signals subjected to receiving processing.

1) Specifically, the radio frequency front-end processing module comprises a filtering amplification unit, an analog-to-digital conversion unit and a digital down-conversion and decimation filtering unit; the filtering and amplifying unit is used for receiving the AIS radio frequency signal and carrying out intermediate frequency filtering and amplification on the AIS radio frequency signal; the analog-to-digital conversion unit is used for carrying out radio frequency direct sampling on the AIS radio frequency signal subjected to the intermediate frequency filtering and amplification to obtain a digitized AIS digital signal; the digital down-conversion and decimation filtering unit is used for carrying out multi-stage orthogonal down-conversion and decimation filtering on the AIS digital signal to obtain the AIS baseband signal.

The received original AIS radio frequency signal is subjected to intermediate frequency filtering and amplification through a filter and an amplifier. Through ADC pair AThe IS radio frequency signal IS subjected to radio frequency direct sampling, based on the idea of software radio, the a/D IS made to be as close to the antenna as possible, taking 48MHz as the radio frequency direct sampling rate as an example, the frequency spectrum schematic diagrams of the radio frequency signal before and after sampling are respectively shown in fig. 4a and 4 b; the multi-stage orthogonal down-conversion and decimation filtering are carried out by a digital down-conversion and decimation filtering unit, the functional block diagram of the digital down-conversion and decimation filtering unit is shown in fig. 5, and the analog signal r (t) is filtered and amplified by f_sSampling the intermediate frequency at a sampling frequency of 48MHz, obtaining a digital signal r (n) through an A/D converter, obtaining a low-intermediate frequency complex signal containing AIS1 and AIS2 after quadrature down-conversion and low-pass filtering, separating channels through complex quadrature down-conversion and low-pass filtering, and outputting complex baseband signals r of two channels AIS1 and AIS2_I1(n)+jr_Q1(n) and r_I2(n)+jr_Q2(n)。

After the signal is filtered and extracted by CIC, the data rate is reduced to f_s1＝f_s/D₁1.92 MHz. From the input signal spectrum, the passband frequency of the FIR1 at this time is taken to be f, taking into account the Doppler shift of the signal within + -4kHz_p135 kHz; to prevent aliasing of the signal resulting from decimation, the stopband cut-off frequency f_a1Determined by a decimation factor, i.e. f_a1＝f_s1/2D₂192kHz, delta is taken from the stop-band attenuation according to the index₁The filter order designed according to the above conditions is 19 th order (less hardware resource consumption) at 45 dB.

Finally, after the AIS signal passes through a frame system of radio frequency sampling and digital down conversion, two paths of data rates are obtained and are 76.8kHzOf the complex signal r_I1(n)+jr_Q1(n) and r_I2(n)+jr_Q2And (n) and respectively transmitting the signals to a baseband signal processing module for processing.

2) Preferably, the baseband signal processing module further comprises a memory and a constant false alarm rate detector; the memory is used for storing the AIS baseband signal; the constant false alarm rate detector is used for detecting whether AIS baseband signals are stored or not based on the constant false alarm rate: if the AIS baseband signal exists, executing the processing of the AIS baseband signal by the baseband signal processing module; and if the AIS baseband signal does not exist, the baseband signal processing module works and waits.

The AIS baseband signal is stored through a memory. Conventional satellite-borne receivers do not know the specific arrival times of the AIS signals and therefore need to detect the AIS signals. For a satellite-borne receiver with a height of 600km, the transmission delay of the AIS signal is between 2ms and 9.43ms (corresponding to 19.2 bits to 90.5 bits), already exceeding the 14bit transmission delay reserved by the slot structure.

A24-bit training sequence (0101.. 0101) composed of '0' and '1' alternately is subjected to NRZI coding to obtain a sequence { -1-1+ 1.. 1-1+1+1 }. It can be seen that the period of the NRZI encoded training sequence is 4T_bWhen fourier transform is performed, the spectral energy is concentrated at f 1/4T_bInteger multiple frequency point and mainly f ═ 1/4T_bAt two frequency points. Based on this characteristic, the AIS signal constant false alarm rate detector has a structure as shown in fig. 8, and the length of the signal detected by the detector is 24 bits each time.

The detection of the constant false alarm rate signal comprises the following specific steps: first, the false alarm probability P of the detection algorithm is given_fCalculating a threshold value lambda₀. Threshold lambda₀And false alarm probability P_fThe relationship betweenN_σRepresenting the number of samples used to estimate the noise power. Then, according to the formulaEstimating the noise power, wherein k₀N/4 Ro. Finally, the detection characteristic quantity is definedWhen in useAnd if so, considering that the AIS signal is detected, otherwise, considering that the AIS signal is not detected. And if the AIS signal is detected for three times continuously, determining that the AIS signal reaches, and performing subsequent signal processing work.

3) In this embodiment, the frame synchronization unit needs to perform frame synchronization on the AIS baseband signal first to find an accurate start position of the data bit. Specifically, the frame synchronization process is as follows:

4) Specifically, the preprocessing module comprises a carrier synchronization unit, a matched filtering unit, a code element synchronization unit and a whitening filtering unit; the carrier synchronization unit is used for acquiring carrier frequency estimation according to the spectral line characteristic of the GMSK signal second-order cyclic cumulant and carrying out carrier synchronization according to the carrier frequency estimation; the matched filtering unit is used for performing matched filtering on the AIS baseband signal according to the first term of the continuous phase modulation signal Laurent expansion; the code element synchronization unit is used for acquiring timing error estimation according to the AIS baseband signal and carrying out code element synchronization according to the timing error estimation; and the whitening filtering unit is used for whitening colored noise of the AIS baseband signal after the code element synchronization to obtain a data bit and a frame check bit signal of the AIS baseband signal so as to send the data bit and the frame check bit signal to the cyclic redundancy check error correction decoder for demodulation and decoding.

A carrier synchronization unit: at this stage, it is necessary to perform carrier synchronization on the signal after frame synchronization. The present embodiment uses the spectral characteristics of the second order cyclic accumulation of the GMSK signal to estimate the carrier frequency. The second-order conjugate cycle cumulant of GMSK signal is C_r(f,τ₀)＝<E{r(t)r(t+τ₀)}e-^j2πft＞_t. Wherein, tau₀Which is indicative of the time delay,<·>_trepresenting a time average. At tau₀0 and E_b/N₀In the case of 15dB, the line of the second order cyclic accumulation of the GMSK signal (2048 point fourier transform) is shown in fig. 9 a. In FIG. 9a, the two peaks represent the two second-order cyclic frequencies of the GMSK signal respectively, which are f₁＝2△f+1/2T_bAnd f₂＝2△f-1/2T_b. Accordingly, an estimate of the Doppler frequency offset may be obtained

wherein, the length of the window function is taken as L ═ f_b/(f_sN) +1, where the sampling rate is fs and the symbol rate is f_bThe signal is subjected to N-point fourier transform. At t₀0 and E_b/N₀In the case of 15dB, the line of the second order cyclic accumulation of the GMSK signal (2048 point fourier transform) is frequency domain filtered as shown in fig. 9 b. The signal spectrum will have a higher spectral peak at twice the carrier frequency of the signal, which is the frequency point f₁And f₂The two peaks are combined, so the precision is higher, and the influence of interference and noise is smaller. Further, carrier frequency compensation is performed to carry out reception signalsMoving to about 0 if.

A matched filtering unit: and performing matched filtering on the baseband signal after carrier synchronization through a matched filter, wherein the design of the matched filter is performed based on a continuous phase modulation signal Laurent expansion.

symbol synchronization unit and whitening filtering unit: symbol synchronization and extraction are carried out on the signals after matching and filtering, and colored noise whitening is carried out after extraction, wherein timing errorThis can be estimated by the following equation:

wherein,

L₀indicates the number of symbols (L) used for joint estimation₀＝64)，R_oRepresenting the over-sampling rate (R) of a discrete signal_oX (t) denotes the output of the matched filter, decimates the received signal from 8 times oversampling to 1 times sampling according to the timing error estimate, and feeds into the whitening filter, which may be a 5-tap FIR filter, with the purpose of whitening the matched filtered noise.

5) Specifically, the cyclic redundancy check error correction decoder demodulates and decodes the AIS baseband signal based on a Viterbi algorithm, wherein the cyclic redundancy check error correction decoder is a cyclic redundancy check error correction noncoherent Viterbi decoder, and the cyclic redundancy check error correction noncoherent Viterbi decoder is provided with a cyclic redundancy check shift register;

the expansion state of the cyclic redundancy check error correction decoder is an expansion state constructed according to the branch measurement state of a Viterbi algorithm and the state of a cyclic redundancy check shift register, and the state transfer table of the cyclic redundancy check error correction decoder is a state transfer table constructed according to the expansion state; the path metric of an expansion state corresponding to the initial state of the cyclic redundancy check shift register at the time of 0 is set to be 0, and the initial state is 0 xFFFF; setting the path metrics of all the expansion states except the initial state at the 0 moment to be negative infinity; the number of continuous 1 and the number of interpolation 0 of all expansion states at the time of 0 are set to be 0;

the cyclic redundancy check error correction decoder is used for calculating transfer variables of each expansion state at the n moment according to the path metric and the possible transfer-out state of each expansion state at the n moment, selecting an optimal path according to the possible transfer-in path metric value of each expansion state at the n +1 moment, and updating the state of each transfer variable;

the cyclic redundancy check error correction decoder is further configured to obtain a most probable decoding sequence corresponding to the AIS baseband signal by finding and backtracking an optimal path in all path metrics from the time 184 to the time 188, where the state of the cyclic redundancy check shift register is 0x 0000;

The specific demodulation and decoding process is as follows:

initialization, an extended state table and an extended state transition table are established according to fig. 11. The path metric Λ [0 (A; X) for all propagation states (A, X) at time 0]Is set to be minus infinity. According to the international standard, the initial state A of the cyclic redundancy check shift register₀All 1's, therefore, the state of the 0-time CRC shift register is set to A₀Metric path of extended state of (A) Λ 0₀；X)]Is set to 0. The number P [0 (A; X) of consecutive '1's present in the sequence corresponding to the survivor path to reach the propagation state (A, X)]Is set to 0. The number S [0 ] (A; X) of interpolated '0' S appearing in the sequence corresponding to the survivor path to reach the extended state (A, X)]Is set to 0. Propagation of the states (A, X) possible transition path metric Λ at the input of bit c_trans[0,(A；X),(b；c)]Is set to 0. Number P of consecutive '1's corresponding to the transition path metric possible for the extended state (A, X) at the input of bit c_trans[0,(A；X),(b；c)]Is set to 0. The number S of interpolation '0' S corresponding to the transition path metrics possible for the expanded state (A, X) at the time of bit c input_trans[0,(A；X),(b；c)]Is set to 0.

Transition variable calculation, for an expansion state (A, X) at time n, if P [ n, (A; X)]P means that the input bit at the next time is an interpolation bit. At this time, for an impossible transition path such as b ═ {0,1}, its transition variable Λ is_trans[n,(A；X),(b；c)]Is set to be minus infinity. For possible transfer paths such as b ═ SB, the transfer variables are calculated

Λ_trans[n,(A；X),(b；c)]＝Λ[n,(A；X)]+λ_n+1((b；c))

Wherein,

And (3) state change, namely selecting the largest path from all transfer paths entering the extended state as a survivor path by comparing the extended state (A, X) at the moment of n +1, and storing corresponding path information and path measurement. Using the transfer variable Lambda in the survivor path_trans[n,(A；X),(b；c)]，P_trans[n,(A；X),(b；c)]，S_trans[n,(A；X),(b；c)]Λ n +1 for extended state (A, X) at time n +1, (A; X)]，P[n+1,(A；X)]，S[n+1,(A；X)]。

Backtracking decoding by finding the time S_min+N_minTo time S_max+N_maxThe position of the maximum value of the above all states (0, X) is determinedAnd (4) a unique survivor path is taken out and backtracked to obtain the most possible sending sequence of the received signal. The expression is as follows:

and the following limiting conditions are satisfied:

6) Preferably, the baseband signal processing module further comprises a signal reconstruction and cancellation module, the signal reconstruction and cancellation module is configured to perform parameter estimation according to the decoding sequence to obtain an amplitude, a phase, a frequency offset, and an estimated time delay value of the AIS baseband signal, and reconstruct the decoding sequence according to the decoding sequence and the amplitude, the phase, the frequency offset, and the estimated time delay value to obtain an AIS reconstructed signal; the signal reconstruction and cancellation module is further configured to remove the AIS reconstructed signal from the stored AIS baseband signal.

Received signal at t-nT_b+iT_sThe sampling point of time is

The implementation of the hybrid AIS signal splitting architecture is shown in fig. 14. In the context of figure 14, it is shown,representing the result of the above-mentioned demodulation algorithmA signal estimation sequence of the demodulated AIS strong signal,and representing the AIS strong signal Doppler frequency offset rough estimation result. The cut-off frequency of the low-pass filter in the strong signal demodulation decoding module and the weak signal demodulation decoding module is 0.25 pi in consideration of Doppler frequency offset. Since the doppler frequency offset of the strong signal in the mixed signal of the low-pass filter in the input strong signal reconstruction cancellation module has been estimated and compensated, the cut-off frequency of the low-pass filter is set to 0.125 pi.

Wherein,is a sequence ofNRZI encoded sequences. When estimating the sequenceWith the original information sequence a¹When the two-dimensional images are consistent with each other,andsame as that ofAnd z_nBy bitwise conjugate multiplication, then can obtain

After the strong signal reconstruction is completed, the sampling point corresponding to the reconstructed signal needs to be aligned with the sampling point of the mixed signal. The weak signal is obtained by eliminating the component of the strong signal from the mixed signal. The weak signal is then demodulated, which is the same as the strong signal. The demodulation and separation of the two AIS signals are realized through the process. The performance of the separation algorithm can be evaluated by the CRC check pass rate of the demodulated strong and weak signals. The signal-to-interference ratio is between 3-10dB, assuming that the received mixed signal contains a strong signal and a weak signal. Based on the strong signal, the signal-to-noise ratio is E_b/N₀15 dB. Doppler frequency offset of strong signal and weak signal in interval[-4kHz,4kHz]And (4) internal random selection. The initial phases of the carriers of the strong and weak signals are randomly chosen within the interval 0, 2 pi). The delay difference between the weak signal and the strong signal floats within 50 sample points. 1000 groups of data are provided for separation processing, and the passing condition of CRC check after demodulation is shown in Table 2.

TABLE 2

In the table, "strong signal" indicates that the strong signal in the mixed signal passes CRC check after demodulation; the 'weak signal' means that the strong and weak signals in the mixed signal can pass CRC check after demodulation. As can be seen from the statistical results in Table 2, when the signal-to-interference ratio of the strong and weak signals is 4-6dB, the probability that the strong and weak signals can pass the CRC after being separated by the structure in FIG. 14 exceeds 85%. At SIR of 5dB, the throughput of strong signals is 99.3%, already approaching 100%. The probability of passing strong and weak signals at the same time is up to 94.4% when SIR is 5 dB. Thus, the receiver proposed by the present invention is excellent in separation performance.

The AIS receiving method has the following technical advantages:

Example 3

This embodiment provides a communication satellite based on the automatic ship identification system of embodiment 2, which employs the receiver of the automatic ship identification system as claimed in any one of embodiments 2.

The communication satellite of this embodiment installs boats and ships automatic identification system's receiver, can realize with the communication of boats and ships and to the discernment of boats and ships, can supervise and track boats and ships in the global scope in real time through the networking satellite to guarantee ocean vessel's navigation safety, wherein, this communication satellite has following technical advantage:

The embodiments of the present invention have been described in detail with reference to the accompanying drawings, but the present invention is not limited to the above embodiments. Even if various changes are made to the present invention, it is still within the scope of the present invention if they fall within the scope of the claims of the present invention and their equivalents.

Claims

1. A receiving method of an automatic ship identification system is characterized by comprising the following steps:

2. The receiving method of the automatic ship identification system according to claim 1, wherein the step S1 specifically comprises the following steps:

3. The receiving method of the automatic ship identification system according to claim 2, wherein the step S3 specifically comprises the following steps:

4. The receiving method of the automatic ship identification system according to any one of claims 1 to 3, further comprising the steps of A1 after the step S1 is executed and before the step S2 is executed:

storing the AIS baseband signal;

5. The receiving method of the automatic ship identification system according to claim 4, wherein the crc decoder performs the demodulation and decoding on the AIS baseband signal based on a Viterbi algorithm, wherein the crc decoder is a crc non-coherent Viterbi decoder, and the crc non-coherent Viterbi decoder is provided with a crc shift register, and the step S4 specifically includes the following steps:

6. The receiving method of the automatic ship identification system according to claim 5, wherein after the step S4 is executed, the method further comprises the step S5:

7. The receiving method of the automatic ship identification system according to any one of claims 1 to 3, wherein the AIS baseband signals include a first baseband signal and a second baseband signal, the first baseband signal is a baseband signal corresponding to a channel of 161.975MHz, the second baseband signal is a baseband signal corresponding to a channel of 162.025MHz, and wherein the first baseband signal and the second baseband signal are processed through the steps S2 to S4 respectively to obtain message contents of different channels.

8. A receiver of an automatic ship identification system, comprising: the system comprises a radio frequency front-end processing module and a baseband signal processing module, wherein the baseband signal processing module comprises a frame synchronization unit, a preprocessing module and a cyclic redundancy check error correction decoder;

9. The receiver of the automatic ship identification system according to claim 8, wherein the radio frequency front end processing module comprises a filtering and amplifying unit, an analog-to-digital conversion unit, a digital down-conversion and decimation filtering unit;

10. The receiver of the automatic ship identification system according to claim 9, wherein the preprocessing module comprises a carrier synchronization unit, a matched filtering unit, a symbol synchronization unit, a whitening filtering unit;

11. The receiver of the automatic ship identification system according to any one of claims 8-10, wherein the baseband signal processing module further comprises a memory, a constant false alarm rate detector;

the memory is used for storing the AIS baseband signal;

12. The receiver of the automatic ship identification system according to claim 11, wherein the crc decoder performs the demodulation decoding on the AIS baseband signal based on a Viterbi algorithm, wherein the crc decoder is a crc non-coherent Viterbi decoder provided with a crc shift register;

13. The receiver of the automatic ship identification system according to claim 12, wherein the baseband signal processing module further comprises a signal reconstruction and cancellation module, the signal reconstruction and cancellation module is configured to perform parameter estimation according to the decoding sequence to obtain estimated values of amplitude, phase, frequency offset and time delay of the AIS baseband signal, and reconstruct the decoding sequence according to the decoding sequence and the estimated values of amplitude, phase, frequency offset and time delay to obtain an AIS reconstructed signal; the signal reconstruction and cancellation module is further configured to cancel the AIS reconstruction signal from the stored AIS baseband signal.

14. The receiver of the automatic ship identification system according to any one of claims 8-10, wherein the AIS baseband signals include a first baseband signal and a second baseband signal, the first baseband signal is a baseband signal corresponding to a channel of 161.975MHz, the second baseband signal is a baseband signal corresponding to a channel of 162.025MHz, and wherein the receiver is provided with two baseband signal processing modules for processing the first baseband signal and the second baseband signal respectively to obtain message contents of different channels.

15. A communication satellite for an automatic ship identification system, comprising a receiver for an automatic ship identification system according to any one of claims 8 to 14.