CN118867029A - Single photon avalanche diode and its manufacturing method and photodetector - Google Patents
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Abstract
本发明公开了一种单光子雪崩二极管及其制作方法和光电探测器,通过设置隔离区将第一掺杂区、第二掺杂区、第三掺杂区和第四掺杂区均划分成电性隔离的预设等份,并设置第一掺杂区、第二掺杂区、第三掺杂区和第四掺杂区的层次结构,利用边缘击穿来提高探测效率,获得依靠边缘击穿工作的SPAD,在不缩小SPAD整体尺寸情况下,提升SPAD阵列芯片成像分辨率,并保证探测效率。
The present invention discloses a single-photon avalanche diode, a manufacturing method thereof, and a photoelectric detector. An isolation region is set to divide a first doping region, a second doping region, a third doping region, and a fourth doping region into electrically isolated preset equal parts, and a hierarchical structure of the first doping region, the second doping region, the third doping region, and the fourth doping region is set. Edge breakdown is used to improve detection efficiency, and a SPAD that relies on edge breakdown to work is obtained. Without reducing the overall size of the SPAD, the imaging resolution of the SPAD array chip is improved and the detection efficiency is guaranteed.
Description
技术领域Technical Field
本发明涉及光电检测技术领域,尤其涉及一种单光子雪崩二极管及其制作方法和光电探测器。The present invention relates to the field of photoelectric detection technology, and in particular to a single-photon avalanche diode and a manufacturing method thereof, and a photoelectric detector.
背景技术Background Art
单光子雪崩二极管(SPAD)是一种重要的可探测单光子的光电器件。不同结构的SPAD器件不断诞生,使其性能也不断提升。SPAD的工作原理是,对其施加大于击穿电压(BV)的反向偏压,使其处于盖革模式,当单个光子入射时会产生光生载流子触发雪崩,SPAD获得极高的电流增益,从而实现单光子的灵敏探测。对于SPAD阵列芯片,想要在相同的芯片尺寸上提升图像分辨率,就需要缩小器件尺寸,但是当器件尺寸缩小到10um以下时,对器件的设计与制造工艺提出更高的要求。Single-photon avalanche diode (SPAD) is an important optoelectronic device that can detect single photons. SPAD devices with different structures are constantly being born, and their performance is constantly improving. The working principle of SPAD is to apply a reverse bias greater than the breakdown voltage (BV) to it, so that it is in Geiger mode. When a single photon is incident, photogenerated carriers will be generated to trigger an avalanche, and SPAD will obtain extremely high current gain, thereby realizing sensitive detection of single photons. For SPAD array chips, if you want to improve the image resolution on the same chip size, you need to reduce the device size. However, when the device size is reduced to below 10um, higher requirements are placed on the design and manufacturing process of the device.
发明内容Summary of the invention
本发明的主要目的在于提供一种单光子雪崩二极管及其制作方法和单光子雪崩探测器,设计了一种具有位置分辨能力的SPAD器件,可以作为多个子SPAD进行使用,在不缩小SPAD整体尺寸情况下,提升SPAD阵列芯片成像分辨率。The main purpose of the present invention is to provide a single-photon avalanche diode and a manufacturing method thereof and a single-photon avalanche detector, and to design a SPAD device with position resolution capability, which can be used as multiple sub-SPADs to improve the imaging resolution of the SPAD array chip without reducing the overall size of the SPAD.
为实现上述目的,本发明提供一种单光子雪崩二极管,包括:To achieve the above object, the present invention provides a single photon avalanche diode, comprising:
第一掺杂类型的衬底,所述衬底中由第一隔离区电性隔离出有源区;A substrate of a first doping type, wherein an active region is electrically isolated by a first isolation region in the substrate;
所述有源区设置有第二掺杂类型的第一掺杂区和第二掺杂区,以及还设置有所述第一掺杂类型的第三掺杂区和第四掺杂区,所述第一掺杂类型与所述第二掺杂类型相反,所述第一掺杂区的掺杂浓度高于所述第二掺杂区,所述第四掺杂区的掺杂浓度高于所述第三掺杂区和所述衬底,所述第三掺杂区的掺杂浓度沿着远离所述有源区上表面的方向逐渐增高,所述第一掺杂区和所述第四掺杂区按照掺杂类型分别作为阳极接触区和阴极接触区;The active region is provided with a first doping region and a second doping region of a second doping type, and is further provided with a third doping region and a fourth doping region of the first doping type, the first doping type is opposite to the second doping type, the doping concentration of the first doping region is higher than that of the second doping region, the doping concentration of the fourth doping region is higher than that of the third doping region and the substrate, the doping concentration of the third doping region gradually increases in a direction away from the upper surface of the active region, and the first doping region and the fourth doping region are used as an anode contact region and a cathode contact region respectively according to the doping type;
所述第三掺杂区从所述有源区上表面延伸至所述有源区内部,所述第二掺杂区从所述第三掺杂区上表面延伸至所述第三掺杂区内部,被宽度和深度均大于所述第二掺杂区的所述第三掺杂区所包围,所述第一掺杂区从所述第二掺杂区上表面延伸至所述第二掺杂区内部,被宽度和深度均大于所述第一掺杂区的所述第二掺杂区所包围,所述第四掺杂区在沿着所述第一隔离区的全沿,从所述有源区上表面延伸至所述有源区内部,且所述第四掺杂区背离所述第一隔离区的一侧与所述第三掺杂区靠近所述第一隔离区的一侧相接;The third doping region extends from the upper surface of the active region to the inside of the active region, the second doping region extends from the upper surface of the third doping region to the inside of the third doping region, and is surrounded by the third doping region whose width and depth are both greater than the second doping region, the first doping region extends from the upper surface of the second doping region to the inside of the second doping region, and is surrounded by the second doping region whose width and depth are both greater than the first doping region, the fourth doping region extends from the upper surface of the active region to the inside of the active region along the entire edge of the first isolation region, and a side of the fourth doping region facing away from the first isolation region is connected to a side of the third doping region close to the first isolation region;
所述衬底中还设置第二隔离区,所述第二隔离区将所述第一掺杂区、所述第二掺杂区、所述第三掺杂区和所述第四掺杂区均划分成相互电性隔离的预设等份,以使所述有源区被划分为所述预设等份的子区,各子区内的结构分别构成一个子单光子雪崩二极管。A second isolation region is also provided in the substrate, and the second isolation region divides the first doped region, the second doped region, the third doped region and the fourth doped region into preset equal parts which are electrically isolated from each other, so that the active region is divided into sub-regions of the preset equal parts, and the structure in each sub-region constitutes a sub-single-photon avalanche diode.
可选地,所述第四掺杂区的深度小于所述第三掺杂区的深度,所述有源区中还设置有所述第一掺杂类型的第五掺杂区,所述第五掺杂区的掺杂浓度小于所述第四掺杂区的掺杂浓度,所述第五掺杂区沿着所述第一隔离区的全沿,从所述第四掺杂区的上表面向所述有源区的下表面延伸,所述第五掺杂区背离所述第一隔离区的一侧部分与所述第三掺杂区相接,所述第五掺杂区的深度大于所述第三掺杂区的深度。Optionally, the depth of the fourth doping region is less than the depth of the third doping region, and a fifth doping region of the first doping type is also provided in the active region, the doping concentration of the fifth doping region is less than the doping concentration of the fourth doping region, the fifth doping region extends along the entire edge of the first isolation region, from the upper surface of the fourth doping region to the lower surface of the active region, the side of the fifth doping region facing away from the first isolation region is connected to the third doping region, and the depth of the fifth doping region is greater than the depth of the third doping region.
可选地,所述第一隔离区和所述第二隔离区为通过深沟槽隔离形成的隔离区。Optionally, the first isolation region and the second isolation region are isolation regions formed by deep trench isolation.
可选地,所述有源区在所述衬底上表面的正投影为矩形,所述第二隔离区在所述衬底上表面的正投影为十字形,以将所述第一掺杂区、所述第二掺杂区、所述第三掺杂区和所述第四掺杂区均划分成相互电性隔离的4等份。Optionally, the orthographic projection of the active area on the upper surface of the substrate is a rectangle, and the orthographic projection of the second isolation area on the upper surface of the substrate is a cross, so as to divide the first doped area, the second doped area, the third doped area and the fourth doped area into four equal parts that are electrically isolated from each other.
可选地,所述第一掺杂类型为p型掺杂,所述第二掺杂类型为n型掺杂。Optionally, the first doping type is p-type doping, and the second doping type is n-type doping.
此外,为实现上述目标,本发明还提供一种单光子雪崩二极管的制作方法,用于制作如上所述的单光子雪崩二极管,包括:In addition, to achieve the above objectives, the present invention also provides a method for manufacturing a single-photon avalanche diode, which is used to manufacture the single-photon avalanche diode as described above, comprising:
提供所述衬底,在所述衬底上划定所述有源区;Providing the substrate, and defining the active area on the substrate;
在所述有源区进行离子注入,在所述衬底上形成第一离子注入区、第二离子注入区、第三离子注入区和第四离子注入区,所述第一离子注入区从所述有源区上表面延伸至所述有源区内部,所述第二离子注入区从所述第三离子注入区上表面延伸至所述第三离子注入区内部,被宽度和深度均大于所述第二离子注入区的所述第三离子注入区所包围,所述第一离子注入区从所述第二离子注入区上表面延伸至所述第二离子注入区内部,被宽度和深度均大于所述第一离子注入区的所述第二离子注入区所包围,所述第四离子注入区在沿着所述第三离子注入区背离所述第二离子注入区的一侧全沿,从所述有源区上表面延伸至所述有源区内部,所述第四离子注入区背离所述第三离子注入区的一侧到达所述有源区的边缘;Performing ion implantation in the active region to form a first ion implantation region, a second ion implantation region, a third ion implantation region and a fourth ion implantation region on the substrate, wherein the first ion implantation region extends from the upper surface of the active region to the interior of the active region, the second ion implantation region extends from the upper surface of the third ion implantation region to the interior of the third ion implantation region and is surrounded by the third ion implantation region having a width and a depth greater than that of the second ion implantation region, the first ion implantation region extends from the upper surface of the second ion implantation region to the interior of the second ion implantation region and is surrounded by the second ion implantation region having a width and a depth greater than that of the first ion implantation region, the fourth ion implantation region extends from the upper surface of the active region to the interior of the active region along the entire edge of a side of the third ion implantation region away from the second ion implantation region, and the side of the fourth ion implantation region away from the third ion implantation region reaches the edge of the active region;
在所述衬底上沿着所述有源区的外边缘制作出所述第一隔离区,在所述衬底上制作出所述第二隔离区,所述第二隔离区将所述第一离子注入区、所述第二离子注入区、所述第三离子注入区和所述第四离子注入区均电性隔离出预设等份,将被所述第二隔离区隔离后的所述第一离子注入区、所述第二离子注入区、所述第三离子注入区和所述第四离子注入区,分别作为所述第一掺杂区、所述第二掺杂区、所述第三掺杂区和所述第四掺杂区。The first isolation region is fabricated on the substrate along the outer edge of the active region, and the second isolation region is fabricated on the substrate, wherein the second isolation region electrically isolates the first ion implantation region, the second ion implantation region, the third ion implantation region and the fourth ion implantation region into preset equal parts, and the first ion implantation region, the second ion implantation region, the third ion implantation region and the fourth ion implantation region isolated by the second isolation region serve as the first doping region, the second doping region, the third doping region and the fourth doping region, respectively.
可选地,在所述有源区进行离子注入,在所述衬底上形成第一离子注入区、第二离子注入区和第三离子注入区的步骤包括:Optionally, the step of performing ion implantation in the active region to form a first ion implantation region, a second ion implantation region and a third ion implantation region on the substrate includes:
在所述有源区上进行所述第一掺杂类型的离子注入,形成第五离子注入区;Performing ion implantation of the first doping type on the active area to form a fifth ion implantation area;
在所述第五离子注入区进行所述第二掺杂类型的离子注入,以在所述第五离子注入区中形成第六离子注入区,所述第五离子注入区中未被所述第六离子注入区覆盖的部分作为所述第三离子注入区;Performing ion implantation of the second doping type in the fifth ion implantation region to form a sixth ion implantation region in the fifth ion implantation region, and a portion of the fifth ion implantation region not covered by the sixth ion implantation region serves as the third ion implantation region;
在所述第六离子注入区进行所述第二掺杂类型的离子注入,以在所述第六离子注入区中形成第一离子注入区,所述第六离子注入区中未被所述第一离子注入区覆盖的部分作为所述第二离子注入区。Ions of the second doping type are implanted in the sixth ion implantation region to form a first ion implantation region in the sixth ion implantation region, and a portion of the sixth ion implantation region not covered by the first ion implantation region serves as the second ion implantation region.
可选地,制作所述第一隔离区和所述第二隔离区的步骤包括:Optionally, the steps of making the first isolation region and the second isolation region include:
在所述衬底晶圆上所述第一隔离区和所述第二隔离区的制作区域内进行减薄,再制造全贯穿所述衬底的深沟槽隔离,以形成所述第一隔离区和所述第二隔离区。Thinning is performed in the manufacturing area of the first isolation region and the second isolation region on the substrate wafer, and then a deep trench isolation that fully penetrates the substrate is manufactured to form the first isolation region and the second isolation region.
可选地,先将进行金属连线,再制造所述第一隔离区和所述第二隔离区。Optionally, metal wiring is performed first, and then the first isolation region and the second isolation region are manufactured.
此外,为实现上述目标,本发明还提供一种光电探测器,包括如上所述的单光子雪崩二极管。In addition, to achieve the above objectives, the present invention also provides a photodetector, comprising the single photon avalanche diode as described above.
与现有技术相比,本发明的有益效果包括:为实现在不缩小SPAD整体尺寸情况下,提升SPAD阵列芯片成像分辨率,本发明实施例提出的单个SPAD可以划分为多个可独立进行单光子探测的子SPAD,从而将实现整个SPAD的位置灵敏探测,提高SPAD阵列分辨率。本发明实施例中,通过设置第二隔离区将SPAD划分为预设等份,使得各个子区可以分别作为子SPAD使用;由于第二隔离区可能因漏电流等原因在其附近产生载流子而触发雪崩,导致暗计数率增加,本发明实施例通过设置掺杂浓度从上表面向下表面逐渐增加的第三掺杂区,使得第一掺杂区下表面与侧边(远离第二隔离区的一侧)相接的区域更容易发生雪崩,而抑制第一掺杂区下表面靠近第二隔离区的区域发生雪崩的概率,也即,利用边缘击穿来提高探测效率;设置第二掺杂区是与第一掺杂区掺杂类型相同但掺杂浓度更低的掺杂区,也能够调控第一掺杂区与第三掺杂区的边缘击穿的电场方向;也即,与传统SPAD结构中抑制边缘击穿的做法不同,本发明实施例利用边缘击穿来提高探测效率,获得依靠边缘击穿工作的SPAD,使SPAD可获得更小尺寸(子SPAD的尺寸比原SPAD尺寸更小)与更高的性能,从而在不缩小SPAD整体尺寸情况下,提升SPAD阵列芯片成像分辨率,并保证探测效率。Compared with the prior art, the beneficial effects of the present invention include: in order to improve the imaging resolution of the SPAD array chip without reducing the overall size of the SPAD, the single SPAD proposed in the embodiment of the present invention can be divided into multiple sub-SPADs that can independently perform single-photon detection, thereby realizing position-sensitive detection of the entire SPAD and improving the resolution of the SPAD array. In the embodiment of the present invention, the SPAD is divided into preset equal parts by setting a second isolation region, so that each sub-region can be used as a sub-SPAD respectively; since the second isolation region may generate carriers near it due to leakage current and other reasons and trigger avalanche, resulting in an increase in the dark count rate, the embodiment of the present invention sets a third doping region with a doping concentration that gradually increases from the upper surface to the lower surface, so that the area where the lower surface of the first doping region is connected to the side (the side away from the second isolation region) is more prone to avalanche, while suppressing the probability of avalanche in the area of the lower surface of the first doping region close to the second isolation region, that is, using edge breakdown to improve detection. efficiency; setting the second doping region to be a doping region with the same doping type as the first doping region but with a lower doping concentration can also adjust the electric field direction of edge breakdown of the first doping region and the third doping region; that is, different from the practice of suppressing edge breakdown in traditional SPAD structures, the embodiment of the present invention uses edge breakdown to improve detection efficiency and obtains a SPAD that relies on edge breakdown, so that the SPAD can obtain a smaller size (the size of the sub-SPAD is smaller than the original SPAD) and higher performance, thereby improving the imaging resolution of the SPAD array chip and ensuring detection efficiency without reducing the overall size of the SPAD.
附图说明BRIEF DESCRIPTION OF THE DRAWINGS
图1为本发明实施例涉及的一种单光子雪崩二极管的剖面示意图;FIG1 is a cross-sectional schematic diagram of a single photon avalanche diode according to an embodiment of the present invention;
图2为本发明实施例涉及的一种单光子雪崩二极管的俯视图;FIG2 is a top view of a single photon avalanche diode according to an embodiment of the present invention;
图3为本发明实施例涉及的另一种单光子雪崩二极管的剖面示意图;FIG3 is a cross-sectional schematic diagram of another single photon avalanche diode involved in an embodiment of the present invention;
图4为本发明实施例涉及的一种单光子雪崩二极管制作过程中的剖面示意图;FIG4 is a cross-sectional schematic diagram of a single photon avalanche diode during fabrication according to an embodiment of the present invention;
图5为本发明实施例涉及的一种单光子雪崩二极管制作方法流程示意图;FIG5 is a schematic flow chart of a method for manufacturing a single photon avalanche diode according to an embodiment of the present invention;
图6为本发明实施例涉及的另一种单光子雪崩二极管制作过程中的剖面示意图。FIG6 is a cross-sectional schematic diagram of another single photon avalanche diode during the manufacturing process according to an embodiment of the present invention.
附图标记说明:Description of reference numerals:
1-第一掺杂区;2-第二掺杂区;3-第三掺杂区;4-第四掺杂区;5-第一隔离区;6-第二隔离区;7-衬底;8-第五掺杂区;9-第一离子注入区;10-第二离子注入区;11-第三离子注入区;12-第四离子注入区;13-第八离子注入区。1-first doping region; 2-second doping region; 3-third doping region; 4-fourth doping region; 5-first isolation region; 6-second isolation region; 7-substrate; 8-fifth doping region; 9-first ion implantation region; 10-second ion implantation region; 11-third ion implantation region; 12-fourth ion implantation region; 13-eighth ion implantation region.
具体实施方式DETAILED DESCRIPTION
为使本发明的上述目的、特征和优点能够更加明显易懂,下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述。显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动的前提下所获得的所有其它实施例,均属于本发明保护的范围。In order to make the above-mentioned purposes, features and advantages of the present invention more obvious and easy to understand, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work belong to the scope of protection of the present invention.
图1是本发明一实施例的单光子雪崩二极管的剖面示意图,图2是本发明一实施例的单光子雪崩二极管的俯视图。参照图1和图2,本发明实施例涉及一种单光子雪崩二极管,单光子雪崩二极管包括第一掺杂类型的衬底7,衬底7中由第一隔离区5电性隔离出有源区;有源区设置有第二掺杂类型的第一掺杂区1和第二掺杂区2,以及还设置有第一掺杂类型的第三掺杂区3和第四掺杂区4,第一掺杂类型与第二掺杂类型相反,第一掺杂区1的掺杂浓度高于第二掺杂区2,第四掺杂区4的掺杂浓度高于第三掺杂区3(也即高于第三掺杂区3的最大掺杂浓度)和衬底7,第三掺杂区3的掺杂浓度沿着远离有源区上表面(以第三掺杂区3从有源区表面延伸至有源区内部的一侧为有源区上表面)的方向逐渐增高,第一掺杂区1和第四掺杂区4按照掺杂类型分别作为阳极接触区和阴极接触区。FIG1 is a schematic cross-sectional view of a single-photon avalanche diode according to an embodiment of the present invention, and FIG2 is a top view of a single-photon avalanche diode according to an embodiment of the present invention. Referring to FIG1 and FIG2, an embodiment of the present invention relates to a single-photon avalanche diode, the single-photon avalanche diode comprising a substrate 7 of a first doping type, in which an active region is electrically isolated by a first isolation region 5; the active region is provided with a first doping region 1 and a second doping region 2 of a second doping type, and a third doping region 3 and a fourth doping region 4 of a first doping type, the first doping type is opposite to the second doping type, the doping concentration of the first doping region 1 is higher than that of the second doping region 2, the doping concentration of the fourth doping region 4 is higher than that of the third doping region 3 (that is, higher than the maximum doping concentration of the third doping region 3) and the substrate 7, the doping concentration of the third doping region 3 gradually increases in a direction away from the upper surface of the active region (the side where the third doping region 3 extends from the surface of the active region to the inside of the active region is the upper surface of the active region), and the first doping region 1 and the fourth doping region 4 are used as an anode contact region and a cathode contact region respectively according to the doping type.
第三掺杂区3从有源区上表面延伸至有源区内部,第二掺杂区2从第三掺杂区3上表面(以第三掺杂区3背离有源区上表面的一侧为下表面,上表面与下表面是相对的面)延伸至第三掺杂区3内部,被宽度和深度均大于第二掺杂区2的第三掺杂区3所包围,第一掺杂区1从第二掺杂区2上表面(以第二掺杂区2背离有源区上表面的一侧为下表面,上表面与下表面是相对的面)延伸至第二掺杂区2内部,被宽度和深度均大于第一掺杂区1的第二掺杂区2所包围,第四掺杂区4在沿着第一隔离区5的全沿,从有源区上表面延伸至有源区内部,且第四掺杂区4背离第一隔离区5的一侧与第三掺杂区3靠近第一隔离区5的一侧相接;The third doping region 3 extends from the upper surface of the active region to the inside of the active region, the second doping region 2 extends from the upper surface of the third doping region 3 (the side of the third doping region 3 facing away from the upper surface of the active region is the lower surface, and the upper surface and the lower surface are opposite surfaces) to the inside of the third doping region 3, and is surrounded by the third doping region 3 whose width and depth are both greater than the second doping region 2, the first doping region 1 extends from the upper surface of the second doping region 2 (the side of the second doping region 2 facing away from the upper surface of the active region is the lower surface, and the upper surface and the lower surface are opposite surfaces) to the inside of the second doping region 2, and is surrounded by the second doping region 2 whose width and depth are both greater than the first doping region 1, the fourth doping region 4 extends from the upper surface of the active region to the inside of the active region along the entire edge of the first isolation region 5, and the side of the fourth doping region 4 facing away from the first isolation region 5 is connected to the side of the third doping region 3 close to the first isolation region 5;
衬底7中还设置第二隔离区6,第二隔离区6将第一掺杂区1、第二掺杂区2、第三掺杂区3和第四掺杂区4均划分成相互电性隔离的预设等份,以使有源区被划分为预设等份的子区,各子区内的结构分别构成一个子单光子雪崩二极管(子SPAD)。A second isolation region 6 is also provided in the substrate 7, and the second isolation region 6 divides the first doping region 1, the second doping region 2, the third doping region 3 and the fourth doping region 4 into preset equal parts which are electrically isolated from each other, so that the active region is divided into sub-regions of preset equal parts, and the structure in each sub-region constitutes a sub-single photon avalanche diode (sub-SPAD).
需要说明的是,图1和图2中是以预设等份设置为4等份、有源区在衬底7上表面的正投影为矩形为例所绘制的示意图;参照图2,有源区在衬底7上表面的正投影为矩形,第二隔离区6在衬底7上表面的正投影为十字形,从而将第一掺杂区1、第二掺杂区2、第三掺杂区3和第四掺杂区4均划分成相互电性隔离的4等份。在具体实施方式中,预设等份可以根据需要进行设置,例如设置为2等份、3等份、4等份等,而根据预设等份的设置不同,第二隔离区6在衬底7上表面的正投影的形状也不同,例如,当预设等份设置为2等份时,第二隔离区6在衬底7上表面的正投影的形状就是狭长的矩形(忽略其宽度的话即可以看做是一条线);有源区在衬底7上表面的正投影的形状也可以是圆形或其它形状,在本实施例中并不做限制。It should be noted that FIG. 1 and FIG. 2 are schematic diagrams drawn based on the example that the preset equal parts are set to 4 equal parts and the positive projection of the active area on the upper surface of the substrate 7 is a rectangle; with reference to FIG. 2, the positive projection of the active area on the upper surface of the substrate 7 is a rectangle, and the positive projection of the second isolation region 6 on the upper surface of the substrate 7 is a cross, so that the first doping region 1, the second doping region 2, the third doping region 3 and the fourth doping region 4 are divided into 4 equal parts that are electrically isolated from each other. In a specific embodiment, the preset equal parts can be set as needed, for example, set to 2 equal parts, 3 equal parts, 4 equal parts, etc., and according to the different settings of the preset equal parts, the shape of the positive projection of the second isolation region 6 on the upper surface of the substrate 7 is also different. For example, when the preset equal parts are set to 2 equal parts, the shape of the positive projection of the second isolation region 6 on the upper surface of the substrate 7 is a narrow and long rectangle (ignoring its width, it can be regarded as a line); the shape of the positive projection of the active area on the upper surface of the substrate 7 can also be a circle or other shapes, which is not limited in this embodiment.
在具体实施方式中,衬底7可以采用硅衬底;第一掺杂类型为p型掺杂(例如掺杂有硼或二氟化硼),第二掺杂类型为n型掺杂(例如掺杂有磷或砷);或者,第一掺杂类型为n型掺杂,第二掺杂类型为p型掺杂。当第一掺杂类型为p型掺杂时,第一掺杂区1作为阴极接触区,第四掺杂区4作为阳极接触区。当第一掺杂类型为n型掺杂时,第一掺杂区1作为阳极接触区,第四掺杂区4作为阴极接触区。In a specific embodiment, the substrate 7 can be a silicon substrate; the first doping type is p-type doping (for example, doped with boron or boron difluoride), and the second doping type is n-type doping (for example, doped with phosphorus or arsenic); or, the first doping type is n-type doping, and the second doping type is p-type doping. When the first doping type is p-type doping, the first doping region 1 serves as a cathode contact region, and the fourth doping region 4 serves as an anode contact region. When the first doping type is n-type doping, the first doping region 1 serves as an anode contact region, and the fourth doping region 4 serves as a cathode contact region.
在一可行实施方式中,在使用SPAD制作光电探测器时,可以将每个子SPAD的阳极接触区连接在一起,然后每个子SPAD的阴极接触区分别连接一套淬灭电路。In a feasible implementation, when using SPAD to make a photodetector, the anode contact area of each sub-SPAD can be connected together, and then the cathode contact area of each sub-SPAD is respectively connected to a set of quenching circuits.
在一可行实施方式中,第一掺杂区1可以采用重掺杂,第二掺杂区2可以采用中等掺杂,使得第一掺杂区1的掺杂浓度高于第二掺杂区2;第四掺杂区4可以采用重掺杂,第三掺杂区3和衬底7可以采用中等掺杂,以使得第四掺杂区4的掺杂浓度高于第三掺杂区3和衬底7;第三掺杂区3可以通过倒掺杂实现掺杂浓度沿着远离有源区上表面的方向逐渐增高。In a feasible embodiment, the first doping region 1 can be heavily doped, and the second doping region 2 can be moderately doped, so that the doping concentration of the first doping region 1 is higher than that of the second doping region 2; the fourth doping region 4 can be heavily doped, and the third doping region 3 and the substrate 7 can be moderately doped, so that the doping concentration of the fourth doping region 4 is higher than that of the third doping region 3 and the substrate 7; the third doping region 3 can achieve a gradually increasing doping concentration in the direction away from the upper surface of the active region through reverse doping.
本发明实施例主要对单个单光子雪崩二极管进行说明,可以理解,同一衬底7上可以集成有不止一个的单光子雪崩二极管,也可以形成有其它器件,各个器件之间通过隔离区进行隔离,本实施例中将用于将单个单光子雪崩二极管与其他器件隔离开的隔离区称为第一隔离区5,将单个单光子雪崩二极管中用于隔离出子单光子雪崩二极管的隔离区称为第二隔离区6。隔离区可以采用任意能够使得被隔离的各个部分电性隔离的隔离结构实现,例如,可以采用从衬底7深度方向全贯穿的深沟槽隔离来实现。The embodiment of the present invention mainly describes a single single-photon avalanche diode. It can be understood that more than one single-photon avalanche diode can be integrated on the same substrate 7, and other devices can also be formed. The devices are isolated by isolation regions. In this embodiment, the isolation region used to isolate the single single-photon avalanche diode from other devices is called the first isolation region 5, and the isolation region used to isolate the sub-single-photon avalanche diode in the single single-photon avalanche diode is called the second isolation region 6. The isolation region can be implemented by any isolation structure that can electrically isolate the isolated parts. For example, it can be implemented by deep trench isolation that penetrates the substrate 7 in the depth direction.
为实现在不缩小SPAD整体尺寸情况下,提升SPAD阵列芯片成像分辨率,本发明实施例提出的单个SPAD可以划分为多个可独立进行单光子探测的子SPAD,从而将实现整个SPAD的位置灵敏探测,提高SPAD阵列分辨率。本发明实施例中,通过设置第二隔离区6将SPAD划分为预设等份,使得各个子区可以分别作为子SPAD使用;由于第二隔离区6可能因漏电流等原因在其附近产生载流子而触发雪崩,导致暗计数率增加,本发明实施例通过设置掺杂浓度从上表面向下表面逐渐增加的第三掺杂区3,使得第一掺杂区1下表面与侧边(远离第二隔离区6的一侧)相接的区域更容易发生雪崩,而抑制第一掺杂区1下表面靠近第二隔离区6的区域发生雪崩的概率,也即,利用边缘击穿来提高探测效率;设置第二掺杂区2是与第一掺杂区1掺杂类型相同但掺杂浓度更低的掺杂区,也能够调控第一掺杂区1与第三掺杂区3的边缘击穿的电场方向;也即,与传统SPAD结构中抑制边缘击穿的做法不同,本发明实施例利用边缘击穿来提高探测效率,获得依靠边缘击穿工作的SPAD,使SPAD可获得更小尺寸(子SPAD的尺寸比原SPAD尺寸更小)与更高的性能。可以理解的是,由于各个子SPAD都可以独立探测入射光子,从而实现整个SPAD的位置灵敏探测,使SPAD阵列分辨率提升了预设等份倍,例如预设等份为4,则使SPAD阵列分辨率提升4倍。In order to improve the imaging resolution of the SPAD array chip without reducing the overall size of the SPAD, the single SPAD proposed in the embodiment of the present invention can be divided into multiple sub-SPADs that can independently perform single photon detection, thereby realizing position-sensitive detection of the entire SPAD and improving the resolution of the SPAD array. In the embodiment of the present invention, the SPAD is divided into preset equal parts by setting the second isolation region 6, so that each sub-region can be used as a sub-SPAD respectively; because the second isolation region 6 may generate carriers near it due to leakage current and other reasons and trigger avalanche, resulting in an increase in dark count rate, the embodiment of the present invention sets a third doping region 3 with a doping concentration gradually increasing from the upper surface to the lower surface, so that the area where the lower surface of the first doping region 1 is connected to the side (the side away from the second isolation region 6) is more likely to avalanche, and the probability of avalanche occurring in the area of the lower surface of the first doping region 1 close to the second isolation region 6 is suppressed, that is, edge breakdown is used to improve the detection efficiency; the second doping region 2 is set to be a doping region with the same doping type as the first doping region 1 but a lower doping concentration, and the electric field direction of the edge breakdown of the first doping region 1 and the third doping region 3 can also be regulated; that is, different from the method of suppressing edge breakdown in traditional SPAD structures, the embodiment of the present invention uses edge breakdown to improve the detection efficiency, obtains a SPAD that relies on edge breakdown, and enables the SPAD to have a smaller size (the size of the sub-SPAD is smaller than the original SPAD) and higher performance. It can be understood that since each sub-SPAD can independently detect incident photons, position-sensitive detection of the entire SPAD is achieved, so that the resolution of the SPAD array is improved by a preset multiple. For example, if the preset multiple is 4, the resolution of the SPAD array is improved by 4 times.
图3是本发明另一实施例的单光子雪崩二极管的剖面示意图。参照图3,另一实施例中涉及的单光子雪崩二极管相对于图1所示的单光子雪崩二极管,主要区别在于在有源区中还设置了第一掺杂类型的第五掺杂区8,第四掺杂区4的深度小于第三掺杂区3的深度,第五掺杂区8的掺杂浓度小于第四掺杂区4的掺杂浓度,第五掺杂区8沿着第一隔离区5的全沿,从第四掺杂区4的上表面向有源区的下表面延伸,第五掺杂区8背离第一隔离区5的一侧部分与第三掺杂区3相接,第五掺杂区8的深度大于第三掺杂区3的深度。FIG3 is a cross-sectional schematic diagram of a single-photon avalanche diode according to another embodiment of the present invention. Referring to FIG3 , the single-photon avalanche diode according to another embodiment is different from the single-photon avalanche diode shown in FIG1 in that a fifth doping region 8 of the first doping type is further provided in the active region, the depth of the fourth doping region 4 is less than the depth of the third doping region 3, the doping concentration of the fifth doping region 8 is less than the doping concentration of the fourth doping region 4, the fifth doping region 8 extends along the entire edge of the first isolation region 5 from the upper surface of the fourth doping region 4 to the lower surface of the active region, the side portion of the fifth doping region 8 facing away from the first isolation region 5 is connected to the third doping region 3, and the depth of the fifth doping region 8 is greater than the depth of the third doping region 3.
本实施例中,以第一掺杂类型为p型掺杂为例,第五掺杂区8用于将SPAD的阳极电位引导至衬底7底部,进一步地保证电场方向朝向第一掺杂区1的边缘击穿区域,从而进一步地提高SPAD的探测效率。并且,第五掺杂区8也可以同时避免第一隔离区5附近产生的非光生载流子进入雪崩区而导致暗计数率变高。In this embodiment, taking the first doping type as p-type doping as an example, the fifth doping region 8 is used to guide the anode potential of the SPAD to the bottom of the substrate 7, further ensuring that the direction of the electric field is toward the edge breakdown region of the first doping region 1, thereby further improving the detection efficiency of the SPAD. In addition, the fifth doping region 8 can also prevent the non-photogenerated carriers generated near the first isolation region 5 from entering the avalanche region, resulting in a higher dark count rate.
本发明实施例还涉及一种单光子雪崩二极管的制作方法,该方法可用于制作上述实施例描述的单光子雪崩二极管。应当理解,上述实施例描述的单光子雪崩二极管的制作并不限于以下描述的方法。The embodiment of the present invention also relates to a method for manufacturing a single photon avalanche diode, which can be used to manufacture the single photon avalanche diode described in the above embodiment. It should be understood that the manufacture of the single photon avalanche diode described in the above embodiment is not limited to the method described below.
图4是本发明一实施例的单光子雪崩二极管制作过程中的剖面示意图。图5是本发明一实施例的单光子雪崩二极管制作方法流程示意图。参照图1至图5,本发明一实施例中,单光子雪崩二极管的制作方法包括如下步骤:FIG4 is a cross-sectional schematic diagram of a single photon avalanche diode manufacturing process according to an embodiment of the present invention. FIG5 is a flow chart of a single photon avalanche diode manufacturing method according to an embodiment of the present invention. Referring to FIG1 to FIG5, in an embodiment of the present invention, the single photon avalanche diode manufacturing method includes the following steps:
步骤S1:提供衬底7,在衬底7上划定有源区;Step S1: providing a substrate 7, and defining an active area on the substrate 7;
步骤S2:在有源区进行离子注入,在衬底7上形成第一离子注入区9、第二离子注入区10、第三离子注入区11和第四离子注入区12,第一离子注入区9从有源区上表面延伸至有源区内部,第二离子注入区10从第三离子注入区11上表面延伸至第三离子注入区11内部,被宽度和深度均大于第二离子注入区10的第三离子注入区11所包围,第一离子注入区9从第二离子注入区10上表面延伸至第二离子注入区10内部,被宽度和深度均大于第一离子注入区9的第二离子注入区10所包围,第四离子注入区12在沿着第三离子注入区11背离第二离子注入区10的一侧全沿,从有源区上表面延伸至有源区内部,第四离子注入区12背离第三离子注入区11的一侧到达有源区的边缘;Step S2: performing ion implantation in the active area to form a first ion implantation area 9, a second ion implantation area 10, a third ion implantation area 11 and a fourth ion implantation area 12 on the substrate 7, wherein the first ion implantation area 9 extends from the upper surface of the active area to the inside of the active area, the second ion implantation area 10 extends from the upper surface of the third ion implantation area 11 to the inside of the third ion implantation area 11, and is surrounded by the third ion implantation area 11 whose width and depth are both greater than the second ion implantation area 10, the first ion implantation area 9 extends from the upper surface of the second ion implantation area 10 to the inside of the second ion implantation area 10, and is surrounded by the second ion implantation area 10 whose width and depth are both greater than the first ion implantation area 9, the fourth ion implantation area 12 extends from the upper surface of the active area to the inside of the active area along the entire edge of a side of the third ion implantation area 11 away from the second ion implantation area 10, and the side of the fourth ion implantation area 12 away from the third ion implantation area 11 reaches the edge of the active area;
步骤S3:在衬底7上沿着有源区的外边缘制作出第一隔离区5,在衬底7上制作出第二隔离区6,第二隔离区6将第一离子注入区9、第二离子注入区10、第三离子注入区11和第四离子注入区12均电性隔离出预设等份,将被第二隔离区6隔离后的第一离子注入区9、第二离子注入区10、第三离子注入区11和第四离子注入区12,分别作为第一掺杂区1、第二掺杂区2、第三掺杂区3和第四掺杂区4。Step S3: A first isolation region 5 is formed on the substrate 7 along the outer edge of the active region, and a second isolation region 6 is formed on the substrate 7. The second isolation region 6 electrically isolates the first ion implantation region 9, the second ion implantation region 10, the third ion implantation region 11 and the fourth ion implantation region 12 into preset equal parts. The first ion implantation region 9, the second ion implantation region 10, the third ion implantation region 11 and the fourth ion implantation region 12 isolated by the second isolation region 6 are respectively used as the first doping region 1, the second doping region 2, the third doping region 3 and the fourth doping region 4.
在步骤S2中,第一离子注入区9和第二离子注入区10的掺杂类型为第二掺杂类型,第三离子注入区11和第四离子注入区12的掺杂类型为第一掺杂类型。第一离子注入区9所注入离子的掺杂浓度高于第二离子注入区10所注入离子的掺杂浓度。第四离子注入区12所注入离子的掺杂浓度高于第三离子注入区11所注入离子的最大掺杂浓度,以及高于衬底7的掺杂浓度。第三离子注入区11可以采用倒掺杂的方式注入,以使得第四离子注入区12的掺杂浓度沿着远离有源区上表面的方向逐渐增高。In step S2, the doping type of the first ion implantation area 9 and the second ion implantation area 10 is the second doping type, and the doping type of the third ion implantation area 11 and the fourth ion implantation area 12 is the first doping type. The doping concentration of the ions implanted in the first ion implantation area 9 is higher than the doping concentration of the ions implanted in the second ion implantation area 10. The doping concentration of the ions implanted in the fourth ion implantation area 12 is higher than the maximum doping concentration of the ions implanted in the third ion implantation area 11, and higher than the doping concentration of the substrate 7. The third ion implantation area 11 can be implanted in a reverse doping manner so that the doping concentration of the fourth ion implantation area 12 gradually increases in a direction away from the upper surface of the active area.
在一可行实施方式中,在步骤S3中,在制作第一隔离区5和第二隔离区6时,可以在衬底7晶圆上的第一隔离区5和第二隔离区6的制作区域(需要制作出第一隔离区5和第二隔离区6的区域)内进行减薄,再制造全贯穿衬底7的深沟槽隔离,以形成第一隔离区5和第二隔离区6。通过先对晶圆进行减薄,可以使得在制造深沟槽隔离时,能够贯穿衬底7。In a feasible implementation, in step S3, when making the first isolation region 5 and the second isolation region 6, thinning can be performed in the manufacturing area of the first isolation region 5 and the second isolation region 6 on the substrate 7 wafer (the area where the first isolation region 5 and the second isolation region 6 need to be manufactured), and then a deep trench isolation that fully penetrates the substrate 7 is manufactured to form the first isolation region 5 and the second isolation region 6. By thinning the wafer first, it is possible to penetrate the substrate 7 when manufacturing the deep trench isolation.
在一可行实施方式中,在步骤S2中,在有源区进行离子注入,在衬底7上形成第一离子注入区9、第二离子注入区10和第三离子注入区11时,可以先在有源区上进行第一掺杂类型的离子注入,形成第五离子注入区(图4中第一离子注入区9、第二离子注入区10和第三离子注入区11三个区域合起来的区域,未采用附图标记标出);再在第五离子注入区进行第二掺杂类型的离子注入,以在第五离子注入区中形成第六离子注入区(图4中第一离子注入区9和第二离子注入区10两个区域合起来的区域,未采用附图标记标出),将第五离子注入区中未被第六离子注入区覆盖的部分作为第三离子注入区11,第五离子注入区的深度和宽度均大于第六离子注入区;再在第六离子注入区进行第二掺杂类型的离子注入,以在第六离子注入区中形成第一离子注入区9,第六离子注入区中未被第一离子注入区9覆盖的部分作为第二离子注入区10,第六离子注入区的宽度和深度都大于第一离子注入区9。In one feasible implementation, in step S2, when ion implantation is performed in the active region to form the first ion implantation region 9, the second ion implantation region 10 and the third ion implantation region 11 on the substrate 7, ion implantation of the first doping type may be performed on the active region first to form a fifth ion implantation region (the region in which the first ion implantation region 9, the second ion implantation region 10 and the third ion implantation region 11 in FIG. 4 are combined, and are not marked with reference numerals); and then ion implantation of the second doping type is performed in the fifth ion implantation region to form a sixth ion implantation region in the fifth ion implantation region (the region in which the first ion implantation region 9, the second ion implantation region 10 and the third ion implantation region 11 in FIG. 4 are combined, and are not marked with reference numerals); The combined area of the sub-implantation area 9 and the second ion implantation area 10 is not marked with a reference numeral), and the portion of the fifth ion implantation area not covered by the sixth ion implantation area is used as the third ion implantation area 11, and the depth and width of the fifth ion implantation area are both greater than those of the sixth ion implantation area; then, ion implantation of the second doping type is performed in the sixth ion implantation area to form a first ion implantation area 9 in the sixth ion implantation area, and the portion of the sixth ion implantation area not covered by the first ion implantation area 9 is used as the second ion implantation area 10, and the width and depth of the sixth ion implantation area are both greater than those of the first ion implantation area 9.
图6是本发明一实施例的单光子雪崩二极管制作过程中的剖面示意图。在一可行实施方式中,参照图6,在步骤S2中,在有源区进行离子注入,在衬底7上形成第四离子注入区12之前,可以先在有源区进行离子注入,形成第七离子注入区(图6中第四离子注入区12和第八离子注入区13两个区域合起来的区域,未采用附图标记标出),第七离子注入区在沿着第三离子注入区11背离第二离子注入区10的一侧全沿,从有源区上表面延伸至有源区内部,第七离子注入区背离第三离子注入区11的一侧到达有源区的边缘,第七离子注入区的深度大于第三离子注入区11的深度。再在第七离子注入区中注入第四离子注入区12,第四离子注入区12的宽度与第七离子注入区宽度相同,深度低于第七离子注入区,第七离子注入区中未被第四离子注入区12覆盖的部分作为第八离子注入区13,在制造第二隔离区6后,将被第二隔离区6隔离后的第八离子注入区13作为第五掺杂区8。FIG6 is a cross-sectional schematic diagram of a single-photon avalanche diode manufacturing process according to an embodiment of the present invention. In a feasible implementation, referring to FIG6 , in step S2, ion implantation is performed in the active region, and before the fourth ion implantation region 12 is formed on the substrate 7, ion implantation can be performed in the active region first to form a seventh ion implantation region (the region in FIG6 where the fourth ion implantation region 12 and the eighth ion implantation region 13 are combined, and not marked with a reference numeral), the seventh ion implantation region extends from the upper surface of the active region to the inside of the active region along the entire edge of the side of the third ion implantation region 11 away from the second ion implantation region 10, the side of the seventh ion implantation region away from the third ion implantation region 11 reaches the edge of the active region, and the depth of the seventh ion implantation region is greater than the depth of the third ion implantation region 11. Then, the fourth ion implantation region 12 is implanted into the seventh ion implantation region. The width of the fourth ion implantation region 12 is the same as that of the seventh ion implantation region, and the depth is lower than that of the seventh ion implantation region. The portion of the seventh ion implantation region not covered by the fourth ion implantation region 12 serves as the eighth ion implantation region 13. After manufacturing the second isolation region 6, the eighth ion implantation region 13 isolated by the second isolation region 6 is used as the fifth doping region 8.
在一可行实施方式中,在步骤S3中,可以先进行金属连线,再制造第一隔离区5和第二隔离区6,第一隔离区5和第二隔离区6的制造不破坏金属连线即可。其中,金属连线是指将单光子雪崩二极管采用金属线与其他需要连接器件进行连接,例如与淬灭电路、读出电路等进行连接。In a feasible implementation, in step S3, metal wiring can be performed first, and then the first isolation region 5 and the second isolation region 6 can be manufactured, and the manufacturing of the first isolation region 5 and the second isolation region 6 does not need to damage the metal wiring. The metal wiring refers to connecting the single-photon avalanche diode with other devices that need to be connected using metal wires, such as connecting with a quenching circuit, a readout circuit, etc.
在上述实施例的基础上,本发明实施例还提供了一种光电探测器,该光电探测器包括上述实施例中的任一种单光子雪崩二极管。On the basis of the above embodiments, an embodiment of the present invention further provides a photodetector, which includes any single photon avalanche diode in the above embodiments.
需要说明的是,本说明书中各个实施例采用递进的方式描述,每个实施例重点说明的都是与其他实施例的不同之处,各个实施例之间相同和相似的部分互相参见即可。对于实施例公开的方法而言,由于与实施例公开的结构相对应,所以描述的比较简单,相关之处参见结构部分说明即可。It should be noted that the various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same and similar parts between the various embodiments can be referred to each other. For the method disclosed in the embodiment, since it corresponds to the structure disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the structural description.
需要说明的是,在本文中,术语“包括”、“包含”或者其任何其他变体意在涵盖非排他性的包含,从而使得包括一系列要素的过程、方法、物品或者装置不仅包括那些要素,而且还包括没有明确列出的其他要素,或者是还包括为这种过程、方法、物品或者装置所固有的要素。在没有更多限制的情况下,由语句“包括一个……”限定的要素,并不排除在包括该要素的过程、方法、物品或者装置中还存在另外的相同要素。It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.
上述本发明实施例序号仅仅为了描述,不代表实施例的优劣。The serial numbers of the above embodiments of the present invention are only for description and do not represent the advantages or disadvantages of the embodiments.
以上仅为本发明的优选实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。The above are only preferred embodiments of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.
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