CN118854447A - A method for controlling epitaxy - Google Patents

Abstract

The application discloses an epitaxial control method, and belongs to the technical field of semiconductor manufacturing. Comprising the following steps: providing a first temperature control sheet, placing the first temperature control sheet on a base, and performing first heating treatment on the first temperature control sheet through a heating element to obtain the sheet resistances of the first temperature control sheet at different temperatures so as to determine a temperature coefficient alpha; providing a second temperature control sheet, placing the second temperature control sheet on a base, performing second heating treatment on the second temperature control sheet through a heating element, obtaining the sheet resistance of the second temperature control sheet after the second heating treatment, and combining a temperature coefficient alpha to determine a first temperature difference delta T ₁ of the second temperature control sheet; judging whether the first temperature difference delta T ₁ meets the range of a first preset temperature or not; if the first temperature difference ΔT ₁ does not satisfy the range of the first preset temperature, the distance between the heating element and the base is adjusted so that the first temperature difference ΔT ₁ satisfies the range of the first preset temperature. The epitaxial control method provided by the application can improve the temperature uniformity of the epitaxial wafer in the forming process, thereby improving the defects of the epitaxial wafer.

Description

A method for controlling epitaxy

Technical Field

The present application relates to the field of semiconductor manufacturing technology, and in particular to a method for improving the slip line of an epitaxial wafer.

Background Art

Slip lines are generally caused by the extension of substrate defects to the epitaxial layer, or the lattice mismatch between the epitaxial layer and the substrate, resulting in a large number of slip defects. The formation mechanism is mainly that during the high-temperature formation of the epitaxial layer, the accumulation of various thermal stresses exceeds the critical stress for slip defects at that temperature. Slip lines are often seen at the edge of silicon wafers, generally appearing as parallel lines or straight lines intersecting at 60°. As the thickness of the epitaxial layer increases, the mismatch between the epitaxial layer and the substrate increases, leading to an increase in local epitaxial stress. Slip defects reach the surface of the epitaxial layer, which is manifested as an increase or deepening of slip lines. In severe cases, it leads to edge cracks, which has a very important impact on the yield of chip processing.

Summary of the invention

The purpose of the present application is to provide an epitaxial control method, which can improve the temperature uniformity of the epitaxial wafer during the formation process, thereby improving the defects of the epitaxial wafer.

The embodiment of the present application provides an epitaxial control method for controlling the reaction temperature of an epitaxial device, wherein the epitaxial device has a reaction chamber, wherein a susceptor and a heating element are arranged in the reaction chamber, wherein the heating element is located on one side of the susceptor and is used to heat the susceptor, comprising:

Providing a first temperature control sheet, placing it on the base, performing a first heating process on the first temperature control sheet by the heating element, obtaining the square resistance of the first temperature control sheet at different temperatures, so as to determine the temperature coefficient α;

Providing a second temperature control sheet, placed on the base, performing a second heating treatment on the second temperature control sheet by the heating element, obtaining the square resistance of the second temperature control sheet after the second heating treatment, and combining the temperature coefficient α to determine a first temperature difference ΔT ₁ of the second temperature control sheet;

Determining whether the first temperature difference _ΔT1 satisfies a first preset temperature range;

If the first temperature difference ΔT ₁ does not satisfy the first preset temperature range, the distance between the heating element and the base is adjusted so that the first temperature difference ΔT ₁ satisfies the first preset temperature range.

In some embodiments, after adjusting the distance between the heating element and the base so that the first temperature difference _ΔT1 satisfies the range of the first preset temperature, the method further includes:

A first test epitaxial wafer is formed in the reaction chamber.

In some embodiments, after adjusting the distance between the heating element and the base so that the first temperature difference _ΔT1 satisfies the range of the first preset temperature, the method further includes:

Providing a third temperature control sheet, placing it on the base, performing a third heating treatment on the third temperature control sheet by the heating element, obtaining the square resistance of the third temperature control sheet after the third heating treatment, and combining the temperature coefficient α to determine a second temperature difference ΔT ₂ of the third temperature control sheet;

Determining whether the second temperature difference _ΔT2 satisfies a second preset temperature range;

If the second temperature difference ΔT ₂ satisfies the second preset temperature range, a first test epitaxial wafer is formed in the reaction chamber.

In some embodiments, after forming the first test epitaxial wafer in the reaction chamber, the method further includes:

Detecting whether the first test epitaxial wafer has defects;

If the first test epitaxial wafer has a defect, then obtaining the square resistance of the third temperature control piece in the area corresponding to the defect, and combining the temperature coefficient α to determine a third temperature difference ΔT ₃ of the third temperature control piece;

Determining whether the third temperature difference ΔT ₃ satisfies a third preset temperature range;

If the third temperature difference ΔT ₃ satisfies the third preset temperature range, the distance between the heating element and the base is adjusted so that the third temperature difference ΔT ₃ satisfies the first preset temperature range.

In some embodiments, after adjusting the distance between the heating element and the base so that the third temperature difference _ΔT3 satisfies the range of the third preset temperature, the method further includes:

Providing a fourth temperature control sheet, placed on the base, performing a fourth heating treatment on the fourth temperature control sheet by the heating element, obtaining a square resistance of the fourth temperature control sheet after the fourth heating treatment, and combining the temperature coefficient α to determine a fourth temperature difference ΔT ₄ of the fourth temperature control sheet;

Determining whether the fourth temperature difference _ΔT4 satisfies the first preset temperature range;

If the fourth temperature difference _ΔT4 satisfies the first preset temperature, a second test epitaxial wafer is formed in the reaction chamber.

In some embodiments, after forming a second test epitaxial wafer in the reaction chamber, the method further includes:

Detecting whether the second test epitaxial wafer has defects;

If the second test epitaxial wafer has no defects, an epitaxial wafer is formed in the reaction chamber.

In some embodiments, if the fourth temperature difference _ΔT4 satisfies the first preset temperature range, an epitaxial wafer is formed in the reaction chamber.

In some embodiments, if the first test epitaxial wafer has no defects, an epitaxial wafer is formed in the reaction chamber.

In some embodiments, the first preset temperature is _Ta , the second preset temperature is _Tb , and the third preset temperature is _Tc , satisfying: _Ta < _Tc <_Tb; and/or,

The first preset temperature is _Ta , which satisfies: 0° _C≤Ta≤2.5 °C; the second preset temperature is _Tb , which satisfies: 5°C< _Tb <25°C; the third preset temperature is _Tc , which satisfies: 2.5°C< _Tc≤5 °C.

In some embodiments, forming a first test epitaxial wafer in the reaction chamber includes:

Providing a substrate, and placing it on the base;

Introducing a silicon source and a doping gas into the reaction chamber;

At the same time, the reaction chamber is heated to a seventh temperature T ₇ at a seventh heating rate V ₇ ;

When the reaction chamber reaches the seventh temperature _T7 , the reaction chamber is heated to an eighth temperature _T8 at an eighth heating rate _V8 to form a first test epitaxial wafer on the substrate.

In some embodiments, before introducing the doping gas into the reaction chamber, the method further comprises:

A diluent gas is introduced into the doping gas to dilute the doping gas.

In some embodiments, the flow rate of the silicon source is 5 to 20 SLM, the flow rate of the carrier gas of the silicon source is 150 to 200 SLM; the flow rate of the doping gas is 0 to 300 Sccm, and the flow rate of the dilution gas is 0 to 30 SLM; and/or,

The seventh heating rate V ₇ satisfies: 0.41° C./s≤V ₇ ≤1.15° C./s, and the seventh temperature T ₇ satisfies: 970° C.≤T ₇ ≤1070° C.; and/or,

The eighth heating rate V ₈ satisfies: 0.13° C./s≤V ₈ ≤0.17° C./s, and the eighth temperature T8 satisfies: 1020° C.≤T ₈ ≤1120° C.;

The formation rate of the first test epitaxial wafer is 1-3 μm/min; and/or,

The silicon source is selected from trichlorosilane; and/or,

The doping gas is selected from at least one of phosphine, arsine and borane; and/or,

The carrier gas is selected from hydrogen; and/or,

The diluent gas is selected from hydrogen.

In some embodiments, if the first temperature difference ΔT ₁ satisfies the first preset temperature range, an epitaxial wafer is formed in the reaction chamber.

In some embodiments, a first temperature control sheet is provided and placed on the base, and the first temperature control sheet is subjected to a first heating process by the heating element to obtain the square resistance of the first temperature control sheet at different temperatures to determine the temperature coefficient α, including:

Providing n first temperature control sheets, placing them on the base, performing a first heating treatment on the n first temperature control sheets respectively by the heating element, obtaining the square resistances of the n first temperature control sheets at different temperatures, so as to determine the temperature coefficient α;

n satisfies: 2≤n≤5.

In some embodiments, the first heating treatment includes a first temperature rise stage, a second temperature rise stage, and a first temperature keeping stage;

Providing n first temperature control sheets, placing them on the base, performing first heating treatment on the n first temperature control sheets respectively by the heating element, obtaining the square resistance of the n first temperature control sheets at different temperatures to determine the temperature coefficient α, including:

Take three first temperature control sheets, namely the first test temperature control sheet, the second test temperature control sheet, and the third test temperature control sheet;

In the first temperature rise stage, the first test temperature control sheet, the second test temperature control sheet, and the third test temperature control sheet are heated to a first temperature T ₁ at a first temperature rise rate V ₁ ;

In the second temperature rising stage, for the first test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the second temperature _T2 at a second temperature rising rate _V2 ; for the second test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the third temperature _T3 at a third temperature rising rate _V3 ; for the third test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the fourth temperature _T4 at a fourth temperature rising rate _V4 ;

Satisfies: T ₂ ≤ _{T 3} ≤ _{T 4} ; T ₃ - T ₂ = T ₄ - T ₃ ; V ₂ ≤ _{V 3} ≤ _{V 4} ;

In the first insulation stage, for the first test temperature control sheet, the reaction chamber is kept at the second temperature _T2 for a first time _t1 , for the second test temperature control sheet, the reaction chamber is kept at the third temperature _T3 for a second time _t2 , and for the third test temperature control sheet, the reaction chamber is kept at the fourth temperature _T4 for a third time _t3 , satisfying: _t1 = _t2 = _t3 .

In some embodiments, the first heating stage lasts for 1000 to 1500 seconds, the second heating stage lasts for 300 to 360 seconds, and the first heat preservation stage lasts for 60 to 600 seconds; and/or,

The first heating rate V ₁ satisfies: 0.41° C./s≤V ₁ ≤1.15° C./s; the first temperature T ₁ satisfies: 970° C.≤T ₁ ≤1070° C.; and/or,

The second heating rate V ₂ satisfies: 0.1°C/s≤V ₂ ≤0.13°C/s; the second temperature T ₂ satisfies: 1020°C≤T ₂ ≤1120°C; and/or,

The third heating rate V ₃ satisfies: 0.13° C./s≤V ₃ ≤0.17° C./s; the third temperature T ₃ satisfies: 1020° C.≤T ₃ ≤1120° C.; and/or,

The fourth heating rate V ₄ satisfies: 0.17° C./s≤V ₄ ≤0.2° C./s; the fourth temperature T ₄ satisfies: 1020° C.≤T ₄ ≤1120° C.

In some embodiments, the second heating treatment includes a third temperature rise stage, a fourth temperature rise stage, and a second temperature keeping stage;

In the third heating stage, the reaction chamber is heated to a fifth temperature T ₅ at a fifth heating rate V ₅ ;

In the fourth temperature rising stage, the reaction chamber is heated from the fifth temperature to a sixth temperature T ₆ at a sixth temperature rising rate V ₆ ;

In the second heat preservation stage, the reaction chamber is subjected to heat preservation treatment at the sixth temperature _T6 .

In some embodiments, the third heating stage lasts for 1000 to 1500 seconds, the fourth heating stage lasts for 300 to 360 seconds, and the second heat preservation stage lasts for 60 to 600 seconds; and/or,

The fifth heating rate V ₅ satisfies: 0.41° C./s≤V ₅ ≤1.15° C./s, and the fifth temperature T ₅ satisfies: 970° C.≤T ₅ ≤1070° C.; and/or,

The sixth heating rate V ₆ satisfies: 0.1° C./s≤V ₆ ≤0.2° C./s, and the sixth temperature T ₆ satisfies: 1020° C.≤T ₆ ≤1120° C.

In some embodiments, before the first temperature control sheet is subjected to a first heating process by the heating element, the method further includes:

Introducing hydrogen into the reaction chamber, wherein the hydrogen flow rate is 150-200 SLM; and/or,

Before the second temperature control sheet is subjected to a second heating process by the heating element, the method further includes:

Hydrogen is introduced into the reaction chamber, and the gas flow rate of the hydrogen is 150-200 SLM.

The beneficial effects of the present application are as follows: by performing a first heat treatment on the first temperature control sheet to obtain the square resistance of the first temperature control sheet at different temperatures, the linear relationship between the square resistance and the temperature can be determined, thereby obtaining the temperature coefficient α; by performing a heat treatment on the second temperature control sheet to obtain the temperature difference within the second temperature control sheet, that is, the temperature uniformity within the sheet, thereby evaluating the temperature uniformity of the epitaxial wafer during the formation process; and by adjusting the distance between the heating element and the base to adjust the temperature uniformity, the defect problem of the epitaxial wafer can be improved.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG1 is a flow chart of an epitaxial control method provided in an embodiment of the present application;

FIG2 is a first top view of an epitaxial device provided in an embodiment of the present application;

FIG3 is a second top view of the epitaxial device provided in an embodiment of the present application;

FIG4 is a cross-sectional view along line AA of FIG3 ;

FIG5 is a 49-point square resistance trend fitting diagram of a temperature control sheet provided in an embodiment of the present application;

FIG6 is a 49-point square resistance trend fitting diagram of another temperature control sheet provided in an embodiment of the present application;

FIG. 7 is a microscope image of a test epitaxial wafer provided in an embodiment of the present application.

In the accompanying drawings, the components represented by the reference numerals are as follows:

10. Base; 20. Heating element; 21. Inner coil; 22. Outer coil; 30. Height adjustment rod.

DETAILED DESCRIPTION

The technical solution of the present application will be described clearly and completely below in conjunction with the embodiments and drawings of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application. The various embodiments of the present application may exist in the form of a range; it should be understood that the description in the form of a range is only for convenience and simplicity, and should not be understood as a rigid limitation on the scope of the present application; therefore, it should be considered that the range description has specifically disclosed all possible sub-ranges and single values within the range. For example, it should be considered that the range description from 1 to 6 has specifically disclosed sub-ranges, such as from 1 to 3, from 1 to 4, from 1 to 5, from 2 to 4, from 2 to 6, from 3 to 6, etc., as well as single numbers within the range, such as 1, 2, 3, 4, 5 and 6, which are applicable regardless of the range. In addition, whenever a numerical range is indicated in this article, it is meant to include any quoted numbers (fractions or integers) within the indicated range.

Based on the current epitaxial slip line problem, designing different pedestal shapes and changing the amount of chamfer removal at the edge of the substrate are both effective methods to improve the slip line of the epitaxial wafer, but there is no effective control method for large-size (>150mm) and thick epitaxial wafers (>60um). In particular, as the epitaxial layer gradually becomes thicker, the temperature non-uniformity has a more significant impact on the slip line at the edge of the epitaxial wafer.

Referring to FIGS. 1 to 4 , an embodiment of the present application provides an epitaxial control method for controlling the reaction temperature of an epitaxial device, wherein the epitaxial device has a reaction chamber, wherein a susceptor 10 and a heating element 20 are arranged in the reaction chamber, wherein the heating element 20 is located on one side of the susceptor 10 and is used to heat the susceptor 10, comprising:

S1: providing a first temperature control sheet, placing it on the base 10, performing a first heating treatment on the first temperature control sheet by means of a heating element 20, obtaining the square resistance of the first temperature control sheet at different temperatures, so as to determine the temperature coefficient α;

S2: providing a second temperature control sheet, placing it on the base 10, performing a second heating treatment on the second temperature control sheet by the heating element 20, obtaining the square resistance of the second temperature control sheet after the second heating treatment, and combining it with the temperature coefficient α to determine the first temperature difference ΔT ₁ of the second temperature control sheet;

S3: Determine whether the first temperature difference _ΔT1 satisfies a first preset temperature range;

S4: If the first temperature difference _ΔT1 does not satisfy the first preset temperature range, the distance between the heating element 20 and the base 10 is adjusted so that the first temperature difference _ΔT1 satisfies the first preset temperature range.

It can be understood that, in the present application, the square resistance of the first temperature control sheet is obtained at different temperatures by performing a first heating treatment on the first temperature control sheet, so as to determine that the linear relationship between the square resistance and the temperature is: R=αT+β, wherein R is the average square resistance of 49 points, T is the temperature of the heating treatment, α is the temperature coefficient, and β is a constant, so as to determine the temperature coefficient α; by performing a second heating treatment on the second temperature control sheet, the square resistance of the second temperature control sheet after the second heating treatment is obtained, and combined with the temperature coefficient α, according to the linear relationship between the square resistance and the temperature |(Rmax-Rmin)/α|=ΔT, wherein Rmax is the maximum square resistance, Rmin is the minimum square resistance, α is the temperature coefficient, and ΔT is the temperature difference, the first temperature difference ΔT ₁ of the second temperature control sheet is determined, so as to obtain the temperature uniformity of the second temperature control sheet, which can be used to evaluate the temperature uniformity of the epitaxial wafer during the formation process. When the first temperature difference ΔT ₁ does not meet the range of the first preset temperature, it is necessary to adjust the distance between the heating element 20 and the base 10 so that the first temperature difference ΔT ₁ satisfies the range of the first preset temperature, thereby improving the temperature uniformity of the epitaxial wafer during the formation process, and further improving the defect problem of the epitaxial wafer.

Please refer to Figures 2 to 4. In some embodiments, the heating element 20 includes an inner coil 21 and an outer coil 22 surrounding the inner coil. The extension device also includes a height adjustment rod 30, and the height adjustment rod 30 is used to adjust the height of the heating element 20.

It can be understood that the height of the heating element 20 is adjusted by the height adjustment rod 30 to adjust the distance between the heating element 20 and the base 10. Specifically, the distance between the heating element 20 and the base 10 corresponding to the maximum square resistance Rmax and the minimum square resistance Rmin is adjusted. At the maximum value Rmax, the distance between the coil and the base 10 is adjusted from large to small; and/or, at the minimum value Rmin, the distance between the heating element 20 and the base 10 is adjusted from small to large; thereby improving the temperature uniformity of epitaxial growth.

In some embodiments, the temperature coefficient α is -1 to -3. Specifically, the temperature coefficient α may be any one of -1, -1.5, -2, -2.5, and -3, or a range consisting of any two of them.

In some embodiments, the constant β is between 1500 and 3000. Specifically, the constant β can be any one of 1500, 2000, 2500, and 3000, or a range consisting of any two of them.

In some embodiments, the distance between the heating element 20 and the base 10 is 0-40 mm. Specifically, the distance between the heating element 20 and the base 10 (unit: mm) can be any one of 0, 1, 5, 10, 15, 20, 25, 30, 35, 40 or a range between any two values.

It can be understood that by controlling the distance between the heating element 20 and the base 10 to be 0 to 40 mm, the heating element 20 is used to heat the base 10. The farther the distance between the heating element 20 and the base 10, the weaker the heating effect, and the closer the distance between the heating element 20 and the base 10, the stronger the heating effect. By adjusting the distance between the heating element 20 and the base 10, the temperature uniformity of the epitaxial wafer during the formation process can be improved, thereby improving the defect problem of the epitaxial wafer.

In some embodiments, if the first temperature difference _ΔT1 satisfies a first preset temperature range, an epitaxial wafer is formed in the reaction chamber.

It can be understood that when the first temperature difference ΔT ₁ satisfies the range of the first preset temperature, it indicates that the temperature uniformity of the epitaxial wafer during the formation process is good, the formed epitaxial wafer has no defect problems or the existing defects have no major impact on the product quality, and therefore, there is no need to adjust the distance between the heating element 20 and the base 10, and the epitaxial wafer can be directly formed in the reaction chamber.

In some embodiments, after adjusting the distance between the heating element 20 and the base 10 so that the first temperature difference _ΔT1 satisfies the range of the first preset temperature, the method further includes:

A third temperature control sheet is provided and placed on the base 10. The third temperature control sheet is subjected to a third heating treatment by the heating element 20. The square resistance of the third temperature control sheet after the third heating treatment is obtained, and the second temperature difference ΔT ₂ of the third temperature control sheet is determined in combination with the temperature coefficient α.

Determining whether the second temperature difference ΔT ₂ satisfies a second preset temperature range;

If the second temperature difference ΔT ₂ satisfies the second preset temperature range, a first test epitaxial wafer is formed in the reaction chamber.

It is understandable that after adjusting the distance between the heating element 20 and the base 10, it is necessary to further verify whether the distance between the heating element 20 and the base 10 is appropriate. Therefore, the present application performs a third heating treatment on the third temperature control plate to obtain the square resistance of the third temperature control plate after the third heating treatment, and combines the temperature coefficient α, according to the linear relationship between square resistance and temperature |(Rmax-Rmin)/α|=ΔT, where Rmax is the maximum square resistance, Rmin is the minimum square resistance, α is the temperature coefficient, and ΔT is the temperature difference, to determine the second temperature difference ΔT ₂ of the third temperature control plate, thereby obtaining the temperature uniformity of the third temperature control plate, which can be used to evaluate the temperature uniformity of the epitaxial wafer during the formation process. When the second temperature difference ΔT ₂ does not meet the first preset temperature range but meets the second preset temperature range, a first test epitaxial wafer is formed in the reaction chamber to evaluate the defect level of the epitaxial wafer, so as to continue to adjust the distance between the heating element 20 and the base 10.

In some implementations, the formation process of the first test epitaxial wafer and the heat treatment process of the first temperature control wafer and the second temperature control wafer may be the same as or different from each other.

In some embodiments, after adjusting the distance between the heating element 20 and the base 10 so that the first temperature difference _ΔT1 satisfies the first preset temperature range, the method further includes:

A first test epitaxial wafer is formed in the reaction chamber.

It is understandable that after adjusting the distance between the heating element 20 and the base 10, it is necessary to further verify whether the distance between the heating element 20 and the base 10 is appropriate. Therefore, the present application forms a first test epitaxial wafer in the reaction chamber to detect and confirm the defective area of the first test epitaxial wafer.

In some embodiments, after forming the first test epitaxial wafer in the reaction chamber, the method further includes:

detecting whether the first test epitaxial wafer has defects;

If the first test epitaxial wafer has a defect, the square resistance of the third temperature control piece in the corresponding defect area is obtained, and combined with the temperature coefficient α, a third temperature difference ΔT ₃ of the third temperature control piece is determined;

Determining whether the third temperature difference ΔT ₃ satisfies a third preset temperature range;

If the third temperature difference ΔT ₃ satisfies the third preset temperature range, the distance between the heating element 20 and the base 10 is adjusted so that the third temperature difference ΔT ₃ satisfies the first preset temperature range.

It can be understood that the defective area of the first test epitaxial wafer is confirmed by detection, and the square resistance of the third temperature control sheet in the corresponding defective area is obtained, and combined with the temperature coefficient α, according to the linear relationship between square resistance and temperature |(R ₂ -R ₁ )/α|=ΔT, where R ₂ is the square resistance of the defective area, R ₁ is the square resistance outside the defective area, α is the temperature coefficient, and ΔT is the temperature difference, the third temperature difference ΔT ₃ of the third temperature control sheet is determined, so as to obtain the temperature uniformity of the third temperature control sheet in the corresponding defective area. When the third temperature difference ΔT ₃ does not meet the first preset temperature range but meets the third preset temperature range, the distance between the heating element 20 and the base 10 is adjusted so that the third temperature difference ΔT ₃ meets the first preset temperature range, thereby improving the temperature uniformity of the epitaxial wafer during the formation process, and then improving the defect problem of the epitaxial wafer.

In some embodiments, if the first test epitaxial wafer has no defects, an epitaxial wafer is formed in the reaction chamber.

It can be understood that if there are no defects in the first test epitaxial wafer, it means that the distance between the heating element 20 and the base 10 is appropriate after adjustment, and the temperature uniformity of the first test epitaxial wafer during the formation process is good. There is no need to adjust the distance between the heating element 20 and the base 10, and the epitaxial wafer can be directly formed in the reaction chamber.

In some embodiments, after adjusting the distance between the heating element 20 and the base 10 so that the third temperature difference _ΔT3 satisfies the range of the first preset temperature, the method further includes:

A fourth temperature control sheet is provided and placed on the base 10. The fourth temperature control sheet is subjected to a fourth heating treatment by the heating element 20. The square resistance of the fourth temperature control sheet after the fourth heating treatment is obtained, and a fourth temperature difference ΔT ₄ of the fourth temperature control sheet is determined in combination with the temperature coefficient α.

Determining whether the fourth temperature difference _ΔT4 satisfies the first preset temperature range;

If the fourth temperature difference _ΔT4 satisfies the first preset temperature, a second test epitaxial wafer is formed in the reaction chamber.

It can be understood that after adjusting the distance between the heating element 20 and the base 10 corresponding to the defect area, it is necessary to further verify whether the distance between the heating element 20 and the base 10 is appropriate. Therefore, the present application performs a fourth heating treatment on the fourth temperature control plate to obtain the square resistance of the fourth temperature control plate after the fourth heating treatment, and combines the temperature coefficient α, the linear relationship between the square resistance and the temperature |(Rmax-Rmin)/α|=ΔT, wherein Rmax is the maximum square resistance, Rmin is the minimum square resistance, α is the temperature coefficient, and ΔT is the temperature difference, so as to determine the fourth temperature difference ΔT ₄ of the fourth temperature control plate, thereby obtaining the temperature uniformity of the fourth temperature control plate, which can be used to evaluate the temperature uniformity of the epitaxial wafer during the formation process. When the fourth temperature difference ΔT ₄ meets the range of the first preset temperature, a second test epitaxial wafer is formed in the reaction chamber to evaluate the defect level of the epitaxial wafer, so as to continue to adjust the distance between the heating element 20 and the base 10.

In some implementations, the formation process of the second test epitaxial wafer may be the same as or different from the thermal treatment process of the first temperature control wafer, the second temperature control wafer, and the first test epitaxial wafer.

In some embodiments, after forming a second test epitaxial wafer in the reaction chamber, the method further includes:

detecting whether the second test epitaxial wafer has defects;

If the second test epitaxial wafer has no defects, an epitaxial wafer is formed in the reaction chamber.

It can be understood that by forming a second test epitaxial wafer and detecting whether the second test epitaxial wafer has defects, it is possible to evaluate and verify the defect level of the epitaxial wafer. If the second test epitaxial wafer has defects, repeat the above steps to continue adjusting the distance between the heating element 20 and the base 10. If the second test epitaxial wafer has no defects, an epitaxial wafer is formed in the reaction chamber.

In some embodiments, if the fourth temperature difference _ΔT4 satisfies the first preset temperature range, an epitaxial wafer is formed in the reaction chamber.

It can be understood that if the fourth temperature difference ΔT ₄ satisfies the range of the first preset temperature, it indicates that the temperature uniformity of the epitaxial wafer during the formation process is good, the formed epitaxial wafer has no defects or the existing defects have no major impact on the product quality, so there is no need to adjust the distance between the heating element 20 and the base 10, and the epitaxial wafer can be directly formed in the reaction chamber.

In some embodiments, the formation process of the epitaxial wafer and the thermal treatment process of the first temperature control wafer, the second temperature control wafer, the first test epitaxial wafer, and the second test epitaxial wafer may be the same as or different from each other.

In some embodiments, the first preset temperature is _Ta , the second preset temperature is _Tb , and the third preset temperature is _Tc , satisfying: _Ta < _Tc < _Tb .

It can be understood that when the first temperature difference _ΔT1 does not satisfy the first preset temperature range, the distance between the heating element 20 and the base 10 is adjusted to satisfy the first preset temperature range, and the adjusted distance is then verified by the third temperature control sheet. If the second temperature difference _ΔT2 of the third temperature control sheet does not satisfy the first preset temperature range but satisfies the second preset temperature range, the distance between the heating element 20 and the base 10 is continued to be adjusted to satisfy the first preset temperature range, and the adjusted distance is then verified by the first test epitaxial wafer. If the first test epitaxial wafer has no defects, an epitaxial wafer is formed in the reaction chamber. If the first test epitaxial wafer has defects, a third temperature difference _ΔT3 of the third temperature control sheet in the corresponding defective area is obtained. If the third temperature difference _ΔT3 does not satisfy the first preset temperature range but satisfies the third preset temperature range, the distance between the heating element 20 and the base 10 is continued to be adjusted to satisfy the first preset temperature range, and the adjusted distance is then verified by the fourth temperature control sheet. If the fourth temperature difference ΔT ₄ satisfies the first preset temperature range, an epitaxial wafer is formed in the reaction chamber or a second test epitaxial wafer is formed in the reaction chamber for verification until the temperature difference of the temperature control plate satisfies the first preset temperature range.

The first preset temperature is _Ta , which satisfies: 0° _C≤Ta≤2.5 °C; the second preset temperature is _Tb , which satisfies: 5°C< _Tb <25°C; and the third preset temperature is Tc, which satisfies: 2.5°C<Tc≤5°C. Specifically, the value (°C) of _Ta can be any one of 0, 0.5, 1, 1.5, 2, 2.5 or a range between any two values; the value (°C) of _Tb can be any one of 6, 10, 15, 20, 25 or a range between any two values; the value (°C) of _Tc can be any one of 2.6, 3, 3.5, 4, 4.5, 5 or a range between any two values.

It can be understood that when the temperature difference of the temperature control plate satisfies the range of the first preset temperature, it means that the temperature uniformity of the epitaxial wafer during the formation process is good, the formed epitaxial wafer does not have defects or the defects have no major impact on the product quality, and there is no need to adjust the distance between the heating element 20 and the base 10, and the epitaxial wafer can be directly formed in the reaction chamber; the adjusted range is verified by the second temperature control plate. When the temperature difference of the temperature control plate does not meet the range of the first preset temperature but meets the range of the second preset temperature, it means that the adjusted range makes the temperature uniformity of the epitaxial wafer during the formation process poor, and the distance between the heating element 20 and the base 10 needs to be adjusted again. It is necessary to grow a first test epitaxial wafer to check the specific area where the defects exist, and to adjust the distance between the heating element 20 and the base 10 in a targeted manner for the corresponding defective area; by the same token, after adjusting the distance between the heating element 20 and the base 10, it is necessary to verify and repeat the above verification steps until the temperature difference of the temperature control plate meets the range of the first preset temperature and the test epitaxial wafer does not have defects.

In some embodiments, forming a first test epitaxial wafer in a reaction chamber includes:

Providing a substrate, and placing it on a base 10;

introducing a silicon source and a doping gas into the reaction chamber;

At the same time, the reaction chamber is heated to a seventh temperature T ₇ at a seventh heating rate V ₇ ;

When the reaction chamber reaches the seventh temperature _T7 , the reaction chamber is heated to an eighth temperature _T8 at an eighth heating rate _V8 to form a first test epitaxial wafer on the substrate.

It can be understood that the first test epitaxial wafer is used to verify whether the distance between the heating element 20 and the susceptor 10 can improve the temperature difference within the wafer after adjustment.

In some embodiments, before introducing the doping gas into the reaction chamber, the method further includes:

A diluent gas is introduced into the doping gas to dilute the doping gas.

It is understandable that before the doping gas is introduced into the reaction chamber, a diluent gas is introduced into the doping gas to dilute the doping gas, which can improve the quality of the formed epitaxial wafer.

In some embodiments, the flow rate of the silicon source is 5 to 20 SLM, the flow rate of the carrier gas of the silicon source is 150 to 200 SLM; the flow rate of the doping gas is 0 to 300 Sccm, and the flow rate of the dilution gas is 0 to 30 SLM. Specifically, the flow rate of the silicon source (unit: SLM) can be any value of 5, 10, 15, 20 or a range between any two values; the flow rate of the carrier gas of the silicon source (unit: SLM) can be any value of 150, 160, 170, 180, 190, 200 or a range between any two values; the flow rate of the doping gas (unit: Sccm) can be any value of 0, 50, 100, 150, 200, 250, 300 or a range between any two values; the flow rate of the dilution gas (unit: SLM) can be any value of 0, 5, 10, 15, 20, 25, 30 or a range between any two values.

It is understandable that controlling the flow rate of silicon source to 5-20 SLM, the flow rate of silicon source carrier gas to 150-200 SLM, the flow rate of doping gas to 0-300 Sccm, and the flow rate of dilution gas to 0-30 SLM can improve the quality of the formed epitaxial wafer.

In some embodiments, the seventh heating rate V ₇ satisfies: 0.41° C./s≤V ₇ ≤1.15° C./s, and the seventh temperature T ₇ satisfies: 970° C.≤T ₇ ≤1070° C. Specifically, the value of V ₇ (unit: ° C./s) may be any one of 0.41, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, and 1.15, or a range between any two values; the value of T ₇ (unit: ° C.) may be any one of 970, 990, 1010, 1030, 1050, and 1070, or a range between any two values.

It can be understood that by controlling the seventh heating rate V ₇ to satisfy: 0.41° C./s≤V ₇ ≤1.15° C./s and the seventh temperature T ₇ to satisfy: 970° C.≤T ₇ ≤1070° C., the quality of the formed epitaxial wafer can be improved.

In some embodiments, the eighth heating rate V ₈ satisfies: 0.13° C./s≤V ₈ ≤0.17° C./s, and the eighth temperature T ₈ satisfies: 1020° C.≤T ₈ ≤1120° C. Specifically, the value of V ₈ (unit: ° C./s) may be any one of 0.13, 0.14, 0.15, 0.16, and 0.17, or a range between any two values; the value of T ₈ (unit: ° C.) may be any one of 1020, 1040, 1060, 1080, 1100, and 1120, or a range between any two values.

It can be understood that by controlling the eighth heating rate V ₈ to satisfy: 0.13° C./s≤V ₈ ≤0.17° C./s and the eighth temperature T ₈ to satisfy: 1020° C.≤T ₈ ≤1120° C., the quality of the formed epitaxial wafer can be improved.

In some embodiments, the formation rate of the first test epitaxial wafer is 1-3 μm/min. Specifically, the formation rate (μm/min) of the first test epitaxial wafer can be any one of 1, 1.5, 2, 2.5, 3, or a range between any two values.

It can be understood that the formation rate of the first test epitaxial wafer, that is, the film forming rate of the first test epitaxial wafer, can be improved by controlling the formation rate of the first test epitaxial wafer to be 1-3 μm/min, thereby improving the quality of the formed first test epitaxial wafer.

In some embodiments, the silicon source is selected from trichlorosilane.

In some embodiments, the doping gas is selected from at least one of phosphine, arsine, and borane.

In some embodiments, the carrier gas is selected from hydrogen.

In some embodiments, the diluent gas is selected from hydrogen.

In some embodiments, a first temperature control sheet is provided and placed on the base 10, and a first heating treatment is performed on the first temperature control sheet by the heating element 20 to obtain the square resistance of the first temperature control sheet at different temperatures to determine the temperature coefficient α, including:

Provide n first temperature control sheets, place them on the base 10, perform first heating treatment on the n first temperature control sheets respectively by the heating element 20, obtain the square resistance of the n first temperature control sheets at different temperatures, so as to determine the temperature coefficient α;

n satisfies: 2≤n≤5. Specifically, the value of n can be any one of 2, 3, 4, and 5, or a range between any two values.

It can be understood that when the number of first temperature control sheets is less than 2, the linear relationship between the square resistance and the temperature cannot be determined, and the temperature coefficient cannot be obtained. Even if the linear relationship between the square resistance and the temperature is determined, the obtained temperature coefficient has a large error, which is not conducive to simulating and evaluating the temperature uniformity of the epitaxial wafer. When the number of first temperature control sheets is higher than 5, the production cost is high. The present application controls the number n of the first temperature control sheets to satisfy 2≤n≤5, and can determine the linear relationship between the square resistance and the temperature, and obtain the temperature coefficient. The obtained temperature coefficient has high accuracy and can be used to simulate and evaluate the temperature uniformity of the epitaxial wafer.

In some embodiments, the first heating treatment includes a first temperature rising stage, a second temperature rising stage, and a first temperature keeping stage;

Providing n first temperature control sheets, placing them on a base 10, performing a first heating treatment on the n first temperature control sheets respectively by a heating element 20, obtaining the square resistances of the n first temperature control sheets at different temperatures to determine the temperature coefficient α, including:

Take three first temperature control sheets, namely the first test temperature control sheet, the second test temperature control sheet, and the third test temperature control sheet;

In the first heating stage, the first test temperature control sheet, the second test temperature control sheet, and the third test temperature control sheet are heated to the first temperature T ₁ at a first heating rate V ₁ ;

In the second temperature rise stage, for the first test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the second temperature _T2 at a second temperature rise rate _V2 ; for the second test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the third temperature _T3 at a third temperature rise rate _V3 ; for the third test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the fourth temperature _T4 at a fourth temperature rise rate _V4 ;

Satisfies: T ₂ ≤ _{T 3} ≤ _{T 4} ; T ₃ - T ₂ = T ₄ - T ₃ ; V ₂ ≤ _{V 3} ≤ _{V 4} ;

In the first insulation stage, for the first test temperature control sheet, the reaction chamber is kept at the second temperature _T2 for a first time _t1 , for the second test temperature control sheet, the reaction chamber is kept at the third temperature _T3 for a second time _t2 , and for the third test temperature control sheet, the reaction chamber is kept at the fourth temperature _T4 for a third time _t3 , satisfying: _t1 = _t2 = _t3 .

It can be understood that, in the first heating stage, the first test temperature control sheet, the second test temperature control sheet and the third test temperature control sheet are heated to the first temperature _T1 at the first heating rate _V1 ; in the second heating stage, for the first test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the second temperature _{T2 at the second heating rate V2 ;} for the second test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the third temperature _T3 at the third heating rate _V3 ; for the third test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the fourth temperature _T4 at the fourth heating rate _V4 ; the linear relationship between the square resistance and the temperature can be determined, and the temperature coefficient can be obtained, and the obtained temperature coefficient has high accuracy, which can be used to simulate and evaluate the temperature uniformity of the epitaxial wafer.

In some embodiments, the second temperature control patch is selected from the first temperature control patch.

In a specific embodiment, the second temperature control piece is selected from any one of the first test temperature control piece, the second test temperature control piece, and the third test temperature control piece.

It is understandable that the second temperature control piece is selected from the first temperature control piece, which can save production costs and will not affect the accuracy of the test.

In some embodiments, the process method for performing the first heat treatment on the first temperature-control sheet and the process method for performing the second heat treatment on the second temperature-control sheet may be the same or different.

It is understandable that when the process method for performing the first heating treatment on the first temperature-controlling sheet is different from the process method for performing the second heating treatment on the second temperature-controlling sheet, the simulation and evaluation of the temperature uniformity of the epitaxial wafer will be more accurate.

In some embodiments, the time of the first heating stage is 1000-1500s, the time of the second heating stage is 300-360s, and the time of the first insulation stage is 60-600s. Specifically, the time (unit: s) of the first heating stage can be any value of 1000, 1100, 1200, 1300, 1400, 1500 or a range between any two values; the time (unit: s) of the second heating stage can be any value of 300, 310, 320, 330, 340, 350, 360 or a range between any two values; the time (unit: s) of the first insulation stage can be any value of 60, 100, 200, 300, 400, 500, 600 or a range between any two values.

It can be understood that by controlling the time of the first heating stage to 1000-1500s, the time of the second heating stage to 300-360s, and the time of the first insulation stage to 60-600s, high-temperature baking of the temperature control plate can be achieved to obtain an accurate temperature coefficient α.

In some embodiments, the first heating rate V ₁ satisfies: 0.41° C./s≤V ₁ ≤1.15° C./s; the first temperature T ₁ satisfies: 970° C.≤T ₁ ≤1070° C. Specifically, the value of V ₁ (unit: ° C./s) may be any one of 0.41, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, 1.15 or a range between any two values; the value of the first temperature T ₁ (unit: ° C.) may be any one of 970, 990, 1010, 1030, 1050, 1070 or a range between any two values.

It can be understood that by controlling the first heating rate V ₁ to satisfy: 0.41°C/s≤V ₁ ≤1.15°C/s; and the first temperature T ₁ to satisfy: 970°C≤T ₁ ≤1070°C, high temperature baking of the temperature control sheet is achieved to obtain an accurate temperature coefficient α.

In some embodiments, the second heating rate V ₂ satisfies: 0.1° C./s≤V ₂ ≤0.13° C./s; the second temperature T ₂ satisfies: 1020° C.≤T ₂ ≤1120° C. Specifically, the value of V ₂ (unit: ° C./s) may be any one of 0.1, 0.11, 0.12, and 0.13, or a range between any two values; the value of T ₂ (unit: ° C.) may be any one of 1020, 1040, 1060, 1080, 1100, and 1120, or a range between any two values.

It can be understood that by controlling the second heating rate V ₂ to satisfy: 0.1°C/s≤V ₂ ≤0.13°C/s; and the second temperature T ₂ to satisfy: 1020°C≤T ₂ ≤1120°C, high temperature baking of the temperature control sheet is achieved to obtain an accurate temperature coefficient α.

In some embodiments, the third heating rate V ₃ satisfies: 0.13° C./s≤V ₃ ≤0.17° C./s; the third temperature T ₃ satisfies: 1020° C.≤T ₃ ≤1120° C. Specifically, the value of V ₃ (unit: ° C./s) may be any one of 0.13, 0.14, 0.15, 0.16, and 0.17, or a range between any two values; the value of T ₃ (unit: ° C.) may be any one of 1020, 1040, 1060, 1080, 1100, and 1120, or a range between any two values.

It can be understood that by controlling the third heating rate V ₃ to satisfy: 0.13°C/s≤V ₃ ≤0.17°C/s; and the third temperature T ₃ to satisfy: 1020°C≤T ₃ ≤1120°C, high temperature baking of the temperature control sheet is achieved to obtain an accurate temperature coefficient α.

In some embodiments, the fourth heating rate V ₄ satisfies: 0.17° C./s≤V ₄ ≤0.2° C./s; the fourth temperature T ₄ satisfies: 1020° C.≤T ₄ ≤1120° C. Specifically, the value of V ₄ (unit: ° C./s) may be any one of 0.17, 0.18, 0.19, and 0.2, or a range between any two values; the value of T ₄ (unit: ° C.) may be any one of 1020, 1040, 1060, 1080, 1100, and 1120, or a range between any two values.

It can be understood that by controlling the fourth heating rate V ₄ to meet: 0.17°C/s≤V ₄ ≤0.2°C/s; and the fourth temperature T ₄ to meet: 1020°C≤T ₄ ≤1120°C, high temperature baking of the temperature control sheet is achieved to obtain an accurate temperature coefficient α.

In some embodiments, the second heating treatment includes a third temperature rise stage, a fourth temperature rise stage, and a second temperature keeping stage;

In the third heating stage, the reaction chamber is heated to a fifth temperature T ₅ at a fifth heating rate V ₅ ;

In the fourth heating stage, the reaction chamber is heated from the fifth temperature to the sixth temperature T ₆ at a sixth heating rate V ₆ ;

In the second insulation stage, the reaction chamber is subjected to insulation treatment at a sixth temperature _T6 .

It can be understood that, in the third heating stage, the reaction chamber is heated to a fifth temperature _T5 at a fifth heating rate _V5 ; in the fourth heating stage, the reaction chamber is heated from the fifth temperature to a sixth temperature _{T6 at a sixth heating rate V6 ;} in the second insulation stage, the reaction chamber is insulation treated at the sixth temperature _T6 to simulate the working conditions of epitaxial wafer formation, which can be used to simulate and evaluate the temperature uniformity of the epitaxial wafer.

In some embodiments, the time of the third heating stage is 1000-1500s, the time of the fourth heating stage is 300-360s, and the time of the second insulation stage is 60-600s. Specifically, the time (unit: s) of the third heating stage can be any value of 1000, 1100, 1200, 1300, 1400, 1500 or a range between any two values; the time (unit: s) of the fourth heating stage can be any value of 300, 310, 320, 330, 340, 350, 360 or a range between any two values; the time (unit: s) of the second insulation stage can be any value of 60, 100, 200, 300, 400, 500, 600 or a range between any two values.

It can be understood that by controlling the time of the third heating stage to 1000-1500s, the time of the fourth heating stage to 300-360s, and the time of the second insulation stage to 60-600s, the working conditions of epitaxial wafer formation can be simulated to simulate and evaluate the temperature uniformity of the epitaxial wafer.

In some embodiments, the fifth heating rate V ₅ satisfies: 0.41° C./s≤V ₅ ≤1.15° C./s, and the fifth temperature T ₅ satisfies: 970° C.≤T ₅ ≤1070° C. Specifically, the value of V ₅ (unit: ° C./s) may be any one of 0.41, 0.5, 0.6, 0.7, 0.8, 0.9, 1.0, 1.1, and 1.15, or a range between any two values; the value of T ₅ (unit: ° C.) may be any one of 970, 990, 1010, 1030, 1050, and 1070, or a range between any two values.

It is understandable that by controlling the fifth heating rate V ₅ to satisfy: 0.41°C/s≤V ₅ ≤1.15°C/s and the fifth temperature T ₅ to satisfy: 970°C≤T ₅ ≤1070°C, the working condition of epitaxial wafer formation can be simulated to simulate and evaluate the temperature uniformity of the epitaxial wafer.

In some embodiments, the sixth heating rate V ₆ satisfies: 0.1° C./s≤V ₆ ≤0.2° C./s, and the sixth temperature T ₆ satisfies: 1020° C.≤T ₆ ≤1120° C. Specifically, the value of V ₆ (unit: ° C./s) may be any one of 0.1, 0.12, 0.14, 0.16, 0.18, and 0.2, or a range between any two values; the value of T ₆ (unit: ° C.) may be any one of 1020, 1040, 1060, 1080, 1100, and 1120, or a range between any two values.

It is understandable that by controlling the sixth heating rate V ₆ to satisfy: 0.1°C/s≤V ₆ ≤0.2°C/s and the sixth temperature T ₆ to satisfy: 1020°C≤T ₆ ≤1120°C, the working condition of epitaxial wafer formation can be simulated to simulate and evaluate the temperature uniformity of the epitaxial wafer.

In some embodiments, before the first temperature control sheet is subjected to the first heating process by the heating element 20, the method further includes:

Hydrogen is introduced into the reaction chamber, and the gas flow rate of hydrogen is 150-200 SLM. Specifically, the gas flow rate of hydrogen (unit: SLM) can be any value among 150, 160, 170, 180, 190, 200 or a range between any two values.

It can be understood that the first temperature control plate is subjected to the first heating treatment by the heating element 20 in a hydrogen atmosphere.

In some embodiments, before the second temperature control sheet is subjected to the second heating process by the heating element 20, the method further includes:

Hydrogen is introduced into the reaction chamber, and the gas flow rate of hydrogen is 150-200 SLM. Specifically, the gas flow rate of hydrogen (unit: SLM) can be any value among 150, 160, 170, 180, 190, 200 or a range between any two values.

It can be understood that the second temperature control plate is subjected to the second heating treatment by the heating element 20 in a hydrogen atmosphere.

The present application will be described below with reference to specific embodiments.

Example 1

Take three first temperature control sheets, namely the first test temperature control sheet, the second test temperature control sheet, and the third test temperature control sheet;

Performing heating treatment on the first test temperature control piece, the second test temperature control piece, and the third test temperature control piece respectively;

During the heating process, the flow rate of hydrogen was controlled to be 180 SLM;

The heating treatment includes a first heating stage, a second heating stage and a first heat preservation stage; the time of the first heating stage is 1200s, the time of the second heating stage is 300s, and the time of the first heat preservation stage is 600s;

In the first heating stage, the first test temperature control sheet, the second test temperature control sheet, and the third test temperature control sheet are heated from the initial temperature to the first temperature T ₁ at the first heating rate V ₁ ; the initial temperature is 350°C; the first heating rate V ₁ is 0.55°C/s; the first temperature T ₁ is 1020°C;

In the second temperature rising stage, for the first test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the second temperature _T2 at _the second temperature rising rate _V2 ; the second temperature rising rate _V2 is 0.13°C/s; the second temperature _T2 is 1060°C;

For the second test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the third temperature _T3 at _{the third heating rate V3 ;} the third heating rate _V3 is 0.16°C/s; the third temperature _T3 is 1070°C;

For the third test temperature control sheet, the reaction chamber is heated from the first temperature _T1 to the fourth temperature T4 at a fourth heating rate _V4 ; the fourth heating rate _V4 is 0.2°C/s; the second temperature _T4 is ₁₀₈₀ °C;

The 49-point square resistance of the first test temperature control piece, the second test temperature control piece, and the third test temperature control piece were tested respectively, and the average square resistances were: Ra = 539.37Ohm/Sq, Rb = 522.69Ohm/Sq, Rc = 505.15Ohm/Sq. According to the linear relationship between square resistance and temperature: R = αT+β, we get α = -1.711, β = 2353.2.

The maximum square resistance Rmax and the minimum square resistance Rmin of the 49-point square resistance of the second test temperature control sheet are obtained: Rmax=536.382Ohm/Sq, Rmin=512.721Ohm/Sq, and the first temperature difference ΔT ₁ is obtained by the formula |(Rmax-Rmin)/α|=ΔT, ΔT ₁ =13.83°C.

A substrate is provided and placed on a base 10; the thickness of the substrate is 200 mm.

A silicon source and a doping gas are introduced into the reaction chamber; the flow rate of the silicon source is 12 SLM, and the flow rate of the carrier gas of the silicon source is 180 SLM; the flow rate of the doping gas is 45.5 Sccm, and the flow rate of the dilution gas is 25 SLM;

The reaction chamber is heated from the initial temperature to the seventh temperature T ₇ at the seventh heating rate V ₇ within 1200 s; the initial temperature is 350° C.; the seventh heating rate V ₇ is 0.55° C./s; the first temperature T ₇ is 1020° C.;

When the reaction chamber reaches the seventh temperature _T7 , the reaction chamber is heated from the seventh temperature _T7 to the eighth temperature _T8 at the eighth heating rate _V8 within 300s, and the growth time at the eighth temperature _T8 is 2919s, so as to form a first test epitaxial wafer on the substrate; the eighth heating rate _V8 is 0.16°C/s; the eighth temperature _T8 is 1070°C; and the thickness of the first test epitaxial wafer is 90μm.

The detection found that there was a slip line with a length of 1 mm at the edge of the first test epitaxial wafer, and no slip line at other positions.

The square resistance of the second test temperature control sheet in the corresponding sliding line area is detected: R ₁ =534.2Ohm/Sq, and the square resistance of the adjacent point is detected: R ₂ =529.4Ohm/Sq. According to the formula |(R ₂ -R ₁ )/α|=ΔT, the temperature difference is obtained to be 2.81°C.

Adjust R ₁ to correspond to the distance between the heating element 20 and the base 10, so that the distance between the heating element 20 and the base 10 is adjusted from 16 mm to 14 mm;

Take the second temperature control piece and heat it according to the heating treatment method of the second test temperature control piece. Test the 49-point square resistance of the temperature control piece after the heating treatment. According to the formula |(Rmax-Rmin)/α|=ΔT, the temperature difference of 2.23°C is obtained.

The second test epitaxial wafer is formed according to the formation process of the first test epitaxial wafer, and the second test epitaxial wafer as a whole has no slip line.

Example 2

The linear relationship between square resistance and temperature is: R = αT + β, α = -1.711, β = 2353.2;

A second temperature control sheet is provided, and the second temperature control sheet is subjected to a heating treatment; during the heating treatment, the flow rate of the hydrogen is controlled to be 180 SLM;

The heating treatment includes a third heating stage, a fourth heating stage and a second heat preservation stage; the time of the third heating stage is 1200s, the time of the fourth heating stage is 300s, and the time of the second heat preservation stage is 1200s. In the first heating stage, the reaction chamber is heated from the initial temperature to the fifth temperature _T5 at the fifth heating rate _V5 ; the initial temperature is 350°C; the fifth heating rate _V5 is 0.55°C/s; the fifth temperature _T7 is 1020°C;

In the fourth heating stage, the reaction chamber is heated from the fifth temperature to the sixth temperature T _{6 at a sixth heating rate V 6 ;} the initial temperature is 350° C.; the sixth heating rate V ₆ is 0.16° C./s; the sixth temperature T ₆ is 1070° C.;

In the second heat preservation stage, the reaction chamber is subjected to heat preservation treatment at a sixth temperature _T6 .

The maximum square resistance Rmax and the minimum square resistance Rmin of the 49-point square resistance of the second temperature control sheet are obtained: Rmax=548.6Ohm/Sq, Rmin=496.6Ohm/Sq, and the first temperature difference ΔT ₁ is obtained by the formula |(Rmax-Rmin)/α|=ΔT, ΔT ₁ =30.4°C, see FIG3 .

Adjust the distance between the coil and the base 10 corresponding to the maximum square resistance Rmax and the minimum square resistance Rmin. At the maximum value Rmax, the distance between the heating element 20 and the base 10 is adjusted from 18 mm to 15 mm; at the minimum value Rmin, the distance between the heating element 20 and the base 10 is adjusted from 24 mm to 26 mm;

Forming the first test epitaxial wafer:

A substrate is provided and placed on a base 10; the thickness of the substrate is 200 mm.

A silicon source and a doping gas are introduced into the reaction chamber; the flow rate of the silicon source is 12 SLM, and the flow rate of the carrier gas of the silicon source is 180 SLM; the flow rate of the doping gas is 32.4 Sccm, and the flow rate of the dilution gas is 28 SLM;

The reaction chamber is heated from the initial temperature to the seventh temperature T ₇ at the seventh heating rate V ₇ within 1200 s; the initial temperature is 350° C.; the seventh heating rate V ₇ is 0.55° C./s; the first temperature T ₇ is 1020° C.;

When the reaction chamber reaches the seventh temperature _T7 , the reaction chamber is heated from the seventh temperature _T7 to the eighth temperature _T8 at the eighth heating rate _V8 within 300s, and the growth time at the eighth temperature _T8 is 4222s, so as to form a first test epitaxial wafer on the substrate; the eighth heating rate _V8 is 0.16°C/s; the eighth temperature _T8 is 1070°C; and the thickness of the first test epitaxial wafer is 130μm.

The detection found that there was a slip line with a length of 1.5 mm at the edge of the first test epitaxial wafer, and no slip lines at other positions, see Figure 4.

The square resistance of the second temperature control sheet in the corresponding sliding line area is detected: R ₁ =565Ohm/Sq, and the square resistance of the adjacent point is detected: R ₂ =554.3Ohm/Sq. According to the formula |(R ₂ -R ₁ )/α|=ΔT, the temperature difference is obtained to be 6.2°C.

Adjust the distance between the heating element 20 and the base 10 corresponding to R ₂ so that the distance between the heating element 20 and the base 10 is adjusted from 10 mm to 12 mm;

Take the third temperature control sheet and heat it according to the heating treatment method of the second temperature control sheet. Test the 49-point square resistance of the third temperature control sheet after the heating treatment. According to the formula |(Rmax-Rmin)/α|=ΔT, the temperature difference of 2.47°C is obtained, see Figure 5.

The second test epitaxial wafer is formed according to the formation process of the first test epitaxial wafer, and the second test epitaxial wafer as a whole has no slip line.

The present application performs a first heating treatment on the first temperature control plate to obtain the square resistance of the first temperature control plate at different temperatures, and can determine the linear relationship between the square resistance and temperature. By performing a heating treatment on the second temperature control plate, the temperature uniformity of the second temperature control plate is obtained, thereby evaluating the temperature uniformity of the epitaxial wafer during the formation process, and adjusting the temperature uniformity by adjusting the distance between the heating element 20 and the base 10 to improve the defect problem of the epitaxial wafer.

The above is a detailed introduction to the present application. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for technical personnel in this field, according to the idea of the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims (19)

1. An epitaxial control method, characterized by being used for controlling a reaction temperature of an epitaxial device, the epitaxial device is provided with a reaction cavity, a base (10) and a heating element (20) are arranged in the reaction cavity, the heating element (20) is positioned on one side of the base (10) and is used for heating the base (10), and the epitaxial control method comprises the following steps:

providing a first temperature control sheet, placing the first temperature control sheet on the base (10), and performing first heating treatment on the first temperature control sheet through the heating element (20) to obtain the square resistances of the first temperature control sheet at different temperatures so as to determine a temperature coefficient alpha;

Providing a second temperature control sheet, placing the second temperature control sheet on the base (10), performing second heating treatment on the second temperature control sheet through the heating element (20), obtaining the sheet resistance of the second temperature control sheet after the second heating treatment, and combining the temperature coefficient alpha to determine a first temperature difference delta T ₁ of the second temperature control sheet;

judging whether the first temperature difference delta T ₁ meets the range of a first preset temperature or not;

if the first temperature difference DeltaT ₁ does not meet the range of the first preset temperature, the distance between the heating element (20) and the base (10) is adjusted so that the first temperature difference DeltaT ₁ meets the range of the first preset temperature.

2. The epitaxial control method according to claim 1, characterized in that after adjusting the distance between the heating element (20) and the susceptor (10) so that the first temperature difference Δt ₁ satisfies the range of a first preset temperature, it further comprises:

and forming a first test epitaxial wafer in the reaction cavity.

3. The epitaxial control method according to claim 1, characterized in that after adjusting the distance between the heating element (20) and the susceptor (10) so that the first temperature difference Δt ₁ satisfies the range of a first preset temperature, it further comprises:

Providing a third temperature control sheet, placing the third temperature control sheet on the base (10), performing third heating treatment on the third temperature control sheet through the heating element (20), obtaining the sheet resistance of the third temperature control sheet after the third heating treatment, and combining the temperature coefficient alpha to determine a second temperature difference delta T ₂ of the third temperature control sheet;

Judging whether the second temperature difference delta T ₂ meets the range of a second preset temperature or not;

And if the second temperature difference delta T ₂ meets the range of the second preset temperature, forming a first test epitaxial wafer in the reaction cavity.

4. The epitaxial control method of claim 3, further comprising, after forming the first test epitaxial wafer in the reaction chamber:

Detecting whether the first test epitaxial wafer has defects;

If the first test epitaxial wafer has defects, obtaining the sheet resistance of the third temperature control wafer in the corresponding defect area, and combining the temperature coefficient alpha to determine a third temperature difference delta T ₃ of the third temperature control wafer;

judging whether the third temperature difference delta T ₃ meets the range of a third preset temperature or not;

If the third temperature difference DeltaT ₃ meets the range of the third preset temperature, the distance between the heating element (20) and the base (10) is adjusted so that the third temperature difference DeltaT ₃ meets the range of the first preset temperature.

5. The epitaxial control method according to claim 4, characterized in that after adjusting the distance between the heating element (20) and the susceptor (10) so that the third temperature difference Δt ₃ satisfies the range of the first preset temperature, it further comprises:

Providing a fourth temperature control sheet, placing the fourth temperature control sheet on the base (10), performing fourth heating treatment on the fourth temperature control sheet through the heating element (20), obtaining the sheet resistance of the fourth temperature control sheet after the fourth heating treatment, and combining the temperature coefficient alpha to determine a fourth temperature difference delta T ₄ of the fourth temperature control sheet;

Judging whether the fourth temperature difference delta T ₄ meets the range of the first preset temperature or not;

And if the fourth temperature difference delta T ₄ meets the first preset temperature, forming a second test epitaxial wafer in the reaction cavity.

6. The epitaxial control method of claim 5, further comprising, after forming a second test epitaxial wafer in the reaction chamber:

detecting whether the second test epitaxial wafer has defects;

And if the second test epitaxial wafer has no defect, forming an epitaxial wafer in the reaction cavity.

7. The epitaxial control method of claim 5, wherein an epitaxial wafer is formed in the reaction chamber if the fourth temperature difference Δt ₄ satisfies the range of the first preset temperature.

8. The method of claim 4, wherein if the first test epitaxial wafer is free of defects, forming an epitaxial wafer in the reaction chamber.

9. The epitaxial control method of claim 4, wherein the first preset temperature is T _a, the second preset temperature is T _b, and the third preset temperature is T _c, satisfying: t _a<T_c<T_b; and/or the number of the groups of groups,

The first preset temperature is T _a, and the following conditions are satisfied: t _a at 0 ℃ or less the temperature is less than or equal to 2.5 ℃; the second preset temperature is T _b, and the conditions are satisfied: 5 ℃ < T _b <25 ℃; the third preset temperature is Tc, and meets the following conditions: 2.5 ℃ Tc is less than or equal to 5 ℃.

10. The epitaxial control method of claim 2 or 3, wherein forming a first test epitaxial wafer in the reaction chamber comprises:

Providing a substrate, placed on the base (10);

Introducing a silicon source and doping gas into the reaction cavity;

Simultaneously heating the reaction cavity to a seventh temperature T ₇ according to a seventh heating rate V ₇;

And when the reaction cavity reaches the seventh temperature T ₇, heating the reaction cavity to an eighth temperature T ₈ according to an eighth heating rate V ₈ so as to form a first test epitaxial wafer on the substrate.

11. The epitaxial control method of claim 10, further comprising, prior to introducing a dopant gas into the reaction chamber:

And introducing dilution gas into the doping gas to dilute the doping gas.

12. The epitaxial control method of claim 11, wherein,

The flow of the silicon source is 5-20 SLM, and the carrier gas flow of the silicon source is 150-200 SLM; the flow rate of the doping gas is 0-300 Sccm, and the flow rate of the diluting gas is 0-30 SLM; and/or the number of the groups of groups,

The seventh temperature rising rate V ₇ meets the following conditions: v ₇ is less than or equal to 0.41 ℃/s is less than or equal to 1.15 ℃/s, and the seventh temperature T ₇ meets the following conditions: t ₇ at 970 ℃ or less the temperature is less than or equal to 1070 ℃; and/or the number of the groups of groups,

The eighth temperature rising rate V ₈ satisfies: v ₈ is less than or equal to 0.13 ℃/s is less than or equal to 0.17 ℃/s, and the eighth temperature T ₈ meets the following conditions: t ₈ at 1020 ℃ or less the temperature is less than or equal to 1120 ℃;

The formation rate of the first test epitaxial wafer is 1-3 mu m/min; and/or the number of the groups of groups,

The silicon source is selected from trichlorosilane; and/or the number of the groups of groups,

The doping gas is at least one selected from phosphane, arsine and borane; and/or the number of the groups of groups,

The carrier gas is selected from hydrogen; and/or the number of the groups of groups,

The diluent gas is selected from hydrogen.

13. The epitaxial control method of claim 1, wherein an epitaxial wafer is formed in the reaction chamber if the first temperature difference Δt ₁ satisfies the first preset temperature range.

14. The epitaxial control method according to claim 1, wherein providing a first temperature control wafer, placed on the susceptor (10), and performing a first heating treatment on the first temperature control wafer by the heating element (20) to obtain the sheet resistances of the first temperature control wafer at different temperatures, so as to determine the temperature coefficient α, comprises:

Providing n first temperature control sheets, placing the n first temperature control sheets on the base (10), and respectively performing first heating treatment on the n first temperature control sheets through the heating element (20) to obtain the square resistances of the n first temperature control sheets at different temperatures so as to determine a temperature coefficient alpha;

n satisfies the following: n is more than or equal to 2 and less than or equal to 5.

15. The epitaxial control method of claim 14, wherein the first heating treatment comprises a first warm-up phase, a second warm-up phase, and a first warm-up phase;

providing n first temperature control sheets, placing the first temperature control sheets on the base (10), respectively performing first heating treatment on the n first temperature control sheets through the heating element (20), and obtaining the sheet resistances of the n first temperature control sheets at different temperatures to determine a temperature coefficient alpha, wherein the method comprises the following steps:

taking 3 first temperature control sheets, namely a first test temperature control sheet, a second test temperature control sheet and a third test temperature control sheet;

In the first temperature rising stage, the first test temperature control piece, the second test temperature control piece and the third test temperature control piece are heated to a first temperature T ₁ according to a first temperature rising rate V ₁;

in the second temperature rising stage, for the first test temperature control wafer, the reaction cavity is heated from the first temperature T ₁ to a second temperature T ₂ according to a second temperature rising rate V ₂; for the second test temperature control wafer, heating the reaction cavity from the first temperature T ₁ to a third temperature T ₃ according to a third heating rate V ₃; for the third test temperature control wafer, heating the reaction cavity from the first temperature T ₁ to a fourth temperature T ₄ according to a fourth heating rate V ₄;

Satisfy the following requirements ：T₂≤T₃≤T₄;T₃-T₂＝T₄-T₃;V₂≤V₃≤V₄;

In the first heat preservation stage, for the first test temperature control wafer, the reaction chamber is kept at the second temperature T ₂ for a first time T ₁, for the second test temperature control wafer, the reaction chamber is kept at the third temperature T ₃ for a second time T ₂, for the third test temperature control wafer, the reaction chamber is kept at the fourth temperature T ₄ for a third time T ₃, so that the following conditions are satisfied: t ₁＝t₂＝t₃.

16. The epitaxial control method according to claim 15, wherein the time of the first temperature rising stage is 1000 to 1500 seconds, the time of the second temperature rising stage is 300 to 360 seconds, and the time of the first heat preserving stage is 60 to 600 seconds; and/or the number of the groups of groups,

The first temperature rising rate V ₁ meets the following conditions: v ₁ is less than or equal to 0.41 ℃/s and less than or equal to 1.15 ℃/s; the first temperature T ₁ satisfies: t ₁ at 970 ℃ or less the temperature is less than or equal to 1070 ℃; and/or the number of the groups of groups,

The second temperature rising rate V ₂ meets the following conditions: v ₂ is more than or equal to 0.1 ℃/s and less than or equal to 0.13 ℃/s; the second temperature T ₂ satisfies: t ₂ at 1020 ℃ or less the temperature is less than or equal to 1120 ℃; and/or the number of the groups of groups,

The third temperature rising rate V ₃ meets the following conditions: v ₃ is less than or equal to 0.13 ℃/s and less than or equal to 0.17 ℃/s; the third temperature T ₃ satisfies: t ₃ at 1020 ℃ or less the temperature is less than or equal to 1120 ℃; and/or the number of the groups of groups,

The fourth temperature rising rate V ₄ meets the following conditions: v ₄ is less than or equal to 0.17 ℃/s and less than or equal to 0.2 ℃/s; the fourth temperature T ₄ satisfies: t ₄ at 1020 ℃ or less the temperature is less than or equal to 1120 ℃.

17. The epitaxial control method of claim 1, wherein the second heating treatment comprises a third warming phase, a fourth warming phase, and a second soak phase;

In the third temperature rising stage, the reaction cavity is heated to a fifth temperature T ₅ according to a fifth temperature rising rate V ₅;

In the fourth temperature rising stage, the reaction cavity is heated from the fifth temperature to a sixth temperature T ₆ according to a sixth temperature rising rate V ₆;

And in the second heat preservation stage, the reaction cavity is subjected to heat preservation treatment at the sixth temperature T ₆.

18. The epitaxial control method of claim 17, wherein the third temperature increasing stage is 1000 to 1500 seconds, the fourth temperature increasing stage is 300 to 360 seconds, and the second temperature maintaining stage is 60 to 600 seconds; and/or the number of the groups of groups,

The fifth temperature rising rate V ₅ meets the following conditions: v ₅ is less than or equal to 0.41 ℃/s and less than or equal to 1.15 ℃/s, and the fifth temperature T ₅ meets the following conditions: t ₅ at 970 ℃ or less the temperature is less than or equal to 1070 ℃; and/or the number of the groups of groups,

The sixth temperature rising rate V ₆ meets the following conditions: v ₆ is more than or equal to 0.1 ℃/s is more than or equal to 0.2 ℃/s, and the sixth temperature T ₆ meets the following conditions: t ₆ at 1020 ℃ or less the temperature is less than or equal to 1120 ℃.

19. The epitaxial control method according to claim 1, characterized in that before the first heat treatment of the first temperature control wafer by the heating element (20), it further comprises:

Introducing hydrogen into the reaction cavity, wherein the flow rate of the hydrogen is 150-200 SLM; and/or the number of the groups of groups,

Before the second temperature control sheet is subjected to the second heating treatment by the heating element (20), the method further comprises:

And introducing hydrogen into the reaction cavity, wherein the flow rate of the hydrogen is 150-200 SLM.