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CN118744692A - System and method for supplying power, control device, readable storage medium, and vehicle - Google Patents

System and method for supplying power, control device, readable storage medium, and vehicle Download PDF

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Publication number
CN118744692A
CN118744692A CN202411101669.XA CN202411101669A CN118744692A CN 118744692 A CN118744692 A CN 118744692A CN 202411101669 A CN202411101669 A CN 202411101669A CN 118744692 A CN118744692 A CN 118744692A
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China
Prior art keywords
power supply
power
chip set
chip
controller
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CN202411101669.XA
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Chinese (zh)
Inventor
王涛
田博仁
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Chongqing Chang'an Technology Co ltd
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Chongqing Chang'an Technology Co ltd
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Priority to CN202411101669.XA priority Critical patent/CN118744692A/en
Publication of CN118744692A publication Critical patent/CN118744692A/en
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Abstract

The present application relates to the field of power supply technologies, and in particular, to a system and a method for supplying power, a control device, a readable storage medium, and a vehicle. The system for supplying power comprises: the load controller comprises a first chip set, a second chip set and a micro control unit; the first power supply supplies power to the first chipset; the second power supply supplies power to the second chip set; wherein the micro control unit is configured to control the power of the first chip set and/or the second chip set to be reduced in case of an abnormality of the first power supply or the second power supply. Under the condition that no power redundancy backup exists, the power degradation is performed by controlling the first chip set and/or the second chip set, so that the working stability of the controller is improved, the functional safety is ensured, and the user experience is improved. And compared with the method of adding a double-circuit double-redundancy circuit, the cost of the whole vehicle architecture is reduced, and the development difficulty of the controller is also reduced.

Description

System and method for supplying power, control device, readable storage medium, and vehicle
Technical Field
The present invention relates to the field of power supply technologies, and in particular, to a system and a method for supplying power, a control device, a readable storage medium, and a vehicle.
Background
In the related art, the whole vehicle architecture is a distributed electronic electric architecture with multiple controllers, and each controller is independently designed and distributed. For controllers with functional safety requirements, a two-way dual-redundancy power distribution mode is generally used for power supply.
With the development of the whole vehicle architecture to the central fusion type electronic and electric architecture, the load power of the central fusion type controller is continuously improved. For a controller with higher functional safety, in order to ensure the functional safety and avoid single-point failure, a redundancy backup scheme must exist on the power distribution process to avoid the problem of single-point failure of the functional safety.
Therefore, in order to improve the stability of the electronic and electric architecture, a double-circuit and double-redundancy power distribution circuit needs to be arranged in the central fusion type electronic and electric architecture. The design of the power supply greatly increases the cost of the whole vehicle and also improves the difficulty of development and design of the controller.
Disclosure of Invention
The invention aims to provide a system and a method for supplying power, a control device, a readable storage medium and a vehicle, so as to solve the problems that in the prior art, a double-circuit double-redundancy power distribution circuit is required to be arranged, the cost of the whole vehicle is increased, and the development and design difficulty of a controller is also improved.
In order to achieve the above purpose, the technical scheme adopted by the invention is as follows:
A system for supplying power, comprising: the load controller comprises a first chip set, a second chip set and a micro control unit; the first power supply supplies power to the first chipset; the second power supply supplies power to the second chip set; wherein the micro control unit is configured to control the power of the first chip set and/or the second chip set to be reduced in case of an abnormality of the first power supply or the second power supply.
According to the technical means, the chips in the load controller are split into the first chip set and the second chip set by power consumption. And power is equally divided on the power supply and distributed to the first power supply and the second power supply respectively, and the first chip set and the second chip set of the load controller are powered by the first power supply and the second power supply respectively so as to improve the working stability of the system. And the micro control unit controls to reduce the power of the first chip set and/or the second chip set under the condition that the first power supply or the second power supply is abnormal. Therefore, the power degradation is performed by controlling the first chip set and/or the second chip set under the condition that no power redundancy backup exists, so that the working stability of the controller is improved, the functional safety is ensured, and the user experience is improved. And compared with the method of adding a double-circuit double-redundancy circuit, the cost of the whole vehicle architecture is reduced, and the development difficulty of the controller is also reduced.
Further, a difference between the sum of the power of the first chipset and the sum of the power of the second chipset is within a preset range.
According to the technical means, the power supply capacity and line loss of each power supply wire harness are considered, and the voltage difference exists between two voltages of two paths of power supplies at the input end of the controller due to the voltage drop of the power supply and the wire harness, so that the power consumption of the chips inside the controller is split by controlling the difference value between the power sum of the first chip set and the power sum of the second chip set within a preset range, the power is equally divided on the power supply wire, and the power is respectively distributed to the first power supply and the second power supply, so that the working stability of the load controller is improved.
Further, the first chipset includes: a system-on-chip (SOC) chip, and/or a Controller Area Network (CAN) chip, and/or an Ethernet chip; and/or, the second chipset comprises: and the sound system control chip and/or the display screen driving chip and/or the Bluetooth chip and/or the WIFI chip.
According to the technical means, the chips in the load controller can be divided according to the chip functionality, so that the running stability of the load controller is improved.
Further, the system further comprises: and the power supply switching circuit is configured to switch the power supply of the first chip set and the second chip set to a power supply which normally works under the condition that the first power supply or the second power supply is abnormal.
According to the technical means, the mutual backup of the first power supply and the second power supply is realized by arranging the power supply switching circuit, and when one power supply in the first power supply and the second power supply has a problem, the other power supply realized by the power supply switching circuit supplies power to the whole load controller so as to ensure the normal work of the load controller.
Further, the power supply switching circuit includes: the bridge circuit is used for bridging the first power supply and the second power supply; and under the condition that the first power supply or the second power supply is abnormal, controlling the bridge circuit to be conducted.
Further, the bridge circuit includes: the D pole of the first MOS tube is connected with a first power supply; the D electrode of the second MOS tube is connected with a second power supply, and the S electrode of the first MOS tube is connected with the S electrode of the second MOS; the G electrode of the first MOS tube and the G electrode of the second MOS tube are connected with the signal output end of the micro control unit.
According to the technical means, the bridging circuit is adopted to bridge the first power supply and the second power supply, so that mutual backup of the first power supply and the second power supply is realized. The bridge circuit adopts the first MOS tube and the second MOS tube, and the two PMOS tubes are designed according to a back-to-back mode, so that the problem of current backflow caused by the switching circuit made of a single PMOS tube can be avoided, and the use safety is improved.
Further, the system further comprises: and the power supply detection circuit is in communication connection with the micro control unit and is configured to detect the states of the first power supply and the second power supply and send detection results to the micro control unit.
According to the technical means, the power supply detection circuit is used for detecting the states of the first power supply and the second power supply, so that the monitoring of detecting the first power supply and the second power supply is realized. Under the condition that the states of the first power supply and the second power supply are detected to be abnormal, timely feedback is provided for the micro control unit, so that feedback can be timely made according to the abnormal states.
Further, the detection circuit includes: the resistor voltage division detection circuit is connected with the first power supply and the second power supply and is used for detecting the voltage states of the first power supply and the second power supply; and/or an interrupt detection circuit connected with the first power supply and the second power supply for transient detection of the power supply voltage, the interrupt detection circuit comprising a hysteresis comparator configured with a threshold interval of the hysteresis voltage.
According to the technical means, the voltage states of the first power supply and the second power supply are monitored by using the resistor voltage division detection circuit. And the power supply voltages of the first power supply and the second power supply are subjected to transient detection by using an interruption detection circuit, and the false detection of the system at the critical voltage is solved by arranging a hysteresis comparator and correspondingly arranging a threshold interval of the hysteresis voltage.
Further, the system further comprises: and the power supply circuit connects the first power supply and the second power supply in parallel to form the power supply of the micro control unit.
According to the technical means, the power supply circuit obtained after the first power supply and the second power supply are connected in parallel supplies power to the micro control unit, and under the condition that one of the first power supply and the second power supply is abnormal, the other one of the first power supply and the second power supply can still supply power to the micro control unit normally, so that the micro control unit is still in a normal working state, and the running stability of the micro control unit is further improved.
A method for supplying power, applied to the system for supplying power of any one of the above, the method comprising: acquiring power states of a first power supply and a second power supply; and controlling to reduce the power of the first chip set and/or the second chip set under the condition that the first power supply or the second power supply is abnormal.
The method for supplying power provided by the present disclosure is applied to the system for supplying power of any one of the above-mentioned technical solutions. A system for supplying power includes a load controller, a first power supply, and a second power supply. The chip inside the load controller is divided into a first chip set and a second chip set by splitting power consumption. And power is equally divided on the power supply and distributed to the first power supply and the second power supply respectively, and the first chip set and the second chip set of the load controller are powered by the first power supply and the second power supply respectively so as to improve the working stability of the system.
The method for supplying power provided by the disclosure obtains power states of a first power supply and a second power supply. In the case that the first power supply or the second power supply is abnormal, controlling to reduce the power of the first chip set and/or the second chip set. Therefore, the power degradation is performed by controlling the first chip set and/or the second chip set under the condition that no power redundancy backup exists, so that the working stability of the controller is improved, the functional safety is ensured, and the user experience is improved. And compared with the method of adding a double-circuit double-redundancy circuit, the cost of the whole vehicle architecture is reduced, and the development difficulty of the controller is also reduced.
Further, the abnormal condition of the first power supply includes: the first voltage V 1 is less than or equal to a first threshold value V 1;5.5≤V1 and less than or equal to 6; or the condition that the first power supply is normal includes: the first voltage V 1 is greater than or equal to the second threshold value V 2;6≤V2 and less than or equal to 6.5; or the abnormal condition of the second power supply includes: the second voltage V 2 is smaller than or equal to a set threshold value V 1;5.5≤V1 and is smaller than or equal to 6; or the condition that the second power supply is normal includes: the second voltage V 2 is greater than or equal to the second threshold value V 2;6≤V2, 6.5.
According to the technical means, the false detection of the system at the critical voltage is solved by setting the interval for judging the voltage abnormality, so that the accuracy of the voltage state detection is improved.
Further, in the case that an abnormality occurs in the first power supply or the second power supply, the method further includes: under the condition that the first power supply is abnormal, controlling the second power supply to be conducted with the first chip set; and under the condition that the second power supply is abnormal, controlling the first power supply and the second chip set to be conducted.
According to the technical means, under the condition that the first power supply or the second power supply is abnormal, the first power supply and the second power supply are switched to realize mutual backup of the first power supply and the second power supply, so that normal operation of the load controller is ensured.
Further, under the condition that the first power supply is abnormal, the first power supply is redistributed, and after the distribution, the first chip set of the load controller is controlled to recover the full-function state and the first power supply and the first chip set are controlled to be conducted under the condition that the power supply state of the first power supply is normal; and under the condition that the second power supply is abnormal, the second power supply is redistributed, and after the power is redistributed, the second chip set of the load controller is controlled to recover the full-function state and the second power supply and the second chip set are controlled to be conducted under the condition that the power state of the second power supply is normal.
According to the technical means, the power distribution is carried out again for the failed one-path power supply. After the power distribution is finished again, the power is detected to be recovered to be normal and then fed back to the micro-control unit, and the micro-control unit further recovers the load end controller to be in a full-function state, so that the problem of failure of the load end controller caused by unstable power state is solved, and user experience and functional safety are improved.
A control device for supplying power comprising a processor and a memory storing program instructions, the processor being configured to perform the method for supplying power of any of the preceding claims when the program instructions are run.
A computer readable storage medium storing program instructions which, when executed, are to cause a computer to perform a method for supplying power as claimed in any one of the preceding claims.
A vehicle, comprising: a system for supplying power as claimed in any preceding claim; or a control device for supplying power as described above.
The invention has the beneficial effects that:
(1) And splitting the power consumption of the chips in the load controller into a first chip set and a second chip set. And power is equally divided on the power supply and distributed to the first power supply and the second power supply respectively, and the first chip set and the second chip set of the load controller are powered by the first power supply and the second power supply respectively so as to improve the working stability of the system.
(2) And controlling to reduce the power of the first chip set and/or the second chip set under the condition that the first power supply or the second power supply is abnormal. Therefore, the power degradation is performed by controlling the first chip set and/or the second chip set under the condition that no power redundancy backup exists, so that the working stability of the controller is improved, the functional safety is ensured, and the user experience is improved. And, compared with adding a double-path double-redundancy circuit, the double-path double-redundancy circuit comprises a main power supply circuit and a standby power supply circuit. The main power supply circuit and the standby power supply are connected with the load end. And the main power supply circuit includes a main power supply circuit and a main switching circuit. The standby power supply circuit comprises a standby power supply circuit and a standby switch circuit. The main power supply circuit and the standby power supply circuit have the same circuit structure, are provided with a plurality of capacitors and a plurality of diodes, and have complex structures. The main switch circuit and the standby switch circuit are also formed by electric devices such as MOS tubes. The structure of the system for supplying power is reduced relative to the structural parts of the double-circuit double-redundancy circuit, the setting of the standby power supply circuit is canceled, the cost of the whole vehicle architecture is further reduced, and the development difficulty of the controller is also reduced.
Drawings
FIG. 1 is a schematic diagram of a system for supplying power according to one embodiment of the present invention;
FIG. 2 is a schematic diagram of a resistor divider detection circuit in the system for supplying power according to the embodiment shown in FIG. 1;
FIG. 3 is a schematic diagram of an interrupt detection circuit in the system for supplying power provided by the embodiment of FIG. 1;
FIG. 4 is a schematic diagram of a power supply voltage step-down detection circuit for a first power supply according to an embodiment of the present invention;
FIG. 5 is a schematic diagram of a power supply voltage step-down detection circuit for a second power supply according to an embodiment of the present invention;
FIG. 6 is a simulation diagram of a power boost detection circuit design for a first power supply according to an embodiment of the present invention;
FIG. 7 is a simulation diagram of a power boost detection circuit design for a second power supply according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of a bridge circuit in the system for supplying power provided by the embodiment of FIG. 1;
FIG. 9 is a flow chart of a method for providing power according to an embodiment of the present invention;
FIG. 10 is a flow chart of a method for providing power in accordance with yet another embodiment of the present invention;
FIG. 11 is a flow chart of a method for supplying power provided by yet another embodiment of the present invention;
fig. 12 is a schematic structural diagram of a control device for supplying power according to an embodiment of the present invention.
Reference numerals:
1a system for supplying power;
A 100 load controller; 110 a first chipset; a second chipset 120; 130 a micro control unit; 140 a first diode; a second diode 150; 160 a power supply switching circuit; 170 a power supply detection circuit; 180 a third diode; 190 a fourth diode;
200 a first power supply; 210 a first power supply end controller;
300 a second power supply; a second power supply side controller 310.
Detailed Description
Further advantages and effects of the present invention will become readily apparent to those skilled in the art from the disclosure herein, by referring to the accompanying drawings and the preferred embodiments. The invention may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present invention. It should be understood that the preferred embodiments are presented by way of illustration only and not by way of limitation.
It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.
In some embodiments, as shown in connection with fig. 1, there is provided a system 1 for supplying power, comprising: a load controller 100, a first power supply 200, and a second power supply 300. The load controller 100 includes a first chipset 110, a second chipset 120, and a micro control unit 130 (MCU, microcontroller Unit). The first power supply 200 supplies power to the first chipset 110. The second power supply 300 supplies power to the second chipset 120. Wherein the micro control unit 130 is configured to control the power of the first chipset 110 and/or the second chipset 120 to be reduced in case of an abnormality of the first power supply 200 or the second power supply 300.
According to the above embodiment, the chips inside the load controller 100 are divided into the first chip set 110 and the second chip set 120 by power splitting. And power is equally divided on the power supply and respectively distributed to the first power supply 200 and the second power supply 300, and the first chipset 110 and the second chipset 120 of the load controller 100 are respectively powered by the first power supply 200 and the second power supply 300, so as to improve the stability of system operation. Also, the micro control unit 130 controls to reduce the power of the first chipset 110 and/or the second chipset 120 in case of an abnormality of the first power supply 200 or the second power supply 300. In this way, under the condition that no power redundancy backup exists, the power degradation is performed by controlling the first chipset 110 and/or the second chipset 120, so that the working stability of the controller is improved, the functional safety is ensured, and the user experience is improved.
And, compared with adding a double-path double-redundancy circuit, the double-path double-redundancy circuit comprises a main power supply circuit and a standby power supply circuit. The main power supply circuit and the standby power supply are connected with the load end. And the main power supply circuit includes a main power supply circuit and a main switching circuit. The standby power supply circuit comprises a standby power supply circuit and a standby switch circuit. The main power supply circuit and the standby power supply circuit have the same circuit structure, are provided with a plurality of capacitors and a plurality of diodes, and have complex structures. The main switch circuit and the standby switch circuit are also formed by electric devices such as MOS tubes. The structure of the system for supplying power is reduced relative to the structural parts of the double-circuit double-redundancy circuit, the setting of the standby power supply circuit is canceled, the cost of the whole vehicle architecture is further reduced, and the development difficulty of the controller is also reduced.
In some embodiments, the difference between the sum of the power of the first chipset 110 and the sum of the power of the second chipset 120 is within a preset range.
According to the above embodiment, considering the power supply capability and line loss of each power supply harness, since there is a voltage difference between two voltages of two power supplies at the input end of the controller due to voltage drops of the power supply and the power harness itself, etc., the power consumption of the chips inside the controller is split by controlling the difference between the power of the first chipset 110 and the power of the second chipset 120 within a preset range, and the power rates on the power lines are equally divided, so as to improve the operation stability of the load controller 100 by the strategy of distributing the power rates to the first power supply 200 and the second power supply 300 respectively.
In one example, the predetermined range is between-5 milliwatts and +5 milliwatts.
In some embodiments, as shown in connection with fig. 1, the first chipset 110 includes: a system-on-chip SOC chip, and/or a CAN chip, and/or an ethernet chip. And/or, the second chipset 120 comprises: and the sound system control chip and/or the display screen driving chip and/or the Bluetooth chip and/or the WIFI chip.
According to the above embodiment, according to the chips inside the load controller 100, the division may be performed according to the chip functionality, so as to improve the operation stability of the load controller 100.
In one example, the number of chips included in the first chipset 110 is 1 or more. And/or the number of chips included in the second chipset 120 is 1 or more.
In one example, the type of chip included in the first chipset 110 is also not limited to a system on a chip, SOC, chip, and/or CAN chip, and/or ethernet chip. The chip types included in the first chipset 110 are selectively set according to the application scenario of the load controller 100, which is not described in detail herein.
In one example, the type of chip included in the second chipset 120 is not limited to a sound system control chip, and/or a display screen driver chip, and/or a bluetooth chip, and/or a WIFI chip. The chip types included in the second chipset 120 are selectively set according to the application scenario of the load controller 100, which is not described in detail herein.
As shown in connection with fig. 1, the system further comprises a first diode 140 and a second diode 150. The first diode 140 is connected in series between the input terminal of the first power supply 200 and the first chipset 110. The second diode 150 is connected in series between the input terminal of the second power supply 300 and the second chipset 120. The first diode 140 and the second diode 150 are arranged to realize the protection function for the load.
In some embodiments, as shown in connection with fig. 1, there is provided a system 1 for supplying power, comprising: the load controller 100, the first power supply 200, the second power supply 300, and the power supply switching circuit 160. The power supply switching circuit 160 is configured to switch the power supply sources of the first and second chip sets 110 and 120 to power supplies that normally operate in the event of an abnormality in the first power supply source 200 or the second power supply source 300.
According to the above embodiment, by providing the power switching circuit 160, the mutual backup of the first power supply 200 and the second power supply 300 is realized, and in the case where one of the first power supply 200 and the second power supply 300 has a problem, the other power supply realized by the power switching circuit 160 supplies power to the whole load controller 100 to ensure the normal operation of the load controller 100.
In some embodiments, as shown in connection with fig. 1, the power switching circuit 160 includes a bridge circuit. The bridge circuit is used for bridging the first power supply 200 and the second power supply 300. In the case where an abnormality occurs in the first power supply 200 or the second power supply 300, the bridge circuit is controlled to be turned on.
According to the above embodiment, the bridge circuit is used to bridge the first power supply 200 and the second power supply 300, so as to realize mutual backup of the first power supply 200 and the second power supply 300.
Referring to fig. 1, two ends of the bridge circuit are respectively connected with an input end of the first power supply 200 and the second power supply 300, and by setting the bridge circuit, when any one of the first power supply 200 and the second power supply 300 is abnormal, the other normal power supply can supply power to the whole load controller 100 through the bridge circuit, so that the running stability of the load controller 100 is improved.
In some embodiments, as shown in connection with fig. 8, the bridge circuit includes: the first MOS transistor Q1 and the second MOS transistor Q2. The D pole of the first MOS transistor Q1 is connected to the first power supply 200. The D pole of the second MOS transistor Q1 is connected to the second power supply 300, and the S pole of the first MOS transistor Q1 is connected to the S pole of the second MOS transistor Q2. The G pole of the first MOS transistor Q1 and the G pole of the second MOS transistor Q2 are both connected to the signal output end of the micro control unit 130.
According to the embodiment, the bridge circuit adopts the first MOS transistor Q1 and the second MOS transistor Q2, and the two PMOS transistors are designed according to the back-to-back mode, so that the problem of current backflow caused by the switching circuit made of a single PMOS transistor can be avoided, and the use safety is improved.
In one example, in connection with the circuit diagram of the bridge circuit shown in fig. 8, the bridge circuit includes two power connection terminals and a signal connection terminal, where the two power connection terminals are connected to the first power supply 200 and the second power supply 300, respectively. The signal connection terminal is connected to the signal control terminal of the micro control unit 130. The first MOS tube Q1 and the second MOS tube Q2 are arranged between the two power supply connection ends, and the first MOS tube Q1 and the second MOS tube Q2 are PMOS tubes. The signal connection end is provided with an NPN transistor T3, and a collector of the NPN transistor T3 is connected with a G pole of the first MOS tube Q1 and a G pole of the second MOS tube Q2 through a resistor R2. The power connection terminal connected to the first power supply 200 is provided with a plurality of capacitors C2, C3, C4, C5 connected in parallel. The power connection terminal connected to the second power supply 300 is provided with a plurality of capacitors C6, C7, C8, C9 connected in parallel. Between the power supply input and output, a capacitor is provided for filtering and stabilizing the power supply voltage. And a diode is arranged between the S pole and the D pole of each PMOS tube and used for preventing current from flowing backwards. C1 and R1 which are connected in parallel are arranged between the collector of the NPN transistor T3 and the S stages of the first MOS tube Q1 and the second MOS tube Q2, so that the effect of a delay capacitor is achieved, the delay capacitor is used for controlling the on time of the Q2, jitter is prevented, and the stable operation of a circuit is ensured.
Under the condition that the first power supply 200 and the second power supply 300 are all normal, the bridge circuit is in a closed state, and the first power supply 200 and the second power supply 300 are in a state of power sharing, so that normal and stable operation of the load end controller is realized. When any one of the first power supply 200 and the second power supply 300 is normal, the micro control unit 130 will turn on the bridge circuit to realize power bridging to supply power to the load end controller, so as to ensure that the load end controller realizes the mutual backup function of the two groups of power supplies under the condition of power degradation and ensure that the load end controller works normally.
In connection with the bridge circuit shown in fig. 8, the switching process of the first power supply 200 and the second power supply 300 is described as follows (hereinafter, mcu_en is used to represent the signal control terminal of the micro control unit 130, BAT1 is the input terminal of the first power supply 200, BAT2 is the input terminal of the second power supply 300): in the case that the first power supply 200 is abnormal, the mcu_en outputs a low level, the NPN transistor T3 is turned off, the gate of Q2 is pulled down, Q2 is turned on, and the second power supply 300 is connected to the power supply pin of the load side controller to supply power to the entire load side controller. In the case that the second power supply 300 is abnormal, the mcu_en outputs a high level, the NPN transistor T3 is turned on, the gate of Q1 is pulled down, Q1 is turned on, and the first power supply 200 is connected to the power supply pin of the load side controller to supply power to the entire load side controller.
In an example, as shown in fig. 1, two ends of the bridge circuit are respectively located at the cathode sides of the first diode 140 and the second diode 150, so that protection of the first power supply 200 and the second power supply 300 is achieved.
In some embodiments, as shown in connection with fig. 1, there is provided a system 1 for supplying power, comprising: the load controller 100, the first power supply 200 and the second power supply 300, the power switching circuit 160, and the power detection circuit 170. The power detection circuit 170 is communicatively connected to the micro control unit 130, and is configured to detect states of the first power supply 200 and the second power supply 300, and transmit detection results to the micro control unit 130.
According to the above-described embodiment, by providing the power supply detection circuit 170 for detecting the states of the first power supply 200 and the second power supply 300, monitoring of detecting the first power supply 200 and the second power supply 300 is achieved. In the case of detecting that the states of the first power supply 200 and the second power supply 300 are abnormal, feedback is timely provided to the micro control unit 130 so that feedback can be timely made according to the abnormal states.
In some embodiments, as shown in connection with fig. 1 and 2, the detection circuit includes: and the resistor voltage division detection circuit is connected with the first power supply 200 and the second power supply 300 and is used for detecting the voltage states of the first power supply 200 and the second power supply 300.
As shown in fig. 2, the resistor voltage division detection circuit is connected to the first power supply 200 and the second power supply 300, respectively. And, the resistor divider detection circuit is connected to the micro control unit 130. The resistor voltage division detection circuit is used for detecting the power supply states of the input end of the first power supply 200 and the input end of the second power supply 300. Under the condition that any one of the functions fails, the abnormal state is timely fed back to the micro-control unit 130, the micro-control unit 130 controls the load end controller to close high-power peripheral devices with lower safety levels like a power amplifier, so that power degradation is realized, and meanwhile, a bridge circuit is opened to enable a normal power supply to supply power to the whole controller, so that the normal work of the load end controller is ensured.
In some embodiments, as shown in connection with fig. 1,2 and 3, the detection circuit includes: a resistor voltage division detection circuit and an interruption detection circuit. An interrupt detection circuit is connected to the first power supply 200 and the second power supply 300 for transient detection of the power supply voltage, the interrupt detection circuit comprising a hysteresis comparator configured with a threshold interval of the hysteresis voltage.
According to the above-described embodiment, the monitoring of the voltage states of the first power supply 200 and the second power supply 300 is achieved by the resistor-divided detection circuit. The power supply voltages of the first power supply 200 and the second power supply 300 are subjected to transient detection by using an interruption detection circuit, and a hysteresis comparator is arranged and a threshold interval of the hysteresis voltage is correspondingly arranged, so that false detection of the system at a critical voltage is solved. Through setting up resistance partial pressure detection circuit and interrupt detection circuit, realize the control to power state, and then solve the problem of the inefficacy of load end controller because of power state is unstable leads to, promoted user experience and functional safety. The interrupt detection circuit includes a hysteresis comparator and is configured with a threshold interval of a hysteresis voltage. The hysteresis comparator has hysteresis, namely when the input voltage is higher than the upper limit value of the threshold value interval, the comparator outputs a high level; when the input voltage is lower than the lower limit value of the threshold section, the comparator outputs a low level. When the input voltage is in the threshold interval, the output of the comparator remains unchanged.
As shown in fig. 3, the circuit diagram of the interrupt detection circuit. The interruption detection circuit comprises a first interruption detection circuit for detecting the first power supply 200, an access end of the first interruption detection circuit is connected with the first power supply 200, and an output pin of the first interruption detection circuit is connected with the micro control unit 130 and is used for feeding back a detection result. The interrupt detection circuit further comprises a second interrupt detection circuit for detecting the second power supply 300, an access end of the second interrupt detection circuit is connected with the second power supply 300, and an output pin of the second interrupt detection circuit is connected with the micro control unit 130 and is used for feeding back a detection result.
The utility model adopts a resistance voltage division detection circuit and an interruption detection circuit, the resistance voltage division detection circuit reduces the power supply voltage to the input voltage range of the resistance voltage division detection circuit through the resistance voltage division circuit, the micro control unit 130 reads the power voltage value through the resistor voltage division detection circuit and monitors in real time. The interruption detection circuit adopts a circuit of a hysteresis comparator to realize transient voltage detection, the hysteresis comparator detects the power supply voltage in real time, and a hysteresis voltage threshold interval is set so as to avoid false detection at a critical voltage.
According to the power architecture requirement, 6V is used as a critical point for judging whether the power supply is normal or not, in order to solve the false detection of the system at the critical voltage, a threshold interval of hysteresis voltage is designed by the circuit, the threshold interval is 5.5V to 6.5V, when the power supply voltage is lower than 5.5V, the hysteresis comparator outputs a high level to trigger an interrupt signal of the micro control unit 130, and the micro control unit 130 judges that the power supply is abnormal. When the power supply voltage is restored to 6.5V, the hysteresis comparator outputs a low level, triggers an interrupt signal of the micro control unit 130, and the micro control unit 130 judges that the power supply is restored to normal. The circuit detects the first power supply 200 and the second power supply 300 at the same time, and if any power supply abnormality is detected, the circuit sends a signal to the load end controller to reduce the power output so as to protect the power supply and the load. If both sets of power supplies are abnormal at the same time, the circuit sends the highest-level interrupt signal to the micro control unit 130, and the micro control unit 130 executes a corresponding power supply abnormality processing strategy according to the interrupt signal, for example, shutting down the device or starting up the standby power supply. As shown in fig. 4 and 5, simulation diagrams for the power supply step-down detection circuit design for the first power supply and the second power supply using the interrupt detection circuit are shown, respectively. As shown in fig. 6 and 7, simulation diagrams for power supply boosting detection circuit design for the first power supply and the second power supply using the interrupt detection circuit are shown, respectively.
In one example, as shown in fig. 3, the first power supply 200 is divided by resistors R2 and R3 and then connected to the negative electrode V2 of the comparator U1A; the reference power source vcc_3v3 is also divided by the resistor R4R 5 and then connected to the positive electrode v3+ of the comparator U1A, where the divided voltage v3+ of the positive electrode is used as the reference value of the voltage fluctuation range of the first power supply 200, and meanwhile, the positive electrode v3+ of the comparator U1A is connected with the output terminal out1 of the comparator U1A by the feedback resistor R7, and the output terminal is pulled up to the reference voltage vcc_3v3 by the resistor R1, and meanwhile, the reference voltage also supplies power to the comparator U1A. The second power supply 300 is connected to the negative pole V6-of the comparator U1B after divided by the resistors R11 and R12; the reference power source vcc_3v3 is also connected to the positive electrode v5+ of the comparator U1B after divided by the resistors R13 and R14, and the divided voltage value v5+ of the positive electrode is used as the reference value of the voltage fluctuation range of the second power source 300, and meanwhile, the positive electrode v5+ of the comparator U1B is connected to the output terminal out2 of the comparator U1B by the feedback resistor R15, and the output terminal is pulled up to the reference voltage vcc_3v3 by the resistor R10. The output out1 of the comparator U1A is connected to the MCU interface, and the output out2 of the comparator U1B is connected to the MCU interface. Meanwhile, the output out1 of the comparator U1A and the output out2 of the comparator U1B are combined through a D1 pipe and then connected to the MCU interface.
Referring to fig. 3 and fig. 4, when the first power supply 200 is within the normal operating voltage range of 6V to 16V, the comparator V2- > v3+ and the comparator out1 output low, R5 and R7 are in parallel, and the voltage value of v3+ at this time is v3+1. When the first power supply 200 drops abnormally, V2- < V3+1 of the comparator is in an open-drain state, out1 is pulled up by the pull-up resistor, the output level logic of the comparator is turned over, meanwhile (R1+R7) in the circuit is connected with R4 in parallel, V3+ obtains a new voltage division value V3+2, and V3+1 < V3+2 is obtained according to the voltage division characteristic, namely the reference voltage of V3+ of the comparator is raised at the moment; combining simulation results, when the first power supply 200 drops to 5.5V, the out1 level is turned over, and a trigger level turning signal is transmitted to the MCU; referring to fig. 5, the logic state of the abnormal power supply drop of the second power supply 300 is the same as that of the first power supply 200, and will not be described again.
Referring to fig. 3 and 6, when the first power supply 200 is turned up to the normal voltage, the reference voltage V3+ is raised to V3+2 in the abnormal state, and the voltage V2-greater than V3+2 of the voltage value of the first power supply 200 after the voltage division of R2 and R3 is needed to turn over the logic level output by the comparator and transmit the logic level to the MCU again, which indicates that the power supply is turned back to normal. At the moment, the comparator outputs a low level, R7 is connected with R5 in parallel again, and the voltage value of V < 3+ > is restored to V < 3+ > 1; in combination with the simulation result, the first power supply 200 needs to rise above 6.5V to trigger the comparator output logic level to flip. As shown in fig. 3 and fig. 7, the logic state of the second power supply 300 for power up to be normal is the same as that of the first power supply 200, and will not be described again.
In this embodiment, the first power supply 200 and the second power supply 300 both trigger the comparator logic level to flip and then notify the MCU when the voltage drops below 5.5V; the first power supply 200 and the second power supply 300 both trigger the level inversion again and notify the MCU when the voltage rises above 6.5V. Therefore, the system provided by the disclosure can solve the problem of unstable system caused by false triggering of the power supply in the 6V critical state.
In some embodiments, as shown in connection with fig. 1, there is provided a system 1 for supplying power, comprising: the load controller 100, the first power supply 200 and the second power supply 300, the power switching circuit 160, the power detection circuit 170, and the power supply circuit. The power supply circuit connects the first power supply 200 and the second power supply 300 in parallel to form a power supply of the micro control unit 130.
According to the above embodiment, the power supply circuit obtained after the first power supply 200 and the second power supply 300 are connected in parallel supplies power to the micro control unit 130, and when one of the first power supply 200 and the second power supply 300 is abnormal, the other power supply circuit can still supply power to the micro control unit 130 normally, so that the micro control unit 130 is still in a normal working state, and further, the running stability of the micro control unit 130 is improved.
In one example, as shown in connection with fig. 1, the system further includes a third diode 180 and a fourth diode 190. The input end of the first power supply 200 is connected in series with a third diode 180, the input end of the second power supply 300 is connected with a fourth diode 190, and the first power supply 200 and the second power supply 300 are respectively connected into the micro-control unit 130 after passing through the third diode 180 and the fourth diode 190. Protection of the power supply is achieved by providing a third diode 180 and a fourth diode 190.
In conjunction with the system 1 for supplying power shown in fig. 1, the system further includes a first power supply end controller 210 and a second power supply end controller 310, where the first power supply end controller 210 and the second power supply end controller 310 are all communicatively connected to the micro control unit 130 of the load controller 100 through an ethernet or CAN bus; the first power supply end controller 210 is used for controlling the first power supply 200, and the second power supply end controller 310 is used for controlling the second power supply 300.
In connection with the system for supplying power shown in fig. 1, in some embodiments, in connection with fig. 9, a method for supplying power is provided, the method comprising:
s901, acquiring power states of a first power supply and a second power supply.
S902, controlling to reduce the power of the first chipset and/or the second chipset when an abnormality occurs in the first power supply or the second power supply.
The method for supplying power provided by the present disclosure is applied to the system for supplying power of any one of the above-mentioned technical solutions. A system for supplying power includes a load controller, a first power supply, and a second power supply. The chip inside the load controller is divided into a first chip set and a second chip set by splitting power consumption. And power is equally divided on the power supply and distributed to the first power supply and the second power supply respectively, and the first chip set and the second chip set of the load controller are powered by the first power supply and the second power supply respectively so as to improve the working stability of the system.
The method for supplying power provided by the disclosure obtains power states of a first power supply and a second power supply. In the case that the first power supply or the second power supply is abnormal, controlling to reduce the power of the first chip set and/or the second chip set. Therefore, the power degradation is performed by controlling the first chip set and/or the second chip set under the condition that no power redundancy backup exists, so that the working stability of the controller is improved, the functional safety is ensured, and the user experience is improved. And compared with the method of adding a double-circuit double-redundancy circuit, the cost of the whole vehicle architecture is reduced, and the development difficulty of the controller is also reduced.
In one example, in the event of an abnormality in the first power supply, the step of controlling to reduce the power of the first chipset includes: sorting from high to low according to the criticality of the chip functions included in the first chip set; and controlling the chips with low criticality to be closed in sequence according to the ordering of the functional criticality.
In one example, in the event of an abnormality in the second power supply, the step of controlling to reduce the power of the second chipset includes: sorting from high to low according to the criticality of the chip functions included in the second chip set; and controlling the chips with low criticality to be closed in sequence according to the ordering of the functional criticality.
In some embodiments, the abnormal condition of the first power supply includes: the first voltage V 1 is less than or equal to a first threshold value V 1.5.5≤V1 +.6. The first power supply normal condition includes: the first voltage V 1 is greater than or equal to the second threshold V 2.6≤V2, 6.5.
According to the embodiment, the error detection of the system at the critical voltage is solved by setting the interval for judging the voltage abnormality, so that the accuracy of the voltage state detection is improved.
In some embodiments, the abnormal condition of the second power supply includes: the second voltage V 2 is less than or equal to the set threshold value V 1.5.5≤V1 < 6. Or the condition that the second power supply is normal includes: the second voltage V 2 is greater than or equal to the second threshold value V 2.6≤V2, 6.5.
According to the embodiment, the error detection of the system at the critical voltage is solved by setting the interval for judging the voltage abnormality, so that the accuracy of the voltage state detection is improved.
Through setting up resistance partial pressure detection circuit and interrupt detection circuit, realize the control to power state, and then solve the problem of the inefficacy of load end controller because of power state is unstable leads to, promoted user experience and functional safety. The interrupt detection circuit includes a hysteresis comparator and is configured with a threshold interval of a hysteresis voltage. The hysteresis comparator has hysteresis, namely when the input voltage is higher than the upper limit value of the threshold value interval, the comparator outputs a high level; when the input voltage is lower than the lower limit value of the threshold section, the comparator outputs a low level. When the input voltage is in the threshold interval, the output of the comparator remains unchanged.
According to the power architecture requirement, 6V is used as a critical point for judging whether the power supply is normal or not, in order to solve the false detection of the system at the critical voltage, a threshold interval of hysteresis voltage is designed by the circuit, the threshold interval is 5.5V to 6.5V, when the power supply voltage is lower than 5.5V, the hysteresis comparator outputs a high level to trigger an interrupt signal of the micro control unit, and the micro control unit judges that the power supply is abnormal. When the power supply voltage is recovered to 6.5V, the hysteresis comparator outputs a low level to trigger an interrupt signal of the micro control unit, and the micro control unit judges that the power supply is recovered to be normal. The circuit detects the first power supply and the second power supply simultaneously, and if any power supply abnormality is detected, the circuit sends a signal to the load end controller to reduce the power output so as to protect the power supply and the load.
In connection with the system for supplying power shown in fig. 1, in some embodiments, in connection with fig. 10, a method for supplying power is provided, the method comprising:
S1001, acquiring power states of a first power supply and a second power supply.
The power supply states of the first power supply and the second power supply voltage are detected by a power supply detection circuit.
S1002, determining a power supply with abnormal power supply state;
s1003, controlling to reduce the power of the first chipset in case of abnormality of the first power supply.
S1004, controlling the second power supply to be conducted with the first chip set.
In one example, controlling power degradation of the first chipset in the event of an abnormality in the first power supply may shut down some non-critical functions. And the power supply switching circuit is controlled to be turned on so as to conduct the second power supply and the first chip set, so that the second power supply supplies power for the whole load end controller.
S1005, controlling to reduce the power of the second chipset in case of abnormality of the second power supply.
S1006, controlling the first power supply and the second chip set to be conducted.
In one example, controlling the power degradation of the second chipset in the event of an abnormality in the second power supply may shut down some non-critical functions. And the power supply switching circuit is controlled to be turned on so as to conduct the first power supply and the second chip set, so that the first power supply supplies power for the whole load end controller.
According to the embodiment, under the condition that the first power supply or the second power supply is abnormal, the first power supply and the second power supply are switched to realize mutual backup of the first power supply and the second power supply, so that normal operation of the load controller is ensured.
The system for supplying power is combined with the system for supplying power shown in fig. 1, and further comprises a first power supply end controller and a second power supply end controller, wherein the first power supply end controller and the second power supply end controller are both in communication connection with a micro control unit of a load controller through an Ethernet or CAN bus; the first power supply end controller is used for controlling the first power supply source, and the second power supply end controller is used for controlling the second power supply source.
In connection with the system for supplying power shown in fig. 1, in some embodiments, in connection with fig. 11, a method for supplying power is provided, the method comprising:
S1101, acquiring power states of the first power supply and the second power supply.
The power supply states of the first power supply and the second power supply voltage are detected by a power supply detection circuit.
S1102, determining a power supply with abnormal power supply state;
S1103, in a case where an abnormality occurs in the first power supply, control is performed to reduce the power of the first chipset.
S1104, controlling the second power supply to be conducted with the first chip set.
S1105, the first power supply is redistributed.
In one example, controlling power degradation of the first chipset in the event of an abnormality in the first power supply may shut down some non-critical functions. And the power supply switching circuit is controlled to be turned on so as to conduct the second power supply and the first chip set, so that the second power supply supplies power for the whole load end controller. And the micro control unit feeds back the power supply state of the first power supply to the first power supply end controller so that the first power supply end controller can control the first power supply to carry out re-distribution, and after the re-distribution is carried out, the power supply state of the first power supply is continuously monitored.
And S1106, after the power is re-distributed, controlling the first chipset of the load controller to recover the full-function state and closing the bridge circuit under the condition that the power states of the first power supply are normal.
S1107, controlling to reduce the power of the second chipset in case of abnormality of the second power supply.
S1108, controlling the first power supply and the second chip set to be conducted.
S1109, the second power supply is redistributed.
In one example, controlling the power degradation of the second chipset in the event of an abnormality in the second power supply may shut down some non-critical functions. And the power supply switching circuit is controlled to be turned on so as to conduct the first power supply and the second chip set, so that the first power supply supplies power for the whole load end controller. And the micro control unit feeds back the power supply state of the second power supply to the second power supply end controller so that the second power supply end controller can control the second power supply to carry out re-distribution, and after the re-distribution is carried out, the power supply state of the second power supply is continuously monitored.
And S1110, after the power is re-distributed, controlling the second chipset of the load controller to restore the full-function state and closing the bridge circuit under the condition that the power states of the second power supply are normal.
According to the embodiment, the power supply switching circuit and the power supply detection circuit are used for realizing a plurality of chips of the load controller, and the power supply states of the first power supply and the second power supply are monitored and protected under the condition of power sharing, so that the problem that the high-power controller at the load end fails after power sharing is solved, and mutual backup between two groups of power supplies is realized. The power supply detection circuit detects power supply states of input ends of the first power supply and the second power supply. And under the condition that any one of the functions fails, the power is timely fed back to the micro-control unit, and the micro-control unit controls the load controller to close high-power peripheral devices with lower safety levels like a power amplifier and the like, so that power degradation is realized. Meanwhile, the bridge circuit is opened, so that a normal power supply supplies power to the whole load controller, and the normal work of the load end controller is ensured. And then the micro control unit confirms whether the voltage is in transient power failure or is in false triggering of the power supply through the resistor voltage division detection circuit and the interruption detection circuit, and informs the first power supply end controller and/or the second power supply end controller through the communication mode of the Ethernet or the CAN bus after confirming that the power supply is abnormal, and the power distribution is carried out again for the failed power supply. After the power distribution is finished again, the power supply detection circuit of the load end controller detects that the power supply is recovered to be normal and then feeds back to the micro control unit, and the micro control unit further recovers the load end controller to be in a full-function state, namely, the chips in the corresponding chip set are all recovered to be in a normal working state, so that the problem of failure of the load end controller caused by unstable power supply state is solved, and user experience and functional safety are improved.
As shown in connection with fig. 12, an embodiment of the present disclosure provides a control apparatus 1200 for supplying power, including a processor (processor) 1201 and a memory (memory) 1202. Optionally, the apparatus 120 may further include a communication interface (Communication Interface) 1203 and a bus 1204. The processor 1201, the communication interface 1203, and the memory 1202 may communicate with each other via the bus 1204. The communication interface 1203 may be used for information transfer. The processor 1201 may invoke logic instructions in the memory 1202 to perform the method for powering of the above-described embodiments.
Further, the logic instructions in memory 1202 described above may be implemented in the form of software functional units and stored in a computer-readable storage medium when sold or used as a stand-alone product.
The memory 1202 is a computer-readable storage medium that can be used to store a software program, a computer-executable program, such as program instructions/modules corresponding to the methods in the embodiments of the present disclosure. The processor 1201 performs functional applications and data processing by executing program instructions/modules stored in the memory 1202, i.e., implements the method for supplying power in the above-described embodiments.
Memory 1202 may include a storage program area that may store an operating system, at least one application program required for functionality, and a storage data area; the storage data area may store data created according to the use of the terminal device, etc. In addition, memory 1202 may include high-speed random access memory and may also include non-volatile memory.
In some embodiments, a computer readable storage medium is provided, storing program instructions that, when executed, cause a computer to perform a method for supplying power as in any of the embodiments described above.
In some embodiments, there is provided a vehicle comprising: a system for supplying power as claimed in any preceding claim; or a control device for supplying power as described above. A system for supplying power or a control device for supplying power is mounted to the vehicle body. The mounting relationships described herein are not limited to being placed within the interior of the vehicle body, but include mounting connections with other components of the vehicle, including but not limited to physical, electrical, or signal transmission connections, etc. Those skilled in the art will appreciate that the system for supplying power or the control device for supplying power may be adapted to a feasible vehicle body, thereby realizing other feasible embodiments.
The above embodiments are merely preferred embodiments for fully explaining the present application, and the scope of the present application is not limited thereto. Equivalent substitutions and modifications will occur to those skilled in the art based on the present application, and are intended to be within the scope of the present application. The embodiments represent only possible variations. Individual components and functions are optional unless explicitly required, and the sequence of operations may vary. Portions and features of some embodiments may be included in, or substituted for, those of others. Moreover, the terminology used in the present application is for the purpose of describing embodiments only and is not intended to limit the claims. As used in the description of the embodiments and the claims, the singular forms "a," "an," and "the" (the) are intended to include the plural forms as well, unless the context clearly indicates otherwise. Similarly, the term "and/or" as used in this disclosure is meant to encompass any and all possible combinations of one or more of the associated listed. Furthermore, when used in the present disclosure, the terms "comprises," "comprising," and/or variations thereof, mean that the recited features, integers, steps, operations, elements, and/or components are present, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Without further limitation, an element defined by the phrase "comprising one …" does not exclude the presence of other like elements in a process, method or apparatus that includes the element. In this context, each embodiment may be described with emphasis on the differences from the other embodiments, and the same similar parts between the various embodiments may be referred to each other. For the methods, products, etc. disclosed in the embodiments, if they correspond to the method sections disclosed in the embodiments, the description of the method sections may be referred to for relevance.
Those of skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the solution. The skilled artisan may use different methods for each particular application to achieve the described functionality, but such implementation should not be considered to be beyond the scope of the embodiments of the present disclosure. It will be clearly understood by those skilled in the art that, for convenience and brevity of description, specific working procedures of the above-described systems, apparatuses and units may refer to corresponding procedures in the foregoing method embodiments, which are not repeated herein.
In the embodiments disclosed herein, the disclosed methods, articles of manufacture (including but not limited to devices, apparatuses, etc.) may be practiced in other ways. For example, the apparatus embodiments described above are merely illustrative, and for example, the division of the units may be merely a logical function division, and there may be additional divisions when actually implemented, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed. In addition, the coupling or direct coupling or communication connection shown or discussed with each other may be through some interface, device or unit indirect coupling or communication connection, which may be in electrical, mechanical or other form. The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to implement the present embodiment. In addition, each functional unit in the embodiments of the present disclosure may be integrated in one processing unit, or each unit may exist alone physically, or two or more units may be integrated in one unit.
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. In the description corresponding to the flowcharts and block diagrams in the figures, operations or steps corresponding to different blocks may also occur in different orders than that disclosed in the description, and sometimes no specific order exists between different operations or steps. For example, two consecutive operations or steps may actually be performed substantially in parallel, they may sometimes be performed in reverse order, which may be dependent on the functions involved. Each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

Claims (15)

1. A system for supplying power, comprising:
The load controller comprises a first chip set, a second chip set and a micro control unit;
The first power supply supplies power to the first chipset;
The second power supply supplies power to the second chip set;
Wherein the micro control unit is configured to control the power of the first chip set and/or the second chip set to be reduced in case of an abnormality of the first power supply or the second power supply.
2. The system of claim 1, wherein the system further comprises a controller configured to control the controller,
The difference between the sum of the power of the first chipset and the sum of the power of the second chipset is within a preset range.
3. The system of claim 1, wherein the system further comprises a controller configured to control the controller,
The first chipset includes: a system-on-chip (SOC) chip, and/or a Controller Area Network (CAN) chip, and/or an Ethernet chip; and/or the number of the groups of groups,
The second chipset includes: and the sound system control chip and/or the display screen driving chip and/or the Bluetooth chip and/or the WIFI chip.
4. A system according to any one of claims 1 to 3, further comprising:
And the power supply switching circuit is configured to switch the power supply of the first chip set and the second chip set to a power supply which normally works under the condition that the first power supply or the second power supply is abnormal.
5. The system of claim 4, wherein the power switching circuit comprises:
The bridge circuit is used for bridging the first power supply and the second power supply;
and under the condition that the first power supply or the second power supply is abnormal, controlling the bridge circuit to be conducted.
6. The system of claim 5, wherein the bridge circuit comprises:
The D pole of the first MOS tube is connected with a first power supply;
The D electrode of the second MOS tube is connected with a second power supply, and the S electrode of the first MOS tube is connected with the S electrode of the second MOS;
The G electrode of the first MOS tube and the G electrode of the second MOS tube are connected with the signal output end of the micro control unit.
7. A system according to any one of claims 1 to 3, further comprising:
And the power supply detection circuit is in communication connection with the micro control unit and is configured to detect the states of the first power supply and the second power supply and send detection results to the micro control unit.
8. The system of claim 7, wherein the detection circuit comprises:
The resistor voltage division detection circuit is connected with the first power supply and the second power supply and is used for detecting the voltage states of the first power supply and the second power supply; and/or
And the interruption detection circuit is connected with the first power supply and the second power supply and is used for transient detection of the power supply voltage, and comprises a hysteresis comparator which is configured with a threshold section of the hysteresis voltage.
9. A system according to any one of claims 1 to 3, further comprising:
And the power supply circuit connects the first power supply and the second power supply in parallel to form the power supply of the micro control unit.
10. A method for supplying power, characterized by being applied to the system for supplying power according to any one of claims 1 to 9, the method comprising:
acquiring power states of a first power supply and a second power supply;
And controlling to reduce the power of the first chip set and/or the second chip set under the condition that the first power supply or the second power supply is abnormal.
11. The method of claim 10, wherein in the event of an abnormality in the first power supply or the second power supply, the method further comprises:
Under the condition that the first power supply is abnormal, controlling the second power supply to be conducted with the first chip set;
And under the condition that the second power supply is abnormal, controlling the first power supply and the second chip set to be conducted.
12. The method according to claim 10 or 11, further comprising:
Under the condition that the first power supply is abnormal, the first power supply is redistributed, and after the power is redistributed, the first chip set of the load controller is controlled to recover the full-function state and the first power supply is controlled to be conducted with the first chip set under the condition that the power state of the first power supply is normal;
And under the condition that the second power supply is abnormal, the second power supply is redistributed, and after the power is redistributed, the second chip set of the load controller is controlled to recover the full-function state and the second power supply and the second chip set are controlled to be conducted under the condition that the power state of the second power supply is normal.
13. A control device for supplying power, characterized by comprising a processor and a memory storing program instructions, the processor being configured to perform the method for supplying power according to any of claims 10 to 12 when the program instructions are run.
14. A readable storage medium storing program instructions which, when executed, are adapted to cause a computer to carry out the method for supplying power according to any one of claims 10 to 12.
15. A vehicle, characterized by comprising:
a system for supplying power according to any one of claims 1 to 9; or (b)
The control device for supplying power according to claim 13.
CN202411101669.XA 2024-08-12 2024-08-12 System and method for supplying power, control device, readable storage medium, and vehicle Pending CN118744692A (en)

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