CN118642979A - Unified ordering method and system suitable for PCIE SWITCH connection devices of different types - Google Patents
Unified ordering method and system suitable for PCIE SWITCH connection devices of different types Download PDFInfo
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Abstract
The invention provides a unified ordering method and a system suitable for PCIE SWITCH connecting devices of different types, wherein the method comprises the following steps: PCIE SWITCH FW maps the circuit or physical Slot connected with the PCIe device to the logic Slot according to the current PCIE SWITCH wiring mode and working mode, so as to ensure that the device can be uniformly mapped to the logic Slot no matter the PCIE SWITCH specification model, wiring mode or working mode, so that the PCIe device ordering which is originally disordered due to various complex conditions is carded into a simple and clear uniform order, presented in the form of PCIe device Slot ID, and effectively solves the device identification and compatibility problems brought by PCIE SWITCH. And the mapping result is provided for the operating system and the baseboard management controller through standardized interfaces, so that the searching, configuration and management of the equipment become simple and efficient, PCIe equipment can be acquired and managed more conveniently, and the problem of disordered mapping of the equipment is not worried.
Description
Technical Field
The invention relates to the technical field of computers, in particular to a unified ordering method and a unified ordering system applicable to different types PCIE SWITCH of connection devices.
Background
With rapid development of technology and increasing computing demands, particularly in the fields of data centers, cloud computing, artificial intelligence, high-performance computing, and the like, traditional computer architectures with CPUs as centers cannot meet the demands of modern applications for high computing power and rapid data transmission. In this background, PCIE SWITCH technology has emerged as a key to improving the performance of computer systems. PCIE SWITCH is used as a data exchange hub between PCIe devices, so that the efficiency of data processing and transmission is obviously improved, and the system performance is optimized.
However, with the continuous progress of PCIE SWITCH technologies, the diversification of specifications and functions brings about greater flexibility for system design and performance improvement, but at the same time, brings about new technical challenges. When using PCIE SWITCH and its connection devices with different specifications, the user may encounter problems of device identification and compatibility, for example, in a specific application scenario, when mapping a physical PCIe device to a logical device, a problem of position confusion may occur, which not only increases difficulty of searching and removing a faulty device by the user, but also may cause that a device that is normally operated is misjudged as abnormal, thereby bringing operational inconvenience and confusion to the user.
Disclosure of Invention
Based on this, the present invention aims to propose a unified ordering method and system applicable to different types PCIE SWITCH of connection devices, so as to solve the above-mentioned problems.
The unified sequencing method applicable to the PCIE SWITCH connection devices of different types, which is provided by the invention, is applied to PCIE SWITCH FW, and comprises the following steps:
mapping a circuit or a physical slot connected with PCIe equipment to a logic slot according to the current PCIE SWITCH wiring mode and the working mode;
and providing the mapping result to an operating system and a baseboard management controller through a standardized interface so as to realize unified management and configuration of PCIe equipment.
Still further, the step of mapping the line or physical slot of the PCIe device connection to the logical slot according to the current PCIE SWITCH connection mode and the working mode includes:
Acquiring a current PCIE SWITCH wiring mode according to the received GPIO signal, and judging a current working mode according to a PCIESWITCH self state mechanism;
Entering different code branches according to the current PCIE SWITCH wiring mode;
In different code branches, the line or physical slot to which the PCIe device is connected is mapped to a logical slot according to the current PCIE SWITCH mode of operation.
Further, before the step of obtaining the current PCIE SWITCH connection mode according to the received GPIO signal and determining the current working mode according to the PCIE SWITCH own state mechanism, the method further includes:
On PCIE SWITCH boards, the current PCIE SWITCH wiring mode is judged through hardware logic and is transmitted to PCIE SWITCH FW through GPIO signals.
Still further, the step of mapping the line or physical slot to which the PCIe device is connected to the logical slot according to the current PCIE SWITCH operating mode includes:
PCIE SWITCH include a basic mode or a comprehensive mode;
Judging the current PCIE SWITCH working mode;
If the current PCIE SWITCH is in the basic mode, mapping the line connected with the PCIe device to a logic slot;
If the current PCIE SWITCH is in the integrated mode, the physical slot in which the PCIe device is located is translated to a logical slot.
Further, the step of entering a different code branch according to the current PCIE SWITCH wiring mode includes:
The wiring modes of PCIE SWITCH include, but are not limited to, balanced mode, universal mode, or cascade mode.
Still further, the step of providing the mapping result to the operating system and the baseboard management controller through the standardized interface includes:
during the starting process of the server platform, enumerating all PCIe devices through the BIOS, and acquiring all PCIe information including the PCIe device logic slot information provided by PCIESWITCH FW;
Converting logic slots of PCIe equipment into Slot ID numbers with easily readable sequences through BIOS, and sending the final Slot ID numbers to a baseboard management controller in an IPMI command mode for use after an operating system is started;
the operating system is guided to start through the BIOS, and after the operating system is started, PCIe information resources distributed in the BIOS stage are obtained and provided for interfaces in kernel mode or user mode so as to be obtained by a user through an operating system tool or an ipmitool tool.
The invention also provides a unified sequencing system applicable to the PCIE SWITCH connection devices of different types, which is applied to PCIE SWITCH FW and comprises:
Logical slot mapping module: the logic slot mapping module is used for mapping a circuit or a physical slot connected with the PCIe equipment to the logic slot according to the current PCIE SWITCH wiring mode and the working mode;
And the equipment unified management module: the mapping result is provided to the operating system and the baseboard management controller through standardized interfaces so as to realize unified management and configuration of PCIe equipment.
In summary, the invention provides a unified ordering method suitable for different types PCIE SWITCH of connection devices, and the invention aims at the problem of disordered ordering of device information in PCIE SWITCH technology, and provides a unified ordering method, which maps the circuit or physical Slot connected with PCIe devices to a logic Slot according to the current PCIE SWITCH wiring mode and working mode by intervention of PCIE SWITCH bottom firmware, ensures that the devices can be uniformly mapped to the logic Slot no matter how the PCIE SWITCH specification model, wiring mode or working mode is, so that the ordered PCIe devices which are disordered originally due to various complex conditions are carded into a simple and clear unified order and presented in the form of Slot ID of the PCIe devices, thereby effectively solving the problems of device identification and compatibility caused by the PCIE SWITCH specification model and function diversification and different wiring modes and working modes. And the mapping result is provided for the operating system and the baseboard management controller through standardized interfaces, so that the searching, configuration and management of the equipment become simple and efficient, and a user can acquire and manage PCIe equipment more conveniently without worrying about the problem of chaotic mapping of the equipment.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
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The foregoing and/or additional aspects and advantages of the invention will become apparent and may be better understood from the following description of embodiments taken in conjunction with the accompanying drawings in which:
FIG. 1 is a flow chart of a unified ordering method applicable to different types PCIE SWITCH of connected devices in accordance with the present invention;
FIG. 2 is a flow chart of one embodiment of a unified sequencing method of the present invention applicable to different types PCIE SWITCH of connected devices;
FIG. 3 is a flow chart of another embodiment of a unified sequencing method of the present invention applicable to different types PCIE SWITCH of connected devices;
FIG. 4 is a first exemplary diagram of a wiring pattern PCIE SWITCH of the present invention;
FIG. 5 is a second exemplary diagram of a wiring pattern PCIE SWITCH of the present invention;
FIG. 6 is a third exemplary diagram of a wiring pattern PCIE SWITCH of the present invention;
FIG. 7 is a fourth exemplary diagram of a wiring pattern PCIE SWITCH of the present invention;
Fig. 8 is a system block diagram of a unified sequencing system of the present invention that is suitable for use with different types PCIE SWITCH of connected devices.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Several embodiments of the invention are presented in the figures. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
It will be understood that when an element is referred to as being "mounted" on another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present. The terms "vertical," "horizontal," "left," "right," and the like are used herein for illustrative purposes only.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Referring to fig. 1 to 7, the present invention provides a unified ordering method applicable to different types PCIE SWITCH of connection devices, and is applied to PCIE SWITCH FW, and fig. 1 is a flowchart of a unified ordering method applicable to different types PCIE SWITCH of connection devices according to one embodiment of the present invention, where the flowchart includes steps S101 to S102 as follows:
s101, mapping the circuit or physical slot connected with the PCIe device to the logic slot according to the current PCIE SWITCH wiring mode and the working mode.
It should be noted that, through the intervention of PCIE SWITCH FW (i.e. PCIE SWITCH bottom firmware), according to the current wiring mode and working mode of PCIE SWITCH, the PCIe (PERIPHERAL COMPONENTINTERCONNECT EXPRESS, high-speed serial computer expansion bus protocol) device connected line (Lane) or Physical Slot (Physical Slot) is mapped to the Logical Slot (Logical Slot), so that it is ensured that the devices can be uniformly mapped to the Logical Slot regardless of the specification model, wiring mode or working mode of PCIESWITCH, so that the PCIe device ordering which is originally disordered due to various complex conditions is carded into a simple and clear uniform order and presented in the form of PCIe device Slot ID, thereby effectively solving the device identification and compatibility problems caused by the diversity of PCIESWITCH specification models and functions and different wiring modes and working modes.
Specifically, the method can be implemented by determining PCIE SWITCH a connection mode and an operating state through hardware logic, outputting corresponding GPIO (General Purpose Input/Output ) signals, and then reading the signals by PCIE SWITCH firmware to determine the connection mode and select different code processing paths according to the connection mode and the operating state. If PCIE SWITCH is in Base Mode, the line connected to the device is mapped directly to the logical slot; if in the integrated mode (SYNTHETIC MODE), the physical slots of the device are converted to logical slots. This process ensures that a unified, readable PCIe device Slot ID is provided to the operating system and baseboard management controller regardless of changes in the wiring mode and the operating mode of PCIE SWITCH, thereby greatly simplifying the complexity of device management and identification.
S102, providing the mapping result to an operating system and a baseboard management controller through a standardized interface so as to realize unified management and configuration of PCIe equipment.
It should be noted that, in order to implement unified management and configuration of PCIe devices, one key step is to provide the mapping result to an Operating System (OS) and a Baseboard Management Controller (BMC) through a standardized interface, so that searching, configuration and management of devices become simple and efficient, and users can obtain and manage PCIe devices more conveniently without worrying about the problem of chaotic mapping of devices.
Specifically, the BIOS enumerates all PCIe devices when the server is booted, and gathers PCIE SWITCH device logical slot information provided by the firmware. The BIOS then converts these logical slots to sequential legible Slot IDs and sends them to the baseboard management controller via IPMI commands. When the operating system is started, the operating system acquires the distributed PCIe information resources and provides the PCIe information resources for a user through a kernel mode or user mode interface. Thus, the user can conveniently acquire and manage the PCIe devices with the uniform Slot IDs through the built-in tool or the special tool of the operating system. The step greatly simplifies the complexity of equipment management and improves the management efficiency by a standardized information transmission mode, thereby realizing unified management and configuration of PCIe equipment.
Based on steps S101 to S102, the embodiment proposes a unified ordering method for the problem of disordered ordering of device information in PCIE SWITCH technology, and the method maps the line or physical Slot connected with the PCIe device to the logic Slot according to the current wiring mode and working mode of PCIE SWITCH through intervention of PCIE SWITCH bottom firmware, so that the device can be uniformly mapped to the logic Slot no matter the specification model, wiring mode or working mode of PCIE SWITCH, so that the disordered ordering of the PCIe device originally caused by various complex conditions is carded into a simple and clear unified order and presented in the form of a Slot ID of the PCIe device, and thus the problems of device identification and compatibility caused by the specification model of PCIE SWITCH and the diversification of functions and different wiring modes and working modes are effectively solved. And the mapping result is provided for the operating system and the baseboard management controller through standardized interfaces, so that the searching, configuration and management of the equipment become simple and efficient, and a user can acquire and manage PCIe equipment more conveniently without worrying about the problem of chaotic mapping of the equipment.
A unified ordering method applicable to the different types PCIE SWITCH of connection devices described in the above embodiments is further described below.
Further optionally, in step S101, the step of mapping the line or physical slot connected to the PCIe device to the logical slot according to the current wiring mode and the working mode of PCIE SWITCH includes:
Acquiring a current PCIE SWITCH wiring mode according to the received GPIO signal, and judging a current working mode according to a PCIESWITCH self state mechanism;
Entering different code branches according to the current PCIE SWITCH wiring mode;
In different code branches, the line or physical slot to which the PCIe device is connected is mapped to a logical slot according to the current PCIE SWITCH mode of operation.
As shown in fig. 2, based on this step, in the step of mapping the line or physical slot connected to the PCIe device to the logical slot according to the current PCIE SWITCH wiring Mode and working Mode, the PCIE SWITCH bottom firmware obtains the current PCIE SWITCH wiring Mode by receiving the GPIO signal, determines the current working Mode according to the PCIESWITCH own state mechanism, then enters the corresponding code processing branch according to the obtained wiring Mode information, and finally, in these specific code branches, in combination with the current working Mode of PCIE SWITCH, for example, the Base Mode or the integrated Mode (SYNTHETIC MODE), the line or physical slot connected to the PCIe device can be accurately mapped to the logical slot. The process simplifies the complex physical connection relationship into a clear logic structure, ensures that the equipment can be uniformly mapped onto the logic slot position no matter the specification model, the wiring mode or the working mode of PCIE SWITCH, and is convenient for subsequent equipment management and configuration.
Further optionally, before the step of obtaining the current PCIE SWITCH connection mode according to the received GPIO signal and determining the current working mode according to the PCIE SWITCH own state mechanism, the method further includes:
On PCIE SWITCH boards, the current PCIE SWITCH wiring mode is judged through hardware logic and is transmitted to PCIE SWITCH FW through GPIO signals.
Based on this step, on PCIE SWITCH boards, the current PCIE SWITCH wiring mode is determined by hardware logic, and once the determination is completed, this result is immediately transmitted to the PCIE SWITCH Firmware (FW) by way of GPIO signals, so that the PCIE SWITCH firmware can accurately determine PCIE SWITCH the current wiring mode according to the received GPIO signals, providing an accurate information basis for ordering of subsequent PCIe devices, and ensuring that subsequent steps can be performed based on the accurate wiring mode.
Further optionally, the step of mapping the line or physical slot to which the PCIe device is connected to the logical slot according to the current working mode PCIE SWITCH includes:
PCIE SWITCH include a basic mode or a comprehensive mode;
Judging the current PCIE SWITCH working mode;
If the current PCIE SWITCH is in the basic mode, mapping the line connected with the PCIe device to a logic slot;
If the current PCIE SWITCH is in the integrated mode, the physical slot in which the PCIe device is located is translated to a logical slot.
Based on the step of mapping the line or physical slot to which the PCIe device is connected to the logical slot according to the current operation mode of PCIE SWITCH, PCIE SWITCH FW first determines what operation mode is currently in PCIE SWITCH, whether the basic mode is a comprehensive mode, and if PCIE SWITCH is operated in the basic mode, the line to which the PCIe device is directly connected is mapped to the corresponding logical slot. If PCIE SWITCH is in the integrated mode, the physical slots occupied by the PCIe device are translated and mapped to logical slots. The key of this mapping process is that it ensures that the connection information of the PCIe device can be mapped to the logical slots accurately no matter what mode PCIE SWITCH is in, so that the user can obtain and manage the PCIe device information more conveniently and accurately.
Further optionally, the step of entering a different code branch according to the current PCIE SWITCH wiring mode includes:
The wiring modes of PCIE SWITCH include, but are not limited to, balanced mode, universal mode, or cascade mode.
It is appreciated that in the step of PCIE SWITCH FW identifying the current platform's wiring Mode from the GPIO signals, PCIE SWITCH may support multiple wiring modes including balanced Mode (Balance Mode), common Mode (Common Mode) and Cascade Mode (Cascade Mode). These wiring patterns determine how PCIE SWITCH FW enters the different code processing branches. Specifically, once PCIE SWITCHFW determines the current wiring mode via the GPIO signal, it selects the corresponding code branch to continue with subsequent operations. Under each wiring mode, PCIE SWITCH FW needs to further determine the working state of the device, such as a basic mode or a comprehensive mode, and map the circuit or the physical slot connected with the PCIe device to the logic slot according to the working state, so as to ensure that the PCIe device can realize unified ordering and management under various wiring and working modes.
As shown in fig. 4, taking PCIE SWITCH operation scenario of the simplest single-path server as an example, the CPU is connected to an upstream port (up stream port) of PCIE SWITCH, and a downstream port (down stream port) of PCIE SWITCH is connected to various types PCIE DEVICE.
Taking the most common two-way server as an example, under the two-way server, the working scenario may be selected as follows:
Fig. 5 is a connection mode of the PCIe network in the balanced mode. The connection mode of the balanced mode is that two CPUs are respectively connected with a plurality of PCIe devices through two PCIE SWITCH. By letting the two CPUs independently manage a part of PCIe devices, the processing capacity and the uniform distribution of I/O requests are ensured, and the balanced distribution of loads is realized.
Fig. 6 is a connection mode of the PCIe network in the general mode. The general mode is a connection mode in which one CPU is connected to two PCIE SWITCHES, and a plurality of PCIe devices are connected below each PCIE SWITCH. The general mode of wiring enables the CPU to directly access the devices on the two PCIE SWITCH, and device data transmission does not need to be performed across the CPUs.
Fig. 7 is a connection mode of the PCIe network in the cascade mode. The cascaded mode is where the CPU is connected to another PCIE SWITCH through one PCIESWITCH to extend the coverage of the PCIe network. The CPU can access the devices connected to PCIE SWITCH through PCIE SWITCH a1, realizing cascade access of the devices.
Further optionally, in step 102, the step of providing the mapping result to the operating system and the baseboard management controller through a standardized interface includes:
during the starting process of the server platform, enumerating all PCIe devices through the BIOS, and acquiring all PCIe information including the PCIe device logic slot information provided by PCIESWITCH FW;
Converting logic slots of PCIe equipment into Slot ID numbers with easily readable sequences through BIOS, and sending the final Slot ID numbers to a baseboard management controller in an IPMI command mode for use after an operating system is started;
the operating system is guided to start through the BIOS, and after the operating system is started, PCIe information resources distributed in the BIOS stage are obtained and provided for interfaces in kernel mode or user mode so as to be obtained by a user through an operating system tool or an ipmitool tool.
As shown in FIG. 3, based on the step, the consistency of PCIe device information between the operating system and the baseboard management controller is ensured, the operation and maintenance work is effectively simplified, and the overall maintainability of the system is improved. Firstly, through hardware logic judgment of PCIE SWITCH boards and logic processing of PCIE SWITCH firmware, the system can accurately identify and adapt to different wiring modes and working states. Then, the BIOS enumerates the PCIe devices comprehensively in the starting process to acquire all PCIe information including the logic Slot information of the PCIe devices provided by PCIE SWITCH FW, and converts the logic Slot information of the PCIe devices into Slot IDs which are easy to read in sequence, so that the accuracy and the readability of the device information are ensured. Finally, the operating system provides an interface for the user to obtain such information, enabling the operation and maintenance personnel to conveniently manage and identify the device. The series of processes not only unify the processing modes of different PCIE SWITCH models, working states and wiring modes, but also output through the consistent interface modes, thereby greatly reducing the complexity of operation and maintenance and improving the reliability and usability of the system.
The following is a specific implementation step of a unified ordering method applicable to the connection devices of different types PCIE SWITCH in this embodiment, where the specific implementation step is as follows:
On PCIE SWITCH board, the connection mode and working state of PCIE SWITCH are judged by hardware logic, and corresponding GPIO signals are controlled and output according to the judging result.
PCIE SWITCH firmware receives the GPIO signal and obtains the current PCIE SWITCH connection mode accordingly, and determines the current working mode according to PCIE SWITCH own state mechanism, and according to the connection mode, PCIESWITCH firmware enters different code branches to further determine the current working state. Mapping Lane connected with PCIe equipment to a logic slot in a basic mode; in the integrated mode, the physical slot in which the PCIe device resides is then translated to a logical slot.
When a server platform equipped with PCIE SWITCH is powered on, the BIOS will enumerate all PCIe devices during the boot process and collect all PCIe information including PCIe device logical slot information provided by PCIE SWITCH firmware. The BIOS then converts these logical slots into sequential legible Slot ID numbers and sends them to the Baseboard Management Controller (BMC) via IPMI commands.
Under the guidance of BIOS, the operating system starts and obtains PCIe information resource distributed in BIOS stage. This information is then provided in the form of a kernel-mode or user-mode interface so that the sequential Slot IDs of PCIe devices on PCIE SWITCH are also available through this type of interface. The user may use an operating system self-contained tool (e.g., lspci) or an ipmitool tool to obtain Slot ID and other PCIe information through the BMC.
A user can conveniently acquire the Slot ID and other related information of the PCIe device through an interface or an ipmitool tool provided by an operating system. The information can be used for tasks such as equipment identification, management, fault removal and the like, so that operation and maintenance work is simplified and the overall maintainability of the system is improved.
Based on the specific implementation steps, through unified ordering of PCIe devices, the disordered PCIE DEVICE shown by the complicated connection mode and the working mode of the bottom layer is ordered and carded into the PCIE DEVICE Slot ID of the simple and clear unified order, and the PCIE DEVICE Slot ID is provided for an operating system and a baseboard management controller, so that the problems of confusion and identification caused by different specifications and wiring modes when a user manages the PCIe devices are solved, and the efficiency and convenience of system management are remarkably improved.
Noun explanation of the present embodiment:
PCIe: PERIPHERAL COMPONENT INTERCONNECT EXPRESS is an abbreviation for high speed serial computer expansion bus protocol.
PCIE DEVICE and PCIe device: both terms are synonymous and refer to various types of devices connected via a PCIe bus, such as GPUs (graphics processors), NVMe SSDs (nonvolatile memory solid state drives), NICs (network interface cards), and the like.
PCIE SWITCH: is a hardware device for connecting multiple PCIe devices, which enables these devices to directly exchange data, thereby greatly improving the efficiency of data transmission.
PCIE SWITCH FW: is PCIE SWITCH Firmware (Firmware), a software program on PCIE SWITCH device. Is responsible for controlling and managing various functions and behaviors of PCIE SWITCH and ensures the normal operation of the equipment.
Slot ID: is a logical slot identifier mapped out by the PCIe device in the operating system. The PCIe devices are conveniently identified and managed by the user so that each device has a unique identity.
IPMI: is a command protocol for communicating with the BMC. Allowing a system administrator to monitor and control the server hardware, including querying hardware status, setting alarms, etc.
Ipmitool tool: is a tool dedicated to communication with a BMC (baseboard management controller). Allowing a user to manage the hardware state of the server through a command line interface provides powerful hardware monitoring and management functions.
BIOS: is an abbreviation for Basic Input/Output System. The first software component loaded by the computer in the starting process is mainly responsible for initializing hardware and loading an operating system.
GPU: graphics Processing Unit, meaning a graphics processor.
Nvme: the abbreviation of Non-Volatile Memory Express is a storage protocol.
SSD: the abbreviation of Solid STATE DRIVE means Solid state disk.
NIC: the abbreviation Network INTERFACE CARD means Network interface card.
OS: the abbreviation of Operating System means Operating System.
GPIO: general Purpose Input/Output abbreviations, meaning general purpose input Output.
BMC: baseboard Management Controller, meaning baseboard management controllers.
Further, referring to fig. 8, the present invention further provides a unified ordering system applicable to different types PCIE SWITCH of connection devices, for implementing the above unified ordering method applicable to different types PCIE SWITCH of connection devices, applied to PCIE SWITCH FW, including:
Logical slot mapping module: the logic slot mapping module is used for mapping a circuit or a physical slot connected with the PCIe equipment to the logic slot according to the current PCIE SWITCH wiring mode and the working mode;
And the equipment unified management module: the mapping result is provided to the operating system and the baseboard management controller through standardized interfaces so as to realize unified management and configuration of PCIe equipment.
Further, the logical slot mapping module is further configured to:
Acquiring a current PCIE SWITCH wiring mode according to the received GPIO signal, and judging a current working mode according to a PCIESWITCH self state mechanism;
Entering different code branches according to the current PCIE SWITCH wiring mode;
In different code branches, the line or physical slot to which the PCIe device is connected is mapped to a logical slot according to the current PCIE SWITCH mode of operation.
Further, the logical slot mapping module is further configured to:
On PCIE SWITCH boards, the current PCIE SWITCH wiring mode is judged through hardware logic and is transmitted to PCIE SWITCH FW through GPIO signals.
Further, the logical slot mapping module is further configured to:
PCIE SWITCH include a basic mode or a comprehensive mode;
Judging the current PCIE SWITCH working mode;
If the current PCIE SWITCH is in the basic mode, mapping the line connected with the PCIe device to a logic slot;
If the current PCIE SWITCH is in the integrated mode, the physical slot in which the PCIe device is located is translated to a logical slot.
Further, the logical slot mapping module is further configured to:
The wiring modes of PCIE SWITCH include, but are not limited to, balanced mode, universal mode, or cascade mode.
Further, the device unified management module is further configured to:
during the starting process of the server platform, enumerating all PCIe devices through the BIOS, and acquiring all PCIe information including the PCIe device logic slot information provided by PCIESWITCH FW;
Converting logic slots of PCIe equipment into Slot ID numbers with easily readable sequences through BIOS, and sending the final Slot ID numbers to a baseboard management controller in an IPMI command mode for use after an operating system is started;
the operating system is guided to start through the BIOS, and after the operating system is started, PCIe information resources distributed in the BIOS stage are obtained and provided for interfaces in kernel mode or user mode so as to be obtained by a user through an operating system tool or an ipmitool tool.
The foregoing examples illustrate only a few embodiments of the invention and are described in detail herein without thereby limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (7)
1. A unified ordering method applicable to different types PCIE SWITCH of connected devices, applied to PCIE SWITCH FW, the method comprising:
mapping a circuit or a physical slot connected with PCIe equipment to a logic slot according to the current PCIE SWITCH wiring mode and the working mode;
and providing the mapping result to an operating system and a baseboard management controller through a standardized interface so as to realize unified management and configuration of PCIe equipment.
2. The unified ordering method for different types PCIE SWITCH of connected devices according to claim 1, wherein the step of mapping the line or physical slot to which the PCIe device is connected to the logical slot according to the current PCIE SWITCH wiring mode and the operation mode includes:
acquiring a current PCIE SWITCH wiring mode according to the received GPIO signal, and judging a current working mode according to a PCIE SWITCH self state mechanism;
Entering different code branches according to the current PCIE SWITCH wiring mode;
In different code branches, the line or physical slot to which the PCIe device is connected is mapped to a logical slot according to the current PCIE SWITCH mode of operation.
3. The unified sequencing method applicable to different types PCIE SWITCH of connected devices according to claim 2, wherein before the step of obtaining the current PCIE SWITCH wiring mode according to the received GPIO signal and determining the current working mode according to the PCIE SWITCH own state mechanism, the method further comprises:
On PCIE SWITCH boards, the current PCIE SWITCH wiring mode is judged through hardware logic and is transmitted to PCIE SWITCH FW through GPIO signals.
4. The unified ordering method for different types PCIE SWITCH of connected devices according to claim 2, wherein the step of mapping the line or physical slot to which the PCIe device is connected to the logical slot according to the current PCIE SWITCH mode of operation includes:
PCIE SWITCH include a basic mode or a comprehensive mode;
Judging the current PCIE SWITCH working mode;
If the current PCIE SWITCH is in the basic mode, mapping the line connected with the PCIe device to a logic slot;
If the current PCIE SWITCH is in the integrated mode, the physical slot in which the PCIe device is located is translated to a logical slot.
5. The unified sequencing method for different types PCIE SWITCH of connected devices according to claim 2, said step of entering different code branches according to the current PCIE SWITCH wiring mode:
The wiring modes of PCIE SWITCH include, but are not limited to, balanced mode, universal mode, or cascade mode.
6. The unified sequencing method for different types PCIE SWITCH of connected devices according to claim 1, wherein the step of providing the mapping results to the operating system and baseboard management controller through standardized interfaces includes:
During the starting process of the server platform, enumerating all PCIe devices through the BIOS, and acquiring all PCIe information including the PCIe device logic slot information provided by PCIE SWITCH FW;
Converting logic slots of PCIe equipment into SlotID numbers with easily readable sequence through BIOS, and sending the final Slot ID numbers to a baseboard management controller in an IPMI command mode for use after an operating system is started;
the operating system is guided to start through the BIOS, and after the operating system is started, PCIe information resources distributed in the BIOS stage are obtained and provided for interfaces in kernel mode or user mode so as to be obtained by a user through an operating system tool or an ipmitool tool.
7. A unified sequencing system applicable to different types PCIE SWITCH of connected devices, applied to PCIE SWITCH FW, comprising:
Logical slot mapping module: the logic slot mapping module is used for mapping a circuit or a physical slot connected with the PCIe equipment to the logic slot according to the current PCIE SWITCH wiring mode and the working mode;
And the equipment unified management module: the mapping result is provided to the operating system and the baseboard management controller through standardized interfaces so as to realize unified management and configuration of PCIe equipment.
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