CN118631237A - High-speed transmitter and serial data transmitter circuit - Google Patents
High-speed transmitter and serial data transmitter circuit Download PDFInfo
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Abstract
The application discloses a high-speed transmitter and a serial data transmitter circuit, which relate to the technical field of signal transmission circuit design, wherein the high-speed transmitter comprises a signal transmission unit, and the signal transmission unit comprises: the signal receiving and transmitting module is used for transmitting the input target signal; and the input end of the first power tube is used for receiving the input target voltage, and the output end of the first power tube is connected with the power supply end of the signal receiving and transmitting module. According to the technical scheme, the first power tube is arranged in the signal transmission unit, the first power tube is controlled to supply power to the signal receiving and transmitting module according to the target voltage input by the input end of the first power tube, and meanwhile, the characteristic that the power tube has lower on resistance is combined, so that the voltage drop of the power supply end of the signal receiving and transmitting module can be reduced by arranging the first power tube, and the normal voltage supply requirement during high-speed serial link transmission can be met.
Description
Technical Field
The present application relates to the field of signal transmission circuit design, and in particular, to a high-speed transmitter and a serial data transmitter circuit.
Background
Hstx (High Speed Transmitter) is a high-speed transmitter, is an important device widely applied in the fields of communication, data transmission and the like, and has the characteristics of high speed, high stability, multifunction and the like.
The high-speed transmitter provided in the related art receives parallel data from a digital system. These data are converted into a serial data stream by a series of processes within the high-speed transmitter for transmission over the high-speed serial link. A Serializer (Serializer) is typically used to implement this conversion. The serializer is composed of a plurality of shift registers, each of which corresponds to one data bit. Under the control of a clock signal, the shift register sequentially outputs data according to bits to form a serial data stream.
However, in the above related art, when the serial data stream is transmitted based on the high-speed serial link, since the power supply ends of the transmission units of the high-speed serial link are scattered, the on-line voltage drop of the high-speed serial link during voltage supply will increase, so that the normal voltage supply requirement during the transmission of the high-speed serial link cannot be normally met.
Disclosure of Invention
In order to solve the above technical problems, embodiments of the present application provide a high-speed transmitter and a serial data transmitter circuit.
According to an aspect of an embodiment of the present application, there is provided a high-speed transmitter including a signal transmission unit including: the signal receiving and transmitting module is used for transmitting the input target signal; and the input end of the first power tube is used for receiving the input target voltage, and the output end of the first power tube is connected with the power supply end of the signal receiving and transmitting module.
In some embodiments of the present application, based on the above technical solution, there are a plurality of signal transmission units, and a plurality of signal transmission units are connected in series to form a transmission link.
In some embodiments of the present application, based on the above technical solutions, the high-speed transmitter further includes a first operational amplifier circuit and a second power tube; the output end of the first operational amplifier circuit is respectively connected with the input end of the second power tube and the input end of the first power tube, and the output end of the second power tube is connected with the output end of the first power tube; the input end of the first operational amplifier circuit is used for receiving an input reference voltage so as to convert the reference voltage into the target voltage.
In some embodiments of the present application, based on the above technical solution, the first operational amplifier includes a first amplifier, and the first amplifier includes a non-inverting input terminal and an inverting input terminal; the non-inverting input end of the first amplifier is used for receiving the reference voltage; and the inverting input end of the first amplifier is connected with the output end of the second power tube.
In some embodiments of the present application, based on the above technical solutions, the high-speed transmitter further includes a first voltage stabilizing capacitor; one end of the first voltage stabilizing capacitor is connected with the output end of the first operational amplifier circuit, and the other end of the first voltage stabilizing capacitor is grounded.
In some embodiments of the present application, based on the above technical solutions, the high-speed transmitter further includes a first voltage stabilizing resistor; one end of the first voltage stabilizing resistor is connected with the output end of the second power tube, and the other end of the first voltage stabilizing resistor is grounded.
In some embodiments of the present application, based on the above technical solution, the signal transmission unit further includes a second operational amplifier circuit; the output end of the second operational amplifier circuit is connected with the input end of the first power tube; the input end of the second operational amplifier circuit is used for receiving the input reference voltage so as to convert the reference voltage into the target voltage.
In some embodiments of the present application, based on the above technical solution, the second operational amplifier includes a second amplifier, and the second amplifier includes a non-inverting input terminal and an inverting input terminal; the non-inverting input end of the second amplifier is used for receiving the reference voltage; and the inverting input end of the second amplifier is connected with the output end of the first power tube.
In some embodiments of the present application, based on the above technical solution, the signal transmission unit further includes a second voltage stabilizing capacitor; one end of the second voltage stabilizing capacitor is connected with the output end of the second operational amplifier circuit, and the other end of the second voltage stabilizing capacitor is grounded.
According to another aspect of the embodiments of the present application, there is provided a serial data transmitter circuit including the high-speed transmitter described in the above embodiments.
In the technical scheme of the embodiment of the application, the following beneficial effects can be brought by the application content:
The first power tube is arranged in the signal transmission unit, the first power tube is controlled to supply power to the signal receiving and transmitting module according to the target voltage input by the input end of the first power tube, and meanwhile, the characteristic of lower on resistance of the power tube is combined, so that the voltage drop of the power supply end of the signal receiving and transmitting module can be reduced by arranging the first power tube, and the normal voltage supply requirement during high-speed serial link transmission can be met.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application. It is evident that the drawings in the following description are only some embodiments of the present application and that other drawings may be obtained from these drawings without inventive effort for a person of ordinary skill in the art. In the drawings:
fig. 1 is a schematic diagram showing an overall circuit configuration of a signal transmission unit in a high-speed transmitter according to an exemplary embodiment of the present application.
Fig. 2 is a schematic diagram showing a partial circuit configuration of a transmission link in a high-speed transmitter according to an exemplary embodiment of the present application.
Fig. 3 is a schematic diagram showing an overall circuit configuration of a high-speed transmitter according to an exemplary embodiment of the present application.
Fig. 4 is a schematic diagram showing an overall circuit configuration of a high-speed transmitter according to another exemplary embodiment of the present application.
Fig. 5 is a schematic diagram showing an overall circuit configuration of a signal transmission unit in a high-speed transmitter according to another exemplary embodiment of the present application.
Fig. 6 is a schematic diagram showing an overall circuit configuration of a signal transmission unit in a high-speed transmitter according to still another exemplary embodiment of the present application.
Fig. 7 is a schematic diagram showing an overall circuit configuration of a transmission link in a high-speed transmitter according to another exemplary embodiment of the present application.
The following description is made with reference numerals in the drawings:
100. A signal transmission unit; 110. a signal receiving and transmitting module; 120. a first power tube; 130. a second operational amplifier circuit; 1301. a second amplifier; 1302. a second voltage stabilizing capacitor; 1303. a second voltage stabilizing resistor; 200. a transmission link; 300. a first operational amplifier circuit; 310. a first amplifier; 320. a first voltage stabilizing capacitor; 330. a first voltage stabilizing resistor; 400. a second power tube;
In the figure, vctrl is represented as a target voltage, and may also be represented as a voltage signal at an output end of the first operational amplifier circuit or the second operational amplifier circuit; vcomm is the voltage signal of the output end of the first power tube or the voltage signal of the output end of the second power tube; vp is denoted as the supply voltage for each electronic component.
Detailed Description
For the purposes of making the objects and embodiments of the present application more apparent, an exemplary embodiment of the present application will be described in detail below with reference to the accompanying drawings in which exemplary embodiments of the present application are illustrated, it being apparent that the exemplary embodiments described are only some, but not all, of the embodiments of the present application.
It should be noted that the brief description of the terminology in the present application is for the purpose of facilitating understanding of the embodiments described below only and is not intended to limit the embodiments of the present application. Unless otherwise indicated, these terms should be construed in their ordinary and customary meaning.
The terms first, second, third and the like in the description and in the claims and in the above-described figures are used for distinguishing between similar or similar objects or entities and not necessarily for describing a particular sequential or chronological order, unless otherwise indicated. It is to be understood that the terms so used are interchangeable under appropriate circumstances.
The terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a product or apparatus that comprises a list of elements is not necessarily limited to all elements explicitly listed, but may include other elements not expressly listed or inherent to such product or apparatus.
It should be noted that: references herein to "a plurality" means two or more. "and/or" describes an association relationship of an association object, meaning that there may be three relationships, e.g., a and/or B may represent: a exists alone, A and B exist together, and B exists alone. The character "/" generally indicates that the context-dependent object is an "or" relationship.
Fig. 1 is a schematic diagram showing an overall circuit configuration of a signal transmission unit in a high-speed transmitter according to an exemplary embodiment of the present application. As shown in fig. 1, the high-speed transmitter provided by the present application may include a signal transmission unit 100.
A signal transceiver module 110 for transmitting an input target signal is provided inside the signal transmission unit 100.
Illustratively, a high-speed serial data transmission link is provided in the high-speed serial data transmitter, and the signal transmission unit 100 represents one transmission unit of the high-speed serial data transmission link. Such as optical fiber, coaxial cable, twisted pair, etc., and transmits differential signals over a high-speed serial link.
The signal transceiver module 110 may also include a clock recovery circuit (Clock Recovery Circuit) that is responsible for extracting the clock signal at the transmit end from the received serial data stream and synchronizing it into the clock domain at the receive end.
Among them, there are various implementations of the clock recovery circuit, such as a Phase Locked Loop (PLL) -based clock recovery circuit, a delay line (DLL) -based clock recovery circuit, and the like.
Based on the above clock recovery circuit, it is ensured that data transmission between the transmitting side and the receiving side can be performed at a predetermined timing.
The signal transmission unit 100 provided by the present application may include a first power tube 120.
Specifically, the first power tube 120 may be an NMOS power tube or a PMOS power tube, and the connection of the circuit is adaptively adjusted based on the specific selection of the first power tube 120.
The first power tube 120 of the present application is disposed inside the signal transmission unit 100.
The input end of the first power tube 120 is used for receiving an input target voltage; the output end of the first power tube 120 is connected with the power supply interface of the signal transceiver module 110, so as to supply power to the signal transceiver module 110 after the target voltage is input to the input end of the first power tube 120.
Taking an NMOS power tube as an example for explanation, the NMOS power tube has small on-resistance and low switching loss; the structure is simple, and the manufacturing cost is low; high integration level, easy integration with other elements, etc. The NMOS power tube has a faster switching speed, is suitable for high-frequency application, and has lower switching loss and operating temperature due to small on-resistance.
Further exemplary description is made in connection with NMOS power transistors in the prior art, for example, NMOS power transistor with signal HKTD N03, which is an existing low power NMOS product with very excellent electrical characteristics. For example, if the drain-source voltage is 30V, the gate-source voltage is 20V, the continuous drain current can reach 90A, and the drain-source on-resistance is only 0.0052Ω.
Through the above embodiment, the first power tube 120 is disposed in the signal transmission unit 100, and the first power tube 120 is controlled to perform power supply on the signal transceiver module 110 according to the target voltage input by the input end of the first power tube 120, and meanwhile, the characteristic of low on-resistance of the power tube is combined, so that the voltage drop of the power supply end of the signal transceiver module 110 can be reduced by disposing the first power tube 120, thereby being capable of meeting the normal voltage supply requirement during high-speed serial link transmission.
It should be noted that, if there is a large voltage drop at the power supply end of the signal transceiver module 110, the output swing of the high-speed transmitter may be reduced; therefore, the first power tube 120 reduces the voltage drop of the power supply terminal of the signal transceiver module 110, and at the same time, the output swing of the high-speed transmitter can be reduced.
In some embodiments of the present application, based on the foregoing embodiment, fig. 2 is a schematic diagram of a partial circuit structure of a transmission link in a transmitter according to an exemplary embodiment of the present application. As shown in fig. 2, there may be a plurality of signal transmission units 100, and a plurality of signal transmission units 100 are connected in series to form a transmission link 200. I.e. the high-speed serial data transmission link as shown in the above embodiments.
In particular, the transmission link 200 formed by means of a serial connection mainly relates to the transmission and reception process of data and the associated signal processing and synchronization mechanism.
The serial transmission link 200 generally includes two major parts, namely a transmitting end Transmitter and a receiving end (Receiver). The high speed transmitter is responsible for converting parallel data into serial data and transmitting it onto the transmission line, and the receiver is responsible for receiving serial data from the transmission line and converting it back into parallel data.
Meanwhile, the transmission link 200 converts low-speed parallel data into high-speed serial data using a clock signal provided by a Phase Locked Loop (PLL). Parallel-to-serial conversion is a key step in serial communications, which ensures that data can be transferred bit by bit in sequence.
On the one hand, with the above embodiment, the transmission link 200 formed by serially connecting the plurality of signal transmission units 100 can ensure the synchronism of signals, so that efficient and reliable serial communication transmission can be realized.
On the other hand, in the above embodiment, when the plurality of signal transmission units 100 are connected in series to form the transmission link 200, based on the above embodiment, the on-line voltage drop can be reduced by using the conduction characteristic of the first power tube 120 in the single signal transmission unit 100, so that when the plurality of signal transmission units 100 are connected in series to form the transmission link 200, the overall voltage drop reducing effect of the power supply end of the transmission link 200 is more obvious, and thus the power supply requirement of the transmission link 200 during data transmission can be better ensured.
In some embodiments of the present application, fig. 3 is a schematic diagram illustrating an overall circuit configuration of a high-speed transmitter according to an exemplary embodiment of the present application. As shown in fig. 3, the high-speed transmitter may further include a first operational amplifier circuit 300 and a second power tube 400 based on the above-described embodiments.
The output end of the first operational amplifier 300 is connected to the input end of the second power tube 400 and the input end of the first power tube 120, respectively, and the output end of the second power tube 400 is connected to the output end of the first power tube 120.
The input end of the first operational amplifier 300 is used for receiving the input reference voltage to convert the reference voltage into a target voltage.
Specifically, the basic structure for the first operational amplifier circuit 300 may include a differential input stage, a gain stage, and an output stage. The differential input stage is responsible for carrying out differential amplification on an input signal, the gain stage further amplifies the signal subjected to differential amplification, and the output stage converts the amplified signal into single-ended output.
Thus, the first operational amplifier circuit 300 may amplify the input signal by its high gain characteristic. In the inverting amplifier and the non-inverting amplifier, input signals are respectively connected to the input ends of the operational amplifier in different modes, and the amplification and the regulation of the signals are realized through a feedback network.
That is, after the reference voltage is input to the input terminal of the first operational amplifier 300, the reference voltage is amplified by the first operational amplifier 300, and then the amplified voltage signal is input to the second power tube 400 and the first power tube 120. Meanwhile, the signal transmission unit 100 is powered based on the voltage signal output from the second power tube 400 and the voltage signal output from the first power tube 120.
Because of the structural characteristics of the power tube, i.e., the power tube generally has low on-resistance, the power tube is excellent in low-voltage and high-current occasions. A lower on-resistance means less power loss in the on-state, thereby improving the efficiency of the circuit.
Through the above embodiment, the second power tube 400 disposed outside the signal transmission unit 100 can play a certain role in stabilizing the voltage signal input by the signal transmission unit 100, and then power the signal transmission unit 100 based on the voltage signal output by the first power tube 120 disposed inside, so as to better ensure the voltage stability of the power supply end of the signal transmission unit 100, and reduce the output swing of the high-speed transmitter.
In describing the present invention, it should be noted that the azimuth or positional relationship indicated by the terms vertical, upper, lower, horizontal, etc. are based on the azimuth or positional relationship shown in the drawings, and are merely for convenience of describing the present invention and simplifying the description, and do not indicate or imply that the apparatus or element referred to must have a specific azimuth configuration and operation in a specific azimuth, and thus should not be construed as limiting the present invention.
In addition, in the description of the present invention, it should be further noted that, unless the terms set, mounted, connected, and connected are defined and defined as being specifically defined and defined, they should be construed broadly, and may be, for example, fixedly connected, detachably connected, integrally connected, mechanically connected, electrically connected, directly connected, indirectly connected through an intermediate medium, or communicating between the two elements. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In some embodiments of the present application, based on the above embodiments, it should be noted that the high-speed transmitter of the present application may further include only the first operational amplifier circuit 300, and be connected to the first power tube 120 inside the signal transmission unit 100 through the first operational amplifier circuit 300.
Based on this, although the present embodiment has a certain difference in voltage stabilizing effect compared with the structure provided with the high-speed transmitter and further including the first operational amplifier circuit 300 and the second power tube 400, the present embodiment can effectively save hardware cost, and meanwhile, the first power tube 120 is used for internal power supply, so that the voltage stability of the power supply end of the signal transmission unit 100 can be better ensured, and the reduction of the output swing of the high-speed transmitter can be reduced.
In some embodiments of the present application, as shown in fig. 3, based on the first operational amplifier circuit 300 referred to in the above embodiments, the first operational amplifier circuit 300 includes a first amplifier 310, and the first amplifier 310 includes a non-inverting input terminal and an inverting input terminal.
The non-inverting input of the first amplifier 310 is for receiving a reference voltage;
the inverting input of the first amplifier 310 is connected to the output of the second power tube 400.
Specifically, by connecting the output terminal of the second power tube 400 with the inverting input terminal of the first amplifier 310, the voltage signal output by the second power tube 400 can be feedback-adjusted through the inverting input terminal of the first amplifier 310.
The positive end of the first operational amplifier circuit 300, that is, the positive input end of the first amplifier 310, the negative end of the first operational amplifier circuit 300, that is, the negative input end of the first amplifier 310, inputs the reference voltage to the positive input end of the first amplifier 310 during the use, when the output voltage increases, the signal of the voltage increase is fed back to the negative end of the first operational amplifier circuit 300 through the connection between the negative input end of the first amplifier 310 and the output end of the second power tube 400, at this time, the output through the first operational amplifier circuit 300 realizes the voltage decrease based on the feedback adjustment, and meanwhile, the voltage correspondingly output by the second power tube 400 also decreases due to the arrangement of the second power tube 400, so as to form the negative feedback adjustment.
Through the embodiment, the transmission stability of the electric signal can be improved, and the deviation from a normal working state caused by external interference or internal change is prevented. When the circuit signal is disturbed, the negative feedback can introduce an adjusting effect opposite to the disturbance direction, so that the influence of the disturbance on the system is reduced or eliminated. The stability and performance of the circuitry is maintained by reducing or counteracting adverse effects of internal or external changes to the system on the performance of the circuitry. Meanwhile, the adaptability and the robustness of the circuit system can be improved, and the applied circuit system can be ensured to keep a normal working state under various conditions.
In some embodiments of the present application, fig. 4 is a schematic diagram of the overall circuit structure of a high-speed transmitter according to another exemplary embodiment of the present application. As shown in fig. 4, the high-speed transmitter further includes a first voltage stabilizing capacitor 320 based on the high-speed transmitter related to the above embodiment.
One end of the first voltage stabilizing capacitor 320 is connected to the output end of the first operational amplifier 300, and the other end of the first voltage stabilizing capacitor 320 is grounded.
Specifically, based on the arrangement of the first voltage stabilizing capacitor 320 at the output end of the first operational amplifier circuit 300, high-frequency noise in the output voltage signal can be filtered, so that the interference amplitude is reduced, and the quality of signal transmission is improved. In a complex electronic environment, high-frequency noise and interference signals may have adverse effects on system performance, and the ground capacitance can effectively reduce the adverse factors in the use process by the filtering effect of the ground capacitance.
In addition, although the grounding capacitor does not directly participate in the voltage stabilizing process, in the circuit structure of the application, the voltage stabilizing effect can be indirectly realized through the cooperation of the grounding capacitor and other elements (such as resistance, inductance and the like). For example, in the power input/output section, the ground capacitor can stabilize the power supply voltage, reducing the voltage variation due to current fluctuation. In combination with the present embodiment, the first voltage stabilizing capacitor 320 is connected to the output terminal of the first operational amplifier 300, so as to stabilize the voltage signal output by the first operational amplifier 300.
In some embodiments of the present application, as shown in fig. 4, the high-speed transmitter further includes a first voltage stabilizing resistor 330 based on the high-speed transmitter related to the above embodiments.
One end of the first voltage stabilizing resistor 330 is connected to the output end of the second power tube 400, and the other end of the first voltage stabilizing resistor 330 is grounded.
Specifically, the second power tube 400 and other electronic components can be protected from current impact and voltage fluctuation based on the arrangement of the first voltage stabilizing resistor 330 at the output end of the second power tube 400, so as to prevent circuit damage. Meanwhile, the first voltage stabilizing resistor 330 is also helpful to reduce noise and interference of the circuit system, and improve stability and reliability of the output signal of the second power tube 400.
It should be noted that different types of power transistors (such as MOSFETs, IGBTs, etc.) have different electrical characteristics and output requirements, so the design of the ground resistance needs to be determined according to the specific power transistor type.
In some embodiments of the present application, fig. 5 is a schematic diagram illustrating an overall circuit structure of a signal transmission unit in a high-speed transmitter according to another exemplary embodiment of the present application. As shown in fig. 5, the signal transmission unit 100 may further include a second operational amplifier circuit 130 based on the above embodiment.
The output end of the second operational amplifier circuit 130 is connected with the input end of the first power tube 120;
The input end of the second operational amplifier circuit 130 is used for receiving the input reference voltage to convert the reference voltage into a target voltage.
It should be noted that, unlike the first operational amplifier circuit 300 in the above embodiment, the second operational amplifier circuit 130 is disposed inside the signal transmission unit 100.
Based on this, since the second operational amplifier circuit 130 is already provided inside the signal transmission unit 100, the first operational amplifier circuit 300 and the second power tube 400 are not required to be provided outside the high-speed transmitter in order to save hardware cost; of course, the second operational amplifier circuit 130, the first operational amplifier circuit 300, and the second power tube 400 may be simultaneously provided for the high-speed transmitter of the present application.
Through the above embodiment, the second operational amplifier circuit 130 disposed inside the signal transmission unit 100 is matched with the first power tube 120, so as to play a certain role in stabilizing the voltage signal input by the signal transmission unit 100, and supply power to the signal transmission unit 100 through the voltage signal output by the first power tube 120, thereby better ensuring the voltage stability of the power supply end of the signal transmission unit 100 and reducing the output swing of the high-speed transmitter.
In some embodiments of the present application, as shown in fig. 5, based on the second operational amplifier circuit 130 in the above embodiment, the second operational amplifier circuit 130 includes a second amplifier 1301, and the second amplifier 1301 includes a non-inverting input terminal and an inverting input terminal;
The non-inverting input of the second amplifier 1301 is for receiving a reference voltage;
the inverting input of the second amplifier 1301 is connected to the output of the first power tube 120.
Specifically, in accordance with the second amplifier 1301 externally provided in the above embodiment, the output end of the first power tube 120 is connected to the inverting input end of the second amplifier 1301, so that the voltage signal output by the first power tube 120 can be feedback-adjusted through the inverting input end of the second amplifier 1301.
The positive end of the second operational amplifier circuit 130, that is, the positive input end of the second amplifier 1301, the negative end of the second operational amplifier circuit 130, that is, the negative input end of the second amplifier 1301, inputs the reference voltage to the positive input end of the second amplifier 1301, when the output voltage increases, the signal of the voltage increase is fed back to the negative end of the second operational amplifier circuit 130 through the connection between the negative input end of the second amplifier 1301 and the output end of the first power tube 120, at this time, the output through the second operational amplifier circuit 130 realizes voltage reduction based on feedback adjustment, and meanwhile, the voltage output by the first power tube 120 correspondingly decreases due to the arrangement of the first power tube 120, so as to form negative feedback adjustment.
In a similar manner to the negative feedback adjustment of the first operational amplifier 300, in the above embodiment, when the circuit signal is disturbed, the negative feedback will introduce an adjustment opposite to the disturbance direction, so as to reduce or eliminate the influence of the disturbance on the system. The stability and performance of the circuitry is maintained by reducing or counteracting adverse effects of internal or external changes to the system on the performance of the circuitry. Meanwhile, the adaptability and the robustness of the circuit system can be improved, and the applied circuit system can be ensured to keep a normal working state under various conditions.
In some embodiments of the present application, fig. 6 is a schematic diagram illustrating an overall circuit structure of a signal transmission unit in a high-speed transmitter according to still another exemplary embodiment of the present application. As shown in fig. 6, based on the signal transmission unit 100 in the above embodiment, the signal transmission unit 100 further includes a second voltage stabilizing capacitor 1302.
One end of the second voltage stabilizing capacitor 1302 is connected with the output end of the second operational amplifier circuit 130, and the other end of the second voltage stabilizing capacitor 1302 is grounded.
Specifically, based on the arrangement of the second stabilizing capacitor 1302 at the output end of the second operational amplifier circuit 130, high-frequency noise in the output voltage signal can be filtered out, so as to reduce the interference amplitude and improve the quality of signal transmission. In a complex electronic environment, high-frequency noise and interference signals may have adverse effects on system performance, and the ground capacitance can effectively reduce the adverse factors in the use process by the filtering effect of the ground capacitance.
Similar to the first voltage stabilizing capacitor 320, in this embodiment, the second voltage stabilizing capacitor 1302 is connected to the output end of the second operational amplifier circuit 130, so as to play a certain role in stabilizing the voltage signal output by the second operational amplifier circuit 130.
In some embodiments of the present application, based on the signal transmission unit 100 in the above embodiment, the signal transmission unit 100 further includes a second voltage stabilizing resistor 1303;
One end of the second voltage stabilizing resistor 1303 is connected to the output end of the first power tube 120, and the other end of the second voltage stabilizing resistor 1303 is grounded.
The second voltage stabilizing resistor 1303 based on the output end of the first power tube 120 is configured in the same manner as the first voltage stabilizing resistor 330 in the above embodiment, so that the first power tube 120 and other electronic components can be protected from the impact of current and voltage fluctuation, and circuit damage can be prevented. Meanwhile, the second voltage stabilizing resistor 1303 is also helpful to reduce noise and interference of the circuit system, and improve stability and reliability of the output signal of the first power tube 120.
In some embodiments of the present application, based on the above embodiments, the present application also provides a serial data transmitter circuit comprising a high speed transmitter as disclosed in any of the above embodiments. Such as universal asynchronous receiver Transmitter UART (Universal Synchronous/Asynchronous Receiver/Transmitter), serial peripheral interface SPI (Serial Peripheral Interface), integrated circuit bus I2C (Inter-INTEGRATED CIRCUIT), and the like. Of course, the above examples are given by way of illustration only and not by way of limitation.
For the purpose of more clear and complete disclosure of the technical scheme of the present application, the following embodiments are further used for describing the whole technical scheme of the high-speed transmitter in detail.
In one embodiment of the present application, as shown in fig. 4, since the high-speed serial data transmitter generally implements serial data transmission through a link composed of a plurality of signal transmission units 100, the present embodiment is illustrated by taking the high-speed transmitter including a plurality of signal transmission units 100 as an example, and each signal transmission unit 100 is internally provided with a signal transceiver module 110 and a first power tube 120. The power supply end of the signal transceiver module 110 is connected to the output end of the first power tube 120.
The first operational amplifier circuit 300 and the second power tube 400 are also disposed outside the signal transmission module. The first operational amplifier circuit 300 includes a first amplifier 310, an output end of the first amplifier 310 is connected to an input end of a second power tube 400, an output end of the first amplifier 310 is further connected to an input end of the first power tube 120, an output end of the second power tube 400 is connected to an output end of the first power tube 120, and an output end of the second power tube 400 is further connected to an inverting input end of the first amplifier 310.
A first voltage stabilizing capacitor 320 connected to ground is also provided in series at the output of the first amplifier 310.
The output end of the second power tube 400 is further connected in series with a first voltage stabilizing resistor 330 grounded.
Based on the overall technical scheme of the above embodiment, the following description is made on the high-speed transmitter signal transmission process:
Inputting the reference voltage through a non-inverting input terminal of the first amplifier 310, and outputting a target voltage through an output terminal of the first amplifier 310; then, the common voltage is outputted through the output end of the second power tube 400; meanwhile, the target voltage turns on the first power tube 120, and combines the output voltage signal of the first power tube 120 with the common voltage to supply power to the signal transmission unit 100. The common voltage output from the output terminal of the second power tube 400 is also input as a feedback voltage to the inverting input terminal of the first amplifier 310, so as to realize feedback regulation.
In the present embodiment, the first operational amplifier circuit 300 and the second power tube 400, which are externally provided to the signal transmission unit 100, have one and only one, and the circuits formed by the combination thereof supply power to the plurality of signal transmission units 100, respectively.
Of course, in other embodiments of the present application, there may be a plurality of first operational amplifier circuits 300 and second power transistors 400 disposed outside the signal transmission unit 100.
For example, in the first case, there is a one-to-one manner, that is, one signal transmission unit 100 corresponds to a circuit structure formed by the first operational amplifier 300 and the second power transistor 400.
For another example, in the second case, the signal transmission units 100 are in a one-to-many form, that is, the signal transmission units 100 corresponding to the circuit structure formed by the first operational amplifier 300 and the second power tube 400 may be identical or different.
The second case is exemplified, for example, the plurality of signal transmission units 100 are divided into three groups, and the first group may be a circuit structure formed by one first operational amplifier circuit 300 and one second power tube 400 corresponding to the three signal transmission units 100; the second group may be a circuit structure formed by two signal transmission units 100 corresponding to a first operational amplifier circuit 300 and a second power tube 400; the third group may also be a circuit structure formed by two signal transmission units 100 corresponding to one first operational amplifier 300 and one second power tube 400.
It should be noted that, since the circuit structure formed by the first operational amplifier 300 and the second power tube 400 is disposed outside the signal transmission unit 100, the circuit occupation area of the signal transmission unit 100 can be saved, thereby saving the hardware cost.
In another embodiment of the present application, fig. 7 is a schematic diagram illustrating an overall circuit structure of a transmission link in a high-speed transmitter according to another exemplary embodiment of the present application. As shown in fig. 7, since the high-speed serial data transmitter generally transmits serial data through a link composed of a plurality of signal transmission units 100, the high-speed transmitter of this embodiment also includes a plurality of signal transmission units 100, and a signal transceiver module 110, a first power tube 120 and a second operational amplifier circuit 130 are disposed in each signal transmission unit 100. The power supply end of the signal transceiver module 110 is connected to the output end of the first power tube 120.
The second operational amplifier circuit 130 includes a second amplifier 1301, an output terminal of the second amplifier 1301 is connected to an input terminal of the first power tube 120, and an output terminal of the first power tube 120 is also connected to an inverting input terminal of the second amplifier 1301.
A second voltage stabilizing capacitor 1302 connected to ground is also provided in series with the output of the second amplifier 1301.
The output end of the first power tube 120 is further connected in series with a second voltage stabilizing resistor 1303 grounded.
Based on the overall technical scheme of the above embodiment, the following description is made on the high-speed transmitter signal transmission process:
Inputting the reference voltage through a non-inverting input terminal of the second amplifier 1301 and outputting a target voltage through an output terminal of the second amplifier 1301; meanwhile, the target voltage turns on the first power tube 120, and supplies power to the signal transmission unit 100 according to the output voltage signal of the first power tube 120. The output voltage signal of the output terminal of the first power tube 120 is also input as a feedback voltage to the inverting input terminal of the second amplifier 1301, so as to realize feedback adjustment.
In the present embodiment, the circuits formed by combining the first operational amplifier circuit 300 and the first power transistor 120, which are disposed inside the signal transmission unit 100, respectively supply power to the single signal transmission unit 100.
It should be noted that, since the second operational amplifier circuit 130 is disposed inside the signal transmission unit 100, the circuit occupation area of the signal transmission unit 100 is relatively larger than that of the previous embodiment, but at the same time, since the second operational amplifier circuit 130 is disposed inside the signal transmission unit 100, the integration level of the high-speed transmitter is higher, and the high-speed transmitter is durable and not easy to damage.
Meanwhile, in the drawings of the above embodiments of the present application, it should be noted that, in the drawings, block diagrams are illustrated, but not limited to, the positional relationship of electronic components, circuit structures, and corresponding connection relationships according to the various embodiments of the present application, and meanwhile, the inclusion relationships of modules or electronic components are merely illustrated by the above embodiments, and the drawings are not particularly limited.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
The foregoing description, for purposes of explanation, has been presented in conjunction with specific embodiments. The illustrative discussions above are not intended to be exhaustive or to limit the embodiments to the precise forms disclosed above. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles and the practical application, to thereby enable others skilled in the art to best utilize the embodiments and various embodiments with various modifications as are suited to the particular use contemplated.
Claims (10)
1. A high-speed transmitter comprising a signal transmission unit, the signal transmission unit comprising:
the signal receiving and transmitting module is used for transmitting the input target signal;
and the input end of the first power tube is used for receiving the input target voltage, and the output end of the first power tube is connected with the power supply end of the signal receiving and transmitting module.
2. The high-speed transmitter of claim 1, wherein the plurality of signal transmission units are connected in series to form a transmission link.
3. The high-speed transmitter of claim 2, further comprising a first op-amp circuit and a second power tube;
The output end of the first operational amplifier circuit is respectively connected with the input end of the second power tube and the input end of the first power tube, and the output end of the second power tube is connected with the output end of the first power tube;
the input end of the first operational amplifier circuit is used for receiving an input reference voltage so as to convert the reference voltage into the target voltage.
4. The high-speed transmitter of claim 3, wherein the first operational amplifier comprises a first amplifier, the first amplifier comprising a non-inverting input and an inverting input;
the non-inverting input end of the first amplifier is used for receiving the reference voltage;
and the inverting input end of the first amplifier is connected with the output end of the second power tube.
5. The high-speed transmitter of claim 3, further comprising a first voltage stabilizing capacitor;
one end of the first voltage stabilizing capacitor is connected with the output end of the first operational amplifier circuit, and the other end of the first voltage stabilizing capacitor is grounded.
6. The high-speed transmitter of claim 3, further comprising a first voltage regulator resistor;
one end of the first voltage stabilizing resistor is connected with the output end of the second power tube, and the other end of the first voltage stabilizing resistor is grounded.
7. The high-speed transmitter of claim 2, wherein the signal transmission unit further comprises a second op-amp circuit;
the output end of the second operational amplifier circuit is connected with the input end of the first power tube;
the input end of the second operational amplifier circuit is used for receiving the input reference voltage so as to convert the reference voltage into the target voltage.
8. The high-speed transmitter of claim 7, wherein the second operational amplifier comprises a second amplifier, the second amplifier comprising a non-inverting input and an inverting input;
the non-inverting input end of the second amplifier is used for receiving the reference voltage;
And the inverting input end of the second amplifier is connected with the output end of the first power tube.
9. The high-speed transmitter of claim 7, wherein the signal transmission unit further comprises a second stabilizing capacitor;
one end of the second voltage stabilizing capacitor is connected with the output end of the second operational amplifier circuit, and the other end of the second voltage stabilizing capacitor is grounded.
10. A serial data transmitter circuit comprising a high speed transmitter as claimed in any one of claims 1 to 9.
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| CN202411098858.6A CN118631237A (en) | 2024-08-12 | 2024-08-12 | High-speed transmitter and serial data transmitter circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202411098858.6A CN118631237A (en) | 2024-08-12 | 2024-08-12 | High-speed transmitter and serial data transmitter circuit |
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| CN202411098858.6A Pending CN118631237A (en) | 2024-08-12 | 2024-08-12 | High-speed transmitter and serial data transmitter circuit |
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| JPH0991984A (en) * | 1995-09-25 | 1997-04-04 | Nikon Corp | Integrated circuit device |
| US20070217564A1 (en) * | 2006-03-15 | 2007-09-20 | Mitsubishi Electric Corporation | Shift register and image display apparatus containing the same |
| CN103531167A (en) * | 2013-10-23 | 2014-01-22 | 天利半导体（深圳）有限公司 | Serial/parallel data control circuit |
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