CN118626411A - Data read-write method, device, system and storage medium based on sliding FFT - Google Patents
Data read-write method, device, system and storage medium based on sliding FFT Download PDFInfo
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Abstract
The invention discloses a data read-write method, device and system based on sliding FFT and a storage medium, and relates to the technical field of sliding FFT. The method comprises the following steps of: after receiving the external data, writing the external data into a first memory; reading target external data to be processed in a first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the sliding FFT operation final operation result from a second memory which currently stores the sliding FFT operation final operation result through an external module. By the method, the time required by sliding FFT operation can be reduced.
Description
Technical Field
The present invention relates to the technical field of sliding FFT (Fast Fourier Transform ), and in particular, to a data read-write method, apparatus, system and storage medium based on sliding FFT.
Background
FFT is one of the indispensable tools in the field of communication and signal processing, and transforms a signal from the time domain to the frequency domain, so that the relevant characteristics of the signal can be easily analyzed in the frequency domain. For a sliding FFT of N points, every sliding N points is performed with FFT, N is any value between 1 and N, i.e. the number of data updated each time of the input data of the sliding FFT is smaller than the number of points of the sliding FFT. Sliding FFTs are more suitable for processing continuous time series data, such as audio, video, etc., than general FFTs.
In the related art, the data read/write of the sliding FFT is performed in the same manner as the fixed FFT, and specifically, see fig. 1, which includes a first arithmetic unit 1 and two RAMs (Random Access Memory, random access memories), and before starting the operation, external data needs to be written into the RAM4 or the RAM5; after the operation is started, the first operator 1 needs to read data from the RAM4 or the RAM5 to perform the operation, and then write the operation result into the RAM4 or the RAM5; after the operation is finished, the external module needs to read out the data in the RAM4 or the RAM5 for use.
As can be seen, in the related art, data needs to be read and written once every time of the sliding FFT operation, and in the sliding FFT operation process, since the FFT operation is performed multiple times, the data needs to be read and written multiple times, which takes a long time.
Disclosure of Invention
The present invention aims to solve at least one of the technical problems in the related art to some extent. To this end, a first object of the present invention is to propose a data read-write method based on a sliding FFT to shorten the time required for the sliding FFT.
A second object of the present invention is to propose a computer readable storage medium.
A third object of the present invention is to provide a data read-write apparatus based on a sliding FFT.
A fourth object of the present invention is to provide a data read-write system based on sliding FFT.
To achieve the above objective, an embodiment of a first aspect of the present invention provides a data read-write method based on sliding FFT, the method includes the following steps performed in parallel: after receiving external data, writing the external data into a first memory; reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the sliding FFT operation final operation result from a second memory which is currently used for storing the sliding FFT operation final operation result through an external module.
In addition, the data read-write method based on sliding FFT in the embodiment of the invention can also have the following additional technical characteristics:
According to one embodiment of the present invention, the performing a sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store the operation result in the sliding FFT operation process, includes: and performing butterfly operation on the target external data, and sequentially and cyclically storing operation results obtained by the butterfly operation into the at least two idle second memories.
According to one embodiment of the present invention, the number of sampling points of the sliding FFT operation is N, the number of stages of the butterfly operation is M, where M is a positive integer greater than 1, and the first memory and the second memory are each divided into M blocks.
According to one embodiment of the invention, the number of the second memories is three.
To achieve the above object, an embodiment of a second aspect of the present invention provides a computer readable storage medium, which when executed by a processor, implements the sliding FFT-based data read/write method described above.
In order to achieve the above objective, an embodiment of a third aspect of the present invention provides a sliding FFT-based data read-write device, where the device includes a receiving module, a writing module, and a control module, where the receiving module is configured to receive external data, the writing module is configured to write the external data into a first memory after receiving the external data, the control module is configured to control a preset arithmetic unit to read target external data to be processed in the first memory, perform a sliding FFT operation on the target external data, and dynamically call at least two idle second memories to store operation results in a sliding FFT operation process, and the preset external module reads the sliding FFT operation final operation result from the second memory currently storing the sliding FFT operation final operation result, where the idle second memory is the second memory currently not storing the sliding FFT operation final operation result.
In addition, the data read-write device based on sliding FFT in the embodiment of the invention can also have the following additional technical characteristics:
According to one embodiment of the invention, the control module is specifically configured to: and after the preset arithmetic unit performs butterfly operation on the target external data, sequentially and cyclically storing operation results obtained by the butterfly operation into the at least two idle second memories.
According to one embodiment of the present invention, the number of sampling points of the sliding FFT operation is N, the number of stages of the butterfly operation is M, where M is a positive integer greater than 1, and the first memory and the second memory are each divided into M blocks.
According to one embodiment of the invention, the number of the second memories is three.
To achieve the above objective, a fourth aspect of the present invention provides a sliding FFT-based data read-write system, which includes a first memory, a plurality of second memories, a preset arithmetic unit, and a controller, wherein an input end of the preset arithmetic unit is connected to the first memory, and an output end of the preset arithmetic unit is connected to the plurality of second memories respectively; the controller comprises a memory, a processor and a computer program stored on the memory, wherein the controller is respectively connected with the first memory, the plurality of second memories and the preset arithmetic unit, and the data read-write method based on sliding FFT is realized when the computer program is executed by the processor.
According to the data read-write method, device, system and storage medium based on sliding FFT, the following steps are executed in parallel: after receiving external data, writing the external data into a first memory; reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the final operation result of the sliding FFT operation from a second memory which currently stores the final operation result of the sliding FFT operation by an external module, thereby shortening the time required by the sliding FFT operation.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a schematic diagram of a sliding FFT data read-write;
FIG. 2 is a flow chart of a sliding FFT-based data read-write method according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a sliding FFT-based data read/write method according to an example of the present invention;
FIG. 4 is a flow chart of an exemplary sliding FFT-based data read/write method of the present invention;
FIG. 5 is a block diagram of a data read/write apparatus based on a sliding FFT according to an embodiment of the present invention;
FIG. 6 is a block diagram of a data read-write system based on a sliding FFT according to an embodiment of the invention;
fig. 7 is a block diagram of a controller according to an embodiment of the present invention.
Detailed Description
The data read-write method, apparatus, system and storage medium based on sliding FFT according to the embodiments of the present invention are described below with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described with reference to the drawings are exemplary and should not be construed as limiting the invention.
Fig. 2 is a flowchart of a data read-write method based on a sliding FFT according to an embodiment of the present invention.
As shown in fig. 2, the data read-write method based on sliding FFT includes executing the following steps S21, S22 and S23 in parallel:
S21, after receiving the external data, writing the external data into the first memory.
S22, reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store final operation results of the sliding FFT operation currently.
S23, reading out the sliding FFT operation final operation result from a second memory which currently stores the sliding FFT operation final operation result through an external module.
The three steps S21, S22, and S23 are executed in parallel, that is, the steps S21, S22, and S23 need to be executed simultaneously.
In S21, the external data is written into the first memory after the external data is received.
Specifically, a first memory is provided, which is a memory for storing external data for which a sliding FFT operation is required. All external data which need to be subjected to sliding FFT operation are firstly stored in the first memory, then read out from the first memory and written into equipment for carrying out sliding FFT operation.
In S22, it is set to read the target external data to be processed in the first memory, perform the sliding FFT operation on the target external data, and dynamically call at least two idle second memories to store the operation result in the sliding FFT operation process.
Specifically, it is necessary to determine in real time whether the external data stored in the first memory is the data that needs to be subjected to the sliding FFT operation currently, and if so, determine the data that needs to be subjected to the sliding FFT operation currently as the target external data.
After the target external data is determined, the target external data is read out from the first memory, and a sliding FFT operation is performed on the target external data.
Sliding FFT is a technique of frequency domain analysis of signals in the time domain, the main idea being to calculate the FFT over each time window and then combine the results. The process flow of a sliding FFT typically requires that the data be processed in order, which may be corrupted if the second memory is read and written at the same time, resulting in erroneous or unpredictable results. In order to avoid this, the memory storing the sliding FFT operation result is set as a free memory among the plurality of second memories, that is, the second memories are set so that writing and reading cannot be performed at the same time, so that the operation based on the sliding FFT can be smoothly performed.
Specifically, in order to realize the storage of the final operation result, the second memory needs to be called from the idle second memory which does not currently store the final operation result of the sliding FFT operation, so as to receive the operation result of the sliding FFT by using the idle second memory, and at least two idle second memories need to be called when the idle second memory is called, so that the situation that the memories are written and read simultaneously when the operation result in the sliding FFT operation process is stored by using the second memory is avoided.
After at least two idle second memories are called, the selected second memory needs to be dynamically called to store the operation result in the sliding FFT operation process, and after the final operation result of the sliding FFT operation is obtained, the final operation result needs to be stored in one of the called idle second memories.
In S23, the external module is set to read out the final operation result of the sliding FFT operation from the second memory currently storing the final operation result of the sliding FFT operation, that is, after the final operation result is obtained in the sliding FFT, and the final operation result is stored in one of the at least two called free yielding memories, the final operation result needs to be read out by the external module.
The step S21 is to write the external data into the first memory, the step S22 is to perform the sliding FFT operation on the target external data in the first memory, and the step S23 is to read out the sliding FFT operation result. Since the three steps S21, S22, S23 are executed in parallel, that is, the external data is written into the first memory, the operation is performed on the target external data in the first memory, and the operation result is read out.
Specifically, after receiving the external data, the external data is written into the first memory, and the external data written into the first memory is the target external data of the next sliding FFT operation. And simultaneously, reading target external data of the sliding FFT operation from the first memory, and performing the sliding FFT operation on the target external data to obtain a final operation result. At the same time, the final operation result is read out from the second memory storing the final operation result of the last sliding FFT operation.
In the above processing flow, since the last operation result of the last sliding FFT operation is read out, the sliding FFT operation is performed specifically for the target external data, and the external data of the next sliding FFT operation is written in, the three steps are performed simultaneously, so that the duration required by one sliding FFT operation is equal to the longest time required by the three steps of writing the external data into the first memory, performing the sliding FFT operation on the target external data, and reading the final operation result by the external module, thereby shortening the time required by the sliding FFT operation.
As one example, assume that three sliding FFT operations are performed consecutively: in the sliding FFT1, the sliding FFT2 and the sliding FFT3, the time T1 is required for writing the external data into the first memory, the time T2 is required for performing sliding FFT operation on the target external data, the time T3 is required for the external module to read out the final operation result, T2 is the maximum value of T1, T2 and T3, it is obvious that T1 of the sliding FFT2 is included in T2 of the sliding FFT1, T3 of the sliding FFT2 is included in T2 of the sliding FFT3, and T1 of the sliding FFT3 is included in T2 of the sliding FFT2, so that the time required for continuously performing three sliding FFT operations of the sliding FFT1, the sliding FFT2 and the sliding FFT3 is less than the sum of the time required for performing three sliding FFT operations of the sliding FFT1, the sliding FFT2 and the sliding FFT 3.
Moreover, the method can be realized just by setting up to dynamically call at least two idle second memories to store the operation results in the sliding FFT operation process. Specifically, at least two idle second memories are set to be dynamically called to store the operation results in the sliding FFT operation process, namely, the number of the second memories is larger than two, and only when the number of the second memories is larger than two, the operation results in the sliding FFT operation process can be stored in one second memory while the final operation results of the last sliding FFT operation are stored in the other second memories. For example, the number of the second memories may be set to three, and at this time, two second memories, which do not store the final operation result of the last sliding FFT operation, store the operation result in the current sliding FFT operation.
Thereby, the following steps are performed in parallel: after receiving external data, writing the external data into a first memory; reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the final operation result of the sliding FFT operation from a second memory which currently stores the final operation result of the sliding FFT operation by an external module, thereby shortening the time required by the sliding FFT operation.
In some embodiments of the present invention, performing a sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store an operation result in the sliding FFT operation process, including: and performing butterfly operation on the target external data, and sequentially and cyclically storing operation results obtained by the butterfly operation in at least two idle second memories.
Thus, by performing the disk operation, the operation speed can be increased. And the operation results are sequentially stored in at least two idle second memories in a rotating way, so that when one second memory writes new data, the other second memory reads old data at the same time, thereby realizing parallel processing of the data and further improving the processing efficiency. Since the storage and the reading of the sliding FFT operation result are alternately performed, if there is not enough memory to buffer the data, the situation of data collision may occur, and by setting at least two idle second memories to perform round robin storage, it is ensured that when new data is written into one second memory, old data in the second memory is already read and processed, thereby avoiding the data collision. And, by setting two or more second memories to perform round robin storage, it is possible to ensure that when data is read, the correct result of the sliding FFT operation is read, instead of the data being written or not yet being operated, thereby ensuring the consistency of the data.
In some embodiments of the present invention, the number of sampling points of the sliding FFT operation is N, the number of stages of the butterfly operation is M, where M is a positive integer greater than 1, and the first memory and the second memory are each divided into M blocks.
Therefore, the first memory and the second memory are divided into M blocks, M is the number of stages of butterfly operation, when a certain stage of butterfly operation is carried out on a certain data block, the next stage can start to prepare on another data block, so that the overall processing efficiency is improved, furthermore, the preparation work of supporting operation of the next block when the certain block is carrying out operation, namely, the pipeline processing of data is supported, the throughput of sliding FFT operation is improved, and meanwhile, the number of memory blocks to be called can be dynamically adjusted according to the actual requirement of the sliding FFT operation through the division of the memories, so that the optimal resource utilization rate is achieved.
The following is described in connection with an example.
Specifically, referring to fig. 3, one second operator 2 for performing butterfly operation is provided, four RAMs are provided, RAM0, RAM1, RAM2, RAM3, and RAM0, RAM1, RAM2, RAM3 are each divided into M blocks, resulting in RAM01, RAM02, …, RAM0M, RAM11, RAM12, …, RAM1M, RAM21, RAM22, …, RAM2M, RAM31, RAM32, …, RAM3M.
Setting RAM0 as a first memory, setting RAM1, RAM2 and RAM3 as second memories, namely writing external data into the RAM0, determining two free second memories which do not store the final operation result of the last sliding FFT operation in the RAM1, RAM2 and RAM3 after reading the target external data to be processed in the RAM0, and dynamically calling the free second memories to store the operation result in the sliding FFT operation process.
As described with reference to fig. 1 and 3, it is assumed that the first arithmetic unit 1 and the second arithmetic unit 2 each use ButterFly (butterfly operation), which is an M-point butterfly arithmetic unit, and operate an N-point sliding FFT, and RAM0, RAM1, RAM2, RAM3, RAM4, and RAM5 are all n×k-bit RAMs. The RAM of each block of N x k bits is divided into M small blocks, each small block has the size ofBits. Where k is determined by the FFT data word size, and if the FFT data word size is L, since the complex FFT includes I, Q paths, k=2×l.
If the method shown in fig. 1 is adopted, for an N-point sliding FFT, the process of writing data into RAM is N clock cycles; the internal operation is aboutA clock cycle; after the operation is completed, the external module reads out data from the RAM4 or the RAM5 for N clock cycles. In summary, the time required to complete an N-point sliding FFT isWith a clock cycle, it can be seen that the read-write RAM occupies a major time resource in the entire sliding FFT operation. In the scenario of limited time resources, it becomes the bottleneck of sliding FFT operation.
However, if the method shown in fig. 3 is adopted, it is assumed that data from the outside is always written to RAM0, the sliding FFT calculation dynamically calls RAM1/RAM2 or RAM1/RAM3 or RAM2/RAM3, and the FFT calculation result is written to RAM1 or RAM2 or RAM3 according to the number of FFT points.
The entire sliding FFT operation is roughly divided into three parts: the external data writing, final operation result reading, and the second operator 2 perform sliding FFT computation. Referring to fig. 4, when external data is written into RAM0 and operation is started, target external data is read from RAM0, and since a final operation result of the last sliding FFT operation may be retained in one RAM of RAM1, RAM2 and RAM3, here, RAM3 is assumed, the other two free RAMs 1 and RAM2 are called to perform butterfly operation, that is, intermediate results of the current sliding FFT are stored by using RAM1 and RAM 2. After the sliding FFT operation is completed, the final operation result is stored in one of the two RAMs (assumed to be RAM 2) according to the difference in the number of FFT points. The external module reads the final operation result of the last sliding FFT operation from the RAM3 at the same time of the sliding FFT calculation.
In the above process, the external data is written into the RAM0 simultaneously with the last sliding FFT operation, and the final operation result of the current sliding FFT is read out by the external module in the next sliding FFT calculation period.
For a sliding FFT of N points, the process of writing data into RAM is thatA clock cycle; the FFT internal operation is aboutA clock cycle; after the operation is completed, the external module needs N clock cycles to read the data from the RAM. The above three operations are processed in parallel, and thus the entire processing time is determined by the longest processing cycle among the three operations. Assuming N is greater thanThen the method shown in FIG. 3 is adopted, and the time required for completing an N-point sliding FFT isWith a clock period, as shown in FIG. 1The method of one clock cycle has the advantage of a short processing time.
In summary, the data read-write method based on sliding FFT in the embodiment of the invention sets the parallel execution of the following steps: after receiving external data, writing the external data into a first memory; reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the final operation result of the sliding FFT operation from a second memory which currently stores the final operation result of the sliding FFT operation by an external module, thereby shortening the time required by the sliding FFT operation.
Based on the data read-write method based on sliding FFT of the embodiment, the invention provides a computer readable storage medium.
In an embodiment of the present invention, a computer-readable storage medium has stored thereon a computer program which, when executed by a processor, implements the sliding FFT-based data read/write method of the above embodiment.
The computer readable storage medium according to the embodiment of the present invention, by implementing the sliding FFT-based data read/write method according to the above embodiment, sets the following steps to be executed in parallel: after receiving external data, writing the external data into a first memory; reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the final operation result of the sliding FFT operation from a second memory which currently stores the final operation result of the sliding FFT operation by an external module, thereby shortening the time required by the sliding FFT operation.
Fig. 5 is a block diagram of a data read-write apparatus based on a sliding FFT according to an embodiment of the present invention.
As shown in fig. 5, the data read-write device 100 based on sliding FFT includes a receiving module 101, a writing module 102, and a control module 103, where the receiving module 101 is configured to receive external data, the writing module 102 is configured to write the external data into the first memory 200 after receiving the external data, the control module 103 is configured to control the preset operator 300 to read target external data to be processed in the first memory, perform sliding FFT operation on the target external data, and dynamically call at least two idle second memories 400 to store operation results in the sliding FFT operation process, and the preset external module reads out the sliding FFT operation final operation result from the second memory 400 currently storing the sliding FFT operation final operation result, where the idle second memories 400 refer to the second memories 400 currently not storing the sliding FFT operation final operation result.
In some embodiments of the present invention, the control module 103 is specifically configured to: after the preset arithmetic unit 300 performs the butterfly operation on the target external data, the operation result obtained by the butterfly operation is sequentially rotated and stored in at least two idle second memories 400. The preset arithmetic unit 300 is a butterfly arithmetic unit for performing a butterfly operation.
In some embodiments of the present invention, the number of sampling points of the sliding FFT operation is N, the number of stages of the butterfly operation is M, where M is a positive integer greater than 1, and the first memory 200 and the second memory 400 are each divided into M blocks.
In some embodiments of the present invention, the number of second memories 400 is three.
It should be noted that, for other specific implementations of the sliding FFT-based data read/write apparatus according to the embodiments of the present invention, reference may be made to the sliding FFT-based data read/write method of the above embodiments.
The data read-write device based on sliding FFT of the embodiment of the invention executes the following steps in parallel: after receiving external data, writing the external data into a first memory; reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the final operation result of the sliding FFT operation from a second memory which currently stores the final operation result of the sliding FFT operation by an external module, thereby shortening the time required by the sliding FFT operation.
Fig. 6 is a block diagram of a data read-write system based on a sliding FFT according to an embodiment of the present invention.
As shown in fig. 6, the data read-write system 10 based on sliding FFT is characterized in that the system includes a first memory 200, a plurality of second memories 400, a preset arithmetic unit 300 and a controller 500, wherein an input end of the preset arithmetic unit 300 is connected to the first memory 200, and an output end of the preset arithmetic unit 300 is connected to the plurality of second memories, respectively. The controller 500 is connected to the first memory 200, the plurality of second memories 400, and the preset arithmetic unit 300, respectively.
Wherein, referring to fig. 7, the controller 500 includes: a processor 501 and a memory 503. The processor 501 is coupled to a memory 503, such as via a bus 502. Optionally, the controller 500 may also include a transceiver 504. It should be noted that, in practical applications, the transceiver 504 is not limited to one, and the structure of the controller 500 is not limited to the embodiment of the present invention.
The Processor 501 may be a CPU (Central Processing Unit ), general purpose Processor, DSP (DIGITAL SIGNAL Processor ), ASIC (Application SPECIFIC INTEGRATED Circuit), FPGA (Field Programmable GATE ARRAY ) or other programmable logic device, transistor logic device, hardware component, or any combination thereof. Which may implement or perform the various exemplary logical blocks, modules, and circuits described in connection with the present disclosure. The processor 501 may also be a combination that implements computing functionality, such as a combination comprising one or more microprocessors, a combination of a DSP and a microprocessor, and the like.
Bus 502 may include a path to transfer information between the components. Bus 502 may be a PCI (PERIPHERAL COMPONENT INTERCONNECT, peripheral component interconnect standard) bus, or an EISA (Extended Industry Standard Architecture ) bus, or the like. The bus 502 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in fig. 5, but not only one bus or one type of bus.
The memory 503 is used to store a computer program corresponding to the sliding FFT-based data read/write method of the above embodiment of the present invention, which is controlled to be executed by the processor 501. The processor 501 is configured to execute a computer program stored in the memory 503 to implement what is shown in the foregoing method embodiments.
The data read-write system based on sliding FFT of the embodiment of the invention executes the following steps in parallel: after receiving external data, writing the external data into a first memory; reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently; and reading out the final operation result of the sliding FFT operation from a second memory which currently stores the final operation result of the sliding FFT operation by an external module, thereby shortening the time required by the sliding FFT operation.
It should be noted that the logic and/or steps represented in the flow diagrams or otherwise described herein may be considered a ordered listing of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). In addition, the computer readable medium may even be paper or other suitable medium on which the program is printed, as the program may be electronically captured, via, for instance, optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner, if necessary, and then stored in a computer memory.
It is to be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above-described embodiments, the various steps or methods may be implemented in software or firmware stored in a memory and executed by a suitable instruction execution system. If implemented in hardware, as in another embodiment, may be implemented using any one or combination of the following techniques, as known in the art: discrete logic circuits having logic gates for implementing logic functions on data signals, application specific integrated circuits having suitable combinational logic gates, programmable Gate Arrays (PGAs), field Programmable Gate Arrays (FPGAs), and the like.
In the description of the present specification, a description referring to terms "one embodiment," "some embodiments," "examples," "specific examples," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present invention. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
In the description of the present specification, the terms "center", "longitudinal", "transverse", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. refer to an orientation or positional relationship based on that shown in the drawings, and do not indicate or imply that the apparatus or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and should not be construed as limiting the invention.
Furthermore, the terms "first," "second," and the like, are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may explicitly or implicitly include at least one such feature. In the description of the present invention, the meaning of "plurality" means at least two, for example, two, three, etc., unless specifically defined otherwise.
In the description of the present specification, unless otherwise indicated, the terms "mounted," "connected," "secured," and the like are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; either directly or indirectly, through intermediaries, or both, may be in communication with each other or in interaction with each other, unless expressly defined otherwise. The specific meaning of the above terms in the present invention can be understood by those of ordinary skill in the art according to the specific circumstances.
In the present invention, unless expressly stated or limited otherwise, a first feature "up" or "down" a second feature may be the first and second features in direct contact, or the first and second features in indirect contact via an intervening medium. Moreover, a first feature being "above," "over" and "on" a second feature may be a first feature being directly above or obliquely above the second feature, or simply indicating that the first feature is level higher than the second feature. The first feature being "under", "below" and "beneath" the second feature may be the first feature being directly under or obliquely below the second feature, or simply indicating that the first feature is less level than the second feature.
While embodiments of the present invention have been shown and described above, it will be understood that the above embodiments are illustrative and not to be construed as limiting the invention, and that variations, modifications, alternatives and variations may be made to the above embodiments by one of ordinary skill in the art within the scope of the invention.
Claims (10)
1. A sliding FFT-based data read-write method, the method comprising the steps of:
after receiving external data, writing the external data into a first memory;
Reading target external data to be processed in the first memory, performing sliding FFT operation on the target external data, and dynamically calling at least two idle second memories to store operation results in the sliding FFT operation process, wherein the idle second memories are second memories which do not store the final operation results of the sliding FFT operation currently;
And reading out the sliding FFT operation final operation result from a second memory which is currently used for storing the sliding FFT operation final operation result through an external module.
2. The sliding-FFT-based data read/write method of claim 1, wherein the performing a sliding-FFT operation on the target external data and dynamically calling at least two idle second memories to store an operation result in the sliding-FFT operation process includes:
and performing butterfly operation on the target external data, and sequentially and cyclically storing operation results obtained by the butterfly operation into the at least two idle second memories.
3. The sliding FFT based data read/write method of claim 2, wherein the number of sampling points of the sliding FFT operation is N, the number of stages of the butterfly operation is M, wherein M is a positive integer greater than 1, and the first memory and the second memory are each divided into M blocks.
4. The sliding FFT based data read/write method of claim 2 wherein the number of the second memories is three.
5. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements a sliding FFT based data read/write method as claimed in any one of claims 1-4.
6. The data read-write device based on the sliding FFT is characterized by comprising a receiving module, a writing module and a control module, wherein the receiving module is used for receiving external data, the writing module is used for writing the external data into a first memory after receiving the external data, the control module is used for controlling a preset arithmetic unit to read target external data to be processed in the first memory and carry out sliding FFT operation on the target external data, at least two idle second memories are dynamically called to store operation results in the sliding FFT operation process, and the preset external module reads out the sliding FFT operation final operation results from the second memory which is currently used for storing the sliding FFT operation final operation results, wherein the idle second memories refer to the second memory which is not currently used for storing the sliding FFT operation final operation results.
7. The sliding FFT based data read/write apparatus as set forth in claim 6, wherein the control module is specifically configured to:
and after the preset arithmetic unit performs butterfly operation on the target external data, sequentially and cyclically storing operation results obtained by the butterfly operation into the at least two idle second memories.
8. The sliding FFT based data read/write apparatus of claim 7, wherein the number of sampling points of the sliding FFT operation is N, the number of stages of the butterfly operation is M, wherein M is a positive integer greater than 1, and the first memory and the second memory are each divided into M blocks.
9. The sliding FFT based data read/write apparatus as set forth in claim 7, wherein the number of the second memories is three.
10. A data read-write system based on sliding FFT is characterized in that the system comprises a first memory, a plurality of second memories, a preset arithmetic unit and a controller,
The input end of the preset arithmetic unit is connected to the first memory, and the output end of the preset arithmetic unit is respectively connected with the plurality of second memories;
The controller comprises a memory, a processor and a computer program stored on the memory, wherein the controller is respectively connected with the first memory, the plurality of second memories and the preset arithmetic unit, and the computer program realizes the data read-write method based on sliding FFT according to any one of claims 1-4 when being executed by the processor.
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