CN118592024A - Method and apparatus for geometric partition mode split mode reordering using predefined mode order - Google Patents

Abstract

Methods, apparatuses, and non-transitory storage media for video decoding and encoding are provided. In a decoding method, a decoder obtains a plurality of prediction samples of a Coding Unit (CU) that are adjacent to reconstructed samples. In addition, the decoder reorders a plurality of Geometric Partition Mode (GPM) split modes according to a sequence table based on distortion costs between a plurality of prediction samples of neighboring reconstruction samples associated with each GPM split mode and neighboring reconstruction samples of the CU to obtain a reordered list of the plurality of GPM split modes. Further, the decoder obtains a GPM splitting pattern index and then obtains a GPM splitting pattern based on the GPM splitting pattern index and a reorder list of the plurality of GPM splitting patterns. Furthermore, the decoder obtains a GPM predictor based on the GPM split mode.

Description

Method and apparatus for geometric partition mode split mode reordering using predefined mode order

Cross Reference to Related Applications

The present application is based on and claims priority from U.S. provisional application No. 63/311,040, filed on day 2, 2022, day 16, entitled method and apparatus for geometric partition pattern splitting pattern reordering with predefined pattern order, "Methods and Devices for Geometric Partitioning Mode Split Modes Reordering with Pre-defined Modes Order[, which is incorporated by reference in its entirety for all purposes.

Technical Field

The present disclosure relates to video codec and compression, and in particular, but not limited to, methods and apparatus to improve the codec efficiency of geometric partition (geometric partitioning, GPM) modes.

Background

Various video codec techniques may be used to compress video data. Video codec is performed according to one or more video codec standards. For example, today, some well known Video codec standards include universal Video codec (VERSATILE VIDEO CODING, VVC, also known as h.266 or MPEG-I part 3), high efficiency Video codec (HIGH EFFICIENCY Video Coding, HEVC, also known as h.265 or MPEG-H part 2) and advanced Video codec (Advanced Video Coding, AVC, also known as h.264 or MPEG-4 part 10), which are developed jointly by ISO/IEC MPEG and ITU-T VECG. Most existing video codec standards build on a well-known hybrid video codec framework, i.e., use block-based prediction methods (e.g., inter-prediction, intra-prediction) to reduce redundancy present in video images or sequences, and transform coding to compress the energy of the prediction error. An important goal of video codec technology is to compress video data into a form that uses a lower bit rate while avoiding or minimizing degradation of video quality.

The first version of the VVC standard was completed in 7 months 2020, which provides a bit rate saving of about 50% or equivalent perceived quality compared to the previous generation video codec standard HEVC. Although the VVC standard provides significant codec improvements over its predecessor, there is evidence that superior codec efficiency can be achieved using additional codec tools. Recently, in cooperation with ITU-T VECG and ISO/IEC MPEG, the joint video exploration team (Joint Video Exploration Team, JVET) began to explore advanced technologies that could greatly improve codec efficiency compared to VVC. Month 4 of 2021, a software code library named enhanced compression model (Enhanced Compression Model, ECM) was built for future video codec discovery work. The ECM reference software is based on a VVC Test Model (VTM) developed by JVET for VVC and further expands and/or improves on several existing modules (e.g., intra/inter prediction, transform, loop filter, etc.). In the future, any new codec beyond the VVC standard needs to be integrated into the ECM platform and tested using JVET universal test conditions (common test condition, CTC).

Disclosure of Invention

The present disclosure provides examples of techniques related to improving the codec efficiency of GPM mode in video encoding or decoding processes.

According to a first aspect of the present disclosure, a video decoding method is provided. In the video decoding method, a decoder may obtain a plurality of prediction samples of a Coding Unit (CU) adjacent to a reconstructed sample. In addition, the decoder may reorder the plurality of GPM split modes based on distortion costs between a plurality of prediction samples of neighboring reconstructed samples associated with each GPM split mode and neighboring reconstructed samples of the CU and a sequence table to obtain a reordered list of GPM split modes. Further, the decoder may obtain a GPM split mode index and then obtain a GPM split mode based on the GPM split mode index and the reorder list of the GPM split mode. Furthermore, the decoder may obtain a GPM predictor based on the GPM split mode.

According to a second aspect of the present disclosure, a video encoding method is provided. In a video coding method, an encoder may obtain a plurality of prediction samples of a CU that are adjacent to a reconstructed sample. In addition, the encoder may reorder the plurality of GPM split modes based on distortion costs between a plurality of prediction samples of neighboring reconstructed samples associated with each GPM split mode and neighboring reconstructed samples of the CU and a sequence table to obtain a reordered list of GPM split modes. Further, the encoder may obtain a GPM splitting pattern index and then obtain a GPM splitting pattern based on the GPM splitting pattern index and the reorder list of the GPM splitting pattern. Furthermore, the encoder may obtain a GPM predictor based on the GPM split mode.

According to a third aspect of the present disclosure, there is provided an apparatus for video decoding, the apparatus comprising one or more processors and a memory coupled to the one or more processors and configured to store instructions executable by the one or more processors. Further, the one or more processors are configured, when executing the instructions, to perform the method in the first aspect described above.

According to a fourth aspect of the present disclosure, there is provided an apparatus for video encoding, the apparatus comprising one or more processors and a memory coupled to the one or more processors and configured to store instructions executable by the one or more processors. Further, the one or more processors are configured, when executing the instructions, to perform the method in the second aspect described above.

According to a fifth aspect of the present disclosure, there is provided a non-transitory computer-readable storage medium for storing computer-executable instructions which, when executed by one or more computer processors, cause the one or more computer processors to receive a bitstream and perform the method of the first aspect described above based on the bitstream.

According to a sixth aspect of the present disclosure, there is provided a non-transitory computer readable storage medium for storing computer executable instructions which, when executed by one or more computer processors, cause the one or more computer processors to perform the method in the second aspect described above, to encode a CU into a bitstream, and to transmit the bitstream.

Drawings

A more particular description of examples of the disclosure will be rendered by reference to specific examples that are illustrated in the appended drawings. These examples will be described and explained in more detail by using the accompanying drawings, in view of the fact that these drawings depict only some examples and are therefore not to be considered limiting of scope.

Fig. 1A is a block diagram illustrating a system for encoding and decoding video blocks according to some examples of the present disclosure.

Fig. 1B is a block diagram of an encoder according to some examples of the present disclosure.

Fig. 1C-1F are block diagrams illustrating how frames are recursively partitioned into multiple video blocks having different sizes and shapes according to some examples of the present disclosure.

Fig. 1G is a block diagram illustrating an exemplary video encoder according to some examples of the present disclosure.

Fig. 2A is a block diagram of a decoder according to some examples of the present disclosure.

Fig. 2B is a block diagram illustrating an exemplary video decoder according to some examples of the present disclosure.

Fig. 3A is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

Fig. 3B is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

Fig. 3C is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

Fig. 3D is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

Fig. 3E is a diagram illustrating block partitioning in a multi-type tree structure according to some examples of the present disclosure.

Fig. 4 illustrates allowed GPM partitioning according to some examples of the present disclosure.

Fig. 5 is a diagram illustrating selection of a uni-directional predicted motion vector from motion vectors of a merge candidate list of GPMs according to some examples of the present disclosure.

Fig. 6 is a diagram illustrating a template matching algorithm according to some examples of the present disclosure.

Fig. 7 illustrates a set of selected pixels being subjected to gradient analysis according to some examples of the present disclosure.

Fig. 8 illustrates a convolution of a 3 x 3 Sobel (Sobel) gradient filter with a template according to some examples of the present disclosure.

Fig. 9 illustrates prediction fusion by a weighted average of two HoG modes and one plane mode, according to some examples of the present disclosure.

Fig. 10 illustrates a Template and its reference points for use in Template-based intra mode derivation (Template-based intra mode derivation, TIMD) according to some examples of the present disclosure.

Fig. 11 illustrates a mix of templates for reordering GPM split patterns according to some examples of the present disclosure.

Fig. 12A-12C illustrate available intra-prediction mode (intra prediction mode, IPM) candidates for GPM with inter-prediction and intra-prediction according to some examples of the present disclosure.

Fig. 12D illustrates a disabled combination with two intra predictions present according to some examples of the present disclosure.

FIG. 13 is a diagram illustrating a computing environment coupled with a user interface according to some examples of the present disclosure.

Fig. 14 illustrates distances from arbitrary locations within a block to a partition edge according to some examples of the present disclosure.

Fig. 15 illustrates distances from integer positions obtained by quantizing arbitrary positions to partition edges according to some examples of the present disclosure.

Fig. 16 illustrates a soft blend region of width θ luminance samples defined on both sides of a partition edge according to some examples of the present disclosure.

Fig. 17 illustrates a predefined order that depends on frequency statistics according to some examples of the present disclosure.

Fig. 18 is a flowchart illustrating a video decoding method according to some examples of the present disclosure.

Fig. 19 is a flowchart illustrating a video encoding method corresponding to the video decoding method shown in fig. 18, according to some examples of the present disclosure.

Detailed Description

Reference will now be made in detail to the specific embodiments, examples of which are illustrated in the accompanying drawings. In the following detailed description, numerous non-limiting specific details are set forth in order to provide an understanding of the subject matter presented herein. It will be apparent to those of ordinary skill in the art that various alternatives may be used. For example, it will be apparent to one of ordinary skill in the art that the subject matter presented herein may be implemented on many types of electronic devices having digital video capabilities.

The terminology used in the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. The singular forms "a," "an," "the," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise throughout the disclosure and the appended claims. It should also be understood that the term "and/or" as used in this disclosure refers to and includes one or any or all of the possible combinations of the various related items listed.

Reference throughout this specification to "one embodiment," "an example," "some embodiments," "some examples," or similar language means that a particular feature, structure, or characteristic described is included in at least one embodiment or example. Features, structures, elements, or characteristics described in connection with one or some embodiments may be applicable to other embodiments unless explicitly stated otherwise.

Throughout this disclosure, the terms "first," "second," "third," and the like are used as nomenclature, and are used merely to refer to related elements, e.g., devices, components, compositions, steps, etc., without implying any spatial or temporal order unless explicitly stated otherwise. For example, a "first device" and a "second device" may refer to two separately formed devices, or two portions, components, or operational states of the same device, and may be arbitrarily named.

The terms "module," "sub-module," "circuit," "sub-circuit," "circuitry," "sub-circuitry," "unit," or "sub-unit" may include memory (shared, dedicated, or group) that stores code or instructions that may be executed by one or more processors. A module may include one or more circuits with or without stored code or instructions. A module or circuit may include one or more components connected directly or indirectly. These components may or may not be physically attached to each other or adjacent to each other.

As used herein, the term "if" or "when … …" may be understood to mean "at … …" or "responsive" depending on the context. These terms, if present in the claims, may not indicate that the relevant limitations or features are conditional or optional. For example, a method may include the steps of: i) When or if condition X exists, performing a function or action X ', and ii) when or if condition Y exists, performing a function or action Y'. The method may have both the ability to perform a function or action X 'and the ability to perform a function or action Y'. Thus, functions X 'and Y' may be performed at different times in multiple executions of the method.

The units or modules may be implemented in pure software, in pure hardware, or in a combination of hardware and software. For example, in a software-only implementation, a unit or module may include functionally related code blocks or software components that are directly or indirectly linked together to perform a particular function.

Fig. 1A is a block diagram illustrating an exemplary system 10 for encoding and decoding video blocks in parallel according to some embodiments of the present disclosure. As shown in fig. 1A, system 10 includes a source device 12 that generates and encodes video data to be decoded by a destination device 14 at a later time. Source device 12 and destination device 14 may comprise any of a variety of electronic devices including desktop or laptop computers, tablet computers, smart phones, set-top boxes, digital televisions, cameras, display devices, digital media players, video gaming machines, video streaming devices, and the like. In some implementations, the source device 12 and the destination device 14 are equipped with wireless communication capabilities.

In some implementations, destination device 14 may receive encoded video data to be decoded via link 16. Link 16 may comprise any type of communication medium or device capable of moving encoded video data from source device 12 to destination device 14. In one example, link 16 may include a communication medium for enabling source device 12 to transmit encoded video data directly to destination device 14 in real-time. The encoded video data may be modulated and transmitted to destination device 14 in accordance with a communication standard, such as a wireless communication protocol. The communication medium may include any wireless or wired communication medium, such as a Radio Frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form part of a packet-based network, such as a local area network, a wide area network, or a global network (e.g., the internet). The communication medium may include a router, switch, base station, or any other device that may be used to facilitate communication from source device 12 to destination device 14.

In some other implementations, encoded video data may be transferred from output interface 22 to storage device 32. The destination device 14 may then access the encoded video data in the storage device 32 via the input interface 28. Storage device 32 may include any of a variety of distributed or locally accessed data storage media such as a hard drive, blu-ray disc, digital versatile disc (DIGITAL VERSATILE DISK, DVD), compact disc read Only Memory (CD-ROM), flash Memory, volatile or nonvolatile Memory, or any other suitable digital storage media for storing encoded video data. In a further example, storage device 32 may correspond to a file server or another intermediate storage device that may store encoded video data generated by source device 12. The destination device 14 may access the video data stored in the storage device 32 via streaming or download. The file server may be any type of computer capable of storing encoded video data and transmitting the encoded video data to the destination device 14. Exemplary file servers include web servers (e.g., for websites), file Transfer Protocol (FTP) servers, network attached storage (Network Attached Storage, NAS) devices, or local disk drives. The destination device 14 may access the encoded video data through any standard data connection including a wireless channel (e.g., wireless fidelity (WIRELESS FIDELITY, wi-Fi) connection), a wired connection (e.g., digital subscriber line (Digital Subscriber Line, DSL), cable modem, etc.), or a combination of both, suitable for accessing the encoded video data stored on the file server. The transmission of encoded video data from storage device 32 may be streaming, download transmission, or a combination of both.

As shown in fig. 1A, source device 12 includes a video source 18, a video encoder 20, and an output interface 22. Video source 18 may include sources such as a video capture device (e.g., a video camera), a video archive containing previously captured video, a video feed interface for receiving video from a video content provider, and/or a computer graphics system for generating computer graphics data as source video, or a combination of these sources. As one example, if video source 18 is a camera of a security monitoring system, source device 12 and destination device 14 may form a camera phone or video phone. However, the embodiments described in this application may be generally applicable to video codecs and may be applied to wireless and/or wired applications.

The captured, pre-captured, or computer-generated video may be encoded by video encoder 20. The encoded video data may be transmitted directly to destination device 14 via output interface 22 of source device 12. The encoded video data may also (or alternatively) be stored on the storage device 32 for later access by the destination device 14 or other devices for decoding and/or playback. Output interface 22 may further include a modem and/or a transmitter.

Destination device 14 includes an input interface 28, a video decoder 30, and a display device 34. Input interface 28 may include a receiver and/or modem and receives encoded video data over link 16. The encoded video data transmitted over link 16 or provided on storage device 32 may include various syntax elements generated by video encoder 20 for use by video decoder 30 in decoding the video data. Such syntax elements may be included in encoded video data transmitted over a communication medium, stored on a storage medium, or stored on a file server.

In some implementations, the destination device 14 may include a display device 34, which may be an integrated display device and an external display device configured to communicate with the destination device 14. The display device 34 displays the decoded video data to a user and may include any of a variety of display devices, such as a Liquid crystal display (Liquid CRYSTAL DISPLAY, LCD), a plasma display, an Organic LIGHT EMITTING Diode (OLED) display, or another type of display device.

Video encoder 20 and video decoder 30 may operate according to proprietary or industry standards (e.g., VVC, HEVC, MPEG-4 part 10, AVC, or extensions of such standards). It should be appreciated that the present application is not limited to a particular video encoding/decoding standard and may be applicable to other video encoding/decoding standards. It is generally contemplated that video encoder 20 of source device 12 may be configured to encode video data according to any of these current or future standards. Similarly, it is also generally contemplated that the video decoder 30 of the destination device 14 may be configured to decode video data according to any of these current or future standards.

Video encoder 20 and video decoder 30 may each be implemented as any of a variety of suitable encoder and/or decoder circuits, such as one or more microprocessors, digital Signal Processors (DSPs), application Specific Integrated Circuits (ASICs), field programmable gate arrays (Field Programmable GATE ARRAY, FPGA), discrete logic, software, hardware, firmware or any combinations thereof. When implemented in part in software, the electronic device can store instructions for the software in a suitable non-transitory computer readable medium and execute the instructions in hardware using one or more processors to perform the video encoding/decoding operations disclosed in the present disclosure. Each of the video encoder 20 and the video decoder 30 may be included in one or more encoders or decoders, any of which may be integrated as part of a combined encoder/decoder (CODEC) in the respective device.

As with HEVC, VVC is built on a block-based hybrid video codec framework. Fig. 1B is a block diagram illustrating a block-based video encoder according to some embodiments of the present disclosure. In the encoder 100, an input video signal is processed block by block (referred to as a Coding Unit (CU)). Encoder 100 may be a video encoder 20 as shown in fig. 1A. In VTM-1.0, a CU may be up to 128×128 pixels. However, unlike HEVC, which partitions blocks based on quadtrees alone, in VVC, one Coding Tree Unit (CTU) is split into multiple CUs to accommodate different local characteristics based on quadtrees. In addition, the concept of multiple partition unit types in HEVC is removed, i.e., no partitions of CUs, prediction Units (PUs), and Transform Units (TUs) are present in the VVC anymore; instead, each CU is always used as a base unit for both prediction and transformation, without further partitioning. In a multi-type tree structure, one CTU is first partitioned in a quadtree structure. Each quadtree leaf node may then be further partitioned in a binary tree structure and a trigeminal tree structure.

Fig. 3A-3E are schematic diagrams illustrating multi-type tree partitioning modes according to some embodiments of the present disclosure. Fig. 3A to 3E show five division types, respectively, including a quad division (fig. 3A), a vertical binary division (fig. 3B), a horizontal binary division (fig. 3C), a vertical trigeminal division (fig. 3D), and a horizontal trigeminal division (fig. 3E).

For each given video block, spatial prediction and/or temporal prediction may be performed. Spatial prediction (or "intra prediction") predicts a current video block using pixels from samples (referred to as reference samples) of already coded neighboring blocks in the same video picture/strip. Spatial prediction reduces the spatial redundancy inherent in video signals. Temporal prediction (also referred to as "inter prediction" or "motion compensated prediction") predicts a current video block using reconstructed pixels from an encoded video picture. Temporal prediction reduces the temporal redundancy inherent in video signals. The temporal prediction signal of a given CU is typically represented by one or more Motion Vectors (MVs) that indicate the amount and direction of motion between the current CU and its temporal reference. Also, if a plurality of reference pictures are supported, one reference picture index for identifying from which reference picture in the reference picture store the temporal prediction signal originates is additionally transmitted.

After spatial prediction and/or temporal prediction, an intra/inter mode decision circuit 121 in the encoder 100 selects the best prediction mode, e.g., based on a rate distortion optimization method. Then, the block predictor 120 is subtracted from the current video block; and decorrelates the generated prediction residual using the transform circuit 102 and the quantization circuit 104. The generated quantized residual coefficients are dequantized by dequantization circuitry 116 and inverse transformed by inverse transformation circuitry 118 to form reconstructed residuals, which are then added back to the prediction block to form the reconstructed signal of the CU. Further, loop filtering 115, such as a deblocking filter, a Sample Adaptive Offset (SAO), and/or an adaptive loop filter (ADAPTIVE IN-loop filter, ALF), may be applied to the reconstructed CU before the reconstructed CU is placed in a reference picture store of picture buffer 117 and used to encode future video blocks. To form the output video bitstream 114, the coding mode (inter or intra), prediction mode information, motion information, and quantized residual coefficients are all sent to the entropy encoding unit 106 for further compression and packaging to form the bitstream.

For example, deblocking filters are available in the current version of VVC as well as AVC, HEVC. In HEVC, an additional loop filter, called SAO, is defined to further improve the codec efficiency. In the current version of the VVC standard, still another loop filter called ALF is being actively studied, and is likely to be included in the final standard.

These loop filter operations are optional. Performing these operations helps to improve codec efficiency and visual quality. The encoder 100 may also decide to shut down these operations to save computational complexity.

It should be noted that if these filter options are turned on by the encoder 100, then intra prediction is typically based on unfiltered reconstructed pixels, while inter prediction is based on filtered reconstructed pixels.

Fig. 2A is a block diagram illustrating a block-based video decoder 200 that may be used in connection with many video codec standards. The decoder 200 is similar to the reconstruction-related portion of the encoder 100 of fig. 1B. The block-based video decoder 200 may be the video decoder 30 shown in fig. 1A. In the decoder 200, an incoming video bitstream 201 is first decoded by entropy decoding 202 to obtain quantization coefficient levels and prediction related information. The quantized coefficient levels are then processed by inverse quantization 204 and inverse transform 206 to obtain reconstructed prediction residues. The block predictor mechanism implemented in the intra/inter mode selector 212 is configured to perform intra prediction 208 or motion compensation 210 based on the decoded prediction information. A set of unfiltered reconstructed pixels is obtained by summing the reconstructed prediction residual from the inverse transform 206 with the prediction output generated by the block predictor mechanism using adder 214.

The reconstructed block may further pass through a loop filter 209 and then be stored in a picture buffer 213 that serves as a reference picture store. The reconstructed video in the picture buffer 213 may be sent to drive a display device and used to predict future video blocks. With loop filter 209 turned on, a filtering operation is performed on these reconstructed pixels to obtain the final reconstructed video output 222.

Fig. 1G is a block diagram illustrating another exemplary video encoder 20 according to some embodiments described in this disclosure. Video encoder 20 may perform intra-prediction encoding and inter-prediction encoding on video blocks within video frames. Intra-prediction encoding relies on spatial prediction to reduce or eliminate spatial redundancy of video data within a given video frame or picture. Inter-prediction encoding relies on temporal prediction to reduce or eliminate temporal redundancy of video data within adjacent video frames or pictures of a video sequence. It should be noted that in the field of video codec, the term "frame" may be used as a synonym for the term "image" or "picture".

As shown in fig. 1G, video encoder 20 includes a video data memory 40, a prediction processing unit 41, a decoded picture buffer (Decoded Picture Buffer, DPB) 64, an adder 50, a transform processing unit 52, a quantization unit 54, and an entropy encoding unit 56. The prediction processing unit 41 further includes a motion estimation unit 42, a motion compensation unit 44, a partition unit 45, an intra prediction processing unit 46, and an intra Block Copy (BC) unit 48. In some implementations, video encoder 20 also includes an inverse quantization unit 58, an inverse transform processing unit 60, and an adder 62 for video block reconstruction. A loop filter 63, such as a deblocking filter, may be located between adder 62 and DPB 64 to filter block boundaries to remove blocking artifacts from the reconstructed video. In addition to the deblocking Filter, another Loop Filter, such as a Sample Adaptive Offset (SAO) Filter and/or an adaptive Loop Filter (ADAPTIVE IN-Loop Filter, ALF), may be used to Filter the output of adder 62. In some examples, the loop filter may be omitted and the decoded video block may be provided directly to DPB 64 by adder 62. Video encoder 20 may take the form of fixed or programmable hardware units, or may be divided among one or more of the fixed or programmable hardware units illustrated.

Video data memory 40 may store video data to be encoded by components of video encoder 20. For example, video data in video data store 40 may be obtained from video source 18 as shown in FIG. 1A. DPB 64 is a buffer that stores reference video data (e.g., reference frames or pictures) for use in encoding the video data by video encoder 20 (e.g., in intra-prediction encoding mode or inter-prediction encoding mode). Video data memory 40 and DPB 64 may be formed from any of a variety of memory devices. In various examples, video data memory 40 may be on-chip with other components of video encoder 20, or off-chip with respect to those components.

As shown in fig. 1G, after receiving video data, a partition unit 45 within the prediction processing unit 41 partitions the video data into video blocks. The partitioning may also include partitioning the video frame into slices, tiles (e.g., a set of video blocks), or other larger Coding Units (CUs) according to a predefined partitioning structure, such as a Quadtree (QT) structure associated with the video data. A video frame is or can be considered to be a two-dimensional array or matrix of samples having sample values. The spots in the array may also be referred to as pixels (pixels or pels). The number of samples in the horizontal and vertical directions (or axes) of the array or picture defines the size and/or resolution of the video frame. For example, a video frame may be divided into a plurality of video blocks by using QT partition. The video block is again or can be regarded as a two-dimensional array or matrix of samples with sample values, but with a smaller size than the video frame. The number of samples in the horizontal and vertical directions (or axes) of the video block defines the size of the video block. The video block may be further divided into one or more block partitions or sub-blocks (which may again form blocks) by, for example, iteratively using QT partitions, binary-Tree (BT) partitions or Trigeminal Tree (TT) partitions, or any combination thereof. It should be noted that the term "block" or "video block" as used herein may be a part of a frame or picture, in particular a rectangular (square or non-square) part. For example, referring to HEVC and VVC, a Block or video Block may be or correspond to a Coding Tree Unit (CTU), a CU, a Prediction Unit (PU) or a Transform Unit (TU), and/or may be or correspond to a corresponding Block (e.g., coding Tree Block (Coding Tree Block, CTB), coding Block (CB), prediction Block (PB) or Transform Block (TB)) and/or to a sub-Block.

The prediction processing unit 41 may select one of a plurality of possible prediction coding modes, such as one of a plurality of intra prediction coding modes or one of a plurality of inter prediction coding modes, for the current video block based on the error result (e.g., the coding rate and the distortion level). The prediction processing unit 41 may provide the resulting intra prediction encoded block or inter prediction encoded block to the adder 50 to generate a residual block and to the adder 62 to reconstruct the encoded block for subsequent use as part of a reference frame. The prediction processing unit 41 also supplies syntax elements such as motion vectors, intra mode indicators, partition information, and other such syntax information to the entropy encoding unit 56.

To select an appropriate intra-prediction encoding mode for the current video block, intra-prediction processing unit 46 within prediction processing unit 41 may perform intra-prediction encoding of the current video block with respect to one or more neighboring blocks in the same frame as the current block to be encoded to provide spatial prediction. Motion estimation unit 42 and motion compensation unit 44 within prediction processing unit 41 perform inter-prediction encoding of the current video block relative to one or more prediction blocks in one or more reference frames to provide temporal prediction. Video encoder 20 may perform multiple encoding passes, for example, to select an appropriate encoding mode for each block of video data.

In some embodiments, motion estimation unit 42 determines the inter-prediction mode of the current video frame by generating a motion vector that indicates the displacement of a video block within the current video frame relative to a prediction block within a reference video frame according to a predetermined mode within the sequence of video frames. The motion estimation performed by the motion estimation unit 42 is a process of generating motion vectors that estimate the motion of the video block. The motion vector may, for example, indicate the displacement of a video block within a current video frame or picture relative to a predicted block within a reference frame associated with the current block encoded within the current frame. The predetermined pattern may designate video frames in the sequence as P-frames or B-frames. The intra BC unit 48 may determine the vector (e.g., block vector) for intra BC encoding in a manner similar to the manner in which the motion vector is determined by the motion estimation unit 42 for inter prediction, or may determine the block vector using the motion estimation unit 42.

The predicted block of a video block may be or may correspond to a block or reference block of a reference frame that is considered to closely match the video block to be encoded in terms of pixel differences that may be determined by a sum of absolute differences (Sum of Absolute Difference, SAD), a sum of squared differences (Sum of Square Difference, SSD), or other difference metric. In some implementations, video encoder 20 may calculate values for sub-integer pixel positions of reference frames stored in DPB 64. For example, video encoder 20 may insert values for a quarter-pixel position, an eighth-pixel position, or other fractional-pixel positions of the reference frame. Accordingly, the motion estimation unit 42 may perform a motion search with respect to the full pixel position and the fractional pixel position and output a motion vector with fractional pixel accuracy.

Motion estimation unit 42 calculates motion vectors for video blocks in inter-prediction encoded frames by comparing the locations of the video blocks with the locations of predicted blocks of reference frames selected from a first reference frame list (list 0) or a second reference frame list (list 1), each of which identifies one or more reference frames stored in DPB 64. The motion estimation unit 42 sends the calculated motion vector to the motion compensation unit 44 and then to the entropy encoding unit 56.

The motion compensation performed by the motion compensation unit 44 may involve acquiring or generating a prediction block based on the motion vector determined by the motion estimation unit 42. Upon receiving the motion vector for the current video block, motion compensation unit 44 may locate the prediction block to which the motion vector points in one of the reference frame lists, retrieve the prediction block from DPB 64, and forward the prediction block to adder 50. Adder 50 then forms a residual video block having pixel differences by subtracting the pixel values of the prediction block provided by motion compensation unit 44 from the pixel values of the current video block being encoded. The pixel differences forming the residual video block may include a luma component difference or a chroma component difference or both. Motion compensation unit 44 may also generate syntax elements associated with the video blocks of the video frames for use by video decoder 30 in decoding the video blocks of the video frames. The syntax elements may include, for example, syntax elements defining motion vectors used to identify the prediction block, any flags indicating the prediction mode, or any other syntax information described herein. Note that the motion estimation unit 42 and the motion compensation unit 44 may be highly integrated, but are illustrated separately for conceptual purposes.

In some embodiments, the intra BC unit 48 may generate vectors and obtain prediction blocks in a manner similar to that described above in connection with the motion estimation unit 42 and the motion compensation unit 44, but where the prediction blocks are in the same frame as the current block being encoded, and where the vectors are referred to as block vectors with respect to the motion vectors. In particular, the intra BC unit 48 may determine an intra prediction mode for encoding the current block. In some examples, intra BC unit 48 may encode the current block using various intra prediction modes, e.g., during separate encoding passes, and test its performance by rate-distortion analysis. Next, intra BC unit 48 may select an appropriate intra prediction mode from among the various tested intra prediction modes to use and generate an intra mode indicator accordingly. For example, the intra BC unit 48 may calculate a rate distortion value using rate distortion analysis for various tested intra prediction modes and select an intra prediction mode having the best rate distortion characteristics among the tested modes as the appropriate intra prediction mode to be used. Rate-distortion analysis typically determines the amount of distortion (or error) between an encoded block and the original uncoded block (encoded to produce the encoded block) and the bit rate (i.e., number of bits) used to produce the encoded block. The intra BC unit 48 may calculate ratios based on the distortion and rate of each encoded block to determine which intra prediction mode exhibits the best rate distortion value for the block.

In other examples, the intra BC unit 48 may use, in whole or in part, the motion estimation unit 42 and the motion compensation unit 44 to perform such functions for intra BC prediction in accordance with the embodiments described herein. In either case, for intra block copying, the prediction block may be a block that is considered to closely match the block to be encoded in terms of pixel differences, which may be determined by SAD, SSD, or other difference metrics, and the identification of the prediction block may include calculating the value of the sub-integer pixel location.

Whether the prediction block is from the same frame according to intra prediction or from a different frame according to inter prediction, video encoder 20 may form the residual video block by subtracting the pixel values of the prediction block from the pixel values of the current video block being encoded to form pixel differences. The pixel difference values forming the residual video block may include a luminance component difference and a chrominance component difference.

As described above, the intra-prediction processing unit 46 may perform intra-prediction on the current video block as an alternative to inter-prediction performed by the motion estimation unit 42 and the motion compensation unit 44, or intra-block copy prediction performed by the intra BC unit 48. In particular, intra-prediction processing unit 46 may determine an intra-prediction mode for encoding the current block. To this end, intra-prediction processing unit 46 may encode the current block using various intra-prediction modes, e.g., during separate encoding passes, and intra-prediction processing unit 46 (or a mode selection unit in some examples) may select an appropriate intra-prediction mode from among the tested intra-prediction modes for use. Intra-prediction processing unit 46 may provide information indicative of the selected intra-prediction mode of the block to entropy encoding unit 56. Entropy encoding unit 56 may encode information indicating the selected intra-prediction mode in the bitstream.

After the prediction processing unit 41 determines the prediction block of the current video block via inter prediction or intra prediction, the adder 50 forms a residual video block by subtracting the prediction block from the current video block. The residual video data in the residual block may be included in one or more TUs and provided to transform processing unit 52. The transform processing unit 52 transforms the residual video data into residual transform coefficients using a transform such as a discrete cosine transform (Discrete Cosine Transform, DCT) or a conceptually similar transform.

The transform processing unit 52 may send the resulting transform coefficients to the quantization unit 54. The quantization unit 54 quantizes the transform coefficient to further reduce the bit rate. The quantization process may also reduce the bit depth associated with some or all of the coefficients. The quantization level may be modified by adjusting quantization parameters. In some examples, quantization unit 54 may then perform a scan of a matrix including the quantized transform coefficients. Alternatively, entropy encoding unit 56 may perform the scan.

After quantization, entropy encoding unit 56 entropy encodes the quantized transform coefficients into a video bitstream using, for example, context adaptive variable length coding (Context Adaptive Variable Length Coding, CAVLC), context adaptive binary arithmetic coding (Context Adaptive Binary Arithmetic Coding, CABAC), syntax-based context adaptive binary arithmetic coding (SBAC), probability interval partition entropy (Probability Interval Partitioning Entropy, PIPE) coding, or other entropy encoding methods or techniques. The encoded bitstream may then be transmitted to a video decoder 30 as shown in fig. 1A, or archived in a storage device 32 as shown in fig. 1A for later transmission to or retrieval by the video decoder 30. Entropy encoding unit 56 may also entropy encode the motion vectors and other syntax elements of the current video frame being encoded.

The inverse quantization unit 58 and the inverse transform processing unit 60 apply inverse quantization and inverse transform, respectively, to reconstruct the residual video block in the pixel domain to generate a reference block for predicting other video blocks. As described above, motion compensation unit 44 may generate a motion compensated prediction block from one or more reference blocks of a frame stored in DPB 64. Motion compensation unit 44 may also apply one or more interpolation filters to the prediction block to calculate sub-integer pixel values for use in motion estimation.

Adder 62 adds the reconstructed residual block to the motion compensated prediction block generated by motion compensation unit 44 to generate a reference block for storage in DPB 64. The reference block may then be used as a prediction block by the intra BC unit 48, the motion estimation unit 42, and the motion compensation unit 44 to inter-predict another video block in a subsequent video frame.

Fig. 2B is a block diagram illustrating another exemplary video decoder 30 according to some embodiments of the present application. Video decoder 30 includes video data memory 79, entropy decoding unit 80, prediction processing unit 81, inverse quantization unit 86, inverse transform processing unit 88, adder 90, and DPB 92. The prediction processing unit 81 further includes a motion compensation unit 82, an intra prediction unit 84, and an intra BC unit 85. Video decoder 30 may perform a decoding process that is inverse to the encoding process described above in connection with fig. 1G with respect to video encoder 20. For example, the motion compensation unit 82 may generate prediction data based on the motion vector received from the entropy decoding unit 80, and the intra prediction unit 84 may generate prediction data based on the intra prediction mode indicator received from the entropy decoding unit 80.

In some examples, elements of video decoder 30 may be assigned to perform embodiments of the present application. Also, in some examples, embodiments of the present disclosure may divide between one or more units of video decoder 30. For example, the intra BC unit 85 may perform embodiments of the present application alone or in combination with other units of the video decoder 30 (e.g., the motion compensation unit 82, the intra prediction unit 84, and the entropy decoding unit 80). In some examples, video decoder 30 may not include intra BC unit 85, and the functions of intra BC unit 85 may be performed by other components of prediction processing unit 81 (e.g., motion compensation unit 82).

Video data memory 79 may store video data, such as an encoded video bitstream, to be decoded by other components of video decoder 30. For example, video data stored in video data memory 79 may be obtained from storage device 32, a local video source (e.g., a camera), via a wired or wireless network transfer of video data, or by accessing a physical data storage medium (e.g., a flash drive or hard disk). The video data memory 79 may include an encoded picture buffer (Coded Picture Buffer, CPB) that stores encoded video data from an encoded video bitstream. DPB 92 of video decoder 30 stores reference video data for use in decoding the video data by video decoder 30 (e.g., in intra-prediction encoding mode or inter-prediction encoding mode). Video data memory 79 and DPB 92 may be formed from any of a variety of memory devices, such as dynamic random access memory (dynamic random access memory, DRAM), including Synchronous DRAM (SDRAM), magnetoresistive RAM (Magneto-RESISTIVE RAM, MRAM), resistive RAM (RESISTIVE RAM, RRAM), or other types of memory devices. For illustration purposes, video data memory 79 and DPB 92 are depicted in fig. 2B as two distinct components of video decoder 30. It will be apparent to those skilled in the art that video data memory 79 and DPB 92 may be provided by the same memory device or separate memory devices. In some examples, video data memory 79 may be on-chip with other components of video decoder 30, or off-chip with respect to those components.

During the decoding process, video decoder 30 receives an encoded video bitstream representing video blocks of encoded video frames and associated syntax elements. Video decoder 30 may receive syntax elements at the video frame level and/or the video block level. Entropy decoding unit 80 of video decoder 30 entropy decodes the bitstream to generate quantized coefficients, motion vectors or intra-prediction mode indicators, and other syntax elements. Entropy decoding unit 80 then forwards the motion vector or intra prediction mode indicator and other syntax elements to prediction processing unit 81.

When a video frame is encoded as an intra prediction encoded (I) frame or as an intra encoding prediction block used in other types of frames, the intra prediction unit 84 of the prediction processing unit 81 may generate prediction data of a video block of the current video frame based on the signaled intra prediction mode and reference data from a previously decoded block of the current frame.

When a video frame is encoded as an inter-prediction encoded (i.e., B or P) frame, the motion compensation unit 82 of the prediction processing unit 81 generates one or more prediction blocks of a video block of the current video frame based on the motion vectors and other syntax elements received from the entropy decoding unit 80. Each prediction block may be generated from a reference frame within one of the reference frame lists. Video decoder 30 may construct a reference frame list based on the reference frames stored in DPB 92 using a default construction technique: list 0 and list 1.

In some examples, when video blocks are encoded according to the intra BC mode described herein, intra BC unit 85 of prediction processing unit 81 generates a prediction block for the current video block based on the block vectors and other syntax elements received from entropy decoding unit 80. The prediction block may be within a reconstructed region of the same picture as the current video block defined by video encoder 20.

The motion compensation unit 82 and/or the intra BC unit 85 determine prediction information for the video block of the current video frame by parsing the motion vector and other syntax elements, and then use the prediction information to generate a prediction block for the decoded current video block. For example, motion compensation unit 82 uses some of the received syntax elements to determine a prediction mode (e.g., intra-prediction or inter-prediction) for encoding a video block of a video frame, an inter-prediction frame type (e.g., B or P), construction information for one or more of the reference frame lists of the frame, a motion vector for each inter-prediction encoded video block of the frame, an inter-prediction state for each inter-prediction encoded video block of the frame, and other information for decoding the video block in the current video frame.

Similarly, the intra BC unit 85 may use some of the received syntax elements (e.g., flags) to determine that the current video block is predicted using: intra BC mode, construction information that the video blocks of the frame are within the reconstructed region and should be stored in DPB 92, block vectors for each intra BC predicted video block of the frame, intra BC prediction status for each intra BC predicted video block of the frame, and other information for decoding the video blocks in the current video frame.

Motion compensation unit 82 may also perform interpolation using interpolation filters to calculate interpolation values for sub-integer pixels of the reference block as used by video encoder 20 during encoding of the video block. In this case, motion compensation unit 82 may determine an interpolation filter used by video encoder 20 from the received syntax element and use the interpolation filter to generate the prediction block.

The dequantization unit 86 dequantizes quantized transform coefficients provided in the bitstream and entropy decoded by the entropy decoding unit 80 using the same quantization parameter calculated by the video encoder 20 for each video block in the video frame that is used to determine the degree of quantization. The inverse transform processing unit 88 applies an inverse transform (e.g., an inverse DCT, an inverse integer transform, or a conceptually similar inverse transform process) to the transform coefficients in order to reconstruct the residual block in the pixel domain.

After the motion compensation unit 82 or the intra BC unit 85 generates a prediction block for the current video block based on the vector and other syntax elements, the adder 90 reconstructs the decoded video block for the current video block by summing the residual block from the inverse transform processing unit 88 and the corresponding prediction block generated by the motion compensation unit 82 and the intra BC unit 85. A loop filter 91, such as a deblocking filter, SAO filter, and/or ALF, may be positioned between adder 90 and DPB 92 to further process the decoded video block. In some examples, loop filter 91 may be omitted and the decoded video block may be provided directly to DPB 92 by adder 90. The decoded video blocks in a given frame are then stored in DPB 92, which stores reference frames for subsequent motion compensation of the next video block. DPB 92 or a memory device separate from DPB 92 may also store decoded video for later presentation on a display device, such as display device 34 of fig. 1A.

In the current VVC and AVS3 standards, the motion information of the current encoded block is either copied from the spatially or temporally neighboring block specified by the merge candidate index or is obtained by an explicit signal of motion estimation. The focus of the present disclosure is to improve the accuracy of motion vectors of affine merge modes by improving the derivation method of affine merge candidates. For ease of describing the present disclosure, the proposed ideas are illustrated using the existing affine merge mode design in the VVC standard as an example. Note that while the existing affine pattern design in the VVC standard is used as an example throughout this disclosure, the proposed techniques may also be applied to different designs of affine motion prediction modes or other codec tools with the same or similar design spirit to those skilled in the art of modern video codec technology.

In a typical video codec process, a video sequence typically includes an ordered set of frames or pictures. Each frame may include three sample arrays, denoted SL, SCb, and SCr, respectively. SL is a two-dimensional array of luminance samples. SCb is a two-dimensional array of Cb chroma-sampling points. SCr is a two-dimensional array of Cr chroma-sampling points. In other examples, the frame may be monochromatic and thus include only one two-dimensional array of luminance samples.

As shown in fig. 1C, video encoder 20 (or more specifically, a partition unit in the prediction processing unit of video encoder 20) generates an encoded representation of a frame by first partitioning the frame into a set of CTUs. A video frame may include an integer number of CTUs ordered consecutively in raster scan order from left to right and top to bottom. Each CTU is the largest logical coding unit and the width and height of the CTU are signaled by video encoder 20 in the sequence parameter set such that all CTUs in the video sequence have the same size, i.e., one of 128 x 128, 64 x 64, 32 x 32, and 16 x 16. It should be noted that the application is not necessarily limited to a particular size. As shown in fig. 1D, each CTU may include one CTB of a luminance sample, two corresponding coding tree blocks of a chrominance sample, and syntax elements for coding the samples of the coding tree blocks. Syntax elements describe the properties of the different types of units of a pixel-encoded block and how the video sequence may be reconstructed at video decoder 30, including inter-or intra-prediction, intra-prediction modes, motion vectors, and other parameters. In a monochrome picture or a picture having three separate color planes, a CTU may include a single coding tree block and syntax elements for encoding and decoding samples of the coding tree block. The coding tree block may be an nxn sample block.

To achieve better performance, video encoder 20 may recursively perform tree partitioning (e.g., binary tree partitioning, trigeminal tree partitioning, quadtree partitioning, or a combination thereof) on the coded tree blocks of CTUs and divide the CTUs into smaller CUs. As depicted in fig. 1E, 64 x 64ctu 400 is first divided into four smaller CUs, each having a block size of 32 x 32. Of the four smaller CUs, CUs 410 and CU 420 are each divided into four 16×16 CUs by block size. The two 16 x 16 CUs 430 and 440 are each further divided into four 8x 8 CUs by block size. Fig. 1F depicts a quadtree data structure illustrating the final result of the partitioning process of CTU 400 as depicted in fig. 1E, each leaf node of the quadtree corresponding to one CU having a respective size in the range of 32 x 32 to 8x 8. Similar to the CTU depicted in fig. 1D, each CU may include two corresponding encoded blocks of CBs and chroma samples of luma samples of the same size frame, and syntax elements for encoding and decoding the samples of the encoded blocks. In a monochrome picture or a picture having three separate color planes, a CU may comprise a single coding block and syntax structures for encoding samples of the coding block. It should be noted that the quadtree partitions depicted in fig. 1E-1F are for illustration purposes only, and that one CTU may be partitioned into multiple CUs to accommodate different local characteristics based on quadtree/trigeminal tree/binary tree partitions. In a multi-type tree structure, one CTU is partitioned in a quadtree structure, and each quadtree leaf CU may be further partitioned in a binary tree structure or a trigeminal tree structure. As shown in fig. 3A to 3E, there are five possible partition types for the encoded blocks having width W and height H, namely, a quad partition, a horizontal binary partition, a vertical binary partition, a horizontal trigeminal partition, and a vertical trigeminal partition.

In some implementations, video encoder 20 may further partition the coding blocks of the CU into one or more mxn PB. PB is a rectangular (square or non-square) block of samples to which the same prediction (inter or intra) is applied. The PU of a CU may include a PB of a luma sample, two corresponding PB of chroma samples, and syntax elements for predicting PB. In a monochrome picture or a picture having three separate color planes, a PU may include a single PB and syntax structures for predicting the PB. Video encoder 20 may generate a predicted luma block, a predicted Cb block, and a predicted Cr block for luma PB, cb PB, and Cr PB of each PU of the CU.

Video encoder 20 may use intra-prediction or inter-prediction to generate the prediction block for the PU. If video encoder 20 uses intra-prediction to generate the prediction block of the PU, video encoder 20 may generate the prediction block of the PU based on decoded samples of the frame associated with the PU. If video encoder 20 uses inter prediction to generate the prediction block of the PU, video encoder 20 may generate the prediction block of the PU based on decoded samples of one or more frames other than the frame associated with the PU.

After video encoder 20 generates the predicted luma block, the predicted Cb block, and the predicted Cr block of the one or more PUs of the CU, video encoder 20 may generate a luma residual block of the CU by subtracting the predicted luma block of the CU from the original luma coded block of the CU such that each sample in the luma residual block of the CU indicates a difference between a luma sample in one of the predicted luma blocks of the CU and a corresponding sample in the original luma coded block of the CU. Similarly, video encoder 20 may generate Cb residual blocks and Cr residual blocks of the CU, respectively, such that each sample in a Cb residual block of the CU indicates a difference between a Cb sample in one of the predicted Cb blocks of the CU and a corresponding sample in the original Cb encoded block of the CU, and each sample in a Cr residual block of the CU may indicate a difference between a Cr sample in one of the predicted Cr blocks of the CU and a corresponding sample in the original Cr encoded block of the CU.

Further, as illustrated in fig. 1E, video encoder 20 may use quadtree partitioning to decompose a luma residual block, a Cb residual block, and a Cr residual block of a CU into one or more luma transform blocks, cb transform blocks, and Cr transform blocks, respectively. The transform block is a rectangular (square or non-square) block of samples to which the same transform is applied. The TUs of a CU may include a transform block of luma samples, two corresponding transform blocks of chroma samples, and syntax elements for transforming the transform block samples. Thus, each TU of a CU may be associated with a luma transform block, a Cb transform block, and a Cr transform block. In some examples, the luma transform block associated with a TU may be a sub-block of a luma residual block of a CU. The Cb transform block may be a sub-block of a Cb residual block of the CU. The Cr transform block may be a sub-block of a Cr residual block of the CU. In a monochrome picture or a picture having three separate color planes, a TU may comprise a single transform block and syntax structures for transforming the samples of the transform block.

Video encoder 20 may apply one or more transforms to the luma transform block of the TU to generate a luma coefficient block of the TU. The coefficient block may be a two-dimensional array of transform coefficients. The transform coefficients may be scalar quantities. Video encoder 20 may apply one or more transforms to the Cb transform block of the TU to generate a Cb coefficient block of the TU. Video encoder 20 may apply one or more transforms to the Cr transform blocks of the TUs to generate Cr coefficient blocks of the TUs.

After generating the coefficient block (e.g., the luma coefficient block, the Cb coefficient block, or the Cr coefficient block), video encoder 20 may quantize the coefficient block. Quantization generally refers to the process of quantizing transform coefficients to potentially reduce the amount of data used to represent the transform coefficients, thereby providing further compression. After video encoder 20 quantizes the coefficient block, video encoder 20 may entropy encode syntax elements that indicate the quantized transform coefficients. For example, video encoder 20 may perform CABAC on syntax elements indicating quantized transform coefficients. Finally, video encoder 20 may output a bitstream including a sequence of bits forming a representation of the codec frames and associated data, which is stored in storage device 32 or transmitted to destination device 14.

Upon receiving the bitstream generated by video encoder 20, video decoder 30 may parse the bitstream to obtain syntax elements from the bitstream. Video decoder 30 may reconstruct the frames of video data based at least in part on the syntax elements obtained from the bitstream. The process of reconstructing video data is generally the inverse of the encoding process performed by video encoder 20. For example, video decoder 30 may perform an inverse transform on the coefficient blocks associated with the TUs of the current CU to reconstruct residual blocks associated with the TUs of the current CU. Video decoder 30 also reconstructs the coding block of the current CU by adding samples of the prediction block of the PU of the current CU to corresponding samples of the transform block of the TU of the current CU. After reconstructing the encoded blocks of each CU of the frame, video decoder 30 may reconstruct the frame.

As described above, video codec mainly uses two modes, i.e., intra prediction (or intra prediction) and inter prediction (or inter prediction) to achieve video compression. Note that IBC may be considered as intra prediction or third mode. Between these two modes, inter prediction contributes more to coding efficiency than intra prediction because it uses motion vectors to predict the current video block from the reference video block.

But with ever-improving video data capture techniques and finer video block sizes for preserving details in video data, the amount of data required to represent the motion vector of the current frame has also increased substantially. One way to overcome this challenge is to benefit from the fact that: not only are a set of neighboring CUs in the spatial and temporal domains having similar video data for prediction purposes, but the motion vectors between these neighboring CUs are also similar. Thus, the motion information of spatially neighboring CUs and/or temporally co-located CUs may be used as an approximation of the motion information (e.g., motion vector) of the current CU, also referred to as the "motion vector predictor" (Motion Vector Predictor, MVP) of the current CU, by exploring the spatial and temporal dependencies of the CUs.

Instead of encoding the actual motion vector of the current CU as determined by the motion estimation unit as described above in connection with fig. 1B as a video bitstream, the motion vector predictor of the current CU is subtracted from the actual motion vector of the current CU to generate a motion vector difference (Motion Vector Difference, MVD) for the current CU. In so doing, there is no need to encode the motion vector determined by the motion estimation unit for each CU of the frame as a video bitstream, and the amount of data used to represent motion information in the video bitstream can be significantly reduced.

As with the process of selecting a prediction block in a reference frame during inter-prediction of an encoded block, a set of rules need to be employed by both video encoder 20 and video decoder 30 for constructing a motion vector candidate list (also referred to as a "merge list") for the current CU using those potential candidate motion vectors associated with spatially neighboring CUs and/or temporally co-located CUs of the current CU, and then selecting one member from the motion vector candidate list as the motion vector predictor for the current CU. In so doing, the motion vector candidate list itself need not be transmitted from video encoder 20 to video decoder 30, and the index of the selected motion vector predictor within the motion vector candidate list is sufficient for video encoder 20 and video decoder 30 to use the same motion vector predictor within the motion vector candidate list to encode and decode the current CU.

Like all previous video codec standards, ECM builds on a block-based hybrid video codec framework. The present disclosure is directed to further improving the codec efficiency of a symbol prediction tool applied in an ECM.

Geometric partitioning mode (Geometric partitioning mode GPM)

In VVC, inter prediction supports geometric partition modes. The geometric partition mode is signaled by a CU level flag as a special merge mode. In current GPM designs, the GPM mode supports a total of 64 partitions for each possible CU size (excluding 8 x 64 and 64 x 8) that is not less than 8 and not greater than 64 in width and height.

When this mode is used, the CU is split into two parts by geometrically located straight lines, as shown in fig. 4. The location of the split line is mathematically derived from the angle and offset parameters of the particular partition. Inter-predicting each part of the geometric partition in the CU using its own motion; each partition only allows unidirectional prediction, i.e. each part has one motion vector and one reference index. Unidirectional prediction motion constraints are applied to ensure that, as with conventional bi-prediction, only two types of motion compensated prediction are required per CU. If a geometric partition mode is used for the current CU, a geometric partition index indicating the partition mode (angle and offset) of the geometric partition and two merge indexes (one for each partition) are further signaled. The value of the largest GPM candidate size is explicitly signaled at the sequence level.

Unidirectional prediction candidate list construction

In order to obtain a uni-directional predicted motion vector of a geometric partition, a uni-directional predicted candidate list is first obtained directly from the conventional merge candidate list generation process. N is denoted as the index of the unidirectional predicted motion in the geometric unidirectional prediction candidate list. The LX motion vector of the nth merge candidate (X equals the parity of n) is used as the nth uni-directional predicted motion vector of the geometric partition mode. These motion vectors are marked with an "x" in fig. 5. In the case where the corresponding LX motion vector of the nth extension merge candidate does not exist, the L (1-X) motion vector of the same candidate is used as the unidirectional prediction motion vector of the geometric partition mode.

Edge blending along geometric partitions

After each geometric partition is obtained using its own motion, a blend is applied to the two unidirectional prediction signals to obtain samples around the edges of the geometric partition. The blending weight for each location of the CU is derived based on the distance from each individual sample location to the corresponding partition edge.

As shown in fig. 14. The distance (or displacement) d (x _c,y_c) from any location within the block to the partition edge (or partition boundary) is mathematically defined by the Hessian norm form.

Wherein x _c and y _c represent positions relative to the center of the block; Represents an angle parameter, and ρ represents an offset parameter for the partition boundary.

In practice, in order to perform displacement calculations, both the angle parameter and the offset parameter are quantized to integers, i.e.,

d(x_c,y_c)＝((x_c+ρ_x,j)cosLut[i])＞＞3+((y_c+ρ_y,j)cosLut[(i+8)％32])＞＞3

Where ρ _x,j and ρ _y,j are the offsets quantized according to the width and height of the block; and cosLut i is represented as a quantized cosine lookup table of the angle parameter index i.

Finally, the successive sample positions (x _c,y_c) are quantized to integer positions (m, n), and the displacement d (m, n) is given by d (m, n) = ((m+ρ _x.j)＜＜1-w+1)cosLut[i]+((n+ρ_y,j) < 1-h+1) cosLut [ (i+8)% 32].

A corresponding example is shown in fig. 15.

The relationship between quantized d (m, n) and d (x _c,y_c) is given by

As shown in fig. 16, soft blend regions of width θ luminance samples are defined on both sides of the partition boundary. Outside the soft mixing region, only a weight value of 0 or 8 can be selected. In the soft blending region, a ramp function is used to calculate the weight value ω (x _c,y_c)

The ramp function is also quantized to integer positions to obtain the weight values ω (m, n) used in the mixing process of the GPM, that is,

ω(m,n)＝Clip3(0,8,(d(m,n)+32+4)＞＞3)

Two mixing matrices (W ₀ and W ₁) are generated using the values of these different locations. The GPM prediction is given by

GPM signal transmission design

According to current GPM designs, the use of a GPM is indicated by signaling a flag at the CU level. The flag is signaled only when the current CU is encoded by merge mode or skip mode. Specifically, when the flag equals one, it indicates that the current CU is predicted by the GPM. Otherwise (flag equal to zero), the CU is encoded by another merge mode, such as a conventional merge mode, a merge mode with motion vector difference, combined inter and intra prediction, etc. When GPM is enabled for the current CU, a syntax element (i.e., merge_gpm_partition_idx) is further signaled to indicate the applied geometric partition mode (which specifies the direction of the line splitting the CU into two partitions and the offset relative to the CU center, as shown in fig. 4). Thereafter, two syntax elements merge_gpm_idx0 and merge_gpm_idx1 are signaled to indicate indexes of uni-directional prediction merge candidates for the first and second GPM partitions. More specifically, the two syntax elements are used to determine the uni-directional MVs of the two GPM partitions from the uni-directional prediction merge list described in the "uni-directional prediction merge list construction" section. According to the current GPM design, in order to make the two uni-directional MVs more different, the two indices cannot be identical. Based on such a priori knowledge, the uni-directional prediction merge index of the first GPM partition is signaled first and used as a predictor to reduce the signaling overhead of the uni-directional prediction merge index of the second GPM partition. In detail, if the second unidirectional prediction merge index is smaller than the first unidirectional prediction merge index, its initial value is directly signaled. Otherwise (the second uni-directional prediction merge index is greater than the first uni-directional prediction merge index), its value is subtracted by one before being signaled to the bitstream. On the decoder side, the first uni-directional prediction merge index is first the decoder. Then, for decoding of the second unidirectional prediction merge index, if the resolution value is smaller than the first unidirectional prediction merge index, setting the second unidirectional prediction merge index equal to the resolution value; otherwise (the resolution value is equal to or greater than the first unidirectional prediction merge index), the second unidirectional prediction merge index is set equal to the resolution value plus one. Table 1 illustrates existing syntax elements for the GPM mode in the current VVC specification.

Table 1 existing GPM syntax elements in the consolidated data syntax table of the VVC specification

On the other hand, in current GPM designs, truncated unary codes are used for binarization of two unidirectional prediction merge indexes (i.e., merge_gpm_idx0 and merge_gpm_idx1). Additionally, since the two uni-directional prediction merge indexes may not be identical, different maxima are used to truncate the codewords of the two uni-directional prediction merge indexes, which are set equal to MaxGPMMergeCand-1 and MaxGPMMergeCand-2 for merge_gpm_idx0 and merge_gpm_idx1, respectively. MaxGPMMergeCand is the number of candidates in the uni-directional prediction merge list. On the decoder side, when the received value of merge_gpm_idx1 is equal to or greater than the value of merge_gpm_idx0, the value of merge_gpm_idx1 will increase by 1 in view of the fact that the values of merge_gpm_idx0 and merge_gpm_idx1 may not be identical. When the GPM mode is applied, two different binarization methods are applied to convert the syntax merge_gpm_part_idx into a binary bit string. Specifically, the syntax element is binarized by a fixed length code and a truncated binary code in VVC.

Motion signal transmission for normal inter mode

Similar to the HEVC standard, both VVC and AVS3 allow one inter CU to explicitly specify its motion information in the bitstream, except for merge/skip mode. In general, the motion information signaling in both VVC and AVS3 remains the same as in the HEVC standard. Specifically, an inter prediction syntax (i.e., inter pred idc) is first signaled to indicate whether the prediction signal is from list L0, list L1, or both. For each reference list used, the corresponding reference picture is identified by signaling one reference picture index ref_idx_lx (x=0, 1) of the corresponding reference list, and the corresponding MV is represented by one MVP index mvp_lx_flag (x=0, 1) used to select the MV predictor (MVP), followed by its motion vector difference (motion vector difference, MVD) between the target MV and the selected MVP. In addition, in the VVC standard, a control flag mvd_l1_zero_flag is signaled at the stripe level. Signaling an L1 MVD in the bitstream when mvd_l1_zero_flag is equal to 0; otherwise (when mvd_l1_zero_flag flag is equal to 1), the L1 MVD is not signaled and its value is always inferred to be zero at the encoder and decoder.

Bi-prediction with CU-level weights

In the previous standard before VVC and AVS3, when weighted prediction (weighted prediction, WP) is not applied, the bi-directional prediction signal is generated by averaging the uni-directional prediction signals obtained from the two reference pictures. In VVC, in order to improve the efficiency of bi-prediction, a tool codec, bi-prediction with CU-level weights (bi-prediction with CU-LEVEL WEIGHT, BCW), is introduced. Specifically, instead of simple averaging, bi-prediction in BCW is extended by allowing weighted averaging of two prediction signals, as depicted below:

P′(i,j)＝((8-w)·P₀(i,j)+w·P₁(i,j)+4)＞＞3

In VVC, when the current picture is a low-delay picture, the weight of one BCW coded block is allowed to be selected from a set of predefined weight values we { -2,3,4,5,10} and weight 4 represents the conventional bi-prediction case where the two uni-directional prediction signals are equally weighted. For low delays, only 3 weights w e {3,4,5} are allowed. In general, while WP and BCW share some similarities in design, both of these codec tools address the illumination variation problem at different granularity. However, because interactions between WP and BCW may complicate VVC design, the two tools are not allowed to be enabled simultaneously. Specifically, when WP is enabled for one stripe, BCW weights of all bi-predictive CUs in the stripe are not signaled and inferred as 4 (i.e., equal weights are applied).

Template matching

Template matching (TEMPLATE MATCHING, TM) is a decoder-side MV derivation method for refining the motion information of the current CU by finding the best match between one template consisting of top and left-side neighboring reconstructed samples of the current CU and a reference block in the reference picture (i.e., the same size as the template). As shown in fig. 6, an MV is searched for around the initial motion of the current CU within the [ -8, +8] pixel search range. The best match may be defined as the MV that achieves the lowest matching cost, e.g., sum of absolute differences (sum of absolute difference, SAD), sum of absolute transform differences (sum of absolute transformed difference, SATD), etc., between the current and reference templates. There are two different ways to apply the TM mode to inter-frame coding, as described below.

In AMVP mode, MVP candidates are determined based on the template matching differences to pick the one that achieves the smallest difference between the current block template and the reference block template, and then TM is performed only on that particular MVP candidate for MV refinement. The TM refines the MVP candidates by starting with full pixel MVD precision (or 4 pixels for 4-pixel AMVR mode) within the [ -8, +8] pixel search range using an iterative diamond search. AMVP candidates may be further refined from AMVR mode by using a cross search with full pixel MVD precision (or 4 pixels for 4-pixel AMVR mode) followed by half pixel and quarter pixel precision in order, as specified in table 2 below. This search process ensures that the MVP candidates still maintain the same MV precision after the TM process as indicated by the AMVR mode.

TABLE 2

In the merge mode, a similar search method is applied to the merge candidates indicated by the merge index. As shown in table 2 above, TM may perform up to 1/8 pixel MVD precision or skip those merge candidates that exceed half pixel MVD precision depending on whether an alternative interpolation filter (used when AMVR adopts half pixel mode) is used based on the merged motion information.

Decoder-SIDE INTRA Mode Derivation (DIMD)

DIMD is an intra coding tool in which luma intra prediction modes (intra prediction mode, IPM) are not transmitted via a bitstream. Instead, it is derived in the same way at the encoder and decoder using previously encoded/decoded pixels. The DIMD method performs texture gradient processing to obtain 2 best modes. These two modes and the planar mode are then applied to the block and their predictions are weighted averaged. The selection of DIMD is signaled in the bitstream for the intra-coded block using a flag. At the decoder, if DIMD flag is true, the intra prediction mode is derived using the same previously encoded neighboring pixels in the reconstruction process. If not, the intra prediction mode is parsed from the bitstream as in the classical intra codec mode.

In order to obtain the intra prediction mode of a block, a set of neighboring pixels must first be selected and a gradient analysis must be performed on the selected set of neighboring pixels. For normalization purposes, these pixels should be in the decoded/reconstructed pixel pool. As shown in fig. 7, a template surrounding the current block with T pixels on the left and T pixels above may be selected. Next, gradient analysis may be performed on the pixels of the template. This allows determining the dominant angular direction of the template, assuming that there is a high probability that the dominant angular direction is the same as the dominant angular direction of the current block (and this is the core premise of the present disclosure). Thus, a simple 3×3 sobel gradient filter can be used, which is defined by the following matrices, which are to be convolved with the templates:

And

For each pixel of the template, each of these two matrices may be point-wise multiplied with a 3 x 3 window centered on the current pixel and made up of its 8 immediate neighbors, and the results may be summed. Thus, two values Gx (from the product with Mx) and Gy (from the product with My) corresponding to the gradient at the current pixel can be obtained in the horizontal direction and the vertical direction, respectively.

Fig. 8 shows a convolution process. Pixel 801 is the current pixel. Pixels 803 and 801 are pixels that can perform gradient analysis. Pixel 802 is a pixel that cannot be gradient analyzed due to the lack of some neighbors. Pixel 804 is an available (reconstructed) pixel outside of the template under consideration for gradient analysis of pixel 803. If a pixel 804 is not available (e.g., because the block is too close to the picture boundary), then no gradient analysis is performed for all pixels 803 that use that pixel 804. For each pixel 803, the intensity (G) and orientation (O) of the gradient can be calculated using Gx and Gy as follows:

g= |g _x|+|G_y |sum

The orientation of the gradient is then converted to intra-frame angle prediction mode, which is used to index the histogram (first initialized to zero). The histogram value in intra angle mode is increased by G. For intra angle modes within each frame, once all pixels 803 in the template have been processed, the histogram will contain the cumulative value of the gradient intensity. IPM corresponding to the two highest histogram bars is selected for the current block. If the maximum value in the histogram is 0 (meaning that gradient analysis cannot be performed or the region constituting the template is flat), a DC mode is selected as an intra prediction mode for the current block.

Two IPMs corresponding to the two highest directional gradient histogram (histogram of oriented gradient, hoG) bars are combined with the planar mode. The prediction fusion is applied as a weighted average of the three predictors described above. For this purpose, the weight of the plane is fixed to 21/64 (-1/3). The remaining weight of 43/64 (-2/3) is then shared between the two HoG IPMs in proportion to the magnitude of their HoG bars. Fig. 9 visualizes this process.

The derived intra mode is included in the main list of the most probable modes (most probable mode, MPM) within the frame, so the DIMD procedure is performed before constructing the MPM list. The main derived intra mode of DIMD blocks is stored with the blocks and used for MPM list construction of neighboring blocks.

Template-based intra mode derivation (Template-Based Intra Mode Derivation, TIMD)

For each intra mode in the MPM, the sum of absolute transform differences (sum of absolute transformed difference, SATD) between the prediction and reconstruction samples of the template region shown in fig. 10 is calculated, and the first two modes are selected with the intra mode of minimum SATD cost and then fused with weights, and such weighted intra prediction is used to encode the current CU.

The costs of the two selected modes are compared to a threshold and in the test, a cost factor of 2 is applied as follows:

costMode2<2*costMode1。

if the condition is true, fusion is applied, otherwise only mode 1 is used.

The weights of the patterns are calculated from their SATD costs as follows:

weight 1= costMode 2/(costMode 1+ costMode 2)

Weight 2=1-weight 1.

Geometric partition pattern using template matching (TEMPLATE MATCHING, TM)

In ECM, template Matching (TM) is applied on the basis of geometric partition patterns. When the GPM is enabled for the current CU, two sets of unidirectional motion information of the GPM are obtained from the GPM merge candidate list for each part of the GPM, respectively. The GPM merge candidate list is constructed as follows.

In one example, interleaved list 0MV candidates and list 1MV candidates are obtained directly from the conventional merge candidate list, where the list 0MV candidates have a higher priority than the list 1MV candidates. A pruning method is applied in which the adaptive threshold is based on the current CU size to remove redundant MV candidates.

In another example, the interleaved list 1MV candidate and list 0MV candidate are further derived directly from the conventional merge candidate list, wherein the list 1MV candidate has a higher priority than the list 0MV candidate. The same pruning method with adaptive thresholds is also applied to remove redundant MV candidates.

In another example, zero MV candidates are filled until the GPM candidate list is full.

A CU level flag may be further signaled to indicate that TM is enabled for the GPM, i.e. two motion vectors of the GPM are further refined using template matching. During this template matching, one of the following template types, i.e. top (a), left (L), top Fang Jiazuo (a+l) of the current block, will be used for refinement. In the current solution of ECM3.1 (derived from JVET W0065), the template type is selected based on the angle parameters of the GPM as shown in table 3 below.

TABLE 3 Table 3

The motion is then refined by minimizing the difference between the current template and the template in the reference picture using the same search pattern that disables the merge mode of the half-pixel interpolation filter.

GPM splitting mode reordering based on template matching

In VVC and ECM-3.1, there are 64 GPM split modes, which use a fixed length binary code to signal the split mode used by each GPM Coding Unit (CU). This codec method may mean that all GPM splitting patterns are treated as equiprobable events, so that fixed length codes can be used for signaling accordingly.

A GPM splitting pattern reordering method based on template matching is proposed for the first time in file JVET-Y0135 of JVET. The template matching cost for each GPM split pattern is calculated and the split patterns are reordered based on cost at the encoder side and decoder side. Only the best N (where N is less than or equal to 64) candidates are available. The GPM mode index is signaled using a variable length code, such as a Golomb-Rice code, instead of a fixed length binary code.

After generating the corresponding reference templates of the two GPM partitions in the coding unit, the reordering method of the GPM splitting pattern is a two-step process as follows.

First, the reference templates of the two GPM partitions are mixed (i.e., 64 mixed reference templates are generated) using the respective weights of the split patterns, and the respective TM costs of these mixed reference templates are calculated;

Next, the TM costs are reordered in ascending order and the best N candidates are marked as available split modes.

As shown in fig. 11, the edges on the template extend from the edges of the current CU. The computation of the corresponding weights used in the template mixing process is similar to the GPM weight derivation process. The only differences are as follows.

First, the locations of the samples on the template (relative to the original locations of the CUs) are used to derive weights.

In addition, the weights are mapped to 0 and 8 depending on which is closer before use, so the edges on the template are sharp to simplify the computation during the template blending process.

GPM with inter-and intra-prediction

In the example of a GPM design, two unidirectional predicted inter-prediction is used to generate the final prediction. JVET-X0166 and JVET-Y0065 propose a method that combines inter-prediction and intra-prediction of GPM.

In a GPM with inter-prediction and intra-prediction, final prediction samples are generated by weighting inter-prediction samples and intra-prediction samples for each GPM split region. Each section contains a flag indicating whether inter-prediction or intra-prediction is used. Inter-prediction samples are obtained by the same scheme as the current GPM, while intra-prediction samples are obtained by an intra-prediction mode (intra prediction mode, IPM) candidate list and an index signaled from the encoder. The IPM candidate list size is predefined as 3. The available IPM candidates are a parallel angle mode (parallel mode) for the GPM block boundary, a vertical angle mode (vertical mode) for the GPM block boundary, and a planar mode as shown in fig. 12A to 12C, respectively. In addition, the GPM with intra prediction and intra prediction as shown in fig. 12D is limited in the proposed method to reduce signaling overhead of IPM and to avoid an increase in intra prediction circuit size on the hardware decoder. In addition, direct motion vector and IPM storage is introduced in the GPM mix area to further improve codec performance.

In addition, the IPM list within a GPM frame may be further improved by DIMD, TIMD, and angle modes of neighboring blocks. More specifically, the parallel mode is first used in the IPM list, and then IPM candidates of neighbor TIMD, DIMD, and angle mode are used, thereby performing pruning between candidates.

As for the derivation of the neighbor mode, there are five positions at maximum for the neighbor block, but these positions are limited by the GPM block boundary angle, as shown in table 4 below.

TABLE 4 Table 4

GPM splitting and reordering method based on template matching is proposed in JVET-Y0135 for the first time. However, in some cases, the template matching cost values for several different modes are equal. For example, when split patterns are not passed through the templates, the final hybrid template is equal to one of the unidirectional predictors, and in these patterns, the template matching cost values are equal. In this case, an ascending order (default order) or split mode is used.

In another example, when the template matching method is not applied under certain conditions, for example, when the template matching based GPM motion refinement is applied, the template matching based split pattern reordering in JVET-Y0135 is disabled and conventional signaling in ascending order of split patterns (default order) is used.

In another example, if reordered templates based on template matching are not available, the first N patterns in ascending order (default order) will be used. However, ascending order (default order) is suboptimal for context-based mode signaling.

To solve the above-described problems, the present disclosure is proposed to solve the suboptimal problem when the template matching-based reordering is not applied.

In some examples, as in current split pattern reordering methods based on template matching, at the decoder side, templates of predictors are mixed together using hard masks to generate one mixed template for each of the 64 split patterns in the GPM. The mixed template is compared with the template of the current block and the distortion cost between them is calculated. And reordering the split modes according to the ascending order of the corresponding template cost. And according to the parsed GPM splitting mode grammar index (indicating the position in the reordered splitting mode), the splitting mode which is finally used is obtained. The GPM mode syntax index is signaled using a context model and has a maximum possible value of N, where N is equal to or less than 63 (the total number of GPM split modes minus one).

In some examples, when several split modes have equal distortion cost values, reordering does not depend on the cost values, but on the default index of the split mode. For example, if split mode 1 and split mode 2 have the same cost value. Mode 1 is reordered before mode 2 because mode number 1 is smaller than mode number 2. In other examples, if split patterns i, i+1, and i+2 have the same cost value, where i ε [0, 63-2], then after reordering based on template matching, the order of the three patterns is i, i+1, and i+2.

In these examples, instead of using a default order (mode index ascending order), a predefined order is used for the case of equal distortion cost values. In one example, the predefined order depends on frequency statistics, as shown in fig. 17. That is, split mode 18 has the highest priority at equal cost, split mode 1 has the second highest priority at equal cost, and so on. In the present disclosure, the predefined priority order shown in fig. 17 is only an example, and the predefined order or rule may be different.

On the decoder side, the split modes of the GPM are first reordered by the template matching based reordering method described in JVET-Y0135, and when several split modes contain the same distortion cost value, these modes are again reordered locally according to the predefined priority order described above. For example, when split pattern 18 and split pattern 1 contain the same distortion cost value, pattern 18 will be placed before split pattern 1 in the final GPM split pattern order list. The parsing process of the signaled GPM split pattern syntax index and the derivation process of the end-use split pattern are the same as in the current design (JVET-Y0135).

In some examples, the method may also be applicable to cases where all distortion cost values are zero. For example, when templates for template matching are not available, a predefined order may be used instead of a default order. Furthermore, when template matching based GPM motion refinement is enabled, split pattern reordering will be disabled, but a predefined priority order may be used instead of the default order.

Fig. 13 illustrates a computing environment (or computing device) 1310 coupled with a user interface 1360. The computing environment 1310 may be part of a data processing server. In some embodiments, computing device 1310 may perform any of the various methods or processes (e.g., encoding/decoding methods or processes) as described above in accordance with various examples of the disclosure. The computing environment 1310 may include a processor 1320, memory 1340, and an I/O interface 1350.

Processor 1320 typically controls the overall operation of computing environment 1310, such as operations associated with display, data acquisition, data communication, and image processing. Processor 1320 may include one or more processors for executing instructions to perform all or some of the steps of the methods described above. Further, processor 1320 may include one or more modules that facilitate interactions between processor 1320 and other components. The processor may be a central processing unit (Central Processing Unit, CPU), microprocessor, single-chip, GPU, or the like.

Memory 1340 is configured to store various types of data to support the operation of computing environment 1310. Memory 1340 may include predetermined software 1342. Examples of such data include instructions, video data sets, image data, and the like for any application or method operating on computing environment 1310. The memory 1340 may be implemented using any type or combination of volatile or non-volatile memory devices, such as static random access memory (static random access memory, SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (erasable programmable read-only memory, EPROM), programmable read-only memory (programmable read-only memory, PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk, or optical disk.

I/O interface 1350 provides an interface between processor 1320 and peripheral interface modules (e.g., keyboard, click wheel, buttons, etc.). Buttons may include, but are not limited to, a home button, a start scan button, and a stop scan button. I/O interface 1350 may be coupled with an encoder and a decoder.

In some embodiments, a non-transitory computer readable storage medium is also provided, comprising a plurality of programs, such as embodied in memory 1340, executable by processor 1320 in computing environment 1310 for performing the methods described above. For example, the non-transitory computer readable storage medium may be ROM, RAM, CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

The non-transitory computer readable storage medium has stored therein a plurality of programs for execution by a computing device having one or more processors, wherein the plurality of programs, when executed by the one or more processors, cause the computing device to perform the motion prediction method described above.

In some embodiments, the computing environment 1310 may be implemented with one or more application-specific integrated circuits (ASICs), digital signal processors (DIGITAL SIGNAL processors, DSPs), digital signal processing devices (DIGITAL SIGNAL processing device, DSPDs), programmable logic devices (programmable logic device, PLDs), field-programmable gate arrays (FPGAs), graphics processing units (GRAPHICAL PROCESSING UNIT, GPUs), controllers, microcontrollers, microprocessors, or other electronic components to perform the above-described methods.

Fig. 18 is a flowchart illustrating a video decoding method according to an example of the present disclosure.

At step 1801, at the decoder side, the processor 1320 may obtain a plurality of prediction samples of the CU that are adjacent to the reconstructed samples.

In step 1802, the processor 1320 may reorder the plurality of GPM split modes according to the order table based on a distortion cost between a plurality of prediction samples of neighboring reconstructed samples associated with each GPM split mode and neighboring reconstructed samples of the CU to obtain a reordered list of GPM split modes.

In some examples, processor 1320 may reorder the one or more GPM split modes according to an ascending order of distortion costs in response to determining that the one or more GPM split modes have different distortion cost values.

In some examples, processor 1320 may reorder the one or more GPM split modes according to a sequence table in response to determining that the one or more GPM split modes have one and the same distortion cost value.

In some examples, processor 1320 may define the order table based on an ascending order of split mode indexes of the GPM split mode. In some examples, the order table may be fixed, but is not limited to fixed. In some examples, the predefined order table may be defined at a level, wherein the predefined order table is selected from a plurality of predefined order tables.

In some examples, a split mode index for the plurality of GPM split modes may be signaled in the bitstream using the context model, and a value of the split mode index is less than a total number of the plurality of GPM split modes.

In step 1803, the processor 1320 may obtain a GPM split mode index and then obtain a GPM split mode based on the GPM split mode index and a reorder list of GPM split modes.

In step 1804, the processor 1320 may obtain a GPM prediction value of the CU based on the GPM splitting pattern.

Fig. 19 is a flowchart illustrating a video encoding method corresponding to the video decoding method shown in fig. 18.

In step 1901, at the encoder side, processor 1320 may obtain a plurality of prediction samples of the CU that are adjacent to the reconstructed samples.

In step 1902, the processor 1320 may reorder the plurality of GPM split modes according to the order table based on a distortion cost between a plurality of predicted samples of neighboring reconstructed samples associated with each GPM split mode and neighboring reconstructed samples of the CU to obtain a reordered list of GPM split modes.

In some examples, processor 1320 may reorder the one or more GPM split modes according to an ascending order of distortion costs in response to determining that the one or more GPM split modes have different distortion cost values.

In some examples, processor 1320 may reorder the one or more GPM split modes according to a sequence table in response to determining that the one or more GPM split modes have one and the same distortion cost value.

In some examples, processor 1320 may define the order table based on an ascending order of split mode indexes of the GPM split mode. In some examples, the order table may be fixed, but is not limited to fixed. In some examples, the predefined order table may be defined at a level, wherein the predefined order table is selected from a plurality of predefined order tables.

In some examples, a split mode index for the plurality of GPM split modes may be signaled in the bitstream using the context model, and a value of the split mode index is less than a total number of the plurality of GPM split modes.

In step 1903, processor 1320 may obtain a GPM split mode index and then obtain a GPM split mode based on the GPM split mode index and a reorder list of GPM split modes.

In step 1904, processor 1320 may obtain a GPM prediction value for the CU based on the GPM split mode.

In some examples, an apparatus for video decoding is provided. The apparatus includes a processor 1320 and a memory 1340 configured to store instructions executable by the processor; wherein the processor, when executing the instructions, is configured to perform any of the methods as shown in fig. 18.

In some examples, an apparatus for video encoding is provided. The apparatus includes a processor 1320 and a memory 1340 configured to store instructions executable by the processor; wherein the processor, when executing the instructions, is configured to perform any of the methods as shown in fig. 19.

In some other examples, a non-transitory computer-readable storage medium having instructions stored therein is provided. The instructions, when executed by processor 1320, cause the processor to perform any of the methods as shown in fig. 18-19. In one example, a plurality of programs may be executed by processor 1320 in computing environment 1310 to receive (e.g., from video encoder 20 in fig. 1G) a bitstream or data stream including encoded video information (e.g., representing video blocks of encoded video frames and/or associated one or more syntax elements, etc.), and may also be executed by processor 1320 in computing environment 1310 to perform the above-described decoding method in accordance with the received bitstream or data stream. In another example, a plurality of programs may be executed by processor 1320 in computing environment 1310 to perform the encoding methods described above to encode video information (e.g., video blocks representing video frames and/or associated one or more syntax elements, etc.) into a bitstream or data stream, and may also be executed by processor 1320 in computing environment 1310 to transmit the bitstream or data stream (e.g., to video decoder 30 in fig. 2B). Alternatively, the non-transitory computer readable storage medium may have stored therein a bitstream or data stream comprising encoded video information (e.g., video blocks representing encoded video frames and/or associated one or more syntax elements, etc.) generated by an encoder (e.g., video encoder 20 in fig. 1G) using, for example, the encoding methods described above, for use by a decoder (e.g., video decoder 30 in fig. 2B) to decode video data. The non-transitory computer readable storage medium may be, for example, ROM, random-access memory (Random Access Memory, RAM), CD-ROM, magnetic tape, floppy disk, optical data storage device, etc.

Other examples of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following its general principles, including such departures from the present disclosure as come within known or customary practice in the art. It is intended that the specification and examples be considered as exemplary only.

It is to be understood that the present disclosure is not limited to the precise examples described above and shown in the drawings, and that various modifications and changes may be effected therein without departing from the scope thereof.

Claims (18)

1. A video decoding method, comprising:

Obtaining, by a decoder, a plurality of prediction samples of a Coding Unit (CU) adjacent to a reconstructed sample;

reordering, by the decoder, a plurality of Geometric Partition Mode (GPM) split modes according to a sequence table based on distortion costs between a plurality of prediction samples of neighboring reconstructed samples associated with each GPM split mode and neighboring reconstructed samples of the CU to obtain a reordered list of the plurality of GPM split modes; and

Obtaining, by the decoder, a GPM split mode index, and obtaining, by the decoder, a GPM split mode based on the GPM split mode index and the reorder list of the plurality of GPM split modes; and

A GPM predictor is obtained by the decoder based on the GPM split mode.

2. The method of claim 1, further comprising:

In response to determining that one or more GPM split modes have different distortion cost values, the one or more GPM split modes are reordered according to an ascending order of the distortion cost.

3. The method of claim 1, further comprising:

in response to determining that one or more GPM split modes have one and the same distortion cost value, the one or more GPM split modes are reordered according to the order table.

4. A method as in claim 3, further comprising:

The order table is defined by the decoder based on an ascending order of split mode indexes of the plurality of GPM split modes.

5. A method as in claim 3, further comprising:

The order table is defined by the decoder based on a predefined order table.

6. The method of claim 5, further comprising:

A level of the predefined order table is obtained by the decoder, wherein the predefined order table is selected from a plurality of predefined order tables.

7. The method of claim 1, wherein a context model is used to signal a split mode index for the plurality of GPM split modes, and a value of the split mode index is less than a total number of the plurality of GPM split modes.

8. A video encoding method, comprising:

obtaining, by an encoder, a plurality of prediction samples of a Coding Unit (CU) adjacent to a reconstructed sample;

reordering, by the encoder, a plurality of Geometric Partition Mode (GPM) split modes according to a sequence table based on distortion costs between a plurality of prediction samples of neighboring reconstructed samples associated with each GPM split mode and neighboring reconstructed samples of the CU to obtain a reordered list of the plurality of GPM split modes; and

Obtaining, by the encoder, a GPM split mode index, and obtaining, by the encoder, a GPM split mode based on the GPM split mode index and the reorder list of the plurality of GPM split modes; and

A GPM predictor is obtained by the encoder based on the GPM split mode.

9. The method of claim 8, further comprising:

In response to determining that one or more GPM split modes have different distortion cost values, the one or more GPM split modes are reordered according to an ascending order of the distortion cost.

10. The method of claim 8, further comprising

In response to determining that one or more GPM split modes have one and the same distortion cost value, the one or more GPM split modes are reordered according to the order table.

11. The method of claim 10, further comprising:

the order table based on an ascending order of split mode indexes of the plurality of GPM split modes is signaled by the encoder.

12. The method of claim 10, further comprising:

The order table based on a predefined order table is signaled by the encoder.

13. The method of claim 12, further comprising:

Signaling, by the decoder, a level of the predefined order table, wherein the predefined order table is selected from a plurality of predefined order tables.

14. The method of claim 8, wherein a context model is used to signal a split pattern index, and a value of the split pattern index is less than a total number of the plurality of GPM split patterns.

15. An apparatus for video decoding, comprising:

One or more processors; and

A memory coupled to the one or more processors and configured to store instructions executable by the one or more processors,

Wherein the one or more processors, when executing the instructions, are configured to perform the method of any of claims 1 to 7.

16. An apparatus for video encoding, comprising:

One or more processors; and

A memory coupled to the one or more processors and configured to store instructions executable by the one or more processors,

Wherein the one or more processors, when executing the instructions, are configured to perform the method of any of claims 8 to 14.

17. A non-transitory computer-readable storage medium for storing computer-executable instructions which, when executed by one or more computer processors, cause the one or more computer processors to receive a bitstream and perform the method of any of claims 1 to 7 based on the bitstream.

18. A non-transitory computer-readable storage medium for storing computer-executable instructions which, when executed by one or more computer processors, cause the one or more computer processors to perform the method of any of claims 8-14 to encode the CU into a bitstream and transmit the bitstream.