CN118551704A

CN118551704A - EM simulation optimization method based on electromagnetic joint simulation

Info

Publication number: CN118551704A
Application number: CN202410412563.5A
Authority: CN
Inventors: 夏文青; 陈俊凤; 刘亚新; 李起宏; 朱能勇
Original assignee: Shenzhen Huada Jiutian Technology Co ltd
Current assignee: Shenzhen Huada Jiutian Technology Co ltd
Priority date: 2024-04-08
Filing date: 2024-04-08
Publication date: 2024-08-27

Abstract

An EM simulation optimization method based on electromagnetic joint simulation comprises the following steps: providing an electromagnetic joint simulation menu in an interface for automatically identifying the layout; the electromagnetic joint simulation menu comprises: the method comprises the steps of creating a port at the connection part of an active device to be removed based on an original layout and the device simulated by using a model, recording the mapping relation between the port and the pin name of the device to be removed, and performing EM simulation on the port; and the electromagnetic joint simulation schematic diagram creating part is used for creating a schematic diagram after the EM simulation, connecting devices in the schematic diagram according to the mapping relation and generating a corresponding circuit schematic diagram. The invention can remove the active devices in the layout and perform EM simulation; after the EM simulation, the devices are automatically connected to obtain a schematic diagram of the subsequent simulation, so that the EM simulation flow of the circuit with the active devices is simplified, and the EM simulation efficiency is improved.

Description

EM simulation optimization method based on electromagnetic joint simulation

Technical Field

The invention relates to the technical field of radio frequency electromagnetic simulation, in particular to an EM simulation optimization method based on electromagnetic joint simulation.

Background

As Integrated Circuit (IC) components become increasingly complex, electromagnetic (EM) circuit simulation is critical to achieving accurate and efficient designs. The electromagnetic effects of the circuit can greatly change the voltage level, causing damage to the semiconductor device. With electromagnetic simulation, designers can evaluate the electromagnetic effect on the circuit, thereby avoiding this problem in advance with a heavy cost. Electromagnetic simulation enables a designer to accurately model most or all of a system.

EM simulation software is integrated in the radio frequency chip design software, and the function of the EM simulation software is to solve or approximately solve Maxwell equations by using a mathematical means. The solution of maxwell's equations is the electromagnetic properties of the object. The differential form of maxwell's equations represents the electromagnetic properties at one point, and the integral form represents the integral of the electromagnetic properties at those points, which is the overall electromagnetic properties.

In recent years, with the development of radio frequency circuit design, the application range of EM simulation software is wider and wider. Not only high frequencies, but also in the radio frequency range of several GHz. If electromagnetic field simulation software is not mastered, the design of the radio frequency circuit is greatly limited, devices such as a transmission line transformer and the like cannot be used, and a plurality of circuit technologies cannot be used. As circuit speeds become faster and packages become more complex, both circuit boards and packages now need to be verified using EM simulation software.

Generally, passive devices and transmission lines require EM simulation, while active devices such as transistors do not. Because passive devices such as resistors and capacitors are all metal structures, the concept of bias is not provided; the transistors are more dependent on the operating point, and the high frequency characteristics of the differently configured transistors are different and therefore not subject to EM simulation. However, the existing EM simulation technology ignores the point, and compared with a circuit with an active device, the EM simulation process is complicated and the simulation efficiency is low. It can be seen that there is still an improved direction for the research on EM simulation flow in radio frequency circuits, and innovative technologies are urgently needed to solve these problems.

Disclosure of Invention

In order to solve the defects of the prior art, the invention aims to provide an EM simulation optimization method based on electromagnetic joint simulation, which considers the electromagnetic effect of the whole circuit, mainly the electromagnetic effect of a passive device, in the process of designing and simulating an IC, can remove active devices which do not do EM simulation in the circuit, does not influence the connection relation of the circuit and subsequent simulation, simplifies the EM simulation flow of the circuit with the active devices, and improves the EM simulation efficiency.

In order to achieve the above object, the EM simulation optimization method based on electromagnetic joint simulation provided by the present invention includes:

Providing an electromagnetic joint simulation menu in an interface for automatically identifying the layout;

the electromagnetic joint simulation menu comprises: an electromagnetic joint simulation layout part and an electromagnetic joint simulation schematic diagram part are created;

The electromagnetic joint simulation layout part is used for creating a port at the connection position of an active device to be removed based on an original layout and a device simulated by using a model, recording the mapping relation between the port and the pin name of the device to be removed, and using the port for EM simulation;

And the electromagnetic joint simulation schematic diagram creating part is used for creating a schematic diagram after the EM simulation, connecting devices in the schematic diagram according to the mapping relation and generating a corresponding circuit schematic diagram.

Further, the step of creating a port at the connection of the active device to be removed based on the original layout of the electromagnetic joint simulation layout part further comprises the following steps:

saving the original layout under the view of the unit of the library, and deleting all devices in the simulation using the circuit model;

Creating an electromagnetic simulation pin and a text identifier at a corresponding position of the pin of the deleted device based on simulation using the circuit model;

And recording the names of the deleted device instances, all parameters in the parameter configuration modules corresponding to the library names, the unit names and the devices, and the mapping relation between the instances and the pin names of the electromagnetic simulation.

Further, the step of creating the electromagnetic simulation pin and the text identifier further comprises the following steps:

reading the position of an input/output pin of the device;

And placing electromagnetic simulation pins with text marks on the same layer and the same size at the positions of the input and output pins of the deleted device, and establishing a mapping relation between the electromagnetic simulation pins and names of the input and output pins of the deleted device.

Further, the electromagnetic simulation pin is located at a port position which can be used in the EM simulation and is used for identifying that the original pattern module is connected with the corresponding module; and when the netlist is extracted from the layout and post-simulation is carried out, the positions of the electromagnetic simulation pins are corresponding port positions.

Further, the text identifier is a type of defining variable or label, and adds a net name to the corresponding metal wire.

Further, the step of creating an electromagnetic joint simulation schematic diagram part and connecting the devices further includes:

Identifying the mapping relation in the electromagnetic simulation pins based on the simulation using the circuit model;

Creating a schematic diagram corresponding to the layout, and placing the symbols under the original units and the examples stored in the mapping relation in the schematic diagram;

adding connection information on the pins of the symbol and the instance according to the mapping relation, and determining the connection relation of the corresponding pins;

and connecting the devices according to the connection relation to obtain a schematic diagram of the circuit.

Further, the step of creating the mapping relation in the electromagnetic simulation pins based on the circuit model simulation is included under the recognition layout, when the symbol is arranged under the current unit, the key corresponding to the electromagnetic joint simulation schematic diagram part is created and can be clicked, and otherwise, the key is in a hidden state.

Further, the step of placing the symbol under the original unit and the instance stored in the mapping relation in the schematic diagram further includes: placing the examples stored in the symbols and the mapping relations under the original units in the created schematic diagram according to the stored contents, wherein the examples are sequentially arranged in 10 columns; the symbol, for the graphical representation of a specific electronic component, comprises: lines, arrows, marks and geometric shapes, represent the connection modes and electrical characteristics of the elements in schematic diagrams or circuit diagrams.

To achieve the above object, the present invention further provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, where the processor is configured to execute the computer program stored in the memory, so as to implement the EM simulation optimization method based on electromagnetic joint simulation as described above.

To achieve the above object, the present invention also provides a computer readable storage medium, wherein a computer program is stored in the storage medium, and the computer program is loaded and executed by a processor to implement the EM simulation optimization method based on electromagnetic joint simulation as described above.

Compared with the prior art, the EM simulation optimization method based on the electromagnetic joint simulation provided by the invention has the following steps of

The beneficial effects are that:

Active devices in the circuit which are not subjected to EM simulation can be removed, meanwhile, after the EM simulation, the devices can be automatically connected, the connection relation of the circuit and the subsequent simulation are not influenced, the EM simulation flow of the circuit with the active devices is simplified, and the EM simulation efficiency is improved.

Additional features and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.

Drawings

The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate the invention and together with the embodiments of the invention, and do not limit the invention. In the drawings:

FIG. 1 is a flowchart of an EM simulation optimization method based on electromagnetic joint simulation according to an embodiment of the present invention;

FIG. 2 is an auto-wiring flow chart of an EM Co-sim according to an embodiment of the present invention;

FIG. 3 is a schematic illustration of an EM Co-sim Layout interface in accordance with an embodiment of the present invention;

FIG. 4 is a schematic illustration of a Create EM Co-SIM SCHEMATIC interface in accordance with an embodiment of the present invention;

FIG. 5 is a schematic circuit diagram of an embodiment of the present invention implementing EM Co-sim;

FIG. 6 is a partial schematic diagram of a schematic circuit diagram resulting from the implementation of EM Co-sim in accordance with an embodiment of the present invention;

fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present invention.

Detailed Description

The preferred embodiments of the present invention will be described below with reference to the accompanying drawings, it being understood that the preferred embodiments described herein are for illustration and explanation of the present invention only, and are not intended to limit the present invention.

Embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. While the invention is susceptible of embodiment in the drawings, it is to be understood that the invention may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided to provide a more thorough and complete understanding of the invention. It should be understood that the drawings and embodiments of the invention are for illustration purposes only and are not intended to limit the scope of the present invention.

The term "including" and variations thereof as used herein are intended to be open-ended, i.e., including, but not limited to. The term "based on" is based at least in part on. The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments. Related definitions of other terms will be given in the description below.

It should be noted that the concepts of "first," "second," etc. may be used in the present invention merely to distinguish between different devices, components or sections and are not intended to limit the order or interdependence of functions performed by these devices, components or sections.

It should be noted that the modifications of "a" and "an" as may be mentioned in the present disclosure are illustrative rather than limiting, and those of ordinary skill in the art will appreciate that "one or more" should be understood to mean "one or more" unless the context clearly indicates otherwise. "plurality" is understood to mean two or more.

In the embodiment of the invention, an automatically identified Layout (LE) is used for simulating a device by using a schematic diagram (SE) model in simulation, and therefore, the invention provides an EM (electromagnetic) simulation optimization method based on electromagnetic joint simulation.

In the embodiment of the invention, a EM Cosimulation (electromagnetic Co-simulation, hereinafter referred to as EM Co-sim) menu is newly added in an LE interface based on actual requirements, and the operation of realizing the EM simulation optimization method based on the electromagnetic Co-simulation based on the LE interface is provided. Two keys are added in EM Cosimulation menu: EM Co-sim Layout and CreateEM Co-SIM SCHEMATIC (creating an electromagnetic Co-simulation schematic diagram) complete the function of automatically creating ports at the connection of related devices through the EM Co-sim Layout; the function of the automatic connection device is realized through the Create EM Co-SIM SCHEMATIC.

EM Co-sim Layout implementation creating a port at the relevant device connection, including performing the steps of 11) to 13) below:

11 Save as to View and delete Simulated by Circuit (simulation using circuit model) all devices in the original LE (layout);

in the embodiment of the invention, the original LE Save as to Library, cell, view is removed, and all devices in Simulated by Circuit are deleted.

12 Creating EM pins (electromagnetic simulation pins) and labels (text labels) at respective locations of pins (pins) of the delete device based on Simulated by Circuit;

In an embodiment of the invention the location of the created EM pin, i.e. the port location that can be used in the EM simulation, identifies the connection of the master map to the other modules. In 11) the new LE stored in the memory, the device in Simulated by Circuit is deleted, and at the same time EM pins and label are created at the corresponding locations of the pin deleting the device. When the netlist is extracted from the layout and then simulated, the position of the EM pin is the corresponding port position; label is a type of defined variable or label, and is a logic concept, and a net name is added to the corresponding metal wire, for example, a newly added Pin and label name is INSTANCENAME _ PinName (wherein PinName is the name of the Pin in symbol, for example, pin1 of Res1 is named Res1_1).

The rules for creating EM pin and label are as follows:

step1, read INSTANCE PIN (input output pins of device) locations.

Step2, placing an EM pin (with a label) with the same layer and the same size at the deleted INSTANCE PIN position, and establishing a mapping relation between the EM pin and the deleted INSTANCE PIN name.

13 Record the name of the Instance deleted and its corresponding library name, cell name and parameter, and the mapping of the Instance's pin to the name of the newly created EM pin.

Create EM Co-SIM SCHEMATIC implements an automatic connection device comprising the steps of performing 21) to 24) below:

21 Identifying a mapping in the LE comprising creating an EM pin based on Simulated by Circuit;

22 Creating SE (schematic diagram) corresponding to LE, and placing symbol under original Cell and instance stored in mapping relation in SE according to stored content;

In the embodiment of the invention, the key corresponding to the Create EM Co-SIM SCHEMATIC includes creating the mapping relation in the EM pin based on Simulated by Circuit under the identification LE, and the key is in a hidden state if symbol exists under the current Cell and can be clicked. Creating a corresponding SE after clicking OK at 22), and placing the sample saved in the symbol and mapping relation under the original Cell (unit) in the SE according to the saved content. Wherein the instances are arranged in a sequence of 10. symbol is a graphical representation of a particular electronic component, which is an abstract figure representing the function and nature of the component. Symbols typically consist of lines, arrows, indicia, and other geometric shapes, used to indicate the manner in which components are connected and the electrical characteristics in a schematic or circuit diagram.

23 According to the mapping relation, adding net (connection) information on pins of symbol and instance, and determining the connection relation; the net name is named $ INSTANCENAME _ $ PinName, as per the mapping.

24 According to the connection relationship, the device is automatically connected.

Fig. 1 is a flowchart of an EM simulation optimizing method based on electromagnetic joint simulation according to an embodiment of the present invention, and the EM simulation optimizing method based on electromagnetic joint simulation of the present invention will be described in further detail with reference to fig. 1.

First, at step 101, an EM Co-sim setting is opened in the LE interface.

In step 102, a device that is simulated using the SE model is selected.

At step 103, a new LE is generated containing device ports. In this step, a new LE containing the device port of the SE model simulation is generated by the EM Co-sim Layout, no active device is in the new LE, only the port of the active device is in the new LE, and the position of the created EM pin is the position of the port which can be used in the EM simulation and identifies the connection of the original map module with other modules.

At step 104, symbol-lookalike (similar symbols) is generated. The similar symbols generated are the same as layout, i.e. layout for EM simulation, and display for symbol, and are seen as the same symbols as this layout.

In step 105, an EM symbol (EM-simulated symbol, i.e., symbol-lookalike above, except that a certain item within this symbol will refer to a file created after EM simulation above) is created to connect to the SE of the device. The step is to Create an automatically connected circuit schematic diagram through the Create EM Co-SIM SCHEMATIC, so that subsequent simulation can be performed in the schematic diagram quickly.

FIG. 2 is an auto-wiring flow chart of the EM Co-sim according to an embodiment of the present invention, as shown in FIG. 2, the EM Co-sim of the present invention implements an auto-connect device using a Create EM Co-SIM SCHEMATIC, the auto-wiring flow includes:

In step 201, co-sim Setup settings are obtained (i.e., the relevant settings of the active device that need to be removed are obtained).

In step 202, save as original LE and delete the relevant device (i.e., the device that needs to be removed).

In step 203, in the new LE, at the original pin of the deleted device, an EM pin and a label are created, and the mapping relationship between the new EM pin and the original pin is recorded.

In step 204, symbol-lookalike is generated.

In step 205, SE is generated, EM symbol is placed, and devices are automatically connected at individual pins of symbol according to mapping.

FIG. 3 is a schematic diagram of an EM Co-sim Layout interface according to an embodiment of the present invention, as shown in FIG. 3, in which a Library Name, a Cell Name, a View Name, and instance of the proposed by EM and Simulated by Circuit (simulation using a circuit model) are included.

Fig. 4 is a schematic diagram of a Create EM Co-SIM SCHEMATIC interface according to an embodiment of the present invention, and as shown in fig. 4, the Create EM Co-SIM SCHEMATIC interface includes a Library Name, a Cell Name and a View Name.

Compared with the prior art, the EM simulation optimization method based on the electromagnetic joint simulation has the following advantages:

The active devices in the LE can be removed rapidly by a user, and EM simulation is performed; meanwhile, after EM simulation, the device can be automatically connected, and subsequent simulation can be rapidly performed in the schematic diagram.

The effect of using the method of the present invention is demonstrated below by a design case of an actual radio frequency chip.

The flow is as follows:

step 1) generating a corresponding cell_ cosim (naming of the Layout, adding_ cosim on the basis of the original unit name) Layout by an EM Co-sim Layout function at an LE interface;

step 2) performing EM simulation by using the layout cellname _ cosim (the layout generated in step 1);

step 3) generating symbol corresponding to cell_ cosim through Create Symbol View (creating a symbol view) after the EM simulation is finished;

Step 4) using Create EM Co-SIM SCHEMATIC, create schematic diagram cell_ cosim _SE (schematic diagram corresponding to cell_ cosim) after auto connect device. When CHECK AND SAVE (checking and saving the generated schematic diagram) shows no Error after creation, step 5 is entered; if the short circuit problem occurs, the symbol size needs to be adjusted at Create Symbol View, so that the size of the pin in the symbol is properly reduced, and the problem of connecting short circuit can be avoided; the pin can be adjusted to be round, so that the occupied area of the pin is reduced, and the problem of short circuit is avoided.

And 5) after the inspection is completed, the position of the active device is adjusted, and a circuit schematic diagram for subsequent simulation is obtained.

Fig. 5 is a schematic circuit diagram obtained by implementing EM Co-sim according to an embodiment of the present invention, and as shown in fig. 5, a layout including 2 transistors and 1 diode is obtained after the EM Co-sim is processed and the devices are automatically connected. Fig. 6 shows the 2 transistors and 1 diode of fig. 5 moved to a position close to symbol-lookalike, and amplified, and it can be clearly seen that the pins of the transistors and diodes lead out wire (the wire used for connecting the electrical pins of the devices in the schematic diagram has electrical properties), and the wire has a corresponding name; the name of the wire led out from the pin on the pipe is the same as the name of the wire led out from the pin at the position to be connected in the corresponding symbol-lookalike. In the schematic diagram, wire can replace wires to make connection, so that the schematic diagram layout is greatly simplified. When the wires led out from the pins of the device are the same name, the wires representing the same name are connected.

In an embodiment of the present invention, an electronic device is further provided, and fig. 7 is a schematic structural diagram of an electronic device according to an embodiment of the present invention, as shown in fig. 7, where the electronic device of the present invention includes a processor 701, and a memory 702, where,

The memory 702 stores a computer program which, when read by the processor 701 for execution, performs the steps in the EM simulation optimization method embodiment based on electromagnetic joint simulation as described above.

In an embodiment of the invention, there is also provided a computer readable storage medium having stored therein a computer program, wherein the computer program is arranged to perform the steps in an EM simulation optimizing method embodiment based on electromagnetic joint simulation as described above, when run.

In the present embodiment, the above-described computer-readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.

Those of ordinary skill in the art will appreciate that: the foregoing description is only a preferred embodiment of the present invention, and the present invention is not limited thereto, but it is to be understood that modifications and equivalents of some of the technical features described in the foregoing embodiments may be made by those skilled in the art, although the present invention has been described in detail with reference to the foregoing embodiments. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An EM simulation optimization method based on electromagnetic joint simulation is characterized by comprising the following steps:

2. The EM simulation optimization method based on the electromagnetic joint simulation of claim 1, wherein the electromagnetic joint simulation layout part creates a port at the connection of the active devices to be removed based on the original layout, further comprising:

3. The EM simulation optimization method based on electromagnetic co-simulation of claim 2, wherein the step of creating electromagnetic simulation pins and text labels further comprises:

reading the position of an input/output pin of the device;

4. The EM simulation optimizing method based on the electromagnetic joint simulation as claimed in claim 2, wherein the positions of the electromagnetic simulation pins are port positions which are usable in the EM simulation and identify the connection of the master pattern module and the corresponding module; and when the netlist is extracted from the layout and post-simulation is carried out, the positions of the electromagnetic simulation pins are corresponding port positions.

5. The EM simulation optimization method based on the electromagnetic joint simulation as claimed in claim 2, wherein the text identifier is a type of a defined variable or a label, and a net name is added to the corresponding metal wire.

6. The EM simulation optimization method based on the electromagnetic co-simulation of claim 1, wherein the step of creating the electromagnetic co-simulation schematic diagram part and connecting the devices further comprises:

7. The EM simulation optimizing method based on the electromagnetic joint simulation according to claim 6, wherein the electromagnetic joint simulation based on the electromagnetic simulation pin is created based on the circuit model simulation under the recognition layout, and when the current unit has a symbol, a key corresponding to the created electromagnetic joint simulation schematic diagram part appears and can be clicked, otherwise, the key is in a hidden state.

8. The EM simulation optimization method based on the electromagnetic joint simulation of claim 6, wherein said step of placing the instance stored in the symbol and the mapping relationship under the original unit in the schematic diagram further comprises: placing the examples stored in the symbols and the mapping relations under the original units in the created schematic diagram according to the stored contents, wherein the examples are sequentially arranged in 10 columns; the symbol, for the graphical representation of a specific electronic component, comprises: lines, arrows, marks and geometric shapes, represent the connection modes and electrical characteristics of the elements in schematic diagrams or circuit diagrams.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor is configured to execute the computer program stored in the memory to implement the EM simulation optimization method based on electromagnetic joint simulation of any one of claims 1-8.

10. A computer readable storage medium, characterized in that the storage medium has stored therein a computer program, which is loaded and executed by a processor to implement the EM simulation optimization method based on electromagnetic joint simulation as claimed in any one of claims 1-8.