[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

CN118467239A - Data acquisition method, hard disk and readable storage medium - Google Patents

Data acquisition method, hard disk and readable storage medium Download PDF

Info

Publication number
CN118467239A
CN118467239A CN202410924398.1A CN202410924398A CN118467239A CN 118467239 A CN118467239 A CN 118467239A CN 202410924398 A CN202410924398 A CN 202410924398A CN 118467239 A CN118467239 A CN 118467239A
Authority
CN
China
Prior art keywords
data
original
bias
error correction
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202410924398.1A
Other languages
Chinese (zh)
Inventor
王灿
何瀚
孙成思
黄焯楷
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Biwin Storage Technology Co Ltd
Original Assignee
Biwin Storage Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Biwin Storage Technology Co Ltd filed Critical Biwin Storage Technology Co Ltd
Priority to CN202410924398.1A priority Critical patent/CN118467239A/en
Publication of CN118467239A publication Critical patent/CN118467239A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1068Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices in sector programmable memories, e.g. flash disk

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The present application relates to the field of storage technologies, and in particular, to a data acquisition method, a hard disk, and a readable storage medium, where the method includes: acquiring an error correction voltage set of a hard disk, wherein the error correction voltage set comprises a plurality of offset voltage values; verifying the error correction voltage set based on a plurality of original data to be verified read under a plurality of offset voltage values; when the error correction voltage set passes the verification, reading original data of a target page in the hard disk flash memory based on the error correction voltage set, wherein the original data to be verified is part of the original data; storing the read plurality of original offset data into different buffer areas, wherein the original offset data read under each offset voltage value are placed in the same buffer area; and sequentially acquiring corresponding original offset sub-data from different cache areas respectively for error correction so as to acquire a plurality of target data. The application can save a great deal of time when acquiring the target data in the hard disk.

Description

Data acquisition method, hard disk and readable storage medium
Technical Field
The present application relates to the field of storage technologies, and in particular, to a data acquisition method, a hard disk, and a readable storage medium.
Background
In the existing hard disk data decoding, a hard decoding mode, a soft decoding mode or a soft and hard combination mode is generally adopted, and soft decoding is used for error correction at present, because the soft decoding has stronger error correction capability than hard decoding, but in the soft decoding process, because the data size of each error correction is limited, multiple times of reading and exporting are needed to be carried out on each page of data so as to complete multiple times of error correction, and therefore the time consumed by an error correction process is greatly prolonged.
Disclosure of Invention
In view of the above, the present application proposes a data acquisition method, a hard disk, and a readable storage medium.
The embodiment of the application provides a data acquisition method, which comprises the following steps:
acquiring an error correction voltage set of a hard disk, wherein the error correction voltage set comprises a plurality of offset voltage values;
Verifying the error correction voltage set based on the plurality of original data to be verified read under the plurality of offset voltage values;
When the error correction voltage set passes the verification, reading original data of a target page in the hard disk flash memory based on the error correction voltage set, wherein the original data to be verified is part of the original data;
Storing the read plurality of original offset data into different buffer areas, wherein the original offset data read under each offset voltage value are placed in the same buffer area;
And sequentially acquiring corresponding original offset sub-data from the different buffer areas respectively for error correction so as to acquire a plurality of target data.
Further, in the data acquisition method, the error correction voltage set includes a main bias voltage value, a left bias voltage value, and a right bias voltage value, and the original offset data includes original main bias data, original left bias data, and original right bias data; the reading the original data of the target page in the hard disk flash memory based on the error correction voltage set comprises the following steps:
and reading the original data of the target page based on the main bias voltage value, the left bias voltage value and the right bias voltage value respectively, and correspondingly obtaining the original main bias data, the original left bias data and the original right bias data.
Further, in the above data acquisition method, each original offset data is divided into a plurality of original offset sub-data with the same size, each original offset sub-data corresponds to a sub-portion of the original data, and all the original offset sub-data corresponding to the same sub-portion correspond to each other; the original offset sub-data comprises original main offset sub-data, original left offset sub-data and original right offset sub-data; sequentially obtaining corresponding original offset sub-data from the different buffer areas for error correction to obtain a plurality of target data, wherein the method comprises the following steps:
sequentially acquiring original offset sub-data corresponding to each other from the different cache areas respectively for error correction;
when the error rate of the original main bias sub data does not belong to a first preset range, the original main bias sub data is used as the target data;
When the error rate of the original main bias sub data belongs to the first preset range and the error rate of the original left bias sub data does not belong to the first preset range, the original left bias sub data is used as the target data;
When the error rates of the original main bias sub data and the original left bias sub data both belong to the first preset range and the error rate of the original right bias sub data does not belong to the first preset range, the original right bias sub data is used as the target data;
and when the error rates of the original main bias sub data, the original left bias sub data and the original right bias sub data all belong to the first preset range, confirming that error correction fails.
Further, in the above data acquisition method, the method further includes:
And the data volume of the original offset sub data and the data volume of the original data to be verified are smaller than or equal to the single-time correctable maximum data volume.
Further, in the above data acquisition method, the verifying the error correction voltage set based on the plurality of original data to be verified read at the plurality of offset voltage values includes:
reading the original data to be verified by adopting a main bias voltage value, a left bias voltage value and a right bias voltage value respectively, and correspondingly obtaining main bias verification data, left bias verification data and right bias verification data;
and verifying the error correction voltage set based on the main bias verification data, the left bias verification data and the right bias verification data.
Further, in the above data acquisition method, the verifying the error correction voltage set based on the main bias verification data, the left bias verification data, and the right bias verification data includes:
When the error rate of the main bias verification data, the left bias verification data or the right bias verification data does not belong to a second preset range, confirming that the error correction voltage set passes verification;
And when the error rates of the main bias verification data, the left bias verification data and the right bias verification data all belong to a second preset range, confirming that the error correction voltage set verification fails.
Further, in the above data acquisition method, the method further includes:
And when the original offset sub data is subjected to error correction, reading the original data of the next target page in the hard disk flash memory based on the error correction voltage set so as to acquire the target data corresponding to the next target page until the target data of all the target pages are acquired.
Further, in the above data acquisition method, the method further includes:
And returning to the step of acquiring the error correction voltage set of the hard disk when error correction fails or the error correction voltage set verification fails, and taking the acquired new voltage value as the error correction voltage set.
Another embodiment of the present application further provides a hard disk, including a storage unit and a processing unit, where the storage unit stores a computer program, and the processing unit executes the steps of the data acquisition method by calling the computer program stored in the storage unit.
Another embodiment of the present application also proposes a computer readable storage medium storing a computer program adapted to be loaded by a processor for performing the steps of the data acquisition method described above.
The embodiment of the application has the following beneficial effects:
The embodiment of the application provides a data acquisition method, which comprises the following steps: acquiring an error correction voltage set of a hard disk, wherein the error correction voltage set comprises a plurality of offset voltage values; verifying the error correction voltage set based on a plurality of original data to be verified read under a plurality of offset voltage values; when the error correction voltage set passes the verification, reading original data of a target page in the hard disk flash memory based on the error correction voltage set, wherein the original data to be verified is part of the original data; storing the read plurality of original offset data into different buffer areas, wherein the original offset data read under each offset voltage value are placed in the same buffer area; and sequentially acquiring corresponding original offset sub-data from different cache areas respectively for error correction so as to acquire a plurality of target data. According to the application, all data of each page are read at one time according to different offset voltages, and the different data in each page are not required to be read for many times before subsequent error correction, but the corresponding data are directly obtained from the buffer area for error correction, so that a great amount of time is saved.
Drawings
In order to more clearly illustrate the technical solutions of the present application, the drawings that are required for the embodiments will be briefly described, it being understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope of the present application. Like elements are numbered alike in the various figures.
FIG. 1 is a schematic diagram of a first flow chart of a data acquisition method according to some embodiments of the present application;
FIG. 2 illustrates a second flow diagram of a data acquisition method according to some embodiments of the application;
FIG. 3 illustrates a third flow diagram of a data acquisition method according to some embodiments of the application;
FIG. 4 is a diagram showing a target page structure of a data acquisition method according to some embodiments of the present application;
Fig. 5 shows a schematic diagram of the structure of a data acquisition system according to some embodiments of the application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments.
The components of the embodiments of the present application generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the application, as presented in the figures, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by a person skilled in the art without making any inventive effort, are intended to be within the scope of the present application.
The terms "comprises," "comprising," "including," or any other variation thereof, are intended to cover a specific feature, number, step, operation, element, component, or combination of the foregoing, which may be used in various embodiments of the present application, and are not intended to first exclude the presence of or increase the likelihood of one or more other features, numbers, steps, operations, elements, components, or combinations of the foregoing.
Furthermore, the terms "first," "second," "third," and the like are used merely to distinguish between descriptions and should not be construed as indicating or implying relative importance.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which various embodiments of the application belong. The terms (such as those defined in commonly used dictionaries) will be interpreted as having a meaning that is the same as the context of the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein in connection with the various embodiments of the application.
Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The embodiments described below and features of the embodiments may be combined with each other without conflict.
In general, in the soft decoding process, since the amount of data per error correction is limited, it is necessary to read each page of data a plurality of times, each time a part of data of each page is read, each time error correction is performed, until the page of data is error corrected. When multiple pages or even more data correction is required, the overall process takes longer.
Accordingly, in order to solve the above-mentioned problems, the present application proposes a data acquisition method.
Referring to fig. 1, a flow chart of a data acquisition method according to an embodiment of the application is shown. The data acquisition method is applied to the solid state disk in an exemplary manner.
In some embodiments, as shown in fig. 1, the data acquisition method includes:
s110, acquiring an error correction voltage set of the hard disk, wherein the error correction voltage set comprises a plurality of offset voltage values.
Specifically, since the hard disk is shipped with various corresponding parameter tables, the error correction voltage set of the corresponding hard disk is obtained through the tables or other modes, and the offset voltage value in the error correction voltage set can be set to read the data of the hard disk, and the data of the same hard disk position is read by using different offset voltage values.
S210, verifying the error correction voltage set based on the plurality of original data to be verified read under the plurality of offset voltage values.
In particular, since the same offset voltage can be used to perform the error correction operation for the same page of data, but the offset voltages required for different pages of data may be different, it is necessary to determine whether the currently selected offset voltage set is correct before error correction is performed for the entire page of data in order to reduce the read time. Therefore, the current offset voltage set needs to be adopted to verify a part of data (as original data to be verified) in the current target page, and whether the current error correction voltage set is available is sequentially judged.
In some embodiments of the data acquisition method, as shown in fig. 2, verifying the error correction voltage set based on the plurality of original data to be verified read at the plurality of offset voltage values includes:
s211, respectively adopting the main bias voltage value, the left bias voltage value and the right bias voltage value to read the original data to be verified in the target page, and correspondingly obtaining main bias verification data, left bias verification data and right bias verification data.
S212, verifying the error correction voltage set based on the main bias verification data, the left bias verification data and the right bias verification data.
Specifically, if the original data to be verified passes the error correction, the current selected offset voltage set is indicated to be available, then the offset voltage set can be used to correct all data in the current target page, if the original data to be verified fails the error correction, the current selected offset voltage set is indicated to be unavailable, and a new offset voltage set needs to be acquired again to correct the current target page. In this embodiment, before error correction is performed on each page, error correction is performed on a part of the current target page, so as to determine whether the currently selected offset voltage set passes verification, and update the offset voltage set in time.
S310, when the error correction voltage set passes verification, reading original data of a target page in the hard disk flash memory based on the error correction voltage set, wherein the original data to be verified is part of the original data; and storing the read plurality of original offset data into different buffer areas, wherein the original offset data read under each offset voltage value is placed in the same buffer area.
Specifically, the data stored in the hard disk flash memory is referred to as original data, the original data is read at different offset voltages, and the read data is used as the original offset data, so that the original data and the original offset data are distinguished because the stored data and the read data are not necessarily identical. Since the number of data read at each time is large, there is a case that part of the data is wrong, so that multiple voltages are needed to read, different data can be obtained by reading with different voltages, and then error correction is performed according to the original offset data obtained by each voltage. In order to improve the reading efficiency, the present embodiment does not divide the original data into a plurality of sub-portions in a conventional manner, then reads only one of the sub-portions at a time, and then performs error correction on the read sub-portion, and sequentially loops until all the original data are error corrected. For example, if only the original data with the size of 16K is required to be corrected, if the original data is read with the size of 1K each time in the conventional manner and then corrected, the original data needs to be read 16 times. If the 16K data is completely read and put into the buffer area at one time according to the present embodiment, and different original offset data are stored into different buffer areas, it is obvious that the number of times of reading in the present embodiment is greatly reduced.
It should be noted that, unlike the flash memory, the time for reading data from the flash memory is much longer than the time for reading data from the buffer, so that error correction is faster when the original offset data is put into the buffer and then the data is read from the buffer.
In some embodiments of the data acquisition method, the error correction voltage set includes a main bias voltage value, a left bias voltage value, and a right bias voltage value, and the original offset data includes original main bias data, original left bias data, and original right bias data; reading original data of a target page in a hard disk flash memory based on an error correction voltage set, and storing a plurality of read original offset data into different buffer areas, wherein the method comprises the following steps:
and reading the original data of the target page based on the main bias voltage value, the left bias voltage value and the right bias voltage value respectively, and correspondingly obtaining the original main bias data, the original left bias data and the original right bias data.
Specifically, the error correction voltage set includes, but is not limited to, a main bias voltage value, which is a reference voltage for reading the original data, a left bias voltage value, and a right bias voltage value, which are all obtained by floating up and down based on the main bias voltage value. In addition, the same correction voltage set may include a plurality of left bias voltage values and/or a plurality of right bias voltage values, without limitation.
In some embodiments of the data acquisition method, verifying the set of error correction voltages based on the main bias verification data, the left bias verification data, and the right bias verification data includes:
When the error rate of the main bias verification data, the left bias verification data or the right bias verification data does not belong to a second preset range, confirming that the error correction voltage set passes verification.
When the error rates of the main bias verification data, the left bias verification data and the right bias verification data all belong to a second preset range, the error correction voltage set is confirmed to be failed to verify.
Specifically, the second preset range is a range where the error rate does not pass, for example, if the second preset range is not less than 30%, and if the error rate of the main bias verification data, the left bias verification data or the right bias verification data is not less than 30%, that is, the error rate is not less than 30%, the error rate is too high due to the use of the error correction voltage set, which indicates that the current error correction voltage set fails to verify. When the error rate of any one of the main bias verification data, the left bias verification data or the right bias verification data does not belong to the second preset range, the fact that one bias verification data (such as the main bias verification data, the left bias verification data or the right bias verification data) exists in the current error correction voltage set is indicated, so that the accuracy of the original data can meet the requirement, namely the fact that the current error correction voltage set passes the verification is indicated.
It should be noted that, various offset voltages are selected for error correction, because when the data read at the current offset voltage is unsuccessful, i.e. the error rate is not passed, the data read at the other offset voltages can be used for subsequent decoding operations. Therefore, when the data read by the first offset voltage is unsuccessful, it is determined whether the data read by the second offset voltage is successful or not until successful data is obtained.
S410, sequentially acquiring corresponding original offset sub-data from different buffer areas respectively for error correction so as to acquire a plurality of target data.
Exemplary, if the first buffer area stores first type of original offset data, the second buffer area stores second type of original offset data, and the third buffer area stores third type of original offset data, the first type of original offset data includes first type sub data a, first type sub data b, …, and first type sub data n; the second-type original offset data comprises second-type sub data a, second-type sub data b, … and second-type sub data n; the third type of original offset data comprises third type of sub data a, third type of sub data b, … and third type of sub data n. The first class of sub data a, the second class of sub data a and the third class of sub data a are acquired for the first time, error correction is carried out through the three types of sub data, and corresponding target data a is obtained after error correction is finished; obtaining first class sub data b, second class sub data b and third class sub data b for the second time, correcting errors through the three sub data, and obtaining corresponding target data b after correcting the errors; and continuing to perform error correction in sequence until all original offset data are subjected to error correction, and obtaining all corresponding target data.
In some embodiments of the data acquisition method, as shown in fig. 3, each original offset data is divided into a plurality of original offset sub-data with the same size, each original offset sub-data corresponds to a sub-portion of the original data, and all original offset sub-data corresponding to the same sub-portion correspond to each other; the original offset sub-data comprises original main offset sub-data, original left offset sub-data and original right offset sub-data; sequentially obtaining corresponding original offset sub-data from different cache areas for error correction to obtain a plurality of target data, wherein the method comprises the following steps:
S411, sequentially acquiring original offset sub-data corresponding to each other from different buffer areas to correct errors.
Exemplarily, if the first buffer area stores original main bias data, the second buffer area stores original left bias data, and the third buffer area stores original right bias data, the original main bias data includes original main bias sub-data a, original main bias sub-data b, …, and original main bias sub-data n; the original left-hand offset data comprises original left-hand offset sub-data a, original left-hand offset sub-data b, … and original left-hand offset sub-data n; the original right-hand bias data comprises original right-hand bias sub-data a, original right-hand bias sub-data b, … and original right-hand bias sub-data n. If the original main bias sub-data, the original left bias sub-data and the original right bias sub-data are respectively obtained by reading the same sub-part in the original data by different offset voltage values, the original main bias sub-data, the original left bias sub-data and the original right bias sub-data are mutually corresponding. For example, if the original main bias sub-data a, the original left bias sub-data a and the original right bias sub-data a are respectively obtained by reading the same sub-portion by different voltages, the original main bias sub-data a, the original left bias sub-data a and the original right bias sub-data a correspond to each other. The error correction process is a process of judging the error rate of each original offset sub-data, and the purpose of error correction is to obtain target data.
And S412, when the error rate of the original main bias sub data does not belong to the first preset range, taking the original main bias sub data as target data.
S413, when the error rate of the original main bias sub data belongs to a first preset range and the error rate of the original left bias sub data does not belong to the first preset range, taking the original left bias sub data as target data.
And S414, when the error rates of the original main bias sub data and the original left bias sub data both belong to a first preset range and the error rate of the original right bias sub data does not belong to the first preset range, taking the original right bias sub data as target data.
S415, when the error rates of the original main bias sub data, the original left bias sub data and the original right bias sub data all belong to a first preset range, the error correction failure is confirmed.
Specifically, the error rates of the original main bias sub data, the original left bias sub data and the original right bias sub data which are mutually corresponding are sequentially judged to obtain corresponding target data.
Exemplarily, if the error rates of the original main bias sub-data c, the original left bias sub-data c and the original right bias sub-data c, which correspond to each other, are respectively 10%, 8% and 1%, and the first preset range is not less than 2%, the error rate of the original main bias sub-data c is limited to be determined to be 10% in the first preset range, the error rate of the original left bias sub-data c is continuously determined to be 8%, the original main bias sub-data c is found to still be in the first preset range, the error rate of the original right bias sub-data c is continuously determined to be 1% not in the first preset range, the original right bias sub-data is taken as the target data of the sub-portion corresponding to the original data, and the target data of the sub-portion of the next original data is continuously acquired until all the target data are acquired. Of course, the above-mentioned judging order is only an example, and other orders are also possible, and the order is not limited herein, and may be, for example, original left-hand sub-data, original main-hand sub-data, original right-hand sub-data, and the like.
In some embodiments, the data acquisition method further comprises:
And when the original offset sub data is subjected to error correction, reading the original data of the next target page in the hard disk flash memory based on the error correction voltage set so as to acquire target data corresponding to the next target page until the target data of all the target pages are acquired.
Specifically, the above-mentioned process is just a process of acquiring target data for the same target page, and in practical applications, it is often performed to acquire target data for a plurality of target pages and decode the target data. Therefore, when the present embodiment proposes to correct the error of the current target page, the original data of the next target page is read at the same time, and multiple kinds of original offset data for reading the original data are stored in different buffer areas, so that the reading time is greatly saved.
In some embodiments, the data acquisition method further comprises:
And when the error correction fails or the verification of the error correction voltage set fails, returning to the step of acquiring the error correction voltage set of the hard disk, and taking the acquired new voltage value as the error correction voltage set.
Specifically, the error correction failure refers to an error correction failure result occurring when original offset sub-data corresponding to each other is acquired from different buffer areas to perform error correction. Wherein failure in error correction indicates that the error correction voltage set fails verification. The first is the process when the correction voltage set is verified based on the original data to be verified, in two scenarios where the correction voltage set verification fails to generally occur in the above scheme; the second is in the process of sequentially acquiring the original offset sub-data corresponding to each other from different buffer areas to correct errors. In any scenario, as long as the verification of the correction voltage set fails or fails, the step of obtaining the correction voltage set of the hard disk needs to be returned to the original step to obtain a new correction voltage set, and the steps are repeated again according to the new correction voltage set.
It should be noted that the target page read again is not the previous target page any more, but a new target page is fetched from the sub-portion of the original data corresponding to the original offset sub-data when the previous pass was not made. For example, if the current target page has 16K of original data, the next target page also has 16K of original data, and if the original data of each target page is divided into 8 sub-portions, the size of each sub-portion data is 2K. If the verification failure of the set of correction voltages occurs when the target data of the 2 nd sub-portion in the current target page is acquired, the step of acquiring the set of correction voltages of the hard disk needs to be returned, and at this time, a new target page in the flash memory of the hard disk is read based on the new set of correction voltages, as shown in fig. 4, where the new target page is composed of 7 sub-portions after the current target page and the first sub-portion in the next target page.
In the above embodiment, the data amount of the original offset sub-data and the data amount of the original data to be verified are both equal to or less than the single-time correctable maximum data amount. Otherwise, the correction cannot be completed once, so that the efficiency is improved.
The embodiment of the application provides a data acquisition method, which comprises the following steps: acquiring an error correction voltage set of a hard disk, wherein the error correction voltage set comprises a plurality of offset voltage values; reading original data of a target page in a hard disk flash memory based on an error correction voltage set, and storing a plurality of read original offset data into different buffer areas, wherein each original offset data corresponds to the original data; and sequentially acquiring corresponding original offset sub-data from different cache areas respectively for error correction so as to acquire a plurality of target data. According to the application, all data of each page are read at one time according to different offset voltages, and the different data in each page are not required to be read for many times before subsequent error correction, but the corresponding data are directly obtained from the buffer area for error correction, so that a great amount of time is saved.
Another embodiment of the present application also proposes a data acquisition system 500, as shown in fig. 5, the data acquisition system 500 comprising:
an obtaining unit 510 is configured to obtain an error correction voltage set of the hard disk, where the error correction voltage set includes a plurality of offset voltage values.
And a verification unit 520, configured to verify the error correction voltage set based on the plurality of original data to be verified read at the plurality of offset voltage values.
The read-storage unit 530 is configured to read, when the error correction voltage set passes the verification, original data of a target page in the hard disk flash memory based on the error correction voltage set, where the original data to be verified is part of the original data; and storing the read plurality of original offset data into different buffer areas, wherein the original offset data read under each offset voltage value is placed in the same buffer area.
The error correction unit 540 is configured to sequentially obtain corresponding original offset sub-data from the different buffer areas for error correction, so as to obtain a plurality of target data.
Another embodiment of the present application also proposes a hard disk including a storage unit in which a computer program is stored, and a processing unit that executes the steps of the above-described data acquisition method by calling the computer program stored in the storage unit.
Another embodiment of the present application also proposes a computer readable storage medium storing a computer program adapted to be loaded by a processor for performing the steps of the data acquisition method described above.
It will be appreciated that the method steps of the present embodiment correspond to the data acquisition method of the above embodiment, and that the options of the data acquisition method described above are equally applicable to the present embodiment, and will not be repeated here.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners. The apparatus embodiments described above are merely illustrative, for example, of the flow diagrams and block diagrams in the figures, which illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
In addition, functional modules or units in various embodiments of the application may be integrated together to form a single part, or the modules may exist alone, or two or more modules may be integrated to form a single part.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution in the form of a software product stored in a storage medium, comprising several instructions for causing a computer device (which may be a smart phone, a personal computer, a server, a network device, etc.) to perform all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing is merely illustrative of the present application, and the present application is not limited thereto, and any person skilled in the art will readily recognize that variations or substitutions are within the scope of the present application.

Claims (10)

1. A method of data acquisition, comprising:
acquiring an error correction voltage set of a hard disk, wherein the error correction voltage set comprises a plurality of offset voltage values;
Verifying the error correction voltage set based on the plurality of original data to be verified read under the plurality of offset voltage values;
When the error correction voltage set passes the verification, reading original data of a target page in the hard disk flash memory based on the error correction voltage set, wherein the original data to be verified is part of the original data; storing the read plurality of original offset data into different buffer areas, wherein the original offset data read under each offset voltage value are placed in the same buffer area;
And sequentially acquiring corresponding original offset sub-data from the different buffer areas respectively for error correction so as to acquire a plurality of target data.
2. The data acquisition method of claim 1, wherein the set of error correction voltages includes a main bias voltage value, a left bias voltage value, and a right bias voltage value, and the original offset data includes original main bias data, original left bias data, and original right bias data; the reading the original data of the target page in the hard disk flash memory based on the error correction voltage set comprises the following steps:
and reading the original data of the target page based on the main bias voltage value, the left bias voltage value and the right bias voltage value respectively, and correspondingly obtaining the original main bias data, the original left bias data and the original right bias data.
3. The data acquisition method according to claim 1, wherein each original offset data is divided into a plurality of original offset sub-data of the same size, each of the original offset sub-data corresponds to a sub-portion of the original data, and all of the original offset sub-data corresponding to the same sub-portion correspond to each other; the original offset sub-data comprises original main offset sub-data, original left offset sub-data and original right offset sub-data; sequentially obtaining corresponding original offset sub-data from the different buffer areas for error correction to obtain a plurality of target data, wherein the method comprises the following steps:
sequentially acquiring original offset sub-data corresponding to each other from the different cache areas respectively for error correction;
when the error rate of the original main bias sub data does not belong to a first preset range, the original main bias sub data is used as the target data;
When the error rate of the original main bias sub data belongs to the first preset range and the error rate of the original left bias sub data does not belong to the first preset range, the original left bias sub data is used as the target data;
When the error rates of the original main bias sub data and the original left bias sub data both belong to the first preset range and the error rate of the original right bias sub data does not belong to the first preset range, the original right bias sub data is used as the target data;
and when the error rates of the original main bias sub data, the original left bias sub data and the original right bias sub data all belong to the first preset range, confirming that error correction fails.
4. The data acquisition method of claim 1, further comprising:
And the data volume of the original offset sub data and the data volume of the original data to be verified are smaller than or equal to the single-time correctable maximum data volume.
5. The data acquisition method according to claim 2, wherein verifying the set of error correction voltages based on the plurality of original data to be verified read at the plurality of offset voltage values includes:
reading the original data to be verified by adopting a main bias voltage value, a left bias voltage value and a right bias voltage value respectively, and correspondingly obtaining main bias verification data, left bias verification data and right bias verification data;
and verifying the error correction voltage set based on the main bias verification data, the left bias verification data and the right bias verification data.
6. The data acquisition method of claim 5, wherein the verifying the set of error correction voltages based on the principal bias verification data, the left bias verification data, and the right bias verification data comprises:
When the error rate of the main bias verification data, the left bias verification data or the right bias verification data does not belong to a second preset range, confirming that the error correction voltage set passes verification;
And when the error rates of the main bias verification data, the left bias verification data and the right bias verification data all belong to a second preset range, confirming that the error correction voltage set verification fails.
7. The data acquisition method of claim 1, further comprising:
And when the original offset sub data is subjected to error correction, reading the original data of the next target page in the hard disk flash memory based on the error correction voltage set so as to acquire the target data corresponding to the next target page until the target data of all the target pages are acquired.
8. The data acquisition method according to any one of claims 1 to 7, characterized by further comprising:
And returning to the step of acquiring the error correction voltage set of the hard disk when error correction fails or the error correction voltage set verification fails, and taking the acquired new voltage value as the error correction voltage set.
9. A hard disk comprising a storage unit in which a computer program is stored, and a processing unit that performs the steps of the data acquisition method according to any one of claims 1 to 8 by calling the computer program stored in the storage unit.
10. A computer-readable storage medium, characterized in that the computer-readable storage medium stores a computer program adapted to be loaded by a processor for performing the steps of the data acquisition method according to any one of claims 1 to 8.
CN202410924398.1A 2024-07-11 2024-07-11 Data acquisition method, hard disk and readable storage medium Pending CN118467239A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202410924398.1A CN118467239A (en) 2024-07-11 2024-07-11 Data acquisition method, hard disk and readable storage medium

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202410924398.1A CN118467239A (en) 2024-07-11 2024-07-11 Data acquisition method, hard disk and readable storage medium

Publications (1)

Publication Number Publication Date
CN118467239A true CN118467239A (en) 2024-08-09

Family

ID=92164458

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202410924398.1A Pending CN118467239A (en) 2024-07-11 2024-07-11 Data acquisition method, hard disk and readable storage medium

Country Status (1)

Country Link
CN (1) CN118467239A (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140281770A1 (en) * 2013-03-15 2014-09-18 Kyung-Ryun Kim Method of reading data from a nonvolatile memory device, nonvolatile memory device, and method of operating a memory system
CN107705814A (en) * 2017-09-20 2018-02-16 深圳市致存微电子企业(有限合伙) Flash memory reads threshold value prediction level and determines method, equipment and readable storage medium storing program for executing
US20210232323A1 (en) * 2019-03-29 2021-07-29 Pure Storage, Inc. Managing voltage threshold shifts
US20230197157A1 (en) * 2021-12-17 2023-06-22 Micron Technology, Inc. Adaptive read-retry offset based on word line groups for systems

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20140281770A1 (en) * 2013-03-15 2014-09-18 Kyung-Ryun Kim Method of reading data from a nonvolatile memory device, nonvolatile memory device, and method of operating a memory system
CN107705814A (en) * 2017-09-20 2018-02-16 深圳市致存微电子企业(有限合伙) Flash memory reads threshold value prediction level and determines method, equipment and readable storage medium storing program for executing
US20210232323A1 (en) * 2019-03-29 2021-07-29 Pure Storage, Inc. Managing voltage threshold shifts
US20230197157A1 (en) * 2021-12-17 2023-06-22 Micron Technology, Inc. Adaptive read-retry offset based on word line groups for systems

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
罗冰然: "高可靠性高性能NAND Flash SSD的原理设计和算法研究", 《中国优秀硕士学位论文全文数据库》, no. 01, 15 January 2014 (2014-01-15), pages 137 - 87 *

Similar Documents

Publication Publication Date Title
CN102098133B (en) Soft decoding for quantizied channel
US7076723B2 (en) Error correction codes
CN111078662B (en) Block chain data storage method and device
CN105740088B (en) Flash memory data error correction method and device
CN112181714B (en) Error correction method and device for solid state disk, storage equipment and storage medium
CN111104246B (en) Method, device, computer equipment and storage medium for improving verification efficiency of error detection and correction of DRAM
CN114296645A (en) Rereading method in Nand flash memory and solid state disk
US11381259B2 (en) Decoding method and device for turbo product codes, decoder and computer storage medium
CN114913900A (en) Static ECC error correction NAND error processing method and device, computer equipment and storage medium
CN118467239A (en) Data acquisition method, hard disk and readable storage medium
US20050144611A1 (en) Method for determining program code
CN111769839B (en) Fast bit-flipping decoding method
CN112527548B (en) Flash memory controller, storage device and reading method
CN111384976B (en) Storage method and reading method of sparse check matrix
CN109032962B (en) Data storage method and device and embedded system
US9361180B2 (en) Storing data by an ECC memory
CN113380303B (en) Memory storage device and data access method
US20230409428A1 (en) Boot data reading system, boot data reading method, and processor circuit
CN112634971B (en) Method and device for determining NAND flash memory read voltage
CN112540866B (en) Memory device and data access method thereof
CN117271202B (en) Optimal extraction method for multi-pass retransmission data
CN113485929B (en) Data processing method, apparatus, device, storage medium, and program product
CN113434502B (en) Heterogeneous database consistency implementation method, system, electronic equipment and storage medium
CN118506835A (en) Method, device and equipment for accelerating solid state disk re-reading process and readable storage medium
CN112466380B (en) Memory and storage method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination