CN118300579B - Trigger type signal source, signal generator and multi-signal source synchronization method - Google Patents
Trigger type signal source, signal generator and multi-signal source synchronization method Download PDFInfo
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Abstract
The application discloses a trigger type signal source, a signal generator and a multi-signal source synchronization method, wherein the trigger type signal source comprises a trigger response setting unit, a signal generation unit, a digital TDC unit, a delay amount acquisition unit and a compensation implementation unit, wherein the trigger response setting unit sets an activation signal, the signal generation unit outputs a response signal with preset waveform parameters, the digital TDC unit is used for measuring the time difference between the received external trigger signal and the output activation signal, the delay amount acquisition unit is used for carrying out a plurality of quantization splitting on the received time difference value so as to acquire delay components of at least two gradient grades to construct delay amount, and the compensation implementation unit is used for outputting the response signal output by the signal generation unit as an output signal of the trigger type signal source after delaying the delay amount. Because delay compensation is respectively carried out according to the plurality of quantized and split receiving time difference values, jitter between the external trigger signal and the response signal output by the signal source is greatly reduced, and the delay compensation precision of the response signal is higher.
Description
Technical Field
The application relates to the technical field of signal generation, in particular to a trigger type signal source, a signal generator and a multi-signal source synchronization method.
Background
The signal source plays an important role in the test and measurement system, and can output a specific signal to the device under test to verify whether the device under test meets the design requirements. In a complex multi-channel test system, the output of a signal source and other instruments is generally controlled by an external trigger signal, and an automatic test is realized in a programming mode. Under the time-sensitive test condition, the measurement precision and accuracy are affected by the time delay and jitter of the signal output by the signal source, so that the interference of the signal output by the signal source caused by the time delay and jitter needs to be reduced and reduced as much as possible.
The signal source is a complex digital system, and includes a clock chip, a complex logic device, a digital-to-analog converter (DAC), an operational amplifier, etc., in order to support various modulation and protocols, the signal source is basically implemented in a digital manner, and the output of the signal source usually depends on the clock beat, so that when the output of the trigger signal source is desynchronized by the external trigger signal, an uncertain delay is often generated between the output signal and the trigger signal.
Currently, in order to reduce the interference and influence caused by the uncertain delay, a method for increasing the frequency of the system clock is often adopted. Assuming a system clock frequency of 125MHz, the indeterminate delay time is 8ns, whereas increasing the clock frequency to 200MHz can reduce the delay time to 5ns. However, increasing the system clock frequency makes timing convergence of the logic design difficult because the system clock frequency always has an upper design limit. Another way to reduce and decrease this delay time is to add a delay chip to adjust the delay, which not only increases the hardware cost, but also reduces the reliability and stability of the overall system.
Disclosure of Invention
The application mainly solves the technical problem of reducing and reducing jitter and delay of a signal source output signal.
According to a first aspect, in one embodiment, a trigger signal source is provided, including a trigger response setting unit, a signal generating unit, a digital TDC unit, a delay amount acquiring unit, and a compensation implementing unit;
The trigger response setting unit is connected with the signal generating unit and the digital TDC unit; the trigger response setting unit is used for receiving a preset external trigger signal, setting the rising edge or the falling edge of the external trigger signal as an activation signal and outputting the activation signal to the signal generating unit and the digital TDC unit;
The signal generation unit is used for responding to the activation signal and outputting a response signal with preset waveform parameters;
The digital TDC unit is connected with the delay amount acquisition unit and is used for measuring the time difference between the rising edge or the falling edge of the received external trigger signal and the output of the activation signal and outputting the measured and acquired receiving time difference value T to the delay amount acquisition unit; the difference value T at the receiving time is used for identifying the duration of an uncertain delay time existing between an analog pulse signal serving as an external trigger signal and a digital sampling clock of a digital TDC unit;
the delay amount acquisition unit is connected with the compensation implementation unit and is used for acquiring a delay amount skew according to the difference value T in receiving and sending the delay amount skew to the compensation implementation unit;
wherein, obtaining the delay amount skew according to the difference value T during receiving includes:
The delay amount acquisition unit carries out a plurality of quantization splitting on the difference value T in receiving so as to acquire delay components of at least two gradient grades to construct a delay amount skew;
The compensation implementation unit is connected with the signal generation unit and is used for delaying the response signal output by the signal generation unit by a delay amount skew and then outputting the delayed response signal as an output signal of the trigger type signal source.
In one embodiment, each delay component includes a reference parameter and a reference amount corresponding to the reference parameter; the digital TDC unit comprises a time-to-digital converter; the delay amount acquisition unit comprises a delay conversion unit and a compensation parameter setting unit;
The delay conversion unit is respectively connected with the digital TDC unit and the compensation parameter setting unit, and is used for acquiring each reference parameter according to a parameter compensation acquisition formula and a receiving time difference value T and outputting each reference parameter to the compensation parameter setting unit; the reference quantity comprises a converter clock period t and a converter sampling period t p in circuit parameters of the time-to-digital converter, the reference parameters comprise a first reference parameter a 0 and a second reference parameter b 0, the first reference parameter a 0 corresponds to the converter clock period t, the second reference parameter b 0 corresponds to the converter sampling period t p, and the converter clock period t is smaller than or equal to the converter sampling period t p.
In one embodiment, the reference parameters further include a third reference parameter N 0; the third reference parameter N 0 corresponds to a preset compensation constant, and the parameter compensation obtaining formula is as follows:
T=t*a+tp*b+N；
Wherein T is a difference value in receiving, T is a converter clock period of the time-to-digital converter, T p is a converter sampling period of the time-to-digital converter, a, b and N are reference constants corresponding to a first reference parameter a 0, a second reference parameter b 0 and a third reference parameter N 0, respectively, and T, T p, b and N are a first delay component, a second delay component and a third delay component, respectively, in which accurate gradient levels are sequentially raised;
or the reference parameters further include a third reference parameter N 0; the third reference parameter N 0 corresponds to a preset compensation constant, and the parameter compensation obtaining formula is as follows:
T=tp*b+N；
Wherein T is a difference value during reception, T p is a converter sampling period of the time-to-digital converter, b and N are reference constants corresponding to the second reference parameter b 0 and the third reference parameter N 0, respectively, and T p ×b and N are a second delay component and a third delay component, which are sequentially lifted by the accurate gradient level, respectively.
In one embodiment, the delay amount acquisition unit applies a cyclic subtraction to acquire the first reference parameter a 0, the second reference parameter b 0, and the third reference parameter N 0 by the parameter compensation acquisition formula and the reception time difference value T.
In an embodiment, the delay amount obtaining unit further includes a compensation parameter trimming unit, and the compensation parameter trimming unit is connected to the compensation parameter setting unit and is configured to send preset trimming parameters to the compensation parameter setting unit; the trimming parameters include a first trimming parameter a 1, a second trimming parameter b 1 and a third reference parameter N 1, corresponding to the first reference parameter a 0, the second reference parameter b 0 and the third reference parameter N 0, respectively;
The compensation parameter setting unit is further configured to obtain a delay amount skew according to the trimming parameter and the first reference parameter a 0, the second reference parameter b 0, and the third reference parameter N 0, where the trimming parameter is used to trim the delay amount skew, so as to implement trimming of delay of the response signal.
In one embodiment, the compensation parameter setting unit obtains the delay amount skew according to a parameter compensation obtaining formula, and specifically includes:
skew=t*a+tp*b+N；
Wherein,
When N 0+N1≥tp, n=n 0+N1-tp,NC =1;
When N 0+N1<tp, n=n 0+N1,NC =0;
when b 0+b1+NC≥t÷tp, b=b 0+b1+NC-t÷tp,bC =1;
when b 0+b1+NC<t÷tp, b=b 0+b1+NC,bC =0;
Where a=a 0+a1+bC;a0 is a first reference parameter, b 0 is a second reference parameter, N 0 is a third reference parameter, a 1 is a first trimming parameter, b 1 is a second trimming parameter, N 1 is a third reference parameter, skew is a delay amount, t is a converter clock period of the time-to-digital converter, and t p is a converter sampling period of the time-to-digital converter.
In an embodiment, the compensation implementing unit comprises a digital FIR filter for implementing delay control of the activation signal.
According to a second aspect, in one embodiment there is provided a signal generator comprising at least two triggered signal sources as described in the first aspect and a triggered channel switching circuit connected to each of the triggered signal sources separately; the trigger channel switching circuits are used for forwarding a preset external trigger signal to one trigger channel switching circuit or forwarding the external trigger signal to at least two different trigger channel switching circuits synchronously.
According to a third aspect, an embodiment provides a multi-signal source synchronization method for application to the triggered signal source according to the first aspect, the multi-signal source synchronization method comprising:
Receiving a preset external trigger signal, setting the rising edge or the falling edge of the external trigger signal as an activation signal and outputting the activation signal to the signal generation unit, wherein the signal generation unit is used for outputting a response signal with preset waveform parameters;
Measuring the time difference between the rising edge or the falling edge of the received external trigger signal and the output activation signal to obtain a difference value T in receiving; the receiving time difference value T is used for identifying the duration of uncertain delay existing between an analog pulse signal serving as an external trigger signal and a digital sampling clock;
obtaining a delay amount skew according to the difference value T in receiving;
the response signal output by the signal generating unit is delayed by a delay amount skew and then is output as an output signal of a trigger signal source; wherein the receiving time difference value T is positively correlated with the delay amount skew.
According to a fourth aspect, an embodiment provides a computer readable storage medium comprising a program executable by a processor to implement the multi-signal source synchronization method according to the third aspect.
According to the trigger signal source of the embodiment, delay compensation is carried out according to delay components of different gradient grades after the receiving time difference value is subjected to multiple resolution, and the delay components of different gradient grades correspond to different compensation precision, so that the compensation precision is closely related to a compensation mechanism corresponding to the trigger signal source, and more accurate compensation can be provided for delay between an external trigger signal and signal source output, and jitter between the external trigger signal and a response signal output by the signal source is greatly reduced, and the compensation precision for delay compensation of the response signal is greatly improved.
Drawings
FIG. 1 is a schematic diagram of a multi-source synchronous trigger control in one embodiment;
FIG. 2 is a block diagram of a trigger signal source in one embodiment;
FIG. 3 is a schematic diagram of a cyclic subtraction computation flow in one embodiment;
FIG. 4 is a schematic diagram of a signal generator in one embodiment;
Fig. 5 is a flowchart of a multi-source synchronization method in an embodiment.
Detailed Description
The application will be described in further detail below with reference to the drawings by means of specific embodiments. Wherein like elements in different embodiments are numbered alike in association. In the following embodiments, numerous specific details are set forth in order to provide a better understanding of the present application. However, one skilled in the art will readily recognize that some of the features may be omitted, or replaced by other elements, materials, or methods in different situations. In some instances, related operations of the present application have not been shown or described in the specification in order to avoid obscuring the core portions of the present application, and may be unnecessary to persons skilled in the art from a detailed description of the related operations, which may be presented in the description and general knowledge of one skilled in the art.
Furthermore, the described features, operations, or characteristics of the description may be combined in any suitable manner in various embodiments. Also, various steps or acts in the method descriptions may be interchanged or modified in a manner apparent to those of ordinary skill in the art. Thus, the various orders in the description and drawings are for clarity of description of only certain embodiments, and are not meant to be required orders unless otherwise indicated.
The numbering of the components itself, e.g. "first", "second", etc., is used herein merely to distinguish between the described objects and does not have any sequential or technical meaning. The term "coupled" as used herein includes both direct and indirect coupling (coupling), unless otherwise indicated.
Please refer to fig. 1, which is a schematic diagram of a multi-signal source synchronous trigger control in an embodiment, n signal sources share corresponding identical external trigger signals, and synchronously output response signals of respective preset waveforms, wherein n is a natural number. Even if the cables for transmitting the external trigger signals are set to be equal in length, the external trigger signals arrive at the respective signal sources at the same time, and it is preferable that the respective signal sources output the respective response signals (A1, A2 …, an) at the same time, uncertainty exists between the signals of the respective signal sources due to the existence of external trigger jitter. The essential cause of this jitter is the uncertainty delay that exists between the analog pulse signal and the digital sampling clock.
In the embodiment of the application, a time-to-digital converter (TDC) is used for measuring the difference value of the external trigger signal and the receiving time difference value when the external trigger signal and the activating signal (the response signal output by the signal source) are output, and the delay compensation is respectively carried out after the receiving time difference value is subjected to the multi-quantization splitting, so that the jitter between the external trigger signal and the response signal output by the signal source is greatly reduced, and the compensation precision for the delay compensation of the response signal is greatly improved. The time-to-digital converter (TDC) performs sampling calculation on a time range to be measured by a clock signal, and calculates a time value based on a calculated value, i.e., a direct counting method, wherein the minimum resolution of time measurement is a clock period for counting.
Embodiment one:
referring to fig. 2, a block diagram of a trigger signal source in an embodiment is shown, where the trigger signal source 1 includes a trigger response setting unit 10, a signal generating unit 20, a digital TDC unit 30, a delay amount obtaining unit 40, and a compensation implementing unit 50. The trigger response setting unit 10 is connected to the signal generating unit 20 and the digital TDC unit 30, and the trigger response setting unit 10 is configured to receive a preset external trigger signal, set a rising edge or a falling edge of the external trigger signal as an activation signal, and output the activation signal to the signal generating unit 20 and the digital TDC unit 30. The signal generating unit 20 is configured to output a response signal of a preset waveform parameter in response to the activation signal. The digital TDC unit 30 is connected to the delay amount acquiring unit 40, and the digital TDC unit 30 is configured to measure a time difference between a rising edge or a falling edge of the received external trigger signal and the output of the activation signal, and output the measured reception time difference value T to the delay amount acquiring unit 40. The difference in reception T is used to identify the duration of an indeterminate delay that exists between the analog pulse signal as the external trigger signal and the digital sampling clock of the digital TDC unit. The delay amount acquisition unit 40 is connected to the compensation implementation unit 50, and the delay amount acquisition unit 40 is configured to acquire a delay amount skew according to the difference value T at the time of reception, and send the delay amount skew to the compensation implementation unit 50.
Wherein, obtaining the delay amount skew according to the difference value T during receiving includes:
The delay amount acquisition unit 40 performs a plurality of quantization resolutions on the received difference value T to acquire delay components of at least two gradient levels to construct a delay amount skew.
The compensation implementation unit 50 is connected to the signal generation unit, and the compensation implementation unit 50 is configured to delay the response signal output by the signal generation unit by a delay amount skew and then output the delayed response signal as an output signal of the trigger signal source.
Therefore, the trigger signal source can perform delay compensation according to delay components of different gradient grades after the received time difference value is quantitatively split, and the compensation precision of the delay components of different gradient grades is closely related to the compensation mechanism corresponding to the trigger signal source, so that more accurate compensation can be provided for delay between the external trigger signal and the signal source output, jitter between the external trigger signal and the response signal output by the signal source is greatly reduced, and the compensation precision for delay compensation of the response signal is greatly improved.
In one embodiment, the compensation implementing unit 50 includes a digital FIR filter for implementing delay control of the activation signal.
In one embodiment, each delay component includes a reference parameter and a reference amount corresponding to the reference parameter. In one embodiment, the digital TDC unit includes a time-to-digital converter. In one embodiment, the delay amount obtaining unit 40 includes a delay conversion unit 41 and a compensation parameter setting unit 42, the delay conversion unit 41 is respectively connected to the digital TDC unit 30 and the compensation parameter setting unit 42, and the delay conversion unit 41 is configured to obtain each reference parameter according to a parameter compensation obtaining formula and a receiving time difference value T, and output each reference parameter to the compensation parameter setting unit 42. The reference quantity comprises a converter clock period t and a converter sampling period t p in circuit parameters of the time-to-digital converter, the reference parameters comprise a first reference parameter a 0 and a second reference parameter b 0, the first reference parameter a 0 corresponds to the converter clock period t, the second reference parameter b 0 corresponds to the converter sampling period t p, and the converter clock period t is smaller than or equal to the converter sampling period t p.
Where tp=t×n, t is the converter clock period of the time-to-digital converter (i.e. the inverse of the FPGA master clock), tp is the converter sampling period (the inverse of the sampling rate) of the time-to-digital converter, and n is the number of channels.
In one embodiment, the reference parameters further include a third reference parameter N 0, and the third reference parameter N 0 corresponds to a preset compensation constant, and the parameter compensation obtaining formula is:
T=t*a+tp*b+N；
Wherein T is a difference value during reception, T is a converter clock period of the time-to-digital converter, T p is a converter sampling period of the time-to-digital converter, a, b and N are reference constants corresponding to the first reference parameter a 0, the second reference parameter b 0 and the third reference parameter N 0, respectively, and t×a, T p ×b and N are a first delay component, a second delay component and a third delay component, which are sequentially improved in precision gradient level, respectively.
In an embodiment, the reference parameters further include a third reference parameter N 0, and the third reference parameter N 0 corresponds to a predetermined compensation constant.
In one embodiment, the parameter compensation obtaining formula is:
T=tp*b+N；
Wherein T is a difference value during reception, T p is a converter sampling period of the time-to-digital converter, b and N are reference constants corresponding to the second reference parameter b 0 and the third reference parameter N 0, respectively, and T p ×b and N are a second delay component and a third delay component, which are sequentially lifted by the accurate gradient level, respectively.
Referring to fig. 3, a flow chart of a cyclic subtraction calculation in an embodiment is shown, in which the delay amount obtaining unit 40 applies cyclic subtraction to obtain the first reference parameter a 0, the second reference parameter b 0 and the third reference parameter N 0 through a parameter compensation obtaining formula and a receiving time difference value T.
In an embodiment, the delay amount obtaining unit 40 further includes a compensation parameter tuning unit 43, where the compensation parameter tuning unit 43 is connected to the compensation parameter setting unit 42, and is configured to send preset tuning parameters to the compensation parameter setting unit 42, where the tuning parameters include a first tuning parameter a 1, a second tuning parameter b 1, and a third reference parameter N 1, and correspond to the first reference parameter a 0, the second reference parameter b 0, and the third reference parameter N 0, respectively. The compensation parameter setting unit 42 is further configured to obtain a delay amount skew according to the trimming parameter and the first reference parameter a 0, the second reference parameter b 0, and the third reference parameter N 0, where the trimming parameter is used to trim the delay amount skew to implement trimming of the delay of the response signal.
In one embodiment, the compensation parameter setting unit 42 obtains the delay amount skew according to a parameter compensation obtaining formula, which specifically includes:
skew=t*a+tp*b+N；
Wherein,
When N 0+N1≥tp, n=n 0+N1-tp,NC =1;
When N 0+N1<tp, n=n 0+N1,NC =0;
when b 0+b1+NC≥t÷tp, b=b 0+b1+NC-t÷tp,bC =1;
when b 0+b1+NC<t÷tp, b=b 0+b1+NC,bC =0;
Where a=a 0+a1+bC;a0 is a first reference parameter, b 0 is a second reference parameter, N 0 is a third reference parameter, a 1 is a first trimming parameter, b 1 is a second trimming parameter, N 1 is a third reference parameter, skew is a delay amount, t is a converter clock period of the time-to-digital converter, and t p is a converter sampling period of the time-to-digital converter. In an embodiment, the values of the trimming parameters are preset, and the first trimming parameter a 1, the second trimming parameter b 1 and the third reference parameter N 1 are respectively adjusted positively (increased) or negatively (decreased), so as to implement trimming of the delay amount of the response signal.
Since the trigger signal source 1 has its own compensation mechanism, the compensation mechanism is closely related to each preset compensation precision level of the plurality of component splitting compensation modules in the delay amount acquisition unit 40, for example, 3 component splitting compensation modules are respectively a digital system compensation module (i.e. the delay conversion unit 41), a sampling point compensation module (i.e. the compensation parameter setting unit 42) and a high precision compensation module (i.e. the compensation parameter fine adjustment unit 43). If t=15.3 seconds is needed to be compensated, after being split according to a preset compensation precision level, 10 seconds are compensated by a digital system compensation module, wherein 5 seconds are compensated by a sampling point compensation module, and 0.3 seconds are compensated by a high-precision compensation module, so that high-precision compensation is performed through a gradient matched with the high-precision compensation module.
In an embodiment, a digital FIR filter (D-sinc FIR filter) in the compensation implementation unit is used to implement delay control of the activation signal. The digital FIR filter can realize any fractional delay and can achieve the accuracy of 10 ps. In one embodiment, the design of the digital FIR filter is as follows:
delay = (tap_poly+1)/2 + skew；
for k = 1:tap_poly
if(k==delay)
hn_sinc1(k) = wc；
else
hn_sinc1(k) = sin(wc*pi*(k-delay))/(pi*(k-delay))；
end.
the skew is the delay amount to be adjusted; tap_poly is the order of the filter; wc is a fixed coefficient; windowing the response of the filter to prevent energy leakage, the final coefficient of the filter hn_sinc1 is:
hn_sinc1 = hn_sinc1'.*win；
Thus, the function can be completed only by carrying out coefficient quantization and realizing.
Referring to fig. 4, a schematic structural diagram of a signal generator in an embodiment of the present application is disclosed, and the signal generator in an embodiment of the present application further includes at least two trigger signal sources 1 as described above and trigger channel switching circuits 2 respectively connected to each of the trigger signal sources 1, where the trigger channel switching circuits 2 are configured to individually forward a preset external trigger signal to one trigger channel switching circuit 1 or synchronously forward the external trigger signal to at least two different trigger channel switching circuits 1.
The reason why the jitter of the external touch signal source is large is that 1 system clock is commonly used, and the jitter is 3.2ns assuming that the system clock is 312.5 MHz. The signal generator in an embodiment of the present application may make the external trigger jitter less than or equal to 1 sampling point, and if the sampling rate is 5GHz, the jitter is less than 200 ps.
Fig. 5 is a schematic flow chart of a multi-signal source synchronization method in an embodiment, and in an embodiment of the present application, a multi-signal source synchronization method is further disclosed, and is used for a triggered signal source as described above, where the multi-signal source synchronization method includes:
step 101, an activation signal is acquired and output.
And receiving a preset external trigger signal, setting the rising edge or the falling edge of the external trigger signal as an activation signal and outputting the activation signal to the signal generation unit so as to be used for outputting a response signal with preset waveform parameters by the signal generation unit.
Step 102, obtain the difference value at receiving.
The time difference between the rising edge or the falling edge of the received external trigger signal and the output activation signal is measured to obtain a difference value T at the time of reception. Wherein the reception time difference value T is used to identify the duration of an indeterminate delay that exists between the analog pulse signal as the external trigger signal and the digital sampling clock.
And 103, obtaining the delay amount.
And obtaining the delay amount skew according to the difference value T in receiving.
Step 104, delaying the response signal.
And (3) delaying the response signal output by the signal generating unit by a delay amount skew and outputting the delayed response signal as an output signal of the trigger signal source, wherein the receiving time difference value T is positively correlated with the delay amount skew.
The trigger type signal source disclosed by the embodiment of the application comprises a trigger response setting unit, a signal generating unit, a digital TDC unit, a delay amount acquisition unit and a compensation implementation unit, wherein the trigger response setting unit sets an activation signal, the signal generating unit outputs a response signal with preset waveform parameters, the digital TDC unit is used for measuring the time difference between the received external trigger signal and the output activation signal, the delay amount acquisition unit is used for carrying out a plurality of quantization splitting on the received time difference value so as to acquire delay components of at least two gradient grades to construct a delay amount, and the compensation implementation unit is used for delaying the response signal output by the signal generating unit and outputting the delayed response signal as an output signal of the trigger type signal source. Because delay compensation is respectively carried out according to the plurality of quantized and split receiving time difference values, jitter between the external trigger signal and the response signal output by the signal source is greatly reduced, and the delay compensation precision of the response signal is higher. Furthermore, the trigger signal source can be realized in the programmable logic device without participation of off-chip devices, and the integration level is high. Furthermore, the compensation parameter fine tuning unit additionally arranged in the delay amount acquisition unit can respond to fine tuning configuration of a user, fine tuning is performed by setting values of fine tuning parameters (three reference constants), and further high-precision delay adjustment of response signals according to output requirements can be achieved.
Those skilled in the art will appreciate that all or part of the functions of the various methods in the above embodiments may be implemented by hardware, or may be implemented by a computer program. When all or part of the functions in the above embodiments are implemented by means of a computer program, the program may be stored in a computer readable storage medium, and the storage medium may include: read-only memory, random access memory, magnetic disk, optical disk, hard disk, etc., and the program is executed by a computer to realize the above-mentioned functions. For example, the program is stored in the memory of the device, and when the program in the memory is executed by the controller, all or part of the functions described above can be realized. In addition, when all or part of the functions in the above embodiments are implemented by means of a computer program, the program may be stored in a storage medium such as a server, another computer, a magnetic disk, an optical disk, a flash disk, or a removable hard disk, and the functions in all or part of the above embodiments may be implemented by downloading or copying the program into a memory of a local device or updating a version of a system of the local device, and when the program in the memory is executed by a controller.
The foregoing description of the application has been presented for purposes of illustration and description, and is not intended to be limiting. Several simple deductions, modifications or substitutions may also be made by a person skilled in the art to which the application pertains, based on the idea of the application.
Claims (10)
1. The trigger type signal source is characterized by comprising a trigger response setting unit, a signal generating unit, a digital TDC unit, a delay amount acquisition unit and a compensation implementation unit;
The trigger response setting unit is connected with the signal generating unit and the digital TDC unit; the trigger response setting unit is used for receiving a preset external trigger signal, setting the rising edge or the falling edge of the external trigger signal as an activation signal and outputting the activation signal to the signal generating unit and the digital TDC unit;
the signal generation unit is used for responding to the activation signal and outputting a response signal with preset waveform parameters;
the digital TDC unit is connected with the delay amount acquisition unit and is used for measuring the time difference between the rising edge or the falling edge of the received external trigger signal and the output of the activation signal and outputting the measured and acquired receiving time difference value T to the delay amount acquisition unit; the receiving time difference value T is used for identifying the duration of uncertain delay existing between an analog pulse signal serving as an external trigger signal and a digital sampling clock of the digital TDC unit;
The delay amount acquisition unit is connected with the compensation implementation unit and is used for acquiring delay amount skew according to the difference value T in receiving and sending the delay amount skew to the compensation implementation unit;
wherein, obtaining the delay amount skew according to the difference value T during receiving includes:
the delay amount acquisition unit performs a plurality of quantization splitting on the difference value T in receiving so as to acquire delay components of at least two gradient grades to construct the delay amount skew;
The compensation implementation unit is connected with the signal generation unit, and is used for delaying the response signal output by the signal generation unit by the delay amount skew and outputting the delayed response signal as an output signal of the trigger type signal source.
2. The triggered signal source of claim 1, wherein each of the delay components comprises a reference parameter and a reference quantity corresponding to the reference parameter; the digital TDC unit comprises a time-to-digital converter;
the delay amount acquisition unit comprises a delay conversion unit and a compensation parameter setting unit;
The delay conversion unit is respectively connected with the digital TDC unit and the compensation parameter setting unit, and is used for acquiring each reference parameter according to a parameter compensation acquisition formula and the difference value T during receiving and outputting each reference parameter to the compensation parameter setting unit; the reference quantity includes a converter clock period t and a converter sampling period t p in circuit parameters of the time-to-digital converter, the reference parameters include a first reference parameter a 0 and a second reference parameter b 0, the first reference parameter a 0 corresponds to the converter clock period t, the second reference parameter b 0 corresponds to the converter sampling period t p, and the converter clock period t is less than or equal to the converter sampling period t p.
3. The triggered signal source of claim 2, wherein the reference parameters further comprise a third reference parameter N 0; the third reference parameter N 0 corresponds to a preset compensation constant, and the parameter compensation obtaining formula is as follows:
T=t*a+tp*b+N；
Wherein T is a difference value in receiving, T is a converter clock period of the time-to-digital converter, T p is a converter sampling period of the time-to-digital converter, a, b and N are reference constants corresponding to the first reference parameter a 0, the second reference parameter b 0 and the third reference parameter N 0, respectively, and T, T p, b and N are a first delay component, a second delay component and a third delay component, respectively, in which accurate gradient levels are sequentially raised;
Or alternatively
The reference parameters further include a third reference parameter N 0; the third reference parameter N 0 corresponds to a preset compensation constant, and the parameter compensation obtaining formula is as follows:
T=tp*b+N；
Wherein T is a difference value during reception, T p is a converter sampling period of the time-to-digital converter, b and N are respectively reference constants corresponding to the second reference parameter b 0 and the third reference parameter N 0, and T p ×b and N are respectively a second delay component and a third delay component with sequentially improved precision gradient levels.
4. The triggered signal source of claim 3, wherein the delay amount acquisition unit applies a cyclic subtraction to acquire the first reference parameter a 0, the second reference parameter b 0, and the third reference parameter N 0 by the parameter compensation acquisition formula and the reception time difference T.
5. The trigger signal source of claim 3, wherein the delay amount acquisition unit further comprises a compensation parameter trimming unit connected to the compensation parameter setting unit for transmitting a preset trimming parameter to the compensation parameter setting unit; the fine tuning parameters include a first fine tuning parameter a 1, a second fine tuning parameter b 1 and a third reference parameter N 1, which correspond to the first reference parameter a 0, the second reference parameter b 0 and the third reference parameter N 0, respectively;
The compensation parameter setting unit is further configured to obtain the delay amount skew according to the trimming parameter and the first reference parameter a 0, the second reference parameter b 0, and the third reference parameter N 0, where the trimming parameter is used to trim the delay amount skew, so as to achieve trimming of the response signal delay.
6. The trigger signal source of claim 5, wherein the compensation parameter setting unit obtains the delay amount skew according to the parameter compensation obtaining formula, and specifically comprises:
skew=t*a+tp*b+N；
Wherein,
When N 0+N1≥tp, n=n 0+N1-tp,NC =1;
When N 0+N1<tp, n=n 0+N1,NC =0;
when b 0+b1+NC≥t÷tp, b=b 0+b1+NC-t÷tp,bC =1;
when b 0+b1+NC<t÷tp, b=b 0+b1+NC,bC =0;
Where a=a 0+a1+bC;a0 is a first reference parameter, b 0 is a second reference parameter, N 0 is a third reference parameter, a 1 is a first trimming parameter, b 1 is a second trimming parameter, N 1 is a third reference parameter, skew is a delay amount, t is a converter clock period of the time-to-digital converter, and t p is a converter sampling period of the time-to-digital converter.
7. The triggered signal source of claim 5, wherein the compensation implementing unit comprises a digital FIR filter for implementing delay control of the activation signal.
8. A signal generator comprising at least two triggered signal sources according to any one of claims 1 to 7 and a triggered channel switching circuit connected to each of said triggered signal sources separately; the trigger channel switching circuits are used for forwarding a preset external trigger signal to one trigger channel switching circuit or forwarding the external trigger signal to at least two different trigger channel switching circuits synchronously.
9. A multiple signal source synchronization method for application to a triggered signal source as claimed in any one of claims 1 to 7, the multiple signal source synchronization method comprising:
receiving a preset external trigger signal, setting the rising edge or the falling edge of the external trigger signal as an activation signal and outputting the activation signal to a signal generation unit, so that the signal generation unit outputs a response signal of preset waveform parameters;
Measuring the time difference between the rising edge or the falling edge of the received external trigger signal and the output of the activation signal to obtain a difference value T in receiving; the receiving time difference value T is used for identifying the duration of uncertain delay time existing between an analog pulse signal serving as an external trigger signal and a digital sampling clock;
obtaining a delay amount skew according to the difference value T in receiving;
Delaying the response signal output by the signal generating unit by the delay amount skew and outputting the delayed response signal as an output signal of the trigger signal source; wherein, the receiving time difference value T is positively correlated with the delay amount skew.
10. A computer readable storage medium comprising a program executable by a processor to implement the multi-signal source synchronization method as recited in claim 9.
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