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CN118234323B - Display panel and display terminal - Google Patents

Display panel and display terminal Download PDF

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Publication number
CN118234323B
CN118234323B CN202410659513.7A CN202410659513A CN118234323B CN 118234323 B CN118234323 B CN 118234323B CN 202410659513 A CN202410659513 A CN 202410659513A CN 118234323 B CN118234323 B CN 118234323B
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CN
China
Prior art keywords
substrate
active layer
display panel
electrode
layer
Prior art date
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Active
Application number
CN202410659513.7A
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Chinese (zh)
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CN118234323A (en
Inventor
周志超
周晓梁
谭志威
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TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
TCL China Star Optoelectronics Technology Co Ltd
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Priority to CN202410659513.7A priority Critical patent/CN118234323B/en
Publication of CN118234323A publication Critical patent/CN118234323A/en
Application granted granted Critical
Publication of CN118234323B publication Critical patent/CN118234323B/en
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/0412—Digitisers structurally integrated in a display
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/0248—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies
    • H01L31/036—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes
    • H01L31/0376—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors
    • H01L31/03762—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including amorphous semiconductors including only elements of Group IV of the Periodic Table
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101—Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/112—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor
    • H01L31/113—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor
    • H01L31/1136—Devices sensitive to infrared, visible or ultraviolet radiation characterised by field-effect operation, e.g. junction field-effect phototransistor being of the conductor-insulator-semiconductor type, e.g. metal-insulator-semiconductor field-effect transistor the device being a metal-insulator-semiconductor field-effect transistor

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Chemical & Material Sciences (AREA)
  • Nonlinear Science (AREA)
  • Electromagnetism (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Mathematical Physics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Optics & Photonics (AREA)
  • Human Computer Interaction (AREA)
  • Ceramic Engineering (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Sustainable Development (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

The application discloses a display panel and a display terminal. The display panel comprises a substrate and a plurality of photosensitive units arranged on one side of the substrate, wherein each photosensitive unit comprises a photosensitive transistor and a switching transistor, each photosensitive transistor comprises a first active layer, and the material of each first active layer comprises amorphous silicon; the switching transistor includes a second active layer having a mobility greater than that of the first active layer, and is electrically connected to the light sensing transistor. According to the application, the photosensitive unit is arranged to comprise the photosensitive transistor and the switching transistor, the material of the first active layer of the photosensitive transistor comprises amorphous silicon, the amorphous silicon is sensitive to light rays and can be used as a photoelectric transistor, the mobility of the second active layer of the switching transistor is larger than that of the first active layer, and the response speed of the photosensitive unit can be improved by the switching transistor.

Description

Display panel and display terminal
Technical Field
The present application relates to the field of display technologies, and in particular, to a display panel and a display terminal.
Background
After the photoelectric sensor is implanted into the display panel, the functions of non-contact touch control, ambient light detection, imaging recognition and the like of the display panel can be realized by utilizing the light detection capability of the photoelectric sensor. The amorphous silicon phototransistor is sensitive to ambient light and can be used as a photosensor. However, the amorphous silicon phototransistor is used as a photosensitive unit, which has a problem of slow response speed.
Therefore, there is a need to solve the above-mentioned technical problems.
Disclosure of Invention
The application provides a display panel and a display terminal, which aim to solve the technical problem.
In order to solve the technical problems, the technical scheme provided by the application is as follows:
The application provides a display panel, which comprises a substrate and a plurality of photosensitive units arranged on one side of the substrate, wherein the photosensitive units comprise:
a photosensitive transistor including a first active layer, a material of the first active layer including amorphous silicon;
And a switching transistor including a second active layer having a mobility greater than that of the first active layer, the switching transistor being electrically connected to the light sensing transistor.
In the display panel of the present application, the display panel includes:
a light shielding layer arranged on one side of the substrate, wherein the light shielding layer comprises a first sub-part and a second sub-part which are spaced;
the first active layer and the second active layer are arranged on one side, away from the substrate, of the shading layer, orthographic projection of the first active layer on the shading layer is located in the first sub-portion, and orthographic projection of the second active layer on the shading layer is located in the second sub-portion.
In the display panel of the present application, the light sensing transistor includes a first source and a first drain, the switching transistor includes a second source and a second drain, the first source is disposed at a side of the first drain near the switching transistor, the second drain is disposed at a side of the second source near the light sensing transistor, and the first source is electrically connected to the second drain.
In the display panel of the present application, the light sensing transistor includes a first gate electrode disposed on a side of the first active layer close to the substrate, and an orthographic projection of only one of the first source electrode and the first drain electrode on the substrate overlaps with an orthographic projection of the first gate electrode on the substrate.
In the display panel of the present application, the orthographic projection of the first source electrode on the substrate overlaps with the orthographic projection of the first gate electrode on the substrate, and the distance between the first drain electrode and the carrying surface of the substrate is smaller than or equal to the distance between the first gate electrode and the carrying surface of the substrate.
In the display panel of the present application, an insulating layer is disposed between the first active layer and the second active layer and the substrate, and the number of layers of the insulating layer between the first active layer and the substrate is greater than the number of layers of the insulating layer between the second active layer and the substrate.
In the display panel of the application, the display panel comprises a connecting part and a first signal end which are arranged on the same layer, wherein the first signal end is electrically connected with the first drain electrode, one end of the connecting part is electrically connected with the first source electrode, and the other end of the connecting part is electrically connected with the second drain electrode.
In the display panel of the present application, the switching transistor includes a gate signal terminal and a second gate, the second gate is disposed on a side of the second active layer facing away from the substrate, the gate signal terminal is electrically connected to the second gate, and the gate signal terminal, the second source, the second drain and the connection portion are all disposed on the same layer.
In the display panel of the present application, the material of the active layer of the switching transistor includes low temperature polysilicon or an oxide semiconductor.
The application further provides a display terminal, which comprises the display panel.
The beneficial effects are that: the application discloses a display panel and a display terminal. The display panel comprises a substrate and a plurality of photosensitive units arranged on one side of the substrate, wherein each photosensitive unit comprises a photosensitive transistor and a switching transistor, each photosensitive transistor comprises a first active layer, and the material of each first active layer comprises amorphous silicon; the switching transistor includes a second active layer having a mobility greater than that of the first active layer, and is electrically connected to the light sensing transistor. According to the application, the photosensitive unit is arranged to comprise the photosensitive transistor and the switching transistor, the material of the first active layer of the photosensitive transistor comprises amorphous silicon, the amorphous silicon is sensitive to light rays and can be used as a photoelectric transistor, the mobility of the second active layer of the switching transistor is larger than that of the first active layer, and the response speed of the photosensitive unit can be improved by the switching transistor.
Drawings
The technical solution and other advantageous effects of the present application will be made apparent by the following detailed description of the specific embodiments of the present application with reference to the accompanying drawings.
Fig. 1 is a schematic top view of a display panel according to an embodiment of the application;
FIG. 2 is a schematic cross-sectional view of the structure at C-C in FIG. 1;
fig. 3A to 3F are flowcharts illustrating a manufacturing process of a display panel according to an embodiment of the application;
Fig. 4 is a schematic structural diagram of a display terminal according to an embodiment of the present application.
Reference numerals illustrate:
The display panel 1, the light sensing unit 60, the display area AA, the non-display area NA, the sub-pixel 70, the light sensing transistor 10, the first active layer 11, the first source 12, the first drain 13, the first gate 14, the switching transistor 20, the second active layer 21, the second source 22, the second drain 23, the second gate 24, the substrate 30, the light shielding layer 40, the first sub-portion 41, the second sub-portion 42, the connection portion 51, the first signal terminal 52, the gate signal terminal 53, the insulating layer 54, the display terminal 2, and the terminal body 3.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present application. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to fall within the scope of the application. Furthermore, it should be understood that the detailed description is presented herein for purposes of illustration and description only, and is not intended to limit the application. In the present application, unless otherwise indicated, terms of orientation such as "upper" and "lower" are used to generally refer to the upper and lower positions of the device in actual use or operation, and specifically the orientation of the drawing figures; while "inner" and "outer" are for the outline of the device.
The application provides a display panel 1, as shown in fig. 1 and 2, the display panel 1 comprises a substrate 30 and a plurality of photosensitive units 60 arranged on one side of the substrate 30, the photosensitive units 60 comprise a photosensitive transistor 10 and a switching transistor 20, the photosensitive transistor 10 comprises a first active layer 11, and the material of the first active layer 11 comprises amorphous silicon; the switching transistor 20 includes a second active layer 21, the mobility of the second active layer 21 is greater than the mobility of the first active layer 11, and the switching transistor 20 is electrically connected to the photosensitive transistor 10.
In the present embodiment, the display panel 1 may be a liquid crystal panel, an OLED panel, a Mini-LED panel, a Micro-LED panel, or the like.
In the present embodiment, the substrate 30 may be a glass substrate, a quartz substrate, or a silicon wafer; or a substrate with a flexible substrate. The flexible substrate may be one of polyimide, polyethylene naphthalate, polyvinyl alcohol, polyethylene terephthalate, or the like.
In this embodiment, as shown in fig. 1 and 2, the display panel 1 includes a display area AA and a non-display area NA disposed on at least one side of the display area AA. The display area AA is provided with a plurality of sub-pixels 70, and the display area AA is used for displaying a picture. The non-display area NA is provided with a driving circuit, such as a gate driving circuit or the like, for supplying a driving signal to the sub-pixel 70.
As shown in fig. 1, the display panel 1 includes a plurality of photosensitive units 60. The light sensing unit 60 may be disposed at a partial area or an entire area of the display area AA, which is not limited in the present application. The photosensitive unit 60 can be used for detecting the change of the ambient light, so as to be used for the functions of non-contact touch control, imaging identification and the like.
In the present embodiment, as shown in fig. 2, the light sensing unit 60 includes a light sensing transistor 10 and a switching transistor 20 electrically connected. The photosensitive transistor 10 includes a first active layer 11, and a material of the first active layer 11 may be amorphous silicon, such as hydrogenated amorphous silicon. Since amorphous silicon is sensitive to light, the phototransistor 10 can function as a photosensor.
The switching transistor 20 includes a second active layer 21, and the mobility of the second active layer 21 is greater than the mobility of the first active layer 11. The material of the second active layer 21 may be low temperature polysilicon, oxide semiconductor, or the like. The mobility of the switching transistor 20 is greater than that of the photosensitive transistor 10, so that the response speed of the photosensitive cell 60 can be improved.
In the present embodiment, the photosensitivity of the phototransistor 10 is superior to that of the switching transistor 20. The photosensitivity refers to the sensitivity and response capability of a material to light, and the photosensitivity of the material can be evaluated by the parameters of absorbance, light transmittance, photocurrent and the like. The higher the absorbance, the higher the light guide, and the greater the photocurrent, the more excellent the photosensitivity of the material.
In this embodiment, the electrical connection of the photosensitive transistor 10 and the switching transistor 20 means that the source/drain of the photosensitive transistor 10 is electrically connected to the source/drain of the switching transistor 20 or that the gate of the photosensitive transistor 10 is electrically connected to the gate of the switching transistor 20.
Alternatively, in some embodiments, the photosensitive transistor 10 may be disposed on a side of the switching transistor 20 facing away from the substrate, so as to reduce the occupied area of the photosensitive unit 60 of the display panel 1 and increase the aperture ratio of the display panel 1.
In the display panel 1 of the present application, as shown in fig. 2, the display panel 1 includes a substrate 30 and a light shielding layer 40, the light shielding layer 40 is disposed at one side of the substrate 30, and the light shielding layer 40 includes a first sub-portion 41 and a second sub-portion 42 which are spaced apart; the first active layer 11 and the second active layer 21 are both disposed on a side of the light shielding layer 40 away from the substrate 30, an orthographic projection of the first active layer 11 on the light shielding layer 40 is located in the first sub-portion 41, and an orthographic projection of the second active layer 21 on the light shielding layer 40 is located in the second sub-portion 42.
In this embodiment, the material of the light shielding layer 40 may be molybdenum, copper, silver, aluminum, titanium, niobium, nickel simple metal or molybdenum titanium, molybdenum niobium, molybdenum nickel alloy, or a combination stack of any of the above metals or alloys.
The materials of the first sub-portion 41 and the second sub-portion 42 may be the same, so that the same patterning process is used to manufacture the display panel 1, thereby reducing the manufacturing cost of the display panel.
In this embodiment, the first active layer 11 is disposed on a side of the light shielding layer 40 away from the substrate 30, and an orthographic projection of the first active layer 11 on the light shielding layer 40 is located in the first sub-portion 41. By the above arrangement, the first sub-portion 41 can shield the first active layer 11 from light, and light incident from the side of the substrate 30 away from the first active layer 11 is prevented from being irradiated to the first active layer 11, which may cause crosstalk of optical signals of the phototransistor 10.
Note that, the first active layer 11 may receive light incident from a side of the photosensitive transistor 10 facing away from the substrate 30, and light incident from the photosensitive transistor 10 facing away from the substrate 30 may be irradiated onto the first active layer 11.
In this embodiment, the second active layer 21 is disposed on a side of the light shielding layer 40 away from the substrate 30, and an orthographic projection of the second active layer 21 on the light shielding layer 40 is located in the second sub-portion 42. By the above arrangement, the second sub-portion 42 can shield the second active layer 21 from light, and the light incident from the side of the substrate 30 away from the second active layer 21 is prevented from being irradiated to the second active layer 21, resulting in electrical degradation of the second active layer 21.
In the display panel 1 of the present application, as shown in fig. 2, the photosensitive transistor 10 includes a first source 12 and a first drain 13, the switching transistor 20 includes a second source 22 and a second drain 23, the first source 12 is disposed at a side of the first drain 13 near the switching transistor 20, the second drain 23 is disposed at a side of the second source 22 near the photosensitive transistor 10, and the first source 12 is electrically connected to the second drain 23.
In this embodiment, as shown in fig. 2, the photosensitive transistor 10 includes a first source electrode 12 and a first drain electrode 13, where the first source electrode 12 and the first drain electrode 13 are disposed on a side of the first active layer 11 facing away from the substrate 30. The first active layer 11 includes a first channel portion, and a first source contact portion and a first drain contact portion disposed at both ends of the first channel portion, the first source 12 is disposed in connection with the first source contact portion, and the first drain 13 is disposed in connection with the first drain contact portion.
In some embodiments, the first source contact and the first drain contact may be subjected to a conductive process in order to reduce the resistance of the first source contact and the first drain contact. For example, the first source contact and the first drain contact may be ion doped, but not limited thereto.
In this embodiment, as shown in fig. 2, the switching transistor 20 includes a second source electrode 22 and a second drain electrode 23, and the second source electrode 22 and the second drain electrode 23 are disposed on a side of the second active layer 21 facing away from the substrate 30. The second active layer 21 includes a second channel portion, and a second source contact portion and a second drain contact portion disposed at both ends of the second channel portion, the second source 22 is disposed in connection with the second source contact portion, and the second drain 23 is disposed in connection with the second drain contact portion.
In the present embodiment, the materials of the first source electrode 12, the first drain electrode 13, the second source electrode 22, and the second drain electrode 23 may be, but not limited to, molybdenum, copper, silver, aluminum, titanium, niobium, nickel, or a combination stack of any of the above metals or alloys.
In this embodiment, as shown in fig. 2, the first source 12 is disposed on a side of the first drain 13 near the switching transistor 20, the second drain 23 is disposed on a side of the second source 22 near the photosensitive transistor 10, and the first source 12 is electrically connected to the second drain 23. By the above arrangement, the length of the wiring for electrically connecting the phototransistor 10 and the switching transistor 20 can be shortened, and the resistance of the connection wiring can be reduced.
In the display panel 1 of the present application, as shown in fig. 2, the phototransistor 10 includes the first gate electrode 14, the first gate electrode 14 is disposed on a side of the first active layer 11 near the substrate 30, and an orthographic projection of only one of the first source electrode 12 and the first drain electrode 13 on the substrate 30 overlaps with an orthographic projection of the first gate electrode 14 on the substrate 30.
In this embodiment, as shown in fig. 2, the photosensitive transistor 10 includes a first gate 14, and the first gate 14 is disposed on a side of the first active layer 11 near the substrate 30. That is, the first gate 14 of the phototransistor 10 is a bottom gate.
In the present embodiment, as shown in fig. 2, the orthographic projection of only one of the first source electrode 12 and the first drain electrode 13 on the substrate 30 overlaps with the orthographic projection of the first gate electrode 14 on the substrate 30, that is, the phototransistor 10 may be a gap-type transistor. Compared with a conventional transistor, the gap type transistor has larger photocurrent under the same illumination condition, and can improve the sensitivity of light identification.
Optionally, in some embodiments, as shown in fig. 2, the front projection of the first source 12 on the substrate 30 overlaps with the front projection of the first gate 14 on the substrate 30, and the front projection of the first drain 13 on the substrate 30 does not overlap with the front projection of the first gate 14 on the substrate 30.
Optionally, in some embodiments, the front projection of the first drain electrode 13 on the substrate 30 overlaps with the front projection of the first gate electrode 14 on the substrate 30, and the front projection of the first source electrode 12 on the substrate 30 does not overlap with the front projection of the first gate electrode 14 on the substrate 30.
In the present embodiment, the material of the first gate 14 may be, but not limited to, molybdenum, copper, silver, aluminum, titanium, niobium, nickel simple metals or molybdenum titanium, molybdenum niobium, molybdenum nickel alloys, or any combination stack of several metals or alloys thereof.
In the display panel 1 of the present application, as shown in fig. 2, the front projection of the first source electrode 12 on the substrate 30 overlaps with the front projection of the first gate electrode 14 on the substrate 30, and the distance between the first drain electrode 13 and the bearing surface of the substrate 30 is smaller than or equal to the distance between the first gate electrode 14 and the bearing surface of the substrate 30.
In the present embodiment, the two ends of the first active layer 11 have different heights with respect to the bearing surface of the substrate 30 in the direction perpendicular to the bearing surface of the substrate 30. The height of the first source contact portion relative to the bearing surface of the substrate 30 is greater than the height of the first drain contact portion relative to the bearing surface of the substrate 30, and the first channel portion of the first active layer 11 and the bearing surface of the substrate 30 form an acute angle or a right angle.
In the present embodiment, the distance between the first drain electrode 13 and the carrying surface of the substrate 30 is smaller than or equal to the distance between the first gate electrode 14 and the carrying surface of the substrate 30. That is, the first channel portion of the first active layer 11 extends obliquely to a side closer to the substrate 30, and the first drain contact portion of the first active layer 11 is made closer to the substrate 30 than the first gate electrode 14. By the above arrangement, without increasing the area of the orthographic projection of the first active layer 11 on the substrate 30, the difference in height between the first source contact portion and the first drain contact portion can be increased, so as to increase the photosensitive area of the first channel portion, thereby increasing the total amount of light received by the photosensitive transistor 10, and further increasing the sensitivity of the photosensitive transistor 10.
The bearing surface of the substrate 30 refers to a surface of the substrate 30 near the light shielding layer 40. The carrying surface of the substrate 30 is substantially parallel to the display surface of the display panel 1. The distance between the first drain electrode 13 and the carrying surface of the substrate 30 refers to the distance between the side surface of the first drain electrode 13, which is close to the substrate 30, and the carrying surface of the substrate 30, and the distance between the first gate electrode 14 and the carrying surface of the substrate 30 refers to the distance between the side surface of the first gate electrode 14, which is close to the substrate 30, and the carrying surface of the substrate 30.
Alternatively, in some embodiments, the positions of the first source electrode 12 and the first drain electrode 13 may be exchanged, so that the distance between the first drain electrode 13 and the bearing surface of the substrate 30 is greater than or equal to the distance between the first gate electrode 14 and the bearing surface of the substrate 30. By the above arrangement, the photosensitive area of the first active layer 11 can be increased, so that the total amount of light received by the photosensitive transistor 10 is increased, and the sensitivity of the photosensitive transistor 10 is further improved.
In the display panel 1 of the present application, as shown in fig. 2, an insulating layer 54 is provided between the first and second active layers 11 and 21 and the substrate 30. The number of layers of the insulating layer 54 between the first active layer 11 and the substrate 30 is greater than the number of layers of the insulating layer 54 between the second active layer 21 and the substrate 30. That is, the second active layer 21 may be first formed, the insulating layer 54 may be formed on the second active layer 21, and then the first active layer 11 may be formed on the insulating layer 54.
In this embodiment, the insulating layer 54 may be disposed between two adjacent metal layers, or between two adjacent metal layers and a semiconductor layer. The first active layer 11 and the second active layer 21 are both semiconductor layers. The insulating layer 54 may be one or a combination of layers of silicon nitride, silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, scandium zirconium oxide.
When the first active layer 11 is a metal oxide, the first active layer 11 needs to be annealed at a high temperature, for example, the high temperature may be about 400 degrees, and at this time, the amorphous silicon material may be affected in performance at a high temperature. In order to avoid the high temperature annealing process affecting the performance of the first active layer 11, the second active layer 21 may be fabricated first, and the first active layer 11 may be fabricated after the high temperature annealing is completed. At this time, the number of layers of the insulating layer 54 between the first active layer 11 and the substrate 30 is greater than the number of layers of the insulating layer 54 between the second active layer 21 and the substrate 30. As shown in fig. 2, the number of layers of the insulating layer 54 between the first active layer 11 and the substrate 30 is 3, and the number of layers of the insulating layer 54 between the second active layer 21 and the substrate 30 is 1. In the case where the thickness of the insulating layer 54 is uniform, the maximum distance between the first active layer 11 and the substrate 30 is greater than the maximum distance between the second active layer 21 and the substrate 30.
The second active layer 21 extends along the direction of the bearing surface of the substrate 30, that is, the angle between the second active layer 21 and the bearing surface of the substrate 30 is approximately 0 degrees without considering the manufacturing accuracy.
Alternatively, in some embodiments, the maximum distance between the first active layer 11 and the substrate 30 may be smaller than the maximum distance between the second active layer 21 and the substrate 30. At this time, when the second active layer 21 is a metal oxide, the first active layer 11 may be fabricated before the second active layer 21 is fabricated. In order to reduce the influence of the high temperature of the second active layer 21 in the high temperature annealing process on the first active layer 11, the second active layer 21 may be subjected to low temperature annealing. The low temperature anneal is at a lower temperature than the high temperature anneal. For example, the temperature of the low temperature annealing may be 200 degrees, but is not limited thereto. The temperature of the low-temperature annealing should not affect the photosensitive performance of the amorphous silicon.
In the display panel 1 of the present application, as shown in fig. 2, the display panel 1 includes a connection portion 51 and a first signal terminal 52 disposed in the same layer, the first signal terminal 52 is electrically connected to the first drain electrode 13, one end of the connection portion 51 is electrically connected to the first source electrode 12, and the other end is electrically connected to the second drain electrode 23.
In the present application, the same layer arrangement means that the film layer patterns are arranged on one side of the same film layer facing away from the substrate 30.
In this embodiment, as shown in fig. 2, the connection portion 51 and the first signal end 52 are disposed in the same layer, and the materials of the connection portion 51 and the first signal end 52 may be the same, so that the same patterning process is adopted for manufacturing, the manufacturing process of the display panel 1 is simplified, and the manufacturing cost is reduced.
In this embodiment, the first signal terminal 52 may be electrically connected to the first drain electrode 13, and the driving signal of the photosensitive unit 60 may be input to the photosensitive transistor 10 through the first signal terminal 52.
In the present embodiment, as shown in fig. 2, one end of the connection portion 51 is electrically connected to the first source electrode 12, and the other end is electrically connected to the second drain electrode 23, thereby achieving electrical connection of the phototransistor 10 and the switching transistor 20.
In this embodiment, the material of the connection portion 51 and the first signal end 52 may be transparent conductive material. The transparent conductive material may be any of zinc oxide, zinc oxynitride, tin oxide, indium oxide, gallium oxide, copper oxide, bismuth oxide, indium zinc oxide, zinc tin oxide, aluminum tin oxide, indium gallium zinc oxide, indium tin zinc oxide, aluminum indium tin zinc oxide, zinc sulfide, barium titanate, strontium titanate, lithium niobate, or the like, but is not limited thereto. By setting the materials of the connection portion 51 and the first signal terminal 52 to be transparent conductive materials, it is possible to avoid the connection portion 51 and the first signal terminal 52 from blocking light incident from a side surface of the photosensitive transistor 10 facing away from the substrate 30 and from affecting the reception of light by the photosensitive transistor 10.
In the display panel 1 of the present application, as shown in fig. 2, the switching transistor 20 includes a gate signal terminal 53 and a second gate 24, the second gate 24 is disposed on a side of the second active layer 21 facing away from the substrate 30, the gate signal terminal 53 is electrically connected to the second gate 24, and the gate signal terminal 53, the second source 22, the second drain 23 and the connection portion 51 are all disposed on the same layer.
In this embodiment, as shown in fig. 2, the switch transistor 20 includes a gate signal terminal 53, where the gate signal terminal 53 and the connection portion 51, the second source 22, and the second drain 23 can be all disposed on the same layer, so that the same patterning operation can be used to manufacture the display panel 1, thereby simplifying the manufacturing process and reducing the manufacturing cost. The gate signal terminal 53 is electrically connected to the second gate 24, and is used for inputting a driving signal to the second gate 24.
In this embodiment, as shown in fig. 2, the second gate 24 is disposed on a side of the second active layer 21 facing away from the substrate 30, i.e., the second gate 24 may be a top gate.
In this embodiment, the first gate 14 and the second gate 24 may be disposed on the same layer, so that the same patterning process is used to simplify the manufacturing process of the display panel 1 and reduce the manufacturing cost.
Alternatively, in an embodiment, as shown in fig. 2, the second sub-portion 42 may serve as a bottom gate of the switching transistor 20, thereby making the switching transistor 20a double gate transistor. The two gates of the double gate transistor may be arranged in electrical connection, i.e. the second sub-portion 42 may be electrically connected to the second gate 24. Compared with Shan Shan transistors, the double gate of the double gate transistor can better regulate the threshold voltage of the switching transistor 20, improve the stability of the switching transistor 20, and can better protect the channel portion of the second active layer 21.
In the display panel 1 of the present application, the material of the active layer of the switching transistor 20 includes low-temperature polysilicon or an oxide semiconductor.
In this embodiment, the material of the oxide semiconductor may be one of zinc oxide, zinc oxynitride, tin oxide, indium oxide, gallium oxide, copper oxide, bismuth oxide, indium zinc oxide, zinc tin oxide, aluminum tin oxide, indium gallium zinc oxide, indium tin zinc oxide, aluminum indium tin zinc oxide, zinc sulfide, barium titanate, strontium titanate, lithium niobate, or the like.
As shown in fig. 3A to 3F, a manufacturing process flow chart of a display panel 1 according to an embodiment of the present application is shown.
As shown in fig. 3A, a metal layer is deposited on the substrate 30, and patterned using a patterning process to form the light shielding layer 40, and an insulating layer 54 is deposited on the light shielding layer 40.
The patterning process comprises a photoetching process and an etching process, and specifically comprises photoresist coating, exposure, development, etching, photoresist removal and the like. The exposure process of the photoetching process can adopt any one of ultraviolet light, deep ultraviolet light, visible light, electron beam and ion beam; the etching process may be a dry etching process, a wet etching process, a hybrid process of dry and wet. The dry etching process can adopt a single gas component of chlorine, boron trichloride, hydrogen hexasulfide, carbon tetrafluoride, carbon trifluoride, nitrogen trifluoride, oxygen, argon and nitrogen or a combination of any of the above gases; the wet etching process can be ammonia water, sodium hydroxide, potassium hydroxide, phosphoric acid, hydrofluoric acid, nitric acid, acetic acid, hydrochloric acid, sulfuric acid, hydrogen peroxide, aqua regia solution and mixed solution of any two or three of the above.
The insulating layer 54 may be one or a combination of layers of silicon nitride, silicon oxide, aluminum oxide, hafnium oxide, zirconium oxide, scandium zirconium oxide.
The light shielding layer 40 includes first and second sub-portions 41 and 42 spaced apart.
As shown in fig. 3B, an oxide active layer is deposited on the insulating layer 54, and the oxide active layer is patterned using a patterning process, forming the second active layer 21.
The oxide active layer may be one of zinc oxide, zinc oxynitride, tin oxide, indium oxide, gallium oxide, copper oxide, bismuth oxide, indium zinc oxide, zinc tin oxide, aluminum tin oxide, indium gallium zinc oxide, indium tin zinc oxide, aluminum indium tin zinc oxide, zinc sulfide, barium titanate, strontium titanate, lithium niobate, or the like.
As shown in fig. 3C, an insulating layer 54 is deposited on the second active layer 21; a metal layer is deposited on insulating layer 54 and a patterning process is performed on the metal layer to form second gate 24 and first gate 14. The second gate 24 is disposed corresponding to the channel portion of the second active layer 21, and the first gate 14 is disposed corresponding to the first sub-portion 41.
In this embodiment, the step after depositing an insulating layer 54 on the second active layer 21 further includes performing a high temperature annealing treatment on the second active layer 21.
As shown in fig. 3D, an insulating layer 54 is deposited on the first gate electrode 14 and the second gate electrode 24, an amorphous silicon layer is formed on the insulating layer 54, a metal layer is formed on the amorphous silicon layer, and the metal layer and the amorphous silicon layer are patterned by a patterning process to form the first active layer 11, the first source electrode 12 and the first drain electrode 13.
In this embodiment, the process of patterning the metal layer and the amorphous silicon layer may use a half tone mask, so that the first active layer 11, the first source electrode 12, and the first drain electrode 13 may be formed using one patterning process.
In this embodiment, the material of the amorphous silicon layer may be hydrogenated amorphous silicon.
As shown in fig. 3E, an insulating layer 54 is deposited on the first source electrode 12 and the first drain electrode 13, and a patterning process is performed on the insulating layer 54 to form a via hole pattern. The via patterns expose both ends of the second active layer 21, the second gate electrode 24, the first source electrode 12, and the first drain electrode 13, respectively.
As shown in fig. 3F, a metal layer is deposited on the insulating layer 54, and a patterning process is performed on the metal layer to form the connection portion 51, the first signal terminal 52, the second drain electrode 23, the second source electrode 22, and the gate signal terminal 53.
In this embodiment, the metal layer may be a transparent conductive material. By setting the materials of the connection portion 51 and the first signal terminal 52 to be transparent conductive materials, it is possible to avoid the connection portion 51 and the first signal terminal 52 from blocking light incident from a side surface of the photosensitive transistor 10 facing away from the substrate 30 and from affecting the reception of light by the photosensitive transistor 10.
In this embodiment, the gate signal terminal 53 is electrically connected to the second gate 24.
As shown in fig. 4, the present application further provides a display terminal 2, where the display terminal 2 includes the display panel 1 described above.
In the present embodiment, as shown in fig. 4, the display terminal 2 includes a display panel 1 and a terminal body 3, and the display panel 1 and the terminal body 3 are combined into one body.
In this embodiment, the display terminal 2 may be: any product or component with display function such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
In the foregoing embodiments, the descriptions of the embodiments are emphasized, and for parts of one embodiment that are not described in detail, reference may be made to related descriptions of other embodiments.
The display panel and the display terminal provided by the embodiments of the present application are described in detail, and specific examples are applied to illustrate the principles and the embodiments of the present application, and the description of the above embodiments is only used to help understand the technical solution and the core idea of the present application; those of ordinary skill in the art will appreciate that: the technical scheme described in the foregoing embodiments can be modified or some technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.

Claims (9)

1. A display panel, characterized by comprising a substrate and a plurality of photosensitive units arranged on one side of the substrate, wherein the photosensitive units comprise:
A light sensing transistor including a first active layer, a material of the first active layer including amorphous silicon, the light sensing transistor including a first source electrode and a first drain electrode;
A switching transistor including a second active layer having a mobility greater than that of the first active layer, the switching transistor being electrically connected to the light sensing transistor;
The light sensing transistor comprises a first grid electrode, the first grid electrode is arranged on one side, close to the substrate, of the first active layer, and the orthographic projection of only one of the first source electrode and the first drain electrode on the substrate overlaps with the orthographic projection of the first grid electrode on the substrate;
The distance between the first drain electrode and the bearing surface of the substrate is smaller than the distance between the first grid electrode and the bearing surface of the substrate; in a direction perpendicular to the bearing surface of the substrate, a height of one end of the first active layer connected with the first source electrode relative to the bearing surface of the substrate is greater than a height of one end of the first active layer connected with the first drain electrode relative to the bearing surface of the substrate.
2. The display panel of claim 1, wherein the switching transistor comprises a second source and a second drain, the first source is disposed on a side of the first drain adjacent to the switching transistor, the second drain is disposed on a side of the second source adjacent to the light sensing transistor, and the first source is electrically connected to the second drain.
3. The display panel of claim 2, wherein an orthographic projection of the first source electrode on the substrate overlaps an orthographic projection of the first gate electrode on the substrate.
4. A display panel according to claim 3, wherein insulating layers are provided between the first and second active layers and the substrate, and the number of layers of the insulating layers between the first active layer and the substrate is greater than the number of layers of the insulating layers between the second active layer and the substrate.
5. The display panel according to claim 3, wherein the display panel includes a connection portion and a first signal terminal disposed in a same layer, the first signal terminal is electrically connected to the first drain electrode, one end of the connection portion is electrically connected to the first source electrode, and the other end is electrically connected to the second drain electrode.
6. The display panel of claim 5, wherein the switching transistor comprises a gate signal terminal and a second gate electrode, the second gate electrode is disposed on a side of the second active layer facing away from the substrate, the gate signal terminal is electrically connected to the second gate electrode, and the gate signal terminal, the second source electrode, the second drain electrode, and the connection portion are all disposed on the same layer.
7. The display panel according to claim 1, wherein a material of an active layer of the switching transistor comprises low-temperature polysilicon or an oxide semiconductor.
8. The display panel according to any one of claims 1 to 7, wherein the display panel comprises:
a light shielding layer arranged on one side of the substrate, wherein the light shielding layer comprises a first sub-part and a second sub-part which are spaced;
the first active layer and the second active layer are arranged on one side, away from the substrate, of the shading layer, orthographic projection of the first active layer on the shading layer is located in the first sub-portion, and orthographic projection of the second active layer on the shading layer is located in the second sub-portion.
9. A display terminal, characterized in that the display terminal comprises a display panel according to any one of claims 1 to 8.
CN202410659513.7A 2024-05-27 2024-05-27 Display panel and display terminal Active CN118234323B (en)

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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1680862A (en) * 2001-04-12 2005-10-12 株式会社日立制作所 Liquid crystal display device
CN110931522A (en) * 2018-08-31 2020-03-27 京东方科技集团股份有限公司 Display panel and manufacturing method thereof

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100961072B1 (en) * 2005-06-09 2010-06-01 엘지디스플레이 주식회사 Liquid Crystal Display Device Having Image Sensing Function And Method For Fabricating Thereof And Image Sensing Method Using The Same

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1680862A (en) * 2001-04-12 2005-10-12 株式会社日立制作所 Liquid crystal display device
CN110931522A (en) * 2018-08-31 2020-03-27 京东方科技集团股份有限公司 Display panel and manufacturing method thereof

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