CN118131734A - Risk verification method, device and equipment for control loop and storage medium - Google Patents
Risk verification method, device and equipment for control loop and storage medium Download PDFInfo
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- G—PHYSICS
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
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- G05B23/0218—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterised by the fault detection method dealing with either existing or incipient faults
- G05B23/0256—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterised by the fault detection method dealing with either existing or incipient faults injecting test signals and analyzing monitored process response, e.g. injecting the test signal while interrupting the normal operation of the monitored system; superimposing the test signal onto a control signal during normal operation of the monitored system
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
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Abstract
The embodiment of the invention discloses a risk verification method, device and equipment for a control loop and a storage medium. The method comprises the following steps: generating a loop graph based on the loop file; generating a loop simulation model based on the loop graph; wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection; performing safety measure operation in the loop simulation model in a simulation manner to obtain state information of a first element and voltage information of a second element in each sub-loop; determining an evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; and verifying the evaluation result of each sub-loop based on a loop information base to obtain a risk verification result of each sub-loop. According to the scheme, the evaluation results of the sub-loops are determined based on the state information, the voltage information and the set voltage information, the evaluation results are checked according to the loop information base, the risk check result is obtained, and the safety and the stability of the control loop can be improved.
Description
Technical Field
The embodiment of the invention relates to the technical field of loops, in particular to a risk verification method, device and equipment for a control loop and a storage medium.
Background
In the operation process of the transformer substation, secondary safety measures (secondary safety measures for short) are important links for ensuring personnel safety and equipment safety.
When performing secondary security operations, simultaneous variation of multiple loop functions is often caused. Such as control loops in the secondary loop (e.g., control outlet loop), such loops are typically free of current and do not have any alarm signal or analog fluctuations when disconnected or shorted to ground. Therefore, it is important to check the risk of the control loop to ensure the safety and stability of the control loop when performing the secondary safety measure operation.
Disclosure of Invention
The embodiment of the invention provides a risk verification method, device and equipment for a control loop and a storage medium, which can improve the safety and stability of the control loop.
In a first aspect, an embodiment of the present invention provides a risk verification method for a control loop, including:
Generating a loop graph based on the loop file;
generating a loop simulation model based on the loop graph; wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection;
Performing safety measure operation in the loop simulation model in a simulation manner to obtain state information of a first element and voltage information of a second element in each sub-loop;
Determining an evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; wherein the evaluation result includes normal or abnormal;
Checking the evaluation result of each sub-loop based on a loop information base to obtain a risk check result of each sub-loop; wherein the risk verification result comprises a risk or no risk; the loop information base comprises line information and the corresponding relation between the type information of the safety measure operation and the safety sub-loop.
In a second aspect, an embodiment of the present invention further provides a risk verification device for a control loop, where the device includes:
The loop diagram generation module is used for generating a loop diagram based on the loop file;
the loop simulation model generation module is used for generating a loop simulation model based on the loop diagram; wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection;
the information obtaining module is used for performing safety measure operation in a simulation mode of the loop to obtain state information of a first element and voltage information of a second element in each sub-loop;
the evaluation result determining module is used for determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; wherein the evaluation result includes normal or abnormal;
The verification result obtaining module is used for verifying the evaluation result of each sub-loop based on the loop information base to obtain the risk verification result of each sub-loop; wherein the risk verification result comprises a risk or no risk; the loop information base comprises line information and the corresponding relation between the type information of the safety measure operation and the safety sub-loop.
In a third aspect, an embodiment of the present invention further provides an electronic device, including:
at least one processor; and
A memory communicatively coupled to the at least one processor; wherein,
The memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the risk verification method of the control loop according to the embodiments of the present invention.
In a fourth aspect, an embodiment of the present invention further provides a computer readable storage medium, where computer instructions are stored, where the computer instructions are configured to cause a processor to execute the risk verification method of the control loop according to the embodiment of the present invention.
The embodiment of the invention discloses a risk verification method, a device, equipment and a storage medium of a control loop, which comprise the following steps: generating a loop graph based on the loop file; generating a loop simulation model based on the loop graph; wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection; performing safety measure operation in a loop simulation model in a simulation manner to obtain state information of a first element and voltage information of a second element in each sub-loop; determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; wherein the evaluation result includes normal or abnormal; checking the evaluation result of each sub-loop based on the loop information base to obtain a risk check result of each sub-loop; wherein the risk verification result comprises risk or no risk; the loop information base comprises the corresponding relation between the type information of the line information and the safety sub-loop. According to the risk verification method for the control loop, provided by the embodiment of the invention, safety measure operation is simulated and executed in the loop simulation model, the state information of the first element and the voltage information of the second element in each sub-loop are obtained, the evaluation result is determined according to the state information, the voltage information and the set voltage information, the evaluation result of each sub-loop is verified based on the loop information base, the risk verification result is obtained, and the safety and the stability of the control loop can be improved.
Drawings
FIG. 1 is a flow chart of a risk verification method for a control loop according to a first embodiment of the present invention;
FIG. 2 is a diagram of a switch outlet circuit according to an embodiment of the present invention;
FIG. 3 is a flow chart of a risk verification method for a control loop according to a second embodiment of the present invention;
Fig. 4 is a schematic structural diagram of a risk verification device of a control loop in a third embodiment of the present invention;
fig. 5 is a schematic structural diagram of an electronic device according to a fourth embodiment of the present invention.
Detailed Description
The invention is described in further detail below with reference to the drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting thereof. It should be further noted that, for convenience of description, only some, but not all of the structures related to the present invention are shown in the drawings.
Example 1
Fig. 1 is a flowchart of a risk verification method for a control loop according to a first embodiment of the present invention, where the method may be applicable to a case of verifying a risk of a control loop, and the method may be performed by a risk verification device for a control loop, where the device may be implemented in a form of software and/or hardware, and optionally, may be implemented by an electronic device, where the electronic device may be a mobile terminal, a PC side, a server, or the like. The method specifically comprises the following steps:
s110, generating a loop diagram based on the loop file.
In this embodiment, the manner of generating the loop map based on the loop file may be: acquiring element information and connection relation thereof in a loop file; and generating a loop chart according to the element information and the connection relation thereof.
In this embodiment, the loop file may be a secondary control outlet loop file, such as a switch outlet loop file, a knife switch outlet loop file, and the like. Taking the switch outlet loop as an example, the element information may include: air switch, device exit point, clamp plate and relay.
For example, the switch outlet circuit diagram may be automatically generated according to the element information and the connection relation thereof in the switch outlet circuit file. As shown in fig. 2, a circuit diagram of a switch outlet is provided in an embodiment of the present invention, where the circuit diagram is as follows: the power supply is started from the positive electrode of the power supply, passes through the air switch, the outlet contact of the device, the pressing plate, the relay and other elements, and returns to the negative electrode of the power supply. The switch outlet circuit diagram comprises two sub-circuits, namely a sub-circuit 1 and a sub-circuit 2, wherein the sub-circuit 1 comprises an air switch 1, a device outlet contact 1, a pressing plate 1 and a relay 1, and the sub-circuit 2 comprises an air switch 2, a device outlet contact 2, a pressing plate 2 and a relay 2.
S120, generating a loop simulation model based on the loop diagram.
Wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection.
In this embodiment, the loop simulation system simulates the generated loop graph to obtain a loop simulation model.
By way of example, the switch outlet circuit diagram of fig. 2 may be simulated to obtain a switch outlet circuit simulation model. The switch outlet circuit simulation model comprises a sub-circuit 1 and a sub-circuit 2, wherein the two sub-circuits are in parallel connection.
S130, performing safety measure operation in a loop simulation model in a simulation mode to obtain state information of a first element and voltage information of a second element in each sub-loop.
Wherein the state information of the first element comprises an open state and a closed state.
In this embodiment, the security operation may be understood as a secondary security operation in the substation, such as: opening an air switch in the circuit, closing the pressure plate, etc. The first element may be understood as the device outlet contact and the second element as a relay. The voltage information of the second element can be understood as the voltage value of the relay.
Illustratively, the safety measure operation of the platen 2 from closed to open is simulated in a switch outlet circuit simulation model. After the safety measure operation is performed, the state information of the device outlet contact 1 in the sub-loop 1 and the voltage value of the relay 1 are obtained, as well as the state information of the device outlet contact 2 in the sub-loop 2 and the voltage value of the relay 2.
And S140, determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information.
Wherein the evaluation result includes normal or abnormal.
In this embodiment, the set voltage information is a preset voltage value.
In this embodiment, the manner of determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information may be: when the state information is in the disconnection state, if the voltage information is larger than the set voltage information, the evaluation result of the branch loop is abnormal; when the state information is in the off state, if the voltage information is smaller than or equal to the set voltage information, the evaluation result of the branch circuit is normal. When the state information is in a closed state, if the voltage information is smaller than the set voltage information, the evaluation result of the sub-loop is abnormal; when the state information is in a closed state, if the voltage information is greater than or equal to the set voltage information, the evaluation result of the branch loop is normal.
In this embodiment, the evaluation result of the sub-loop is abnormal, which may be understood as that the sub-loop is an abnormal loop, for example: the phenomenon of short circuit and open circuit exists; the evaluation result of the sub-loop is normal, which can be understood as the sub-loop being a normal loop.
For example, assume that the set voltage information is 120v. The state information of the outlet points in the sub-circuits 1 and 2 is assumed to be in the off state, the voltage value of the relay 1 is 220v, and the voltage value of the relay 2 is 110v. Since the voltage value 220v of the relay 1 is larger than the set voltage information 120v, the evaluation result of the sub-loop 1 is abnormal; since the voltage value 110v of the relay 2 is smaller than the set voltage information 120v, the evaluation result of the sub-circuit 2 is normal.
Illustratively, it is assumed that the set voltage information is 220v. The state information of the outlet points in the sub-circuits 1 and 2 is assumed to be in a closed state, the voltage value of the relay 1 is 110v, and the voltage value of the relay 2 is 220v. Since the voltage value 110v of the relay 1 is smaller than the set voltage information, the evaluation result of the sub-loop 1 is abnormal; since the voltage value 220v of the relay 2 is equal to the set voltage information, the evaluation result of the sub-loop 2 is normal.
And S150, checking the evaluation result of each sub-loop based on the loop information base to obtain the risk check result of each sub-loop.
Wherein the risk verification result comprises risk or no risk.
In this embodiment, the loop information base is used to check the evaluation result of each sub-loop again, so that a risk determination mode of the control loop is increased, and further the safety and stability of the control loop are improved.
According to the technical scheme of the embodiment, a loop diagram is generated based on a loop file; generating a loop simulation model based on the loop graph; performing safety measure operation in a loop simulation model in a simulation manner to obtain state information of a first element and voltage information of a second element in each sub-loop; determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; and verifying the evaluation result of each sub-loop based on the loop information base to obtain the risk verification result of each sub-loop. According to the risk verification method for the control loop, provided by the embodiment of the invention, the assessment result of each sub-loop is determined based on the state information, the voltage information and the set voltage information, and the assessment result is verified according to the loop information base, so that the safety and the stability of the control loop are improved.
Example two
Fig. 3 is a flowchart of a risk verification method for a control loop according to a second embodiment of the present invention, where on the basis of the above embodiment, the method includes the following steps:
S210, generating a loop diagram based on the loop file.
S220, generating a loop simulation model based on the loop diagram.
S230, performing safety measure operation in a loop simulation model in a simulation mode to obtain state information of the first element and voltage information of the second element in each sub-loop.
Illustratively, taking a switch outlet loop simulation model as an example, an safety measure operation is performed in the switch outlet loop simulation model in a simulation manner, so as to obtain state information of the outlet contact 1 of the device in the sub-loop 1 and voltage information of the relay 1, and state information of the outlet contact 2 of the device in the sub-loop 2 and voltage information of the relay 2.
S240, determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information.
S250, for each sub-loop, acquiring the line information of the sub-loop and the type information of the safety measure operation.
In this embodiment, the line information of the sub-loop may be understood as the line interval to which the sub-loop belongs, such as the line 1 interval and the line 2 interval; the type information of the safety measure operation may include: overhauling the safety measure, debugging the safety measure, reforming the safety measure and the like.
For example, assume that the acquired line information of the sub-loop 1 and the sub-loop 2 is a line 1 interval and a line 2 interval, respectively, and the type information of the safety measure operation is a debug safety measure.
S260, checking the evaluation results of the branch loops based on the line information, the safety measure operation type information and the loop information base to obtain the risk check results of each branch loop.
The loop information base comprises corresponding relations between the line information, the type information of the safety measure operation and the safety sub-loops.
In this embodiment, the loop information base may be understood as an safety measure implementation safety range base, which records the corresponding relationship between the line information and the type information of the safety measure operation and the safety sub-loop. The safety sub-loop can be understood as: after safety measure operation is carried out on a certain sub-loop, the sub-loop is not affected, for example, short circuit, open circuit and the like are not generated, and the sub-loop is called a safety sub-loop.
Illustratively, in the loop information base, for line 1 intervals: under the type of maintenance safety measure, the included safety sub-circuits are an alternating voltage sub-circuit 1, an alternating current sub-circuit 1, a switch outlet sub-circuit 1, a disconnecting link outlet sub-circuit 1 and a failure sub-circuit 1; under the type of debugging safety measure, the included safety sub-circuits are an alternating voltage sub-circuit 1, an alternating current sub-circuit 1, a switch outlet sub-circuit 1 and a failure sub-circuit 1; under the type of modifying safety measure, the included safety sub-circuits are an alternating voltage sub-circuit 1, an alternating current sub-circuit 1, a switch outlet sub-circuit 1 and a disconnecting link outlet sub-circuit 1. For line 2 interval: under the type of maintenance safety measure, the included safety sub-circuits are an alternating voltage sub-circuit 2, an alternating current sub-circuit 2, a switch outlet sub-circuit 2, a disconnecting link outlet sub-circuit 2 and a failure sub-circuit 2; under the type of debugging safety measure, the included safety sub-loop is an alternating voltage sub-loop 2, an alternating current sub-loop 2, a switch outlet sub-loop 2 and a failure sub-loop 2; under the type of modifying safety measure, the included safety sub-circuits are an alternating voltage sub-circuit 2, an alternating current sub-circuit 2, a switch outlet sub-circuit 2 and a disconnecting link outlet sub-circuit 2.
In this embodiment, the method for verifying the evaluation result of the split loop based on the line information, the type information of the safety measure operation and the loop information base may be: according to the line information and the type information of the safety measure operation, searching whether a safety sub-loop matched with the sub-loop exists in the loop information base; if the safety sub-loop matched with the sub-loop exists in the loop information base, the risk verification result of the sub-loop is that no risk exists; if the safety sub-loop matched with the sub-loop does not exist in the loop information base, the risk verification result of the sub-loop is that the risk exists.
For example, it is assumed that the evaluation result of the sub-circuit 1 in the switch outlet circuit is normal, and the evaluation result of the sub-circuit 2 is abnormal. The line information of the sub-loop 1 and the sub-loop 2 is the line 1 interval and the line 2 interval respectively, and the type information of the safety measure operation is the debugging safety measure. For the sub-loop 1, whether a safety sub-loop matched with the sub-loop exists in the loop information base is found, and it can be seen that under the interval of the line 1 in the loop information base, when the type information of the safety measure operation is the debugging safety measure, the switch outlet sub-loop 1 exists, so that the risk verification result of the sub-loop 1 is risk-free; for the sub-loop 2, it can be seen that, in the loop information base, when the type information of the safety measure operation is the debugging safety measure, the switch outlet sub-loop 2 exists, so that the risk verification result of the sub-loop 2 is no risk. Although the evaluation result of the sub-loop 2 is abnormal, since there is a safe sub-loop matching the sub-loop 2 in the loop information base, the risk verification result of the sub-loop 2 is also risk-free.
Optionally, when a safety sub-loop matched with the sub-loop does not exist in the loop information base, and the risk verification result of the sub-loop is that the risk exists, the corresponding safety measure operation is regarded as dangerous operation, and related personnel are required to be reminded to correct the safety measure operation, namely, the safety measure operation on the sub-loop is stopped.
According to the technical scheme of the embodiment, a loop diagram is generated based on a loop file; generating a loop simulation model based on the loop graph; performing safety measure operation in a loop simulation model in a simulation manner to obtain state information of a first element and voltage information of a second element in each sub-loop; determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; for each sub-loop, acquiring line information of the sub-loop and type information of safety measure operation; and verifying the evaluation results of the branch loops based on the line information, the safety measure operation type information and the loop information base to obtain risk verification results of each branch loop. According to the risk verification method for the control loop, provided by the embodiment of the invention, the assessment results of the branch loops are verified according to the line information, the safety measure operation type information and the loop information base of each branch loop, so that the risk verification results of each branch loop are obtained, and the safety and stability of the control loop can be improved.
Example III
Fig. 4 is a schematic structural diagram of a risk verification device for a control loop according to a third embodiment of the present invention, as shown in fig. 4, where the device includes:
A loop diagram generation module 310 for generating a loop diagram based on the loop file;
A loop simulation model generation module 320, configured to generate a loop simulation model based on the loop graph; wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection;
An information obtaining module 330, configured to simulate and execute an safety measure operation in a loop simulation model, to obtain state information of a first element and voltage information of a second element in each sub-loop;
an evaluation result determining module 340, configured to determine an evaluation result of each sub-loop according to the state information, the voltage information, and the set voltage information; wherein the evaluation result includes normal or abnormal;
The verification result obtaining module 350 is configured to verify the evaluation result of each sub-loop based on the loop information base, and obtain a risk verification result of each sub-loop; wherein the risk verification result comprises risk or no risk; the loop information base comprises the corresponding relation between the type information of the line information and the safety sub-loop.
Wherein the state information of the first element comprises an open state and a closed state.
Optionally, the loop diagram generating module 310 is further configured to:
Acquiring element information and connection relation thereof in a loop file; and generating a loop chart according to the element information and the connection relation thereof.
Optionally, the evaluation result determining module 340 is further configured to:
When the state information is in the disconnection state, if the voltage information is larger than the set voltage information, the evaluation result of the branch loop is abnormal; when the state information is in the off state, if the voltage information is smaller than or equal to the set voltage information, the evaluation result of the branch circuit is normal.
When the state information is in a closed state, if the voltage information is smaller than the set voltage information, the evaluation result of the sub-loop is abnormal; when the state information is in a closed state, if the voltage information is greater than or equal to the set voltage information, the evaluation result of the branch loop is normal.
Optionally, the verification result obtaining module 350 is further configured to:
For each sub-loop, acquiring line information of the sub-loop and type information of safety measure operation; and verifying the evaluation result of the split loop based on the line information, the type information of the safety measure operation and the loop information base.
Optionally, the method for verifying the evaluation result of the split loop based on the line information, the type information of the safety measure operation and the loop information base may be:
according to the line information and the type information of the safety measure operation, searching whether a safety sub-loop matched with the sub-loop exists in the loop information base; if the safety sub-loop matched with the sub-loop exists in the loop information base, the risk verification result of the sub-loop is that no risk exists; if the safety sub-loop matched with the sub-loop does not exist in the loop information base, the risk verification result of the sub-loop is that the risk exists.
The device can execute the method provided by all the embodiments of the invention, and has the corresponding functional modules and beneficial effects of executing the method. Technical details not described in detail in this embodiment can be found in the methods provided in all the foregoing embodiments of the invention.
Example IV
Fig. 5 shows a schematic diagram of the structure of an electronic device 10 that may be used to implement an embodiment of the invention. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 5, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the risk verification method of the control loop.
In some embodiments, the risk verification method of the control loop may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the risk verification method of the control loop described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the risk verification method of the control loop in any other suitable way (e.g. by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (10)
1. A method for risk verification of a control loop, comprising:
Generating a loop graph based on the loop file;
generating a loop simulation model based on the loop graph; wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection;
Performing safety measure operation in the loop simulation model in a simulation manner to obtain state information of a first element and voltage information of a second element in each sub-loop;
Determining an evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; wherein the evaluation result includes normal or abnormal;
Checking the evaluation result of each sub-loop based on a loop information base to obtain a risk check result of each sub-loop; wherein the risk verification result comprises a risk or no risk; the loop information base comprises line information and the corresponding relation between the type information of the safety measure operation and the safety sub-loop.
2. The method of claim 1, wherein the state information of the first element includes an open state and a closed state.
3. The method of claim 2, wherein determining the evaluation result of each of the partial loops based on the state information, the voltage information, and the set voltage information comprises:
When the state information is in a disconnection state, if the voltage information is larger than the set voltage information, the evaluation result of the branch loop is abnormal;
and when the state information is in an off state, if the voltage information is smaller than or equal to the set voltage information, the evaluation result of the branch loop is normal.
4. The method of claim 2, wherein determining the evaluation result of each of the partial loops based on the state information, the voltage information, and the set voltage information, further comprises:
when the state information is in a closed state, if the voltage information is smaller than the set voltage information, the evaluation result of the sub-loop is abnormal;
When the state information is in a closed state, if the voltage information is greater than or equal to the set voltage information, the evaluation result of the sub-loop is normal.
5. The method of claim 1, wherein verifying the evaluation of each of the partial loops based on a loop information base comprises:
For each sub-loop, acquiring line information of the sub-loop and type information of the safety measure operation;
and verifying the evaluation result of the sub-loop based on the line information, the type information of the safety measure operation and a loop information base.
6. The method of claim 5, wherein verifying the evaluation of the split-loop based on the line information, the type information of the safety measure operation, and a loop information base, comprises:
According to the line information and the type information of the safety measure operation, searching whether a safety sub-loop matched with the sub-loop exists in the loop information base or not;
If a safety sub-loop matched with the sub-loop exists in the loop information base, the risk verification result of the sub-loop is risk-free; and if the safety sub-loop matched with the sub-loop does not exist in the loop information base, the risk verification result of the sub-loop is that the risk exists.
7. The method of claim 1, wherein generating a loop map based on the loop file comprises:
acquiring element information and connection relation of the element information in the loop file;
and generating a loop chart according to the element information and the connection relation thereof.
8. A risk verification device for a control loop, comprising:
The loop diagram generation module is used for generating a loop diagram based on the loop file;
the loop simulation model generation module is used for generating a loop simulation model based on the loop diagram; wherein the loop simulation model comprises a plurality of sub loops; the multiple sub-loops are in parallel connection;
the information obtaining module is used for performing safety measure operation in a simulation mode of the loop to obtain state information of a first element and voltage information of a second element in each sub-loop;
the evaluation result determining module is used for determining the evaluation result of each sub-loop according to the state information, the voltage information and the set voltage information; wherein the evaluation result includes normal or abnormal;
The verification result obtaining module is used for verifying the evaluation result of each sub-loop based on the loop information base to obtain the risk verification result of each sub-loop; wherein the risk verification result comprises a risk or no risk; the loop information base comprises line information and the corresponding relation between the type information of the safety measure operation and the safety sub-loop.
9. An electronic device, the electronic device comprising:
at least one processor; and
A memory communicatively coupled to the at least one processor; wherein,
The memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the risk verification method of the control loop of any one of claims 1-7.
10. A computer readable storage medium storing computer instructions for causing a processor to perform the risk verification method of the control loop of any one of claims 1-7.
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| CN202410260080.8A CN118131734A (en) | 2024-03-07 | 2024-03-07 | Risk verification method, device and equipment for control loop and storage medium |
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| CN202410260080.8A CN118131734A (en) | 2024-03-07 | 2024-03-07 | Risk verification method, device and equipment for control loop and storage medium |
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