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CN118113207A - Data writing method, storage device and electronic equipment - Google Patents

Data writing method, storage device and electronic equipment Download PDF

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Publication number
CN118113207A
CN118113207A CN202211517745.6A CN202211517745A CN118113207A CN 118113207 A CN118113207 A CN 118113207A CN 202211517745 A CN202211517745 A CN 202211517745A CN 118113207 A CN118113207 A CN 118113207A
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CN
China
Prior art keywords
data
check code
storage unit
control unit
storage
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Pending
Application number
CN202211517745.6A
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Chinese (zh)
Inventor
尹慧
魏益新
陶伟
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Shenzhen Longsys Electronics Co Ltd
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Shenzhen Longsys Electronics Co Ltd
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Priority to CN202211517745.6A priority Critical patent/CN118113207A/en
Publication of CN118113207A publication Critical patent/CN118113207A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/0614Improving the reliability of storage systems
    • G06F3/0619Improving the reliability of storage systems in relation to data integrity, e.g. data losses, bit errors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Quality & Reliability (AREA)
  • Computer Security & Cryptography (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The application discloses a data writing method, a storage device and electronic equipment. The method comprises the following steps: the control unit sends first data to the storage unit and generates a first check code based on the first data; the control unit receives a second check code sent by the storage unit after the first data is sent, wherein the second check code is generated by the storage unit based on the received second data, and the second data corresponds to the first data; the control unit judges whether to enter an error processing mode or not by using the first check code and the second check code, the error processing mode is used for guaranteeing the data accuracy of the data received by the storage unit, and when the control unit judges that the data does not enter the error processing mode by using the first check code and the second check code, the control unit controls the storage unit to write the second data. Through the mode, the application can solve the technical problem of data errors in the data writing process.

Description

Data writing method, storage device and electronic equipment
Technical Field
The present application relates to the field of storage, and in particular, to a data writing method, a storage device, and an electronic device.
Background
With the development of storage technology, the speed of the storage device interface is faster and faster, that is, the speed of the storage device transmitting data is faster and faster. But this also presents a greater challenge for system design. It is increasingly difficult to ensure one hundred percent data reliability of information transmission due to factors such as transmission bandwidth, temperature variation, external interference, design margin, and the like of the system. In the memory device, when the memory device receives data from the outside, the data is written into the memory cell by the master inside the memory device. When the master writes data into the memory unit, if a data error occurs in the transmission process, the master cannot find that the transmitted data packet is problematic currently. It is often necessary to wait until a long time before the master can find that the data is erroneous when it wants to read the data packet. However, such errors may cause uncorrectable data, e.g., during data transmission, unexpected loss of the transmitted data bytes results in data corruption, which cannot be corrected by the subsequent ECC alone.
Disclosure of Invention
The application mainly aims at a data writing method, a storage device and electronic equipment, and can solve the technical problem of data errors in the data writing process.
In order to solve the technical problems, the first technical scheme adopted by the application is as follows: a data writing method is provided. The method comprises the following steps: the control unit sends first data to the storage unit and generates a first check code based on the first data; the control unit receives a second check code sent by the storage unit after the first data is sent, and the storage unit generates the second check code based on the received second data, wherein the second data corresponds to the first data; the control unit judges whether to enter an error processing mode or not by using the first check code and the second check code, the error processing mode is used for guaranteeing the data accuracy of the data received by the storage unit, and when the control unit judges that the data does not enter the error processing mode by using the first check code and the second check code, the control unit controls the storage unit to write the second data.
In order to solve the technical problems, a second technical scheme adopted by the application is as follows: a storage device is provided. The storage device comprises a control unit and at least one storage unit, wherein the control unit comprises a first checking module, each storage unit comprises a second checking module, and the control unit is in communication connection with the storage units to realize the method as described in the first technical scheme.
In order to solve the technical problems, a third technical scheme adopted by the application is as follows: an electronic device is provided. The electronic device comprises a storage means as described in the second aspect.
The beneficial effects of the application are as follows: in the storage device, after the control unit transmits the first data to the storage unit, a first check code is generated based on the first data. The storage unit generates a second check code based on the second data after receiving the second data corresponding to the first data. After the control unit completes the transmission of the first data, the second check code transmitted by the storage unit is acquired and compared with the first check code. When the first check code is equal to the second check code, the second data is identical to the first data, and the data transmission process is error-free. The subsequent memory unit writes the second data to complete the data writing process. When the first check code is not equal to the second check code, the second data is different from the first data, errors exist in the data transmission process, and the control unit enters an error processing mode to execute corresponding operation to ensure the data accuracy of the data received by the storage unit. In the data transmission process, the check codes of the transmitted data and the received data are compared, so that the situation of data transmission errors is found in time, and the accuracy of data writing is ensured.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flowchart of a first embodiment of a data writing method according to the present application;
FIG. 2 is a flowchart of a second embodiment of the data writing method of the present application;
FIG. 3 is a flowchart of a third embodiment of a data writing method according to the present application;
FIG. 4 is a schematic diagram of a command execution flow during data writing;
FIG. 5 is a schematic diagram of an embodiment of a memory device according to the present application;
fig. 6 is a schematic structural diagram of an embodiment of the electronic device of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are only some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
The terms "first," "second," and the like in this disclosure are used for distinguishing between different objects and not for describing a particular sequential order. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, system, article, or apparatus that comprises a list of steps or elements is not limited to only those listed steps or elements but may include other steps or elements not listed or inherent to such process, method, article, or apparatus.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a flowchart of a first embodiment of a data writing method of the present application, which is applied to a memory device, where the memory device includes a control unit and a memory unit. Which comprises the following steps:
s11: the control unit sends first data to the storage unit and generates a first check code based on the first data.
In the storage device, data is written from an external device to the storage device. Inside the storage device, data is written from the external device via the main control unit from the storage unit. The control unit generates a first check code based on the first data when transmitting the first data to the storage unit. The first check code is generated by using a hash algorithm. The hash algorithm that generates the check code may be, for example, a CRC check, an LRC check, a parity check, an addition and check, a hash value check, a hamming code check, or a gray code check, or the like.
S12: the control unit receives the second check code transmitted by the storage unit after the first data is transmitted, and the storage unit generates the second check code based on the received second data, wherein the second data corresponds to the first data.
After the control unit transmits or transmits the first data to the storage unit, the access storage unit is received to transmit the second check code. The second transaction is then generated by the storage unit based on second data received by the storage unit corresponding to the first data after the control unit sends the first data to the storage unit. The second data may or may not be the same as the first data, depending on whether an error occurred during the data transfer. The second check code is generated by using a hashing algorithm. The hash algorithm that generates the check code may be, for example, a CRC check, an LRC check, a parity check, an addition and check, a hash value check, a hamming code check, or a gray code check, or the like. The generation mode of the first check code is consistent with the generation mode of the second check code, so that the judgment comparison of the first check code and the second check code is facilitated.
In an embodiment, after the first data is sent, the control unit sends a check code acquisition command to the storage unit to receive the second check code sent by the storage unit. The check code acquisition command may be a read command, and the control unit reads the second check code from a memory location in the memory unit where the check code is stored.
In an embodiment, the second check code is generated by the memory unit using an internal hardware circuit.
S13: the control unit judges whether to enter an error processing mode by using the first check code and the second check code.
The error handling mode is used for guaranteeing data accuracy of the data received by the storage unit. The control unit enters an error processing mode by suspending the current data transmission and executes corresponding operation to process the current data transmission error condition, so that the storage unit can receive accurate data information.
S14: and when the control unit judges that the error processing mode is not entered by using the first check code and the second check code, controlling the storage unit to write the second data.
The second data received by the storage unit is the same as the first data sent by the control unit, the data transmission process is error-free, and the data writing can be continued.
In the storage device, after the control unit transmits the first data to the storage unit, a first check code is generated based on the first data. The storage unit generates a second check code based on the second data after receiving the second data corresponding to the first data. After the control unit completes the transmission of the first data, the second check code transmitted by the storage unit is acquired and compared with the first check code. When the first check code is equal to the second check code, the second data is identical to the first data, and the data transmission process is error-free. The subsequent memory unit writes the second data to complete the data writing process. When the first check code is not equal to the second check code, the second data is different from the first data, errors exist in the data transmission process, and the control unit enters an error processing mode to execute corresponding operation to ensure the data accuracy of the data received by the storage unit. In the data transmission process, the check codes of the transmitted data and the received data are compared, so that the situation of data transmission errors is found in time, and the accuracy of data writing is ensured.
Referring to fig. 2, fig. 2 is a flowchart illustrating a data writing method according to a second embodiment of the present application. It is applied to a memory device comprising a control unit and a memory unit. Which comprises the following steps:
s21: the control unit sends first data to the storage unit and generates a first check code based on the first data.
In the storage device, data is written from an external device to the storage device. Inside the storage device, data is written from the external device via the main control unit from the storage unit. The control unit generates a first check code based on the first data when transmitting the first data to the storage unit. The first check code is generated by using a hash algorithm. The hash algorithm that generates the check code may be, for example, a CRC check, an LRC check, a parity check, an addition and check, a hash value check, a hamming code check, or a gray code check, or the like.
S22: the control unit receives the second check code transmitted by the storage unit after the first data is transmitted, and the storage unit generates the second check code based on the received second data, wherein the second data corresponds to the first data.
After the control unit transmits or transmits the first data to the storage unit, the access storage unit is received to transmit the second check code. The second transaction is then generated by the storage unit based on second data received by the storage unit corresponding to the first data after the control unit sends the first data to the storage unit. The second data may or may not be the same as the first data, depending on whether an error occurred during the data transfer. The second check code is generated by using a hashing algorithm. The hash algorithm that generates the check code may be, for example, a CRC check, an LRC check, a parity check, an addition and check, a hash value check, a hamming code check, or a gray code check, or the like. The generation mode of the first check code is consistent with the generation mode of the second check code, so that the judgment comparison of the first check code and the second check code is facilitated.
In an embodiment, after the first data is sent, the control unit sends a check code acquisition command to the storage unit to receive the second check code sent by the storage unit. The check code acquisition command may be a read command, and the control unit reads the second check code from a memory location in the memory unit where the check code is stored.
In an embodiment, the second check code is generated by the memory unit using an internal hardware circuit.
S23: the control unit judges whether to perform retransmission operation or not by using the first check code and the second check code.
After the first check code and the second check code are obtained, the first check code and the second check code are judged to determine whether the first data are identical to the second data or not, and whether errors occur in the data transmission process or not is determined, so that whether the first data are retransmitted to the storage unit or not is determined.
If the first check code is different from the second check code, which means that the second data is different from the first data, and there is an error in the data transmission process, retransmission is required, and step S14 is performed.
If the first check code is the same as the second check code, which means that the second data is the same as the first data, and there is no error in the data transmission process, retransmission is not needed, and step S15 is executed.
S24: the first data is again sent to the storage unit.
The second data received by the storage unit is different from the first data sent by the control unit, and in order to ensure the accuracy of data writing, the control unit sends the first data to the storage unit again to replace the second data.
In one embodiment, the communication parameters of the data transmission may be modified prior to resending the first data to the storage unit, thereby eliminating a portion of the factors that may cause errors in the data transmission. After the parameter correction is completed, retransmission is continued, so that the possibility of data transmission errors is reduced.
S25: the memory cell is controlled to write the second data.
The second data received by the storage unit is the same as the first data sent by the control unit, the data transmission process is error-free, and the data writing can be continued.
In this embodiment, after the control unit enters the error processing mode, the corresponding processing operation may include retransmission, i.e. the first data is sent to the storage unit again. And entering an error processing mode to judge whether the first data needs to be retransmitted.
In this embodiment, in the storage device, after the control unit sends the first data to the storage unit, the first check code is generated based on the first data. The storage unit generates a second check code based on the second data after receiving the second data corresponding to the first data. After the control unit completes the transmission of the first data, the second check code transmitted by the storage unit is acquired and compared with the first check code. When the first check code is equal to the second check code, the second data is identical to the first data, and the data transmission process is error-free. The subsequent memory unit writes the second data to complete the data writing process. When the first check code is not equal to the second check code, the second data is different from the first data, errors exist in the data transmission process, and the control unit needs to retransmit the first data to ensure the accuracy of the data received by the storage unit. In the data transmission process, the check codes of the transmitted data and the received data are compared to find out the data transmission error condition in time, so that the data retransmission operation is carried out, and the accuracy of data writing is ensured.
Referring to fig. 3, fig. 3 is a flow chart of a third embodiment of the present application. This way is a further extension of step S14. Which comprises the following steps:
S31: and judging whether the number of times of retransmission operation of the first data is larger than a preset number of times threshold.
Before retransmitting the first data, judging whether the number of times of retransmission operation of the first data is larger than a preset number threshold. This is to avoid situations where data is retransmitted unrestricted, resulting in a crash. The number of retransmission operations of the first data is accumulated after each retransmission. When it is determined that the number of retransmission operations of the first data is greater than the preset number threshold, step S22 is performed.
S32: and sending prompt information to external equipment.
And stopping the retransmission operation when the retransmission operation times are greater than a preset time threshold value, and sending prompt information to external equipment so as to remind a user of data transmission problems.
In one embodiment, the writing of data within the storage device is accomplished based on a write command. The step of the control unit sending the first data to the storage unit includes the control unit sending the first data corresponding to the first write command to the storage unit in response to receiving the first write command.
The control unit controlling the storage unit to write the second data includes controlling the storage unit to store the second data from the buffer area of the storage unit to the storage area in the storage unit in response to the second write command, so as to complete the writing of the second data. When the control unit writes data into the storage unit, the data sent to the storage unit by the control unit is stored in the buffer area inside the storage unit, and after the check code is compared, the data in the buffer area of the storage unit is written into the storage area to complete data writing, so that the data corresponding to the next writing command can be stored in the buffer area.
Referring to fig. 4, fig. 4 is a schematic diagram illustrating a command execution flow during data writing.
In the figure, CMD80 and CMD10 are both writing commands NAND FLASH, colAddr and Row Addr represent column addresses and Row addresses inside NAND FLASH, respectively. WRITE PAGE DATA denotes the transfer of data from the control unit to NAND FLASH.
In the technical scheme of the application, after NAND FLASH receives data, CRC calculation is performed based on the data to obtain a CRC check code. After the control unit has sent the data, the control unit sends a check code acquisition command to NAND FLASH to read the CRC check code stored inside NAND FLASH. CMD/GetCRC and READ CRC DATA represent processes for reading CRC check codes. After the check code in NAND FLASH is read, the check code is compared with the check code generated by the control unit based on the corresponding data to judge whether to carry out data transmission again. If the data retransmission is not needed, executing the next write command. Before the next write command execution control data is sent to NAND FLASH, the control NAND FLASH writes the data written by the previous write command from the buffer area of NAND FLASH to the storage area of NAND FLASH, and the data sent by the next write command can be stored in the buffer area. If retransmission is needed, continuing to transmit the data after reading the CRC code, and transmitting the same data to NAND FLASH again until the CRC code is successfully matched. The process of implementing the protection transmission function, acquiring the CRC check code and comparing the CRC check code to perform retransmission (within the dashed box) does not destroy the current communication mode, i.e. the present communication mode is still compatible in NAND FLASH chip design after expanding the function.
In one embodiment, the number of memory units for data transfer with the control unit is at least one. The control unit can simultaneously perform data transmission with a plurality of storage units and realize verification of the check code to finish the data retransmission process.
The following describes the technical scheme of the present application in detail with reference to a specific scenario.
When the control unit writes data of one page into NAND FLASH, a check code generator in the control unit generates a CRC check code A according to the written data. After the data is transferred to NAND FLASH, a check code generator internal to NAND FLASH generates a CRC check code B from the received data. After the control unit finishes data transmission, a command for acquiring the check code is sent, and the CRC check code B in NAND FLASH is read. When the control unit acquires the CRC check code B, the CRC check code B is matched with the CRC check code A generated in the control unit. If the data are consistent, the transmission is proved to be correct, otherwise, the data are retransmitted.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a memory device according to an embodiment of the application.
The memory device comprises a control unit 10 and at least one memory unit 20.
The control unit 10 comprises a first checking module 11 and the storage unit 20 comprises a second checking module 21. The control unit 10 and the storage unit 20 are communicatively connected to implement the method provided by any one embodiment and possible combinations of the data writing method of the present application.
The storage device may include a medium such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory) or the like, where the program instructions may be stored, or may be a server storing the program instructions, where the server may send the stored program instructions to other devices for running, or may also self-run the stored program instructions.
Referring to fig. 6, fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the application.
The electronic device comprises a storage means 30. The memory device 30 includes any one and possible combinations of the memory device embodiments of the present application. The memory device 30 is capable of implementing the method provided by any one of the embodiments and possible combinations of the data writing method of the present application.
In summary, in the storage device, after the control unit sends the first data to the storage unit, the first check code is generated based on the first data. The storage unit generates a second check code based on the second data after receiving the second data corresponding to the first data. After the control unit completes the transmission of the first data, the second check code transmitted by the storage unit is acquired and compared with the first check code. When the first check code is equal to the second check code, the second data is identical to the first data, and the data transmission process is error-free. The subsequent memory unit writes the second data to complete the data writing process. When the first check code is not equal to the second check code, the second data is different from the first data, errors exist in the data transmission process, and the control unit enters an error processing mode to execute corresponding operation to ensure the data accuracy of the data received by the storage unit. In the data transmission process, the check codes of the transmitted data and the received data are compared, so that the situation of data transmission errors is found in time, and the accuracy of data writing is ensured.
In the several embodiments provided in the present application, it should be understood that the disclosed method and apparatus may be implemented in other manners. For example, the above-described device embodiments are merely illustrative, e.g., the division of the modules or units is merely a logical functional division, and there may be additional divisions when actually implemented, e.g., multiple units or components may be combined or integrated into another system, or some features may be omitted, or not performed.
The units described as separate units may or may not be physically separate, and units shown as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiment.
In addition, each functional unit in each embodiment of the present application may be integrated in one processing unit, each unit may exist alone physically, or two or more units may be integrated in one unit. The integrated units may be implemented in hardware or in software functional units.
The integrated units of the other embodiments described above may be stored in a computer readable storage medium if implemented in the form of software functional units and sold or used as stand alone products. Based on such understanding, the technical solution of the present application may be embodied in essence or a part contributing to the prior art or all or part of the technical solution in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) or a processor (processor) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a Read-Only Memory (ROM), a random access Memory (RAM, random Access Memory), a magnetic disk, or an optical disk, or other various media capable of storing program codes.
The foregoing description is only illustrative of the present application and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes or direct or indirect application in other related technical fields are included in the scope of the present application.

Claims (11)

1. A data writing method, characterized by being applied to a storage device including a control unit and a storage unit, the method comprising:
the control unit sends first data to the storage unit and generates a first check code based on the first data;
The control unit receives a second check code sent by the storage unit after the first data is sent, wherein the second check code is generated by the storage unit based on the received second data, and the second data corresponds to the first data;
The control unit judges whether to enter an error processing mode or not by utilizing the first check code and the second check code, wherein the error processing mode is used for ensuring the data accuracy of the data received by the storage unit;
And when the control unit judges that the error processing mode is not entered by utilizing the first check code and the second check code, controlling the storage unit to write the second data.
2. The method according to claim 1, characterized in that the method comprises:
And when the control unit judges that the error processing mode is entered by utilizing the first check code and the second check code, the control unit sends the first data to the storage unit again.
3. The method according to claim 1, wherein the control unit receives the second check code transmitted by the storage unit after the first data transmission is completed, comprising:
And the control unit sends a check code acquisition command to the storage unit after the first data is sent, so as to receive the second check code sent by the storage unit.
4. The method of claim 2, wherein before the sending the first data to the storage unit again, comprising:
And correcting the communication parameters of the data transmission.
5. The method of claim 4, wherein before the sending the first data to the storage unit again, comprising:
judging whether the number of times of retransmission operation of the first data is larger than a preset number threshold;
if so, sending prompt information to the external equipment.
6. The method of claim 1, wherein the control unit sending first data to the storage unit comprises:
The control unit transmits first data corresponding to a first write command to the storage unit in response to receiving the first write command.
7. The method of claim 1, wherein the controlling the memory cell to write the second data comprises:
and the control unit is used for controlling the storage unit to store the second data from the cache area of the storage unit to the storage area in the storage unit in response to receiving a second writing command so as to complete writing of the second data.
8. The method of claim 1, wherein the second check code is generated by the memory unit using an internal hardware circuit.
9. The method of claim 1, wherein the generating a first check code based on the first data comprises:
the control unit generates the first check code based on the first data using a hashing algorithm.
10. A memory device, comprising:
the control unit comprises a first verification module;
at least one memory unit, each of the memory units including a second check module;
wherein the control unit is communicatively connected to the storage unit for implementing the method according to any of claims 1-9.
11. An electronic device comprising the storage device of claim 10.
CN202211517745.6A 2022-11-29 2022-11-29 Data writing method, storage device and electronic equipment Pending CN118113207A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202211517745.6A CN118113207A (en) 2022-11-29 2022-11-29 Data writing method, storage device and electronic equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202211517745.6A CN118113207A (en) 2022-11-29 2022-11-29 Data writing method, storage device and electronic equipment

Publications (1)

Publication Number Publication Date
CN118113207A true CN118113207A (en) 2024-05-31

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Application Number Title Priority Date Filing Date
CN202211517745.6A Pending CN118113207A (en) 2022-11-29 2022-11-29 Data writing method, storage device and electronic equipment

Country Status (1)

Country Link
CN (1) CN118113207A (en)

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