CN1180239A

CN1180239A - Silicon-doped chip

Info

Publication number: CN1180239A
Application number: CN 97117982
Authority: CN
Inventors: G·贝克; D·韦克尔; K·马耶尔
Original assignee: Siemens AG
Current assignee: Siemens AG
Priority date: 1996-08-01
Filing date: 1997-08-01
Publication date: 1998-04-29

Abstract

The present invention proposes to arrange a monox layer 3 for preventing the diffusion of adulterant between silicon substrate 1 and silicon polymer layer 4. Thus, additional step is unnecessary to prevent the automatic diffusion, meantime, the air suction effect of the silicon polymer layer 4 on the back surface of the silicon substrate is maintained.

Description

Silicon-doped chip

The present invention relates to silicon-doped chip, especially highly doped silicon chip.Highly doped silicon chip has one deck oriented growth layer before processed, have the gettering layer that one deck is made up of poly-silicon at its substrate back, and for avoiding well-known autodoping, one deck silicon oxide layer is arranged on this gettering layer.Term " autodoping " be meant dopant from substrate back to outdiffusion, and enter the substrate front.

The effect of the gettering layer of being made up of poly-silicon is the trapping metals pollution, deposits gate circuit (Gate) oxide on the standard package of processing otherwise cause finishing.But in the high temperature process stage, dopant also is diffused in the poly silicon layer from silicon chip.According to solubility, on the poly silicon layer enrichment dopant of various concentration, thereby poly silicon layer is reached capacity, like this can not be by the air-breathing metallic pollution of getting rid of generation fully.Its result has produced the gate circuit oxide precipitation.

In addition, in the process of silicon chip of processing oriented growth, silicon oxide layer is corroded, occur thus dopant from the poly silicon layer of enrichment to outdiffusion, therefore cause the silicon chip of desire processing to mix automatically each other and laterally pollute.

Up to now, overcome these problems by following approach and since from the substrate back of non-oxidation silicon to outdiffusion, in the high temperature process process, adopt stove passage separately, desire the danger that converted products laterally pollutes each other thereby reduced.This measure has caused the unnecessary increase of the load of production capacity.

The another kind trial that overcomes these problems is to make the back side of silicon chip have additional silicon nitride protective layer.Certainly, because extra treatment step, this measure causes the gate circuit oxide precipitation on the one hand, and expense is improved.

Task of the present invention provides a kind of silicon chip of doping, and its substrate back has passed through processing, thereby has solved the problem that runs into above.

According to the present invention, this task solves by silicon-doped chip, has wherein coated one deck silicon oxide layer at the back side of silicon chip, scribbles one deck poly silicon layer on this silicon oxide layer.

The advantage of this silicon-doped chip is dopant no longer by silica and be diffused in the poly silicon layer, and promptly dopant can not be evaporated from poly-silicon.Therefore, poly silicon layer has enough " free fault location " to come the air-breathing metallic pollution that produces.

Can cancel the measure of being taked in the above mentioned course of processing like this, i.e. anti-evaporating (autodoping is laterally polluted).

In a preferred embodiment, the thickness of silicon oxide layer is about 50 nanometers, and the thickness of the poly silicon layer that applies on it is about 1.2 microns.

In the accompanying drawings, for example understand the present invention, describe in detail by means of accompanying drawing below.

As shown in the figure,, on the silicon chip back side 2 of silicon chip 1, directly scribble one deck silicon oxide layer 3, on this silicon oxide layer, scribble one deck poly silicon layer 4 according to the present invention.The effect of silicon oxide layer 3 is to stop dopant to spread between the silicon chip back side 2 and poly silicon layer 4.Therefore, no longer be necessary for avoiding desiring machine silicon substrate autodoping to each other with laterally polluting other measure of taking, and kept the getter action of the poly silicon layer 4 on the silicon chip back side 2.

In this case, the concentration of the dopant arsenic that contains in the silicon chip 1 is＞10 ¹⁸/ centimetre ³The thickness that silicon oxide layer 3 has is about 50 nanometers, and the thickness that poly silicon layer 4 has is about 1.2 microns.

Highly doped silicon substrate 1 involved in the present invention is as preparation high-power (Leistung) semi-conductive base stock.

Claims

1. silicon-doped chip (1) is characterized in that: scribble one deck silicon oxide layer (3) on the silicon chip back side (2), and scribble one deck poly silicon layer (4) on silicon oxide layer (3).

2. according to the silicon chip of claim 1, it is characterized in that: the thickness that silicon oxide layer (3) has is that the thickness that about 50 nanometers and/or poly silicon layer (4) have is about 1.2 microns.

3. according to the silicon chip of claim 1 or 2, it is characterized in that: the concentration of dopant arsenic is 〉=10 in the silicon chip (1) ¹⁸Foreign atom/centimetre ³

4. the purposes of highly doped silicon substrate (1) is used as the raw material for preparing high power semi-conductor, wherein scribbles one deck silicon oxide layer (3) on the silicon chip back side (2), and scribble one deck poly silicon layer (4) on silicon oxide layer (3).