CN117991049B - A distribution network fault detection method and system considering access of multiple grid-connected inverters - Google Patents

Abstract

The invention discloses a power distribution network fault detection method and system considering access of multiple grid-connected inverters, wherein the method comprises the following steps: obtaining a position ordering result of a virtual impedance array where the maximum virtual impedance is located in the k-1 th period, and calculating the position variation of the maximum virtual impedance according to the position ordering result of the maximum virtual impedance in the k-1 th period and the position ordering result of the maximum virtual impedance in the k-1 th period; judging whether the position variation of the maximum virtual impedance is larger than a preset threshold value or not; if the virtual impedance array is larger than the preset threshold, continuously judging whether the position ordering result of the virtual impedance array where the maximum virtual impedance is located in the k+1th period is larger than the position ordering result of the virtual impedance array where the maximum virtual impedance is located in the k-1th period; if the detected value is greater than the preset threshold value, a short-circuit fault identification signal is generated. The short-circuit fault information is obtained by detecting the position change of the virtual impedance, so that the detection precision of the short-circuit fault of the power distribution network is improved.

Description

A distribution network fault detection method and system considering access of multiple grid-connected inverters

Technical Field

The present invention belongs to the technical field of safe operation of electric power systems, and in particular relates to a distribution network fault detection method and system considering access of multiple grid-connected inverters.

Background technique

The power generation characteristics of distributed power sources are different from traditional power generation. As the proportion of distributed energy in the distribution network continues to rise, the operation mode of the traditional distribution network has changed, changing the distribution network from a simple radial network with a single power source to a complex network with multiple power sources, causing great changes in the network structure and flow direction, and making the fault detection method for the traditional distribution network no longer applicable to the existing network, which ultimately affects the selectivity, sensitivity, speed and reliability of the relay protection device. In order to ensure the reliability of the power supply of the distribution network and maximize the economic benefits of DG, it is necessary to find new fault diagnosis methods to avoid the impact of DG on system stability after it is connected to the distribution network.

Traditional fault identification mostly uses amplitude as a detection feature. Generally, when a fault occurs, electrical quantities such as voltage and current change significantly before and after the fault. Traditional fault detection can be performed by identifying these changes. However, when the line is in contact with high-impedance grounding media such as cement, gravel, and trees, a high-resistance grounding fault will be caused. When a fault occurs, the transition resistance can reach thousands of ohms, and the fault characteristics are very weak, making it difficult for traditional fault protection detection methods to work reliably. Therefore, new fault detection methods need to fully explore the fault characteristics in high-resistance grounding situations where the fault signal is weak and difficult to detect.

Summary of the invention

The present invention provides a distribution network fault detection method and system considering the access of multiple grid-connected inverters, which are used to solve the technical problem that traditional fault protection detection methods are difficult to operate reliably when the fault characteristics are very weak.

In a first aspect, the present invention provides a distribution network fault detection method considering the access of multiple grid-connected inverters, comprising:

The voltage at the common point of the distribution network and the output current of the distributed power source collected within the preset period are respectively subjected to wavelet transformation to obtain the first coefficient group after wavelet transformation of the voltage at the common point of the distribution network. , and the second coefficient group after wavelet transform of the distributed power output current ;

According to the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, ;

Get the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position ;

Determine the maximum virtual impedance The change in position Whether it is greater than a preset threshold;

If the maximum virtual impedance The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position ;

If the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated.

In a second aspect, the present invention provides a distribution network fault detection system considering access of multiple grid-connected inverters, comprising:

The processing module is configured to perform wavelet transform on the distribution network common point voltage and the distributed power supply output current collected within a preset period, respectively, to obtain a first coefficient group after wavelet transform of the distribution network common point voltage , and the second coefficient group after wavelet transform of the distributed power output current ;

A first calculation module is configured to calculate the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, ;

The second calculation module is configured to obtain the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position ;

The first judgment module is configured to judge the maximum virtual impedance The change in position Whether it is greater than a preset threshold;

The second judgment module is configured to The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position ;

Generates a module configured to generate the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated.

According to a third aspect, an electronic device is provided, comprising: at least one processor, and a memory communicatively connected to the at least one processor, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can perform the steps of the distribution network fault detection method considering the access of multiple grid-connected inverters according to any embodiment of the present invention.

In a fourth aspect, the present invention further provides a computer-readable storage medium having a computer program stored thereon, wherein when the program instructions are executed by a processor, the processor executes the steps of a distribution network fault detection method considering the connection of multiple grid-connected inverters according to any embodiment of the present invention.

The present application discloses a distribution network fault detection method and system that takes into account the access of multiple grid-connected inverters. By performing wavelet analysis on the common point voltage and the output current of the distributed power source, the coefficients of the two at each wavelet are obtained, and the virtual impedance value at each wavelet is calculated by Ohm's law. The maximum value of the coefficient of the virtual impedance at each wavelet is recorded and sorted in the sampling coefficient group. This achieves the acquisition of short-circuit fault information by detecting the position change of the virtual impedance, thereby improving the detection accuracy of short-circuit faults in the distribution network.

BRIEF DESCRIPTION OF THE DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

FIG1 is a flow chart of a distribution network fault detection method considering access of multiple grid-connected inverters provided by an embodiment of the present invention;

FIG2 is a topological structure diagram of a first harmonic domain topological model under normal operating conditions of a specific embodiment provided in one embodiment of the present invention;

FIG3 is a topological structure diagram of a second harmonic domain topological model after a high resistance ground fault occurs according to a specific embodiment provided by an embodiment of the present invention;

FIG4 is a structural block diagram of a distribution network fault detection system considering access of multiple grid-connected inverters provided by an embodiment of the present invention;

FIG. 5 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention.

Detailed ways

In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

Please refer to FIG. 1 , which shows a flow chart of a distribution network fault detection method considering access of multiple grid-connected inverters according to the present application.

As shown in FIG1 , the distribution network fault detection method considering multiple grid-connected inverters connected specifically includes the following steps:

Step S101, performing wavelet transform on the distribution network common point voltage and the distributed power supply output current collected within a preset period, respectively, to obtain a first coefficient group after wavelet transform of the distribution network common point voltage , and the second coefficient group after wavelet transform of the distributed power output current .

In this step, the wavelet type and decomposition level used to decompose the common point voltage of the distribution network and the output current of the distributed power generation are selected to obtain the sub-wavelet function , the sub-wavelet function The expression is:

,

In the formula, is the stretch factor, is the translation factor, For time;

The signal In the sub-wavelet function Based on the expansion, the expression of signal wavelet transform is obtained:

,

In the formula, is the wavelet transform expression, for The conjugate function of

The translation factor and the stretch factor Discretize it, let , , the expression of the signal wavelet transform is updated, where the expression of the updated signal wavelet transform is:

,

,

In the formula, , are all positive integers, is a discrete sub-wavelet, for The conjugate function of is the expression of discretized wavelet transform;

The voltage at the common point of the distribution network and the output current of the distributed power source collected within a preset period are subjected to wavelet transform according to the updated signal wavelet transform.

It should be noted that the db4 wavelet is used as the wavelet basis function, and the decomposition layer number of the db4 wavelet basis function is set to 8 layers, so that the corresponding frequency bands of the decomposed components cover the frequency range from the power frequency to the high-frequency resonance.

In a specific embodiment, a first harmonic domain topology model is constructed under normal operating conditions, wherein the first harmonic domain topology model is constructed using a current source Norton equivalent value and parallel impedance Represents a power grid, consisting of an output impedance Current source Represents the grid-connected inverter, and the line impedance from the grid side to the distributed power source is , the impedance from the distributed power supply to the load is , when the distributed power supply is equivalent to a current source, the impedance of the parallel output is , the local load is ,as shown in picture 2.

The voltage at the common point of the distribution network and the output current of the distributed generation before the short-circuit fault occurs are calculated. The expression for calculating the voltage at the common point of the distribution network before the short-circuit fault occurs is:

,

In the formula, It is the voltage at the common point of the distribution network before the short-circuit fault occurs;

The expression for calculating the output current of the distributed power supply before the short circuit fault occurs is:

,

In the formula, is the output current of the distributed power supply before the short circuit fault occurs;

Calculate the equivalent impedance of the common point of the distribution network , where the equivalent impedance of the common point of the distribution network is calculated The expression is:

;

Construct a second harmonic domain topology model after a high resistance ground fault occurs, wherein the second harmonic domain topology model uses a current source Norton equivalent value and parallel impedance Represents a power grid, consisting of an output impedance Current source Represents the grid-connected inverter, and the line impedance from the grid side to the distributed power source is , the impedance from the distributed power supply to the load is , when the distributed power supply is equivalent to a current source, the impedance of the parallel output is , the local load is ,As shown in Figure 3.

The voltage at the common point of the distribution network and the output current of the distributed generation after a high-resistance grounding fault occurs are calculated. The expression for calculating the voltage at the common point of the distribution network after a high-resistance grounding fault occurs is:

,

In the formula, is the voltage at the common point of the distribution network after a high resistance ground fault occurs, The proportionality coefficient with a value range of [0, 1] is used to characterize the distance between the fault point and the common point of the distribution network;

The expression for calculating the output current of the distributed power supply after a high resistance ground fault occurs is:

,

In the formula, It is the output current of the distributed power supply after a high resistance ground fault occurs;

Calculate the equivalent impedance of the common point of the distribution network after a high resistance ground fault , where the equivalent impedance of the common point of the distribution network after a high resistance ground fault occurs is calculated The expression is:

.

Step S102: according to the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, .

Step S103, obtaining the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position .

Step S104, determining the maximum virtual impedance The change in position Is it greater than the preset threshold?

Step S105: If the maximum virtual impedance The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position .

In this step, if the maximum virtual impedance The change in position is not greater than the preset threshold, then according to the maximum virtual impedance in the kth cycle The position sorting results and the maximum virtual impedance in the k+1th cycle Calculate the maximum virtual impedance based on the position sorting results The position change.

Step S106: If the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated.

In this step, if the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Not greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , then no short-circuit fault identification signal is generated.

In summary, the method of the present application performs wavelet analysis on the common point voltage and the output current of the distributed power supply to obtain the coefficients of the two at each wavelet, and calculates the virtual impedance value at each wavelet by Ohm's law, and records the maximum value of the coefficient of the virtual impedance at each wavelet and its sorted position in the sampling coefficient group, thereby achieving the acquisition of short-circuit fault information by detecting the position change of the virtual impedance, thereby improving the detection accuracy of short-circuit faults in the distribution network.

Please refer to FIG. 4 , which shows a structural block diagram of a distribution network fault detection system considering access of multiple grid-connected inverters according to the present application.

As shown in FIG. 4 , the distribution network fault detection system 200 includes a processing module 210 , a first calculation module 220 , a second calculation module 230 , a first judgment module 240 , a second judgment module 250 and a generation module 260 .

The processing module 210 is configured to perform wavelet transformation on the distribution network common point voltage and the distributed power supply output current collected within a preset period, respectively, to obtain a first coefficient group after wavelet transformation of the distribution network common point voltage. , and the second coefficient group after wavelet transform of the distributed power output current ;

The first calculation module 220 is configured to calculate the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, ;

The second calculation module 230 is configured to obtain the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position ;

The first determination module 240 is configured to determine the maximum virtual impedance The change in position Whether it is greater than a preset threshold;

The second judgment module 250 is configured to: The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position ;

The generating module 260 is configured to generate the maximum virtual impedance in the k+1th cycle. Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated.

It should be understood that the modules recorded in Figure 4 correspond to the steps in the method described with reference to Figure 1. Therefore, the operations and features described above for the method and the corresponding technical effects are also applicable to the modules in Figure 4 and will not be described in detail here.

In some other embodiments, the embodiments of the present invention further provide a computer-readable storage medium having a computer program stored thereon, wherein when the program instructions are executed by a processor, the processor is caused to execute the distribution network fault detection method considering the access of multiple grid-connected inverters in any of the above method embodiments;

As an implementation mode, the computer-readable storage medium of the present invention stores computer-executable instructions, and the computer-executable instructions are configured as follows:

The voltage at the common point of the distribution network and the output current of the distributed power source collected within the preset period are respectively subjected to wavelet transformation to obtain the first coefficient group after wavelet transformation of the voltage at the common point of the distribution network. , and the second coefficient group after wavelet transform of the distributed power output current ;

According to the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, ;

Get the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position ;

Determine the maximum virtual impedance The change in position Whether it is greater than a preset threshold;

If the maximum virtual impedance The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position ;

If the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated.

The computer-readable storage medium may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required by at least one function; the data storage area may store data created according to the use of a distribution network fault detection system considering access to multiple grid-connected inverters, etc. In addition, the computer-readable storage medium may include a high-speed random access memory, and may also include a memory, such as at least one disk storage device, a flash memory device, or other non-volatile solid-state storage device. In some embodiments, the computer-readable storage medium may optionally include a memory remotely disposed relative to the processor, and these remote memories may be connected to the distribution network fault detection system considering access to multiple grid-connected inverters via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

FIG5 is a schematic diagram of the structure of an electronic device provided by an embodiment of the present invention. As shown in FIG5 , the device includes: a processor 310 and a memory 320. The electronic device may further include: an input device 330 and an output device 340. The processor 310, the memory 320, the input device 330 and the output device 340 may be connected via a bus or other means. FIG5 takes the bus connection as an example. The memory 320 is the above-mentioned computer-readable storage medium. The processor 310 executes various functional applications and data processing of the server by running the non-volatile software program, instructions and modules stored in the memory 320, that is, the distribution network fault detection method considering the access of multiple grid-connected inverters in the above-mentioned method embodiment is implemented. The input device 330 may receive input digital or character information, and generate key signal input related to user settings and function control of the distribution network fault detection system considering the access of multiple grid-connected inverters. The output device 340 may include display devices such as display screens.

The electronic device can execute the method provided by the embodiment of the present invention, and has the functional modules and beneficial effects corresponding to the execution method. For technical details not described in detail in this embodiment, please refer to the method provided by the embodiment of the present invention.

As an implementation mode, the electronic device is applied to a distribution network fault detection system considering access of multiple grid-connected inverters, and is used for a client, comprising: at least one processor; and a memory connected to the at least one processor in communication; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can:

The voltage at the common point of the distribution network and the output current of the distributed power source collected within the preset period are respectively subjected to wavelet transformation to obtain the first coefficient group after wavelet transformation of the voltage at the common point of the distribution network. , and the second coefficient group after wavelet transform of the distributed power output current ;

According to the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, ;

Get the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position ;

Determine the maximum virtual impedance The change in position Whether it is greater than a preset threshold;

If the maximum virtual impedance The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position ;

If the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated.

Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM/RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods of each embodiment or some parts of the embodiment.

Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims (7)

1. A distribution network fault detection method considering the access of multiple grid-connected inverters, characterized by comprising: The voltage at the common point of the distribution network and the output current of the distributed power source collected within the preset period are respectively subjected to wavelet transformation to obtain the first coefficient group after wavelet transformation of the voltage at the common point of the distribution network. , and the second coefficient group after wavelet transform of the distributed power output current , wherein before performing wavelet transform on the common point voltage of the distribution network and the output current of the distributed power source collected within a preset period, the method further includes: Construct a first harmonic domain topology model under normal operating conditions, wherein the first harmonic domain topology model uses a current source Norton equivalent value and parallel impedance Represents a power grid, consisting of an output impedance Current source Represents the grid-connected inverter, and the line impedance from the grid side to the distributed power source is , the impedance from the distributed power supply to the load is , when the distributed power supply is equivalent to a current source, the impedance of the parallel output is , the local load is ; The voltage at the common point of the distribution network and the output current of the distributed generation before the short-circuit fault occurs are calculated. The expression for calculating the voltage at the common point of the distribution network before the short-circuit fault occurs is: , In the formula, It is the voltage at the common point of the distribution network before the short-circuit fault occurs; The expression for calculating the output current of the distributed power supply before the short circuit fault occurs is: , In the formula, is the output current of the distributed power supply before the short circuit fault occurs; Calculate the equivalent impedance of the common point of the distribution network , where the equivalent impedance of the common point of the distribution network is calculated The expression is: ; Construct a second harmonic domain topology model after a high resistance ground fault occurs, wherein the second harmonic domain topology model uses a current source Norton equivalent value and parallel impedance Represents a power grid, consisting of an output impedance Current source Represents the grid-connected inverter, and the line impedance from the grid side to the distributed power source is , the impedance from the distributed power supply to the load is , when the distributed power supply is equivalent to a current source, the impedance of the parallel output is , the local load is , the ground resistance is ; The voltage at the common point of the distribution network and the output current of the distributed generation after a high-resistance grounding fault occurs are calculated. The expression for calculating the voltage at the common point of the distribution network after a high-resistance grounding fault occurs is: , In the formula, is the voltage at the common point of the distribution network after a high resistance ground fault occurs, The proportionality coefficient with a value range of [0, 1] is used to characterize the distance between the fault point and the common point of the distribution network; The expression for calculating the output current of the distributed power supply after a high resistance ground fault occurs is: , In the formula, It is the output current of the distributed power supply after a high resistance ground fault occurs; Calculate the equivalent impedance of the common point of the distribution network after a high resistance ground fault , where the equivalent impedance of the common point of the distribution network after a high resistance ground fault occurs is calculated The expression is: ; According to the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, ; Get the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position ; Determine the maximum virtual impedance The change in position Whether it is greater than a preset threshold; If the maximum virtual impedance The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position ; If the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated. 2. A distribution network fault detection method considering the access of multiple grid-connected inverters according to claim 1, characterized in that the wavelet transform of the distribution network common point voltage and the distributed power supply output current collected within a preset period respectively comprises: Select the wavelet type and decomposition level used to decompose the distribution network common point voltage and distributed power output current to obtain the sub-wavelet function , the sub-wavelet function The expression is: , In the formula, is the stretch factor, is the translation factor, For time; The signal In the sub-wavelet function Based on the expansion, the expression of signal wavelet transform is obtained: , In the formula, is the wavelet transform expression, for The conjugate function of The translation factor and the stretch factor Discretize it, let , , the expression of the signal wavelet transform is updated, where the expression of the updated signal wavelet transform is: , , In the formula, , are all positive integers, is a discrete sub-wavelet, for The conjugate function of is the expression of discretized wavelet transform; The voltage at the common point of the distribution network and the output current of the distributed power source collected within a preset period are subjected to wavelet transform according to the updated signal wavelet transform. 3. A distribution network fault detection method considering multiple grid-connected inverters according to claim 1, characterized in that when determining the maximum virtual impedance The change in position After determining whether the value is greater than a preset threshold, the method further comprises: If the maximum virtual impedance The change in position is not greater than the preset threshold, then according to the maximum virtual impedance in the kth cycle The position sorting results and the maximum virtual impedance in the k+1th cycle Calculate the maximum virtual impedance based on the position sorting results The position change. 4. A distribution network fault detection method considering multiple grid-connected inverters according to claim 1, characterized in that when determining the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position Afterwards, the method further comprises: If the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Not greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , then no short-circuit fault identification signal is generated. 5. A distribution network fault detection system considering the access of multiple grid-connected inverters, used in the method according to any one of claims 1 to 4, characterized in that it comprises: The processing module is configured to perform wavelet transform on the distribution network common point voltage and the distributed power supply output current collected within a preset period, respectively, to obtain a first coefficient group after wavelet transform of the distribution network common point voltage , and the second coefficient group after wavelet transform of the distributed power output current ; A first calculation module is configured to calculate the first coefficient group and the second coefficient group , using Ohm's law to calculate the virtual impedance array , and the maximum virtual impedance in the kth cycle Virtual impedance array The position sorting result is recorded as ,in, ; The second calculation module is configured to obtain the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , and according to the maximum virtual impedance in the kth cycle Sorting results by position and the maximum virtual impedance in the k-1th cycle Sorting results by position Calculate the maximum virtual impedance The change in position ; The first judgment module is configured to judge the maximum virtual impedance The change in position Whether it is greater than a preset threshold; The second judgment module is configured to The change in position If it is greater than the preset threshold, continue to determine the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Is it greater than the maximum virtual impedance in the k-1th cycle? Virtual impedance array Sorting results by position ; Generates a module configured to generate the maximum virtual impedance in the k+1th cycle Virtual impedance array Sorting results by position Greater than the maximum virtual impedance in the k-1th cycle Virtual impedance array Sorting results by position , a short circuit fault identification signal is generated. 6. An electronic device, characterized in that it comprises: at least one processor, and a memory communicatively connected to the at least one processor, wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor so that the at least one processor can execute the method described in any one of claims 1 to 4. 7. A computer-readable storage medium having a computer program stored thereon, wherein when the program is executed by a processor, the method according to any one of claims 1 to 4 is implemented.