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CN117833840A - Drive stage circuit and drive circuit for driving capacitive load - Google Patents

Drive stage circuit and drive circuit for driving capacitive load Download PDF

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Publication number
CN117833840A
CN117833840A CN202311167920.8A CN202311167920A CN117833840A CN 117833840 A CN117833840 A CN 117833840A CN 202311167920 A CN202311167920 A CN 202311167920A CN 117833840 A CN117833840 A CN 117833840A
Authority
CN
China
Prior art keywords
transistor
voltage
capacitive load
circuit
input signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311167920.8A
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Chinese (zh)
Inventor
谭磊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SG Micro Beijing Co Ltd
Original Assignee
SG Micro Beijing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SG Micro Beijing Co Ltd filed Critical SG Micro Beijing Co Ltd
Priority to CN202311167920.8A priority Critical patent/CN117833840A/en
Publication of CN117833840A publication Critical patent/CN117833840A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/26—Push-pull amplifiers; Phase-splitters therefor
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
    • H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/26—Modifications of amplifiers to reduce influence of noise generated by amplifying elements
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/32—Modifications of amplifiers to reduce non-linear distortion
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Nonlinear Science (AREA)
  • Amplifiers (AREA)

Abstract

The application discloses a drive stage circuit and a drive circuit for driving a capacitive load. The push-pull amplifying module comprises a first transistor with a first conductivity type and a second transistor with a second conductivity type which are connected in series between a first voltage end and an output node, wherein the second transistor is used for transmitting energy from the first voltage end to a capacitive load in a first working interval of a working period, the first transistor is used for transmitting energy from the capacitive load to the first voltage end in a first stage in a second working interval of the working period, and the feedback amplifier is used for controlling the first transistor and the second transistor by taking an input signal as a reference for feedback so that the waveform of the output signal provided for the capacitive load corresponds to the waveform of the input signal, thereby improving the stability, the linearity and the signal quality of the system, reducing distortion and noise interference and improving the overall performance of the circuit.

Description

Drive stage circuit and drive circuit for driving capacitive load
Technical Field
The present invention relates to the field of capacitive load driving technology, and more particularly, to a driving stage circuit and a driving circuit for driving a capacitive load.
Background
The piezoelectric element is a functional ceramic material capable of converting mechanical energy and electrical energy into each other, and is widely used in various electronic devices because of its piezoelectric properties. For example, piezoelectric transducers can be seen as one large capacitor built up of a piezoelectric element formed of a piezoelectric material sandwiched between two electrodes, which under the influence of an applied electric field can act as both a dielectric between the electrodes and a charging actuator, and thus are increasingly being seen as viable alternatives to transducers (e.g. loudspeakers and resonant actuators). Piezoelectric transducers are widely used in devices such as mobile phones, notebook computers, and tablet computers to provide audio and/or tactile output due to their ultra-thin, ultra-light, durable, and easy-to-install advantages.
Due to the capacitive nature of thin film piezoelectric transducers, these piezoelectric transducers give rise to high capacitive loading (capacitive loading) for the amplifier. However, conventional driving circuits (e.g., class AB, class D, class G, class H amplifiers) have evolved assuming that the load (coil made of very thin wires) is primarily resistive and somewhat inductive, and thus these amplifiers are inefficient in driving high capacitance loads such as piezoelectric transducers. Further, the phase of the current and the driving voltage is approximately 90 ° (90 ° out of phase) due to the capacitive characteristic of the load. In this way, the piezoelectric transducer does not actually consume much power during the charging phase, where most of the energy drawn by the piezoelectric transducer is stored in the capacitance of the load. However, during the discharge phase, when the cross-voltage across the transducer decreases, conventional class AB, class D, class G, class H amplifiers only release energy from the capacitance of the load to ground (ground) or to the negative supply, resulting in waste.
Fig. 1 shows a schematic circuit diagram of a prior art circuit for driving a capacitive load. As shown in fig. 1, a prior art circuit 100 employs a power conversion circuit 110 to control the transfer of energy between two sources, the power conversion circuit 110 being formed by chopping switches K1 and K2 and an inductor L1. The circuit 100 only requires that the voltage on the side of the voltage source src_a is higher than the voltage on the side of the voltage source src_b, and the direction of the current is not limited, and the direction of the current can be changed by alternately turning on and off the chopper switches K1 and K2, so as to change the direction of energy transfer. Both src_a and src_b in fig. 1 may be capacitive storage portions of the capacitive load. Taking the side of src_a as the capacitive load and the side of src_b as the power source as an example, the resistor R2 is the source internal resistance of the power source, and the power conversion circuit 110 boosts the voltage of src_b and drives the capacitive load on the side of src_a. When the capacitive storage on the side of src_a is relatively high relative to the payload consumption and the voltage of src_a is high, the charge on the capacitive storage may be pumped back to the power supply through the power conversion circuit 110, which may improve the efficiency of the circuit. Although the circuit 100 in fig. 1 can improve the efficiency of the circuit when driving a capacitive load, there are serious fluctuations in the voltage and current on the load on both sides of the circuit 100, especially on the side of src_a, and the voltage and current are completely fluctuating pulses, so that the circuit 100 has problems that the signal quality is poor and the signal amplitude is too low to be effectively adjusted when driving a piezoelectric speaker.
Fig. 2 shows another prior art circuit schematic for driving a capacitive load. As shown in fig. 2, the prior art circuit 200 improves the continuity of the drive signal by adding storage capacitors C1 and C2 across the power conversion circuit 210, but for some applications a more powerful way to improve the drive signal is still needed.
Disclosure of Invention
In view of the foregoing, an object of the present application is to provide a driving stage circuit and a driving circuit for driving a capacitive load, which can recover energy in the capacitive load to a power supply during driving to realize energy recycling, and improve signal quality through negative feedback control during energy recovery, while improving energy utilization efficiency and simultaneously compromising overall performance of the circuit.
According to an aspect of the present invention, there is provided a driving stage circuit for driving a capacitive load, comprising: an output node for connection to the capacitive load; a push-pull amplifying module comprising a first transistor of a first conductivity type and a second transistor of a second conductivity type connected in series between a first voltage terminal and the output node, the second transistor being for transferring energy from the first voltage terminal to the capacitive load during a first operating interval of a duty cycle, the first transistor being for transferring energy from the capacitive load to the first voltage terminal during a first phase in a second operating interval of the duty cycle; and a feedback amplifier having an inverting input terminal connected to the output node, a non-inverting input terminal for receiving an input signal, and a first output terminal for outputting a first control signal applied to control terminals of the first transistor and the second transistor, wherein the feedback amplifier is for feedback-controlling the first transistor and the second transistor with reference to the input signal such that a waveform of an output signal supplied to the capacitive load corresponds to a waveform of the input signal.
Optionally, the push-pull amplifying module further includes: a third transistor of the first conductivity type connected between the output node and ground for transferring energy from the capacitive load to ground in a second phase in the second operating interval, wherein the feedback amplifier further has a second output for outputting a second control signal applied to a control terminal of the third transistor, and the first control signal and the second control signal are complementary signals to each other.
Optionally, the capacitive load comprises a piezoelectric actuator or an acoustic transducer, wherein the first voltage terminal further comprises an energy storage element, wherein the energy storage element is an energy storage capacitor.
Optionally, the driving stage circuit further includes: a buffer connected between a first output terminal of the feedback amplifier and control terminals of the first transistor and the second transistor; and a voltage selection module for selecting the greater of the first voltage and the voltage in the output signal to power the buffer, wherein the voltage selection module comprises: the anode of the first diode is connected with the first voltage end, and the cathode of the first diode is connected with the power supply end of the buffer; and the anode of the second diode is connected with the output node, and the cathode of the second diode is connected with the power supply end of the buffer.
Optionally, the feedback amplifier is configured to control the first transistor and the third transistor to be turned off and control the state of the second transistor in the first operation interval so that the output signal corresponds to the first interval of the input signal, and to control the second transistor to be turned off and control the state of the first transistor or the third transistor in the second operation interval so that the output signal corresponds to the second interval of the input signal.
Optionally, the first interval is an interval in which the input signal increases from a minimum value to a maximum value, and the second interval is a falling portion of the input signal in the period.
Optionally, the first stage of the second operation interval is a stage in which the first voltage is less than the voltage of the output signal minus a second threshold, and the second stage is a stage in which the first voltage is greater than the voltage of the output signal minus the second threshold, where the second threshold is a body diode drop of a transistor.
Optionally, the waveform of the input signal is a sine wave with a voltage value not smaller than zero, wherein the first conductivity type is N-type, and the second conductivity type is P-type.
According to another aspect of the present invention, there is provided a driving circuit for driving a capacitive load, comprising: the power conversion circuit is used for receiving a power supply voltage provided by a voltage source and converting the power supply voltage into a first voltage, and the voltage source has energy storage capacity; and the driving stage circuit is used for receiving the first voltage and generating an output signal provided for the capacitive load by taking an input signal as a reference, wherein the output signal corresponds to the waveform of the input signal.
Alternatively, the power conversion circuit may operate bi-directionally, including a two-switch buck-boost converter, a switch-tap inductor buck-boost converter, or a switch flyback buck-boost converter.
In summary, the driving stage circuit for driving a capacitive load according to the present invention includes a push-pull amplifying module and a feedback amplifier, wherein the push-pull amplifying module includes an NMOS transistor and a PMOS transistor connected in series between a first voltage terminal and an output node, the PMOS transistor is used for transmitting energy from the first voltage terminal to the capacitive load in a first operation interval of a duty cycle, the NMOS transistor is used for transmitting energy from the capacitive load to the first voltage terminal in a partial stage in a second operation interval of the duty cycle, and the feedback amplifier is used for feedback-controlling the NMOS transistor and the PMOS transistor with reference to an input signal so that a waveform of the output signal provided to the capacitive load corresponds to a waveform of the input signal.
The drive stage circuit can realize energy recovery and reutilization in the process of driving capacitive load, and improves energy utilization efficiency. In addition, the driving circuit can correct nonlinear distortion of the circuit through negative feedback control in the energy recovery process, so that the output signal is closer to the shape and the amplitude of the input signal, and the quality of the output signal is improved. Therefore, the driving stage circuit and the driving circuit provided by the invention can improve the energy utilization efficiency, simultaneously give consideration to the stability, linearity and signal quality of the system, reduce distortion and noise interference and improve the overall performance of the circuit.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 shows a schematic circuit diagram of a prior art circuit for driving a capacitive load.
Fig. 2 shows another prior art circuit schematic for driving a capacitive load.
Fig. 3 shows another circuit schematic for driving a capacitive load.
Fig. 4 shows a schematic internal circuit diagram of the amplifier 320 in fig. 3.
Fig. 5 shows a waveform diagram of a sound with multiple harmonics.
Fig. 6 shows a schematic circuit diagram for driving a capacitive load according to an embodiment of the invention.
Fig. 7 shows a circuit schematic of a driving circuit according to an embodiment of the invention.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Preferred embodiments of the present invention are shown in the drawings. The invention may, however, be embodied in different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
It will be understood that in the following description, when an element or circuit is referred to as being "coupled to" another element or an element/circuit is "coupled between" two nodes, it can be directly coupled or connected to the other element or intervening elements may be present, and the connection between the elements may be physical, logical, or a combination thereof. In contrast, when an element is referred to as being "directly coupled to" or "directly coupled to" another element, it means that there are no intervening elements present between the two.
The present invention will be described in detail with reference to the accompanying drawings.
Fig. 3 shows another circuit schematic for driving a capacitive load. As shown in fig. 3, using src_b as a power source and src_a as a load, the power conversion circuit 310 boosts the input voltage of src_b to obtain a voltage src_bst, which is provided to the power supply terminal of the amplifier 320, so as to improve the continuity of the driving signal through the amplifier 320.
Fig. 4 shows a schematic internal circuit diagram of the amplifier 320 in fig. 3. As shown in fig. 4, the amplifier 320 includes a push-pull circuit composed of transistors Q2 and Q3, a feedback amplifier A1, and a buffer B1. Transistors Q2 and Q3 are connected in turn between voltage src_bst and ground, the common node of both being connected as output to the capacitive load on side src_a. The inverting input terminal of the feedback amplifier A1 is connected to the output nodes of the transistors Q2 and Q3, the non-inverting input terminal is connected to the input signal IN, the non-inverting output terminal is connected to the control terminal of the transistor Q3, the inverting output terminal is connected to the control terminal of the transistor Q2 via the buffer B1, and the power supply terminal of the buffer B1 is connected to the voltage src_bst. In this embodiment, the transistor Q2 is an NMOS transistor, the transistor Q3 is a PMOS transistor, the output is pulled up by the transistor Q2 and the output is pulled down by the transistor Q3. When the output signal is pulled up, if the amplitude of the voltage SRC_BST rises according to the output requirement to enable the voltage difference at two ends of the transistor Q2 to just meet the working requirement, the conduction loss of the transistor Q2 is the lowest, and meanwhile, the output signal is controlled by the feedback amplifier A1, so that signal distortion and interference can be well controlled. When the output signal is pulled down, if the voltage SRC_BST is kept at a higher voltage than the output signal, the pull down is achieved by transistor Q3, then the tank voltage on the capacitive load will be completely shared by the quiescent consumption of the active load R1 and transistor Q3. If the voltage SRC_BST is lower than the voltage at SRC_A, then the portion of the energy storage consumed by the energy storage removed payload R1 can be pumped back to the power supply side through the body diode of transistor Q2, and when the occupancy of the capacitive energy storage relative to the payload consumption is relatively high and the voltage at SRC_A is high, the efficiency of the circuit can be improved by pumping the charge back to the power supply side.
Fig. 5 shows a waveform diagram of a sound with multiple harmonics, as shown in fig. 5, in which there are a large number of return channels in the actual sound waveform, which are local pulldowns at higher voltages, which can result in a circuit with a large energy loss if this part of the energy is not pumped back to the supply side but is discharged to ground by the transistor Q3, since the voltage on the capacitive load is still at a high voltage during pulldown.
With continued reference to fig. 4, however, in the prior art amplifier 320, when the output signal is pulled up, the transistor Q2 is an inverter operating in the Class-a state, the gate voltage of the transistor Q2 is controlled by considering the inverted output of the feedback amplifier A1 through the buffer B1, after two inversions, the output signal controlled by the transistor Q2 is actually in phase with the input signal, and the output signal is connected to the inverting input terminal of the feedback amplifier A1 to form a negative feedback amplifier, so that the amplifier 320 can perform negative feedback adjustment on the output signal through the transistor Q2 during the pull-up of the output signal. In the process of pulling down the output signal, the output of the buffer B1 stays at the voltage src_bst all the time, and the charge on the capacitive load side can only be pulled back to the power supply side through the body diode of the transistor Q2, so that the feedback amplifier A1 cannot realize negative feedback adjustment through the transistor Q2.
Therefore, in the driving circuit shown in fig. 3, improvement of both efficiency and signal quality cannot be ensured at the time of driving signal pull-down, and improvement thereof is required.
Fig. 6 shows a schematic diagram of a driving circuit 400 according to an embodiment of the present invention. The driving circuit 400 is coupled between a voltage source 401 and a load 402, and receives an input signal IN to drive the load 402 according to the input signal IN.
The voltage source 401 may have energy storage capabilities. For example, the voltage source 401 may include a battery (which may or may not be a rechargeable battery (rechargeable battery)) or a direct current power supply, such as a power conversion circuit. In one embodiment, the voltage source 401 (e.g., power conversion circuit) may include a capacitor (capacitor) or be capacitive.
In an embodiment, the load 402 may include a speaker, or equivalently, a sound emitting device or a sound transducer (acoustic transducer). IN this case, the input signal IN may be an audio signal. In one embodiment, the speaker within load 402 may comprise a piezoelectric actuated speaker. In particular, the drive circuit 400 may be coupled to a piezoelectric actuator that piezoelectrically actuates the speaker. The piezoelectric actuator within the load 402 may comprise a piezoelectric layer sandwiched between a first/top electrode and a second/bottom electrode. Further, the driving circuit 400 may be connected to electrodes of the piezoelectric actuator. It should be noted that there is a significant capacitance (capacitance) between the first/top electrode and the second/bottom electrode.
Specifically, the driving circuit 400 includes a power conversion circuit 410 and a driving stage circuit 420. The power conversion circuit 410 is configured to generate a first voltage V with a smooth waveform according to a power supply voltage VCC provided by the voltage source 401 S And applying the first voltage V S Stored in the storage capacitor of the power conversion circuit 410. The driving stage circuit 420 is configured to receive the first voltage Vs and generate an output signal OUT provided to the load 402 with reference to an input signal IN, where the output signal OUT has a waveform corresponding to the input signal IN.
The driving stage circuit 420 is used for generating a first voltage V during a first operation interval of a working period S Forming a charging current to the load 402 such that the output signal provided to the load 402 corresponds to a first interval of the input signal IN; while current is drawn from the load 402 during a second interval of a duty cycle such that the output signal corresponds to a second interval of the input signal IN. In this regard, energy stored in a capacitor (capacitance) within the load 402 during the first operating region will be recovered back to the capacitor within the voltage source 401 during the second operating region, thereby reducing the total energy consumed and improving circuit efficiency. In this embodiment, the power conversion circuit 410 and the driving stage circuit 420 respectively operate independently and do not interfere with each other, and the voltage on the energy storage capacitor (not shown) in the power conversion circuit 410 is stabilized to be the first voltage Vs.
In an exemplary embodiment, the power conversion circuit 410 is configured as a power stage circuit having a boost function.
IN an exemplary embodiment, the driver stage circuit 420 is configured as an amplifier circuit with a push-pull output, which is composed of two complementary output amplifiers, one for pulling up the output signal IN the first operating interval and the other for pulling down the output signal IN the second operating interval, and by combining the outputs of the two amplifiers, a non-inverting amplification of the input signal IN is finally achieved, and an output signal identical to the input signal IN is obtained on the load 402. Meanwhile, the driving stage circuit 420 of the present embodiment has a high current output capability, so as to be able to drive a large load such as various capacitive loads.
IN an exemplary embodiment, the first interval is a time interval corresponding to a rising portion (upswing portion) of the input signal IN increasing from a minimum value to a maximum value, and the second interval is a time interval corresponding to a falling portion (downswing portion) of the input signal IN the period. Further, the waveform of the input signal IN is a harmonic signal represented by a sine wave. For example, the input signal IN may be a harmonic signal with a value not less than zero (a waveform obtained by introducing an additional harmonic component into a standard sine wave and performing an up-shift so that the minimum amplitude value is equal to or greater than 0), and IN other embodiments, the waveform of the input signal IN may be a full-wave rectified waveform, as long as the value of the input signal IN is not less than zero, and for convenience of description, IN the subsequent embodiments of the present invention, the waveform of the input signal IN is taken as a harmonic signal with a value not less than zero, but the present invention is not limited thereto.
In this embodiment, the power conversion circuit 410 is a bi-directional power conversion circuit. It will be appreciated that when bi-directional power conversion circuit 410 is used to drive capacitive loads, bi-directional power conversion circuit 410 is allowed to transfer power in both directions: from voltage source 401 to load 402, and from load 402 to voltage source 401.
In this embodiment, the topology of the power conversion circuit 410 may be implemented by adopting topologies such as a dual-switch buck-boost converter, a switch tap inductor buck-boost converter, and a switch flyback buck-boost converter, which is not limited in this aspect of the invention, and the current direction, i.e., the direction of energy transfer, is changed by controlling the alternate on/off of the two switches in the converter.
Fig. 7 shows a circuit schematic of a driving circuit 400 according to an embodiment of the invention. As shown in fig. 7, the power conversion circuit 410 includes an inductor L1 connected to the voltage source 401, and is coupled to the inductor L1 and the first voltage V S A first switch K1 coupled between the output terminals of the inductor L1 and the ground terminal, a second switch K2 coupled between the output terminals of the inductor L1 and the ground terminal, and a first voltage V S An energy storage capacitor C1 between the output terminal and the ground terminal. The gates of the transistors in the first switch K1 and the second switch K2 are coupled to a pulse width modulation controller (not shown).
Wherein the first switch K1 and the second switch K2 may be of the same type, which may be the most practical choice for implementation of an Integrated Circuit (IC), although embodiments with hybrid switches may also be used. The first switch K1 and the second switch K2 may be, for example, switches such as GaN or MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistor) or the like, among other possible switches.
The driving stage circuit 420 includes a push-pull amplifying module 421, a voltage selecting module 422, a feedback amplifier A1, and a buffer B1. Wherein the push-pull amplifying module 421 is configured to receive the first voltage Vs during a first operation interval of a duty cycle to charge the load 402, so that the output signal OUT provided to the load 402 corresponds to a first interval of the input signal IN; the push-pull amplifying module 421 is configured to draw a current from the load 402 during a second operation interval of the operation period, so that the output signal OUT corresponds to the second interval of the input signal.
Further, the push-pull amplifying module 421 includes an NMOS transistor Q1, a PMOS transistor Q2, and an NMOS transistor Q3 connected in series between the first voltage Vs and ground, wherein gates of the NMOS transistor Q1 and the PMOS transistor Q2 are connected to each other, the PMOS transistor Q2 and the NMOS transistor Q3 are connected in a push-pull amplifying structure, and drains of both are connected to an output node OUT for connection with the load 402. The transistor Q2 is configured to charge the load 402 according to the first voltage Vs during the first operation interval so that the output node OUT is pulled up, and the transistor Q3 is configured to provide a discharge path from the load 402 to ground during a partial phase of the second operation interval so that the output node OUT is pulled down. For example, the partial phase corresponds to a phase in which the first voltage Vs is greater than the voltage of the output signal OUT minus a second threshold, wherein the second threshold is the body diode drop of the transistor.
Further, the transistor Q1 is further configured to provide a discharging path of the load 402 to the first voltage terminal Vs at another stage of the second operation interval, so that the output node OUT is pulled down and simultaneously recovers the energy stored in the load 402 into the voltage source 401, thereby improving the energy utilization efficiency of the circuit. For example, the further phase may be a phase in which the first voltage Vs is less than the voltage of the output signal OUT minus the second threshold, the second threshold being the body diode drop of the transistor.
Further, the feedback amplifier A1 is configured to modulate the transistors Q1 to Q3 with the input signal IN as a reference during the process of pulling up and pulling down the output node OUT, so that distortion and interference of the output signal can be well controlled, and higher linearity is provided. Illustratively, the feedback amplifier A1 has an inverting input coupled to the output node OUT, a non-inverting input for receiving the input signal IN, a non-inverting output coupled to the gate of the transistor Q3 for providing the control signal NG to the gate of the transistor Q3, and inverting outputs coupled to the gates of the transistors Q1 and Q2 for providing the control signal PG to the gates of the transistors Q1 and Q2. The control signals NG and PG are, for example, signals complementary to each other. Further, the control signal NG has a variation IN phase with the input signal IN, and the control signal PG has a variation IN opposite phase with the input signal IN.
The buffer B1 is connected between the inverting output terminal of the feedback amplifier A1 and the gates of the transistors Q1 and Q2, so as to provide stronger driving capability at the gates of the transistors Q1 and Q2, and ensure that the output of the feedback amplifier A1 can effectively drive the transistors Q1 and Q2.
The voltage selection module 422 is configured to select a voltage greater than the first voltage Vs and the output signal OUT to drive the buffer B1, so that the output of the buffer B1 can be pulled up to a higher voltage level. Further, the voltage selection module 422 includes diodes D3 and D4. The anode of the diode D3 is connected to the first voltage Vs, and the cathode of the diode D3 is connected to the power supply terminal of the buffer B1. An anode of the diode D4 is connected to the output node OUT, and a cathode of the diode D4 is connected to a power supply terminal of the buffer B1.
Further, at the beginning of the first operation interval (i.e., the rising process of the signal), the control signal NG output by the feedback amplifier A1 is at a lower level, so that the transistor Q3 is in an off state. The control signal PG output from the inverting output terminal of the feedback amplifier A1 is at a high level, and thus the output of the buffer B1 is also at a high level, so the transistor Q2 is in an on state. And, since the supply voltage of the buffer B1 is equal to the first voltage Vs (the first voltage Vs is greater than the output signal OUT), the output of the buffer B1 is not higher than the first voltage Vs, and the gate-source voltage VGS of the transistor Q1 cannot reach the on threshold and cannot be turned on, so that the transistor Q1 is in the off state. At this time, the first voltage Vs charges the load 402 through the body diode D1 of the transistor Q1 and the conduction channel of the transistor Q2. The transistor Q2 is an inverter operating IN a Class-a state, and the Class-a inverter provides high linearity by operating the transistor Q2 IN an amplifying region IN a first operating region to amplify the entire amplitude range of the input signal IN to the output node OUT, such that the output signal OUT corresponds to the first region of the input signal IN.
IN the second operation region (i.e., the falling process of the signal), the feedback amplifier A1 controls the transistor Q2 to be turned off, and controls the transistors Q1 and/or Q3 to operate IN an amplifying region, so as to pull down the output node OUT, so that the output signal OUT corresponds to the second region of the input signal IN. Further, in the second operation interval in which the output node OUT is pulled down, the transistors Q1 and Q3 also provide two discharge paths, respectively, based on the magnitude relation between the first voltage Vs and the voltage at the output node OUT. Illustratively, when the first voltage Vs is greater than the voltage at the output node OUT minus the second threshold, the degree of conduction of the transistor Q3 increases during the second operating interval, and the load 402 discharges ground through the discharge path provided by the channel of the transistor Q3 to pull down the output node OUT; when the first voltage Vs is smaller than the voltage at the output node OUT, the conduction degree of the transistor Q1 increases in the second operation interval, the load 402 discharges the first voltage terminal Vs1 through the body diode D2 of the transistor Q2 and the channel of the transistor Q1, the output node OUT can be pulled down as well, and the energy in the load 402 can be recovered into the voltage source 401 through the power conversion circuit 410.
In summary, the driving stage circuit for driving a capacitive load according to the present invention includes a push-pull amplifying module and a feedback amplifier, wherein the push-pull amplifying module includes an NMOS transistor Q1 and a PMOS transistor Q2 connected in series between a first voltage terminal and an output node, the PMOS transistor Q2 is configured to transmit energy from the first voltage terminal to the capacitive load in a first operation interval of a duty cycle, the NMOS transistor Q1 is configured to transmit energy from the capacitive load to the first voltage terminal in a partial stage of a second operation interval of the duty cycle, and the feedback amplifier is configured to feedback-control the NMOS transistor Q1 and the PMOS transistor Q2 with reference to an input signal such that a waveform of the output signal provided to the capacitive load corresponds to a waveform of the input signal. The drive stage circuit can realize energy recovery and reutilization in the process of driving capacitive load, and improves energy utilization efficiency. In addition, the driving circuit can correct nonlinear distortion of the circuit through negative feedback control in the energy recovery process, so that the output signal is closer to the shape and the amplitude of the input signal, and the quality of the output signal is improved. Therefore, the driving stage circuit and the driving circuit provided by the invention can improve the energy utilization efficiency, simultaneously give consideration to the stability, linearity and signal quality of the system, reduce distortion and noise interference and improve the overall performance of the circuit.
It should be noted that in the description of the present invention, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Finally, it should be noted that: it is apparent that the above examples are only illustrative of the present invention and are not limiting of the embodiments. Other variations or modifications of the above teachings will be apparent to those of ordinary skill in the art. It is not necessary here nor is it exhaustive of all embodiments. And obvious variations or modifications thereof are contemplated as falling within the scope of the present invention.

Claims (10)

1. A driver stage circuit for driving a capacitive load, comprising:
an output node for connection to the capacitive load;
a push-pull amplifying module comprising a first transistor of a first conductivity type and a second transistor of a second conductivity type connected in series between a first voltage terminal and the output node, the second transistor being for transferring energy from the first voltage terminal to the capacitive load during a first operating interval of a duty cycle, the first transistor being for transferring energy from the capacitive load to the first voltage terminal during a first phase in a second operating interval of the duty cycle; and
a feedback amplifier having an inverting input connected to the output node, a non-inverting input for receiving an input signal, and a first output for outputting a first control signal applied to the control terminals of the first and second transistors,
wherein the feedback amplifier is configured to feedback-control the first transistor and the second transistor with the input signal as a reference such that a waveform of an output signal supplied to the capacitive load corresponds to a waveform of the input signal.
2. The driver stage circuit of claim 1, wherein the push-pull amplification module further comprises:
a third transistor of the first conductivity type connected between the output node and ground, the third transistor being for transferring energy from the capacitive load to ground during a second phase in the second operating interval,
wherein the feedback amplifier further has a second output terminal for outputting a second control signal applied to a control terminal of the third transistor, and the first control signal and the second control signal are signals complementary to each other.
3. The driver stage circuit of claim 1, wherein the capacitive load comprises a piezoelectric actuator or an acoustic transducer,
the first voltage end further comprises an energy storage element, wherein the energy storage element is an energy storage capacitor.
4. The driver stage circuit of claim 1, further comprising:
a buffer connected between a first output terminal of the feedback amplifier and control terminals of the first transistor and the second transistor; and
a voltage selection module for selecting the larger of the first voltage and the voltage in the output signal to supply power to the buffer,
wherein the voltage selection module comprises:
the anode of the first diode is connected with the first voltage end, and the cathode of the first diode is connected with the power supply end of the buffer; and
and the anode of the second diode is connected with the output node, and the cathode of the second diode is connected with the power supply end of the buffer.
5. The driver stage circuit of claim 2, wherein the feedback amplifier is configured to control the first transistor and the third transistor to be turned off and to control the state of the second transistor in the first operation region such that the output signal corresponds to the first region of the input signal, and
and controlling the second transistor to be turned off in the second operation interval, and controlling the state of the first transistor or the third transistor so that the output signal corresponds to the second interval of the input signal.
6. The driver stage circuit of claim 5, wherein the first interval is an interval in which the input signal increases from a minimum value to a maximum value, and the second interval is a falling portion of the input signal in the period.
7. The driver stage circuit of claim 2, wherein the first phase of the second operating interval is a phase in which a first voltage is less than a voltage of the output signal minus a second threshold, the second phase being a phase in which the first voltage is greater than the voltage of the output signal minus the second threshold, wherein the second threshold is a body diode drop of a transistor.
8. The drive stage circuit according to any one of claims 1 to 7, wherein the waveform of the input signal is a sine wave having a voltage value not less than zero,
wherein the first conductivity type is N type and the second conductivity type is P type.
9. A drive circuit for driving a capacitive load, comprising:
the power conversion circuit is used for receiving a power supply voltage provided by a voltage source and converting the power supply voltage into a first voltage, and the voltage source has energy storage capacity; and
the driver stage circuit of any one of claims 1 to 8, configured to receive the first voltage and to generate an output signal for provision to the capacitive load with reference to an input signal, the output signal corresponding to a waveform of the input signal.
10. The drive circuit of claim 9, wherein the power conversion circuit is bi-directionally operable,
the power conversion circuit includes a two-switch buck-boost converter, a switch-tap inductor buck-boost converter, or a switch flyback buck-boost converter.
CN202311167920.8A 2023-09-11 2023-09-11 Drive stage circuit and drive circuit for driving capacitive load Pending CN117833840A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311167920.8A CN117833840A (en) 2023-09-11 2023-09-11 Drive stage circuit and drive circuit for driving capacitive load

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311167920.8A CN117833840A (en) 2023-09-11 2023-09-11 Drive stage circuit and drive circuit for driving capacitive load

Publications (1)

Publication Number Publication Date
CN117833840A true CN117833840A (en) 2024-04-05

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Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311167920.8A Pending CN117833840A (en) 2023-09-11 2023-09-11 Drive stage circuit and drive circuit for driving capacitive load

Country Status (1)

Country Link
CN (1) CN117833840A (en)

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