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CN117832099B - BGA packaging method capable of realizing double-sided welding - Google Patents

BGA packaging method capable of realizing double-sided welding Download PDF

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Publication number
CN117832099B
CN117832099B CN202410017889.8A CN202410017889A CN117832099B CN 117832099 B CN117832099 B CN 117832099B CN 202410017889 A CN202410017889 A CN 202410017889A CN 117832099 B CN117832099 B CN 117832099B
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China
Prior art keywords
chip
pcb
welding
bga
sided
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CN202410017889.8A
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CN117832099A (en
Inventor
闵云川
王嘉珂
潘振助
吴章全
张磊
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Chengdu Cetc Xingtuo Technology Co ltd
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Chengdu Cetc Xingtuo Technology Co ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814Conductive parts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/60Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3677Wire-like or pin-like cooling fins or heat sinks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Wire Bonding (AREA)

Abstract

The invention provides a BGA packaging method capable of realizing double-sided welding, which belongs to the chip packaging technology and comprises the following steps: the wafer is polished by the grinding wheel to realize thinning, and the wafer is cut to obtain independent chips; designing a PCB layout, manufacturing a bonding pad according to the designed PCB layout, then performing chip mounting, and cleaning a substrate for fixing a chip and the surface of the chip through plasma; after the chip is attached and plasma cleaning is carried out, the bottom component of the PCB is welded; after the bottom assembly of the PCB is welded, welding the top assembly of the PCB; after welding of the double-sided BGA component is completed, welding detection and testing are carried out; after the welding quality is checked, performing functional test on the main board; after the function test is completed, welding copper columns of the PCB; after the copper columns are welded, packaging treatment is carried out, and the double-sided welded BGA packaging is completed.

Description

BGA packaging method capable of realizing double-sided welding
Technical Field
The invention belongs to the technical field of chip packaging, and particularly relates to a BGA packaging method capable of realizing double-sided welding.
Background
BGA (Ball GRID ARRAY) packages are a high-density, high-reliability chip packaging technology, and have important significance in the development of the field of chip packaging. BGA packages were first developed in the early 1990 s, when used for memory chips, and mainly solve the problems of the large number of pins and high frequency characteristic requirements of the chips.
With the continued development of integrated circuit technology and the reduction in chip size, BGA packages have found wide application. BGA packages are the packaging technology of choice due to their excellent thermal management and reliability characteristics, particularly in high performance applications such as mobile devices, communications devices, etc.
With further advances in semiconductor processing and packaging technology, BGA packages have also been further improved and upgraded. For example, a smaller ball count and a tighter arrangement results in a higher connection density. With the rapid development of the fields of smart phones, internet of things, artificial intelligence and the like, the demand for chip packaging is also increasing. The implementation flow of a conventional BGA package generally includes: and fixing the chip to be packaged on a substrate, leading out pins from the chip by using gold wires, connecting the pins with other elements such as an external connector and the like through circuits on the substrate, connecting the chip with the substrate through solder balls, and finally sealing the chip by using plastic packaging or other materials.
Currently, chip packaging is a vital link in the semiconductor industry, and the mainstream packaging form in the industry is single-sided packaging. In single-sided packages, connectors are often required for connection between the modules, and in some small-sized electronic products such as mobile phones, the space is limited by the size of the connectors, so that other schemes are required for connection between the modules.
Disclosure of Invention
Aiming at the situation, the invention provides the BGA packaging method capable of realizing double-sided welding, and the method can be applied to scenes with high space density requirements by welding components on a double-layer PCB (Printed circuit board) board and realizing the stacking of a plurality of layers of PCB boards through double-sided packaging.
In order to achieve one or more of the above purposes, the technical scheme adopted by the invention is as follows:
Step S1: the wafer is polished by the grinding wheel to realize thinning, and the wafer is cut to obtain independent chips;
Step S2: designing PCB (Printed circuit board) a layout, manufacturing a bonding pad according to the designed PCB layout, then carrying out chip mounting, and cleaning a substrate for fixing a chip and the surface of the chip through plasma;
Step S3: after the chip is attached and plasma cleaning is carried out, the bottom component of the PCB is welded;
step S4: after the bottom assembly of the PCB is welded, welding the top assembly of the PCB;
Step S5: after welding of the double-sided BGA component is completed, welding detection and testing are carried out;
step S6: after the welding quality is checked, performing functional test on the main board;
step S7: after the function test is completed, welding copper columns of the PCB;
step S8: after the copper columns are welded, packaging treatment is carried out, and the double-sided welded BGA packaging is completed.
In an embodiment, the step S1 includes the steps of:
Step S101: the wafer thinning is realized by rotating and polishing the back of the wafer at a high speed through a grinding wheel, and in the process, water cooling and cleaning are carried out;
step S102: polishing according to the type of the product to eliminate internal stress;
step S103: after the wafer is thinned, removing the surface film of the wafer by using an adhesive tape, and performing thickness measurement and quality inspection;
step S104: the wafer is fixed on the metal ring through the blue film for cutting, so that the wafer becomes an independent chip.
In an embodiment, the step S2 includes the steps of:
Step S201: performing layout design on the PCB according to the functional requirements and circuit design of the main board, wherein the layout design comprises the positions of components, pin layout, the number of bonding pads and bonding pad layout;
step S202: according to the designed PCB layout, a bonding pad is manufactured on the PCB by using an electroplating ball or welding spot material;
Step S203: after the bonding pad is manufactured, the chip is fixed on the substrate through the patch material;
Step S204: after chip mounting, cleaning a substrate for fixing a chip and the surface of the chip by utilizing plasma; plasma cleaning uses ionized argon ions, electrons and active groups to form volatile gases from contaminants on the substrate and chip surfaces, which are then pumped away by a vacuum system.
The beneficial effects of the above-mentioned further scheme are: according to the invention, the space can be fully utilized by designing the layout and manufacturing the bonding pads, so that the space utilization efficiency is improved; the chip can be fixed and heat of the chip is conducted through chip mounting; through plasma cleaning, the surfaces of the substrate and the chip can be cleaned, and the bonding force during bonding wires is improved.
In an embodiment, in the step S3, components such as a communication chip, a power consumption management chip, and the like are soldered to the pads by aligning the pads with the pins using a soldering apparatus.
In an embodiment, in step S4, components such as a processor and a memory are soldered to the upper PCB by aligning the pads and the pins.
In an embodiment, in the step S5, the quality of the soldering and the reliable connection between the pad and the solder ball are ensured by means of appearance inspection, X-ray detection, etc., and if a defect or poor soldering is found, repair or re-soldering is performed.
In an embodiment, in step S6, a comprehensive functional test is performed on the motherboard, including power-on detection, signal transmission test, power consumption management test, etc. of the circuit, so as to ensure normal operation of the motherboard and meet performance requirements.
In an embodiment, in step S7, a metal pad is reserved on the upper and lower identical substrates in advance for soldering a copper pillar, where the size of the copper pillar may be tens of micrometers, and the copper pillar is used as a second lead added in the dual-sided BGA package process and having supporting and connecting functions.
In an embodiment, the step S8 includes the steps of:
Step S801: melting the plastic packaging material at high temperature to form a liquid smoke packaging material with lower viscosity, and injecting the liquid smoke packaging material into a die cavity to finish plastic packaging;
Step S802: curing the plastic packaging material after plastic packaging under the high-temperature condition, and curing after completion;
Step S803: after plastic packaging and post curing are completed, printing soldering flux on a solder ball pad on the back of the substrate, placing a solder ball, melting the solder ball through a reflow oven, forming eutectic with the solder ball pad, cooling, fixing the solder ball on the solder ball pad on the back of the substrate, and forming the reflowed solder ball into an I/O outer pin of the BGA package, thereby realizing connection between the chip and an external circuit;
Step S804: after the ball implantation is completed, the upper and lower butt joint of the two substrates is realized through the copper columns and the corresponding bonding pads, and the double-sided welded BGA package is completed.
The beneficial effects of the invention at least comprise one of the following:
1) The invention provides a BGA packaging method capable of realizing double-sided welding. Compared with the traditional BGA package, the double-sided BGA package has pads arranged at the bottom and the top of the chip, and a double-sided pad layout is formed, and the double-sided layout can provide more connection points, so that the number of pins of the chip can be more, and higher chip density and stronger functional integration are realized.
2) Through the double-sided layout, the internal pins can be connected with the chip core in a shorter way, so that the transmission path and delay of signals are reduced, and the transmission quality and speed of the signals are improved.
3) The double-sided BGA package has the pad layout at the top and the bottom of the chip, so that the chip can be better connected with the PCB, the connection mode can provide stronger mechanical fixity, the loosening risk of the package in environments such as vibration or shearing is reduced, and the stability and the reliability of the package are improved. In addition, the chip is packaged in a plastic packaging material through plastic packaging so as to protect the chip from the influence of external environment and physical damage; through post-curing, the stability, mechanical strength, temperature resistance and packaging performance of the plastic packaging material are further enhanced, and the impact resistance of the chip is improved.
4) The invention can find the false welding problem through welding detection, and improves the reliability of welding; through function detection, the validity of welding can be guaranteed, and the normal function of the main board is ensured.
5) According to the double-sided BGA package disclosed by the invention, as the pad layout is added at the bottom and the top of the chip, the thermal heat dissipation performance of the package can be further enhanced, and the pads on the upper surface and the lower surface provide more heat dissipation paths, so that the heat of the chip is easier to transfer and dissipate, and the heat dissipation effect of the chip is improved.
Drawings
FIG. 1 is a flow chart of the method of the present invention;
FIG. 2 is a schematic diagram of a conventional BGA package;
FIG. 3 is a schematic diagram of a dual sided BGA package;
FIG. 4 is a schematic diagram of the lower PCB assembly soldering;
FIG. 5 is a schematic diagram of the upper PCB assembly soldering;
FIG. 6 is a schematic diagram of copper pillar welding;
Fig. 7 is a schematic diagram of upper and lower PCB boards welded together.
Detailed Description
The following description of the embodiments of the present invention is provided to facilitate understanding of the present invention by those skilled in the art, but it should be understood that the present invention is not limited to the scope of the embodiments, and all the inventions which make use of the inventive concept are protected by the spirit and scope of the present invention as defined and defined in the appended claims to those skilled in the art.
The invention provides a BGA packaging method capable of realizing double-sided welding, which can realize the stacking of multiple layers of single boards, save space and provide more pins, thereby realizing the expansion of chip functions. In addition, the communication module is welded on the two PCB boards, so that wiring difficulty can be reduced, and communication speed and stability are improved.
A conventional BGA package is shown in fig. 2, which is mainly composed of 5 parts: chip, gold wire, plastic package, base plate and solder ball. The implementation flow of a conventional BGA package generally includes: the chip to be packaged is fixed on a substrate, pins are led out from the chip by gold wires, the pins are connected with other elements such as an external connector and the like through circuits on the substrate, the chip is connected with the substrate through solder balls, and finally the chip is sealed by plastic sealing or other materials.
As shown in fig. 3, in the BGA package structure of the present invention, a chip is fixed on the upper surface of a lower substrate, and BGA pads are provided on the lower surface; the upper substrate is opposite to the lower substrate, BGA pads are arranged on the upper surface, gold wire welding spots are arranged on the chip, the gold wires are connected with the lower substrate to conduct signals, and the chip pins can be connected to components of a PCB where the lower substrate is located.
Meanwhile, the gold wires conduct signals of the upper substrate through the copper columns and are connected to components of the PCB where the upper substrate is located, copper column welding spots are arranged on the lower surface of the upper substrate and the upper surface of the lower substrate. On the basis of traditional BGA encapsulation, copper columns are added around the chip, the whole is divided into an upper part and a lower part, the functions of conducting current and supporting the substrate are achieved, pin signals are led into the upper substrate, the number of pins is increased on the upper plate, and the expansibility of the chip is improved.
In addition, according to the size of the available space, the size of the copper column can be designed by self to meet the requirement, and the minimum diameter can reach tens of micrometers. The invention discloses a BGA packaging method capable of realizing double-sided welding, which comprises the following steps:
step S1: and polishing the wafer by using a polishing wheel to realize wafer thinning, and cutting the wafer to obtain independent chips. Preferably, the specific implementation method of the step is as follows:
step S101: the wafer thinning is realized by rotating and polishing the grinding wheel at a high speed on the back of the wafer, and in the process, water cooling and cleaning are carried out to prevent high-temperature aggregation and chip aggregation in the thinning process;
Step S102: in order to prevent chip fragments and reduce the chip surface fragmentation risk, polishing treatment is carried out according to the product type so as to eliminate internal stress;
step S103: after the wafer is thinned, removing the surface film of the wafer by using an adhesive tape, and performing thickness measurement and quality inspection;
Step S104: the wafer is fixed on the metal ring through the blue film for cutting, so that the wafer becomes an independent chip. The existing chip cutting modes mainly comprise two modes, namely blade cutting and laser cutting. The dicing blade cuts the wafer through the circular blade to complete dicing on the dicing streets, dividing the entire wafer into individual chips, and arranging the individual chips in order on the blue film. Laser dicing is performed by impinging laser beam energy on the dicing streets, evaporating the material on the streets, and separating the wafer into individual chips.
Step S2: and designing a PCB layout, manufacturing a bonding pad according to the designed PCB layout, carrying out chip mounting, and cleaning the surfaces of the substrate and the chip through plasma. Preferably, the specific implementation method of the step is as follows:
Step S201: performing layout design on the PCB according to the functional requirements and circuit design of the main board, wherein the layout design comprises the positions of components, pin layout, the number of bonding pads and bonding pad layout;
step S202: according to the designed PCB layout, a bonding pad is manufactured on the PCB by using an electroplating ball or welding spot material; the bonding pads are required to meet the layout requirements of pins of each component and can be correspondingly connected with solder balls of the double-sided BGA component;
step S203: after the bonding pads are manufactured, fixing the chip on the substrate through silver colloid, DAF (Die Attach Film) films and other patch materials according to a design drawing in order to fix the chip and conduct heat on the chip;
Step S204: after chip mounting, cleaning the surfaces of the substrate and the chip by using plasma; the plasma cleaning uses ionized argon ions, electrons and active groups to enable pollutants on the surfaces of the substrate and the chip to form volatile gas, and the volatile gas is pumped away by a vacuum system, so that the effect of surface cleaning is achieved, and the bonding force is better when bonding wires are bonded.
Step S3: after the chip is mounted and plasma cleaned, the bottom assembly is soldered to the PCB.
In this embodiment, as shown in fig. 4, the soldering schematic diagram of the lower PCB board component is that the communication chip, the power consumption management chip and other components are first fixed on the lower PCB board, and then these components are soldered to the pads by aligning the pads and pins and using soldering equipment.
Step S4: and after the welding of the PCB assembly below is completed, welding the top assembly.
In this embodiment, the welding schematic diagram of the upper PCB board is shown in fig. 5, and after the welding of the lower PCB board assembly is completed, the assemblies such as the processor and the memory are welded to the upper PCB board by aligning the bonding pads and the pins. Then, soldering is performed by a heating and soldering apparatus, and the solder balls are melted to be connected to the pads.
Step S5: and after the welding of the double-sided BGA component is finished, performing welding detection and testing.
Step S6: after the inspection of welding quality is completed, the complete functional test is performed on the main board.
Step S7: after the functional test is completed, the copper columns are welded according to the designed layout.
In this embodiment, a schematic diagram of copper pillar welding is shown in fig. 6, and after the welding of all modules on the upper and lower PCBs is completed, the copper pillars are welded according to the layout designed previously, the whole is divided into upper and lower parts, and the current is conducted and the substrate is supported.
Step S8: and after the function test is finished and the copper columns are welded, packaging treatment is carried out, and the double-sided welded BGA package is finished. Preferably, the specific implementation method of the step is as follows:
Step S801: melting the plastic package material at high temperature to form a liquid smoke package material with lower viscosity, injecting the liquid smoke package material into a die cavity, and solidifying epoxy resin in the plastic package material under the action of auxiliaries such as a hardening agent, a coupling agent and the like, thereby completing plastic package;
Step S802: and curing the plastic packaging material after plastic packaging at a high temperature. The plastic packaging material is fashionable and is not fully reacted when the plastic packaging is finished, so that the plastic packaging material needs to be completely reacted through high-temperature baking to stabilize the molecular structure of the epoxy resin, improve the hardness of a plastic packaging body and eliminate internal stress;
Step S803: after plastic packaging and post curing are completed, printing soldering flux on a solder ball pad (antioxidation treatment is carried out on a nickel-gold or copper-plated organic tin opaque film) on the back surface of the substrate, placing a tin ball, melting the tin ball through a reflow oven, forming eutectic with the solder ball pad, cooling, and fixing the solder ball on the solder ball pad on the back surface of the substrate, wherein the solder ball after the reflow is completed becomes an I/O (Input/Output) outer pin of the BGA package, so that the chip is connected with an external circuit;
Step S804: after the ball implantation is completed, the upper and lower butt joint of the two substrates is realized through the copper columns and the corresponding bonding pads, and the double-sided welded BGA package is completed.
In this embodiment, the upper and lower PCB boards are soldered as an integral schematic diagram as shown in fig. 7, and the upper and lower butt joint of the two substrates is implemented through the copper columns and the corresponding pads, so as to complete the BGA package with double-sided soldering. The double-sided BGA package provided by the invention is an improved technology based on the BGA package, realizes the double-sided BGA package, solves the problem that a signal connector is not applicable in a narrow space, provides more pins, improves the function expansibility of a chip, and improves the signal transmission speed and quality.
In this embodiment, the solder ball pad refers to a plating layer with soldering function on the back surface of the substrate in the BGA package. This layer is typically oxidation resistant treated with NiAu (nickel gold) or copper plated OSP (organotin opaque film). The solder ball pad has the functions of enhancing the welding connection, improving the heat resistance and the oxidation resistance, and forming eutectic with the solder ball so that the solder ball can be better fixed on a substrate after being heated.
The solder ball pad refers to a layer of heat-resistant material on the solder ball pad, and the special material can bear the high temperature in the welding process and form eutectic with the solder ball, so that the solder ball pad is fixed on the substrate. The solder ball pad has good heat resistance, electrical conductivity and mechanical strength, and is an important part of the soldering process.
The solder ball discussion pad refers to a state that the solder ball is fixed on the solder ball pad on the back surface of the substrate after the soldering is completed. Through the reflow soldering process, the solder ball can be fixed on the solder ball pad after being cooled after eutectic with the solder ball pad, and the solder ball plays a role in connecting a chip and an external circuit. The solder ball after the reflow is formed into an I/O external pin of the BGA package, so as to realize the connection between the chip and an external circuit.

Claims (7)

1. A BGA packaging method capable of realizing double-sided welding is characterized by comprising the following steps:
Step S1: the wafer is polished by the grinding wheel to realize thinning, and the wafer is cut to obtain independent chips;
step S2: designing a PCB layout, manufacturing a bonding pad according to the designed PCB layout, then performing chip mounting, and cleaning a substrate for fixing a chip and the surface of the chip through plasma;
Step S3: after the chip is attached and plasma cleaning is carried out, the bottom component of the PCB is welded;
step S4: after the bottom assembly of the PCB is welded, welding the top assembly of the PCB;
Step S5: after welding of the double-sided BGA component is completed, welding detection and testing are carried out;
step S6: after the welding quality is checked, performing functional test on the main board;
step S7: after the function test is finished, reserving metal pads on the upper substrate and the lower substrate which are the same in advance for welding copper columns, wherein the copper columns are used as second leads which are added in the double-sided BGA packaging process and have supporting and connecting functions;
Step S8: after the copper column is welded, packaging treatment is carried out; the plastic packaging material comprises five layers in sequence from bottom to top: the first layer of plastic packaging material is positioned on the upper side of the bottom layer of solder balls, the second layer of plastic packaging material is positioned on the lower side of the chip, the third layer of plastic packaging material is positioned on the chip layer and contains copper columns, the fourth layer of plastic packaging material is positioned on the upper side of the chip, and the fifth layer of plastic packaging material is positioned on the lower side of the upper layer of solder balls; the lower side pins of the chip are electrically connected to the bottom layer solder balls downwards through conductors in the second layer of plastic packaging material on one hand, and are electrically connected to the upper layer solder balls upwards through conductors in the second layer of plastic packaging material on the other hand;
Step S801: melting the plastic packaging material at high temperature to form a liquid smoke packaging material with lower viscosity, and injecting the liquid smoke packaging material into a die cavity to finish plastic packaging;
Step S802: curing the plastic packaging material after plastic packaging under the high-temperature condition, and curing after completion;
Step S803: after plastic packaging and post curing are completed, printing soldering flux on a solder ball pad on the back of the substrate, placing a solder ball, melting the solder ball through a reflow oven, forming eutectic with the solder ball pad, cooling, fixing the solder ball on the solder ball pad on the back of the substrate, and forming the reflowed solder ball into an I/O outer pin of the BGA package, thereby realizing connection between the chip and an external circuit;
Step S804: after the ball implantation is completed, the upper and lower butt joint of the two substrates is realized through the copper columns and the corresponding bonding pads, and the double-sided welded BGA package is completed.
2. The BGA packaging method capable of double-sided soldering according to claim 1, wherein the step S1 includes the steps of:
Step S101: the wafer thinning is realized by rotating and polishing the back of the wafer at a high speed through a grinding wheel, and in the process, water cooling and cleaning are carried out;
step S102: polishing according to the type of the product to eliminate internal stress;
step S103: after the wafer is thinned, removing the surface film of the wafer by using an adhesive tape, and performing thickness measurement and quality inspection;
step S104: the wafer is fixed on the metal ring through the blue film for cutting, so that the wafer becomes an independent chip.
3. The BGA packaging method capable of double-sided soldering according to claim 2, wherein the step S2 includes the steps of:
Step S201: performing layout design on the PCB according to the functional requirements and circuit design of the main board, wherein the layout design comprises the positions of components, pin layout, the number of bonding pads and bonding pad layout;
step S202: according to the designed PCB layout, a bonding pad is manufactured on the PCB by using an electroplating ball or welding spot material;
Step S203: after the bonding pad is manufactured, the chip is fixed on the substrate through the patch material;
Step S204: after chip mounting, cleaning a substrate for fixing a chip and the surface of the chip by utilizing plasma; plasma cleaning uses ionized argon ions, electrons and active groups to form volatile gases from contaminants on the substrate and chip surfaces, which are then pumped away by a vacuum system.
4. The BGA packaging method capable of double-sided soldering according to claim 3, wherein in the step S3, the communication chip and the power consumption management chip are soldered to the pads by aligning the pads and the pins using a soldering apparatus.
5. The BGA package method of claim 4, wherein in step S4, the processor and the memory are soldered to the upper PCB by aligning the pads and pins.
6. The BGA packaging method capable of double-sided soldering according to claim 5, wherein in step S5, the quality of soldering and whether the pads are reliably connected to the solder balls are checked by visual inspection and X-ray.
7. The BGA packaging method of claim 6, wherein the step S6 is a functional test of the motherboard, specifically including power-on test, signal transmission test and power consumption management test of the circuit.
CN202410017889.8A 2024-01-05 2024-01-05 BGA packaging method capable of realizing double-sided welding Active CN117832099B (en)

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