CN117349105A - Flash memory space detection method, device, equipment and medium - Google Patents
Flash memory space detection method, device, equipment and medium Download PDFInfo
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- G06F8/654—Updates using techniques specially adapted for alterable solid state memories, e.g. for EEPROM or flash memories
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Abstract
The embodiment of the invention discloses a flash memory space detection method, device, equipment and medium. Wherein the method comprises the following steps: reading data in a flash memory space; the flash memory space is a flash memory space corresponding to an MCU application program; processing the read data by adopting a setting algorithm to obtain a first processing result; comparing the first processing result with a pre-stored second processing result; and determining the state of the flash memory space according to the comparison result. According to the technical scheme, whether the flash memory space is damaged or not can be fully covered and checked on the basis of not increasing hardware cost, and serious consequences caused by the fact that the MCU application program runs under unpredictable conditions due to the fact that the data of the flash memory space is damaged are avoided.
Description
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method, an apparatus, a device, and a medium for detecting a flash memory space.
Background
The FLASH FLASH memory is a nonvolatile (Non-Volatile) memory, can keep data for a long time under the condition of no current supply, has the storage characteristic equivalent to a hard disk, and is suitable for a singlechip MCU to store key data information in an emergency state.
The MCU application program is stored in the MCU internal program FLASH, if the FLASH is damaged due to frequent erasing caused by bug, external electromagnetic interference and the like, the running of the MCU application program can cause unpredictable serious consequences under the condition of no inspection.
In the prior art, a chip manufacturer generally pays a fee and only a special MCU chip provides a FLASH memory FLASH space damage checking function, but the cost is increased additionally and the FLASH memory FLASH space damage checking function cannot be used universally, and in addition, the current MCU application program generally serves as a control center in a product, particularly in an automobile electronic product, with the arrival of an intelligent network-connected automobile age, the unexpected running of the MCU program can possibly bring serious consequences.
Disclosure of Invention
The invention provides a method, a device, equipment and a medium for detecting a flash memory space, which can fully cover and check whether the flash memory space is damaged on the basis of not increasing hardware cost, and avoid serious consequences caused by the fact that a Micro Control Unit (MCU) application program runs under unpredictable conditions due to the damage of data of the flash memory space.
According to an aspect of the present invention, there is provided a method for detecting a flash memory space, including:
reading data in a flash memory space; the flash memory space is a flash memory space corresponding to an MCU application program;
processing the read data by adopting a setting algorithm to obtain a first processing result;
comparing the first processing result with a pre-stored second processing result;
and determining the state of the flash memory space according to the comparison result.
Optionally, reading the data in the flash memory space includes:
and sequentially reading the data in the flash memory space according to the set data unit until the data in the flash memory space is read.
Optionally, determining the state of the flash memory space according to the comparison result includes:
if the first processing result and the second processing result are the same, the flash memory space is normal;
if the first processing result and the second processing result are different, the flash memory space is abnormal.
Optionally, before reading the data in the flash memory space, the method further includes:
upgrading the MCU application program;
reading data in the flash memory space after upgrading;
processing the read data by adopting the setting algorithm to obtain a second processing result;
and storing the second processing result into a setting space.
Optionally, storing the second processing result in a setting space includes:
erasing the setting space;
and storing the second processing result into the erased setting space.
According to another aspect of the present invention, there is provided a flash memory space detection apparatus, including:
the data reading module is used for reading the data in the flash memory space; the flash memory space is a flash memory space corresponding to an MCU application program;
the data processing module is used for processing the read data by adopting a setting algorithm to obtain a first processing result;
the result comparison module is used for comparing the first processing result with a pre-stored second processing result;
and the state determining module is used for determining the state of the flash memory space according to the comparison result.
Optionally, the data reading module is specifically configured to:
and sequentially reading the data in the flash memory space according to the set data unit until the data in the flash memory space is read.
Optionally, the state determining module is specifically configured to:
if the first processing result and the second processing result are the same, the flash memory space is normal;
if the first processing result and the second processing result are different, the flash memory space is abnormal.
According to another aspect of the present invention, there is provided an electronic apparatus including:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the method for detecting flash memory space according to any one of the embodiments of the present invention.
According to another aspect of the present invention, there is provided a computer readable storage medium storing computer instructions for causing a processor to implement the method for detecting a flash memory space according to any one of the embodiments of the present invention when executed.
According to the technical scheme, the data in the flash memory space are read; the flash memory space is a flash memory space corresponding to an MCU application program; processing the read data by adopting a setting algorithm to obtain a first processing result; comparing the first processing result with a pre-stored second processing result; and determining the state of the flash memory space according to the comparison result. According to the technical scheme, whether the flash memory space is damaged or not can be fully covered and checked on the basis of not increasing hardware cost, and serious consequences caused by the fact that the MCU application program runs under unpredictable conditions due to the fact that the data of the flash memory space is damaged are avoided.
It should be understood that the description in this section is not intended to identify key or critical features of the embodiments of the invention or to delineate the scope of the invention. Other features of the present invention will become apparent from the description that follows.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flowchart of a method for detecting a flash memory space according to a first embodiment of the present invention;
fig. 2 is a schematic structural diagram of a method and apparatus for detecting a flash memory space according to a second embodiment of the present invention;
fig. 3 is a schematic structural diagram of an electronic device according to a third embodiment of the present invention.
Detailed Description
In order that those skilled in the art will better understand the present invention, a technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in which it is apparent that the described embodiments are only some embodiments of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present invention without making any inventive effort, shall fall within the scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present invention and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that the embodiments of the invention described herein may be implemented in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The technical scheme of the embodiment can be executed by a bootstrap program, and the bootstrap is a means frequently adopted by the computer for starting input. After the computer is started, a small amount of instructions and data are input by the device, and then other programs are input by the device, and the process is called booting. The boot program in the microcomputer can guide the program and data entered by the user through the keyboard into the random access memory. In this embodiment, a bootstrap program may be used to detect a flash memory space corresponding to an application program of the MCU.
Example 1
Fig. 1 is a flowchart of a method for detecting a flash memory space according to an embodiment of the present invention, where the method may be performed by a flash memory space detection device, and the flash memory space detection device may be implemented in hardware and/or software, and the flash memory space detection device may be configured in an electronic device with data processing capability. As shown in fig. 1, the method includes:
s110, reading data in a flash memory space; the flash memory space is corresponding to the MCU application program.
The FLASH memory space is a FLASH memory space corresponding to an application program of the MCU. The micro control unit (Microcontroller Unit; MCU), also called as single chip microcomputer (Single Chip Microcomputer) or single chip microcomputer, properly reduces the frequency and specification of the CPU (Central Process Unit; CPU), and integrates peripheral interfaces such as memory (Timer), USB, A/D conversion, UART, PLC, DMA and the like, and even LCD driving circuits on a single chip to form a chip-level computer for different application occasions to perform different combination control. Such as mobile phones, PC peripherals, remote controllers, to automotive electronics, industrial stepper motors, robotic arm control, etc., can see the shadow of the MCU.
In this embodiment, when the MCU application program is reset, a boot program may be run, and the boot program may read data in the flash memory space corresponding to the MCU application program of the micro control unit.
In this embodiment, optionally, reading the data in the flash memory space includes: and sequentially reading the data in the flash memory space according to the set data unit until the data in the flash memory space is read.
The set data unit may be preset according to actual requirements, and may be 1Kbytes data unit, or may be 2Kbytes data units, and 3Kbytes data units, where the set data units such as the data units sequentially read data in the flash memory space. In this embodiment, the boot program may sequentially read the data in the flash memory space according to the data unit with 1Kbytes until the data in the flash memory space is read.
Through the arrangement, the data in the flash memory space can be read in sequence according to the set data unit, so that the data in the flash memory space can be read quickly and comprehensively.
S120, processing the read data by adopting a setting algorithm to obtain a first processing result.
The setting algorithm may be an algorithm set as needed. Specifically, the setting algorithm of the present embodiment may be an AES-128-CBC algorithm, or may be other algorithms. Illustratively, AES is a symmetric encryption algorithm, or a block symmetric encryption algorithm; is Advanced Encryption Standard advanced encryption standard, AES for short; the basic requirement of AES is to use a symmetric block cipher regime. Block cipher algorithms are typically composed of two parts, a key expansion algorithm and an encryption (decryption) algorithm. The AES encrypted data block must be 128 bits (bit) in length, and the key length may be any of 128 bits, 192 bits, 256 bits (if the data block and key length are insufficient, they are padded). Wherein the 128-bit data block, the 16byte bytes of data are a group; 192 bits, 24 bytes of data as a group; 256 bits, 32 bytes of data are a group. In the embodiment, the problem that different data are calculated by the AES-128-CBC algorithm can be completely avoided, but the calculation results are the same.
The read data may be data of the read flash memory space. The first processing result may be a calculation result obtained by calculating the read data of the flash memory space by using a setting algorithm. In this embodiment, the boot program processes the read data in the flash memory space by using a setting algorithm to obtain a first processing result.
S130, comparing the first processing result with a pre-stored second processing result.
The second processing result may be a calculation result stored in the storage space in advance. In this embodiment, the bootstrap program compares the first processing result with the pre-stored second processing result.
S140, determining the state of the flash memory space according to the comparison result.
The comparison result may be a result obtained by comparing the first processing result with a pre-stored second processing result. The state of the flash memory space may be normal or abnormal, and normal indicates that the data of the flash memory space is normal, and abnormal indicates that the data of the flash memory space is damaged.
In this embodiment, optionally, determining the state of the flash memory space according to the comparison result includes: if the first processing result and the second processing result are the same, the flash memory space is normal; if the first processing result and the second processing result are different, the flash memory space is abnormal.
In this embodiment, the first processing result and the second processing result are compared, and if the first processing result and the second processing result are the same, it indicates that the flash memory space data corresponding to the MCU application program is normal; if the first processing result is different from the second processing result, the abnormal flash space data corresponding to the MCU application program is indicated, and at this time, the flash space data may be damaged due to frequent erasing caused by bug, external electromagnetic interference and other reasons.
By the arrangement, whether the FLASH memory FLASH space data of the MCU application program are damaged or not can be fully covered and checked on the basis of not increasing hardware cost, and the method is more convenient.
According to the technical scheme, the data in the flash memory space are read; the flash memory space is a flash memory space corresponding to an MCU application program; processing the read data by adopting a setting algorithm to obtain a first processing result; comparing the first processing result with a pre-stored second processing result; and determining the state of the flash memory space according to the comparison result. According to the technical scheme, whether the flash memory space is damaged or not can be fully covered and checked on the basis of not increasing hardware cost, and serious consequences caused by the fact that the MCU application program runs under unpredictable conditions due to the fact that the data of the flash memory space is damaged are avoided.
In this embodiment, optionally, before reading the data in the flash memory space, the method further includes: upgrading the MCU application program; reading data in the flash memory space after upgrading; processing the read data by adopting the setting algorithm to obtain a second processing result; and storing the second processing result into a setting space.
The upgrade may be determined according to the actual requirement of the user. In addition, in this embodiment, there is an upgrade process before the MCU application runs the program, and the upgrade may also be performed due to actual requirements, for example, the MCU application may be upgraded when the program is changed, the bug is evaluated, and the function is modified. The second processing result may be a calculation result obtained by processing the data in the flash memory space read after the upgrade by using a setting algorithm. The setting space can be a storage space which is set according to the requirement; specifically, the setting space in this embodiment may be a 16Bytes space of the EEPROM.
In the embodiment, when the MCU application program is reset, a bootstrap program is operated, the bootstrap program can finish upgrading of the MCU application program, then the bootstrap program reads data in the flash memory space after upgrading, and a preset algorithm is adopted to process the read data, so that a second processing result is obtained; and storing the second processing result in the setting space.
Through the arrangement, when the MCU application program is upgraded, the second processing result can be timely obtained and stored in the setting space, and comparison is convenient, so that the state of the flash memory space is determined.
In this embodiment, optionally, storing the second processing result in a setting space includes: erasing the setting space; and storing the second processing result into the erased setting space.
The setting space can be a storage space which is set according to requirements; specifically, the setting space in this embodiment may be a 16Bytes space of the EEPROM. In this embodiment, the boot program may erase the 16Bytes space of the EEPROM, and store the obtained second processing result in the erased set space. In addition, in this embodiment, after the boot program stores the second processing result in the erased setting space, the MCU application program is reset.
By means of the arrangement, updated second processing results can be stored in the setting space in time.
Example two
Fig. 2 is a schematic structural diagram of a flash space detection device according to a second embodiment of the present invention. As shown in fig. 2, the apparatus includes:
a data reading module 210 for reading data in the flash memory space; the flash memory space is a flash memory space corresponding to an MCU application program;
the data processing module 220 is configured to process the read data by using a setting algorithm to obtain a first processing result;
a result comparison module 230, configured to compare the first processing result with a pre-stored second processing result;
the state determining module 240 is configured to determine a state of the flash memory space according to the comparison result.
Optionally, the data reading module 210 is specifically configured to:
and sequentially reading the data in the flash memory space according to the set data unit until the data in the flash memory space is read.
Optionally, the state determining module 240 is specifically configured to:
if the first processing result and the second processing result are the same, the flash memory space is normal;
if the first processing result and the second processing result are different, the flash memory space is abnormal.
Optionally, the apparatus further includes:
the upgrade module is used for upgrading the MCU application program before reading the data in the flash memory space;
the updated data reading module is used for reading the data in the updated flash memory space;
the second processing result acquisition module is used for processing the read data by adopting the setting algorithm to acquire a second processing result;
and the second processing data storage module is used for storing the second processing result into a setting space.
Optionally, the second processing data storage module is specifically configured to:
erasing the setting space;
and storing the second processing result into the erased setting space.
The flash memory space detection device provided by the embodiment of the invention can execute the flash memory space detection method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
Example III
Fig. 3 is a schematic structural diagram of an electronic device according to a third embodiment of the present invention. The electronic device 10 is intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. Electronic equipment may also represent various forms of mobile devices, such as personal digital processing, cellular telephones, smartphones, wearable devices (e.g., helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be exemplary only, and are not meant to limit implementations of the inventions described and/or claimed herein.
As shown in fig. 3, the electronic device 10 includes at least one processor 11, and a memory, such as a Read Only Memory (ROM) 12, a Random Access Memory (RAM) 13, etc., communicatively connected to the at least one processor 11, in which the memory stores a computer program executable by the at least one processor, and the processor 11 may perform various appropriate actions and processes according to the computer program stored in the Read Only Memory (ROM) 12 or the computer program loaded from the storage unit 18 into the Random Access Memory (RAM) 13. In the RAM 13, various programs and data required for the operation of the electronic device 10 may also be stored. The processor 11, the ROM 12 and the RAM 13 are connected to each other via a bus 14. An input/output (I/O) interface 15 is also connected to bus 14.
Various components in the electronic device 10 are connected to the I/O interface 15, including: an input unit 16 such as a keyboard, a mouse, etc.; an output unit 17 such as various types of displays, speakers, and the like; a storage unit 18 such as a magnetic disk, an optical disk, or the like; and a communication unit 19 such as a network card, modem, wireless communication transceiver, etc. The communication unit 19 allows the electronic device 10 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
The processor 11 may be a variety of general and/or special purpose processing components having processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various specialized Artificial Intelligence (AI) computing chips, various processors running machine learning model algorithms, digital Signal Processors (DSPs), and any suitable processor, controller, microcontroller, etc. The processor 11 performs the various methods and processes described above, such as the flash space detection method.
In some embodiments, the method of detecting flash memory space may be implemented as a computer program tangibly embodied on a computer-readable storage medium, such as the storage unit 18. In some embodiments, part or all of the computer program may be loaded and/or installed onto the electronic device 10 via the ROM 12 and/or the communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the flash space detection method described above may be performed. Alternatively, in other embodiments, the processor 11 may be configured to perform the method of detecting flash space in any other suitable way (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuit systems, field Programmable Gate Arrays (FPGAs), application Specific Integrated Circuits (ASICs), application Specific Standard Products (ASSPs), systems On Chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs, the one or more computer programs may be executed and/or interpreted on a programmable system including at least one programmable processor, which may be a special purpose or general-purpose programmable processor, that may receive data and instructions from, and transmit data and instructions to, a storage system, at least one input device, and at least one output device.
A computer program for carrying out methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the computer programs, when executed by the processor, cause the functions/acts specified in the flowchart and/or block diagram block or blocks to be implemented. The computer program may execute entirely on the machine, partly on the machine, as a stand-alone software package, partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of the present invention, a computer-readable storage medium may be a tangible medium that can contain, or store a computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. Alternatively, the computer readable storage medium may be a machine readable signal medium. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) through which a user can provide input to the electronic device. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user may be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic input, speech input, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a background component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such background, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), wide Area Networks (WANs), blockchain networks, and the internet.
The computing system may include clients and servers. The client and server are typically remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server can be a cloud server, also called a cloud computing server or a cloud host, and is a host product in a cloud computing service system, so that the defects of high management difficulty and weak service expansibility in the traditional physical hosts and VPS service are overcome.
It should be appreciated that various forms of the flows shown above may be used to reorder, add, or delete steps. For example, the steps described in the present invention may be performed in parallel, sequentially, or in a different order, so long as the desired results of the technical solution of the present invention are achieved, and the present invention is not limited herein.
The above embodiments do not limit the scope of the present invention. It will be apparent to those skilled in the art that various modifications, combinations, sub-combinations and alternatives are possible, depending on design requirements and other factors. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the scope of the present invention.
Claims (10)
1. A method for detecting a flash memory space, comprising:
reading data in a flash memory space; the flash memory space is a flash memory space corresponding to an MCU application program;
processing the read data by adopting a setting algorithm to obtain a first processing result;
comparing the first processing result with a pre-stored second processing result;
and determining the state of the flash memory space according to the comparison result.
2. The method of claim 1, wherein reading data in the flash space comprises:
and sequentially reading the data in the flash memory space according to the set data unit until the data in the flash memory space is read.
3. The method of claim 1, wherein determining the state of the flash space based on the comparison result comprises:
if the first processing result and the second processing result are the same, the flash memory space is normal;
if the first processing result and the second processing result are different, the flash memory space is abnormal.
4. The method of claim 1, further comprising, prior to reading the data in the flash space:
upgrading the MCU application program;
reading data in the flash memory space after upgrading;
processing the read data by adopting the setting algorithm to obtain a second processing result;
and storing the second processing result into a setting space.
5. The method of claim 4, wherein storing the second processing result in a setup space comprises:
erasing the setting space;
and storing the second processing result into the erased setting space.
6. A flash memory space detection apparatus, comprising:
the data reading module is used for reading the data in the flash memory space; the flash memory space is a flash memory space corresponding to an MCU application program;
the data processing module is used for processing the read data by adopting a setting algorithm to obtain a first processing result;
the result comparison module is used for comparing the first processing result with a pre-stored second processing result;
and the state determining module is used for determining the state of the flash memory space according to the comparison result.
7. The apparatus of claim 6, wherein the data reading module is specifically configured to:
and sequentially reading the data in the flash memory space according to the set data unit until the data in the flash memory space is read.
8. The apparatus of claim 6, wherein the status determination module is specifically configured to:
if the first processing result and the second processing result are the same, the flash memory space is normal;
if the first processing result and the second processing result are different, the flash memory space is abnormal.
9. An electronic device, the electronic device comprising:
at least one processor; and
a memory communicatively coupled to the at least one processor; wherein,
the memory stores a computer program executable by the at least one processor to enable the at least one processor to perform the method of detecting flash memory space of any one of claims 1-5.
10. A computer readable storage medium storing computer instructions for causing a processor to implement the method for detecting flash memory space of any one of claims 1-5 when executed.
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| CN202210757958.XA CN117349105A (en) | 2022-06-29 | 2022-06-29 | Flash memory space detection method, device, equipment and medium |
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