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CN117269618A - Resistance measuring method, resistance measuring circuit and wafer testing device - Google Patents

Resistance measuring method, resistance measuring circuit and wafer testing device Download PDF

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Publication number
CN117269618A
CN117269618A CN202311346825.4A CN202311346825A CN117269618A CN 117269618 A CN117269618 A CN 117269618A CN 202311346825 A CN202311346825 A CN 202311346825A CN 117269618 A CN117269618 A CN 117269618A
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CN
China
Prior art keywords
node
resistance
resistor
resistance value
shunt
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Pending
Application number
CN202311346825.4A
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Chinese (zh)
Inventor
刘倩倩
宋永梁
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GTA Semiconductor Co Ltd
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GTA Semiconductor Co Ltd
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Application filed by GTA Semiconductor Co Ltd filed Critical GTA Semiconductor Co Ltd
Priority to CN202311346825.4A priority Critical patent/CN117269618A/en
Publication of CN117269618A publication Critical patent/CN117269618A/en
Pending legal-status Critical Current

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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R27/00Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
    • G01R27/02Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
    • G01R27/08Measuring resistance by measuring both voltage and current

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Measurement Of Resistance Or Impedance (AREA)

Abstract

The application relates to a resistance measurement method, a resistance measurement circuit and a wafer test device. The resistance measurement method comprises the following steps: connecting resistance measuring circuits at two ends of the resistance to be measured; the resistance measurement circuit comprises a gating capacitor and a shunt component; the first end of the resistor to be tested is connected with the first polar plate of the gating capacitor, the second end of the resistor to be tested is connected with the first end of the shunt assembly, and the second polar plate of the gating capacitor is connected with the second end of the shunt assembly; the connection point of the second end of the resistor to be tested and the first end of the shunt component forms a first node, and the connection point of the second polar plate of the gating capacitor and the second end of the shunt component forms a second node; forming a direct current voltage drop between a first node and a second node to measure a first resistance value of the shunt assembly; forming an alternating current voltage drop between a first node and a second node to measure the parallel resistance value of the shunt component and the resistor to be measured; and according to the first resistance value and the second resistance value of the resistor to be tested, which is connected in parallel with the resistance value. The resistance measuring method can accurately measure the resistance to be measured with a tiny resistance value.

Description

Resistance measuring method, resistance measuring circuit and wafer testing device
Technical Field
The present disclosure relates to the field of semiconductor testing technologies, and in particular, to a resistance measurement method, a resistance measurement circuit, and a wafer testing device.
Background
After the wafer production is completed, a wafer acceptance test (Wafer Acceptance Test, abbreviated as WAT) is generally required to detect the process condition of each wafer product, evaluate the quality and stability in the semiconductor manufacturing process, and determine whether the wafer product meets the electrical specification requirements of the process technology platform, as a quality certificate for the delivery of the wafer product.
Important test parameters that a wafer can accept a test include the resistance value of the resistor under test in the test structure. However, the measurement accuracy is limited, and for some resistors to be measured with small resistance values, accurate measurement is often not possible.
Disclosure of Invention
Based on the above, the embodiment of the application provides a resistance measurement method, a resistance measurement circuit and a wafer test device, which can simply and effectively measure a resistor to be measured with a tiny resistance value, and the measurement result is reliable and accurate.
According to some embodiments, an aspect of the present application provides a resistance measurement method, including:
connecting resistance measuring circuits at two ends of the resistor to be measured; the resistance measurement circuit comprises a gating capacitor and a shunt component which are connected in series; the first end of the resistor to be tested is connected with the first polar plate of the gating capacitor, the second end of the resistor to be tested is connected with the first end of the shunt assembly, and the second polar plate of the gating capacitor is connected with the second end of the shunt assembly; the connection point of the second end of the resistor to be tested and the first end of the shunt component forms a first node, and the connection point of the second polar plate of the gating capacitor and the second end of the shunt component forms a second node;
forming a direct current voltage drop between the first node and the second node of the resistance measurement circuit, and measuring to obtain a first resistance value of the shunt assembly according to the direct current voltage drop;
forming an alternating current voltage drop between the first node and the second node of the resistance measurement circuit, and measuring according to the alternating current voltage drop to obtain a parallel resistance value of the shunt assembly and the resistor to be measured;
and obtaining a second resistance value of the resistor to be measured according to the first resistance value and the parallel resistance value.
In the resistance measurement method provided in the above embodiment, the resistance measurement circuit is used to measure the second resistance value of the resistance to be measured. The resistance measurement circuit comprises a gating capacitor and a shunt component which are connected in series; the first end of the resistor to be tested is connected with the first polar plate of the gating capacitor, the second end of the resistor to be tested is connected with the first end of the shunt assembly, and the second polar plate of the gating capacitor is connected with the second end of the shunt assembly. Defining a connection point of a second end of the resistor to be tested and a first end of the shunt assembly to form a first node, forming a second node by a connection point of a second polar plate of the gating capacitor and the second end of the shunt assembly, realizing a function of isolating direct current from alternating current by using the gating capacitor, and measuring a first resistance value of the shunt assembly by forming a direct current voltage drop between the first node and the second node; then, an alternating current voltage drop is formed between the first node and the second node, and the gating capacitor is conducted so that the shunt component is connected in parallel with the resistor to be measured, and therefore the parallel resistance value of the shunt component and the resistor to be measured can be measured. Therefore, the second resistance value of the resistor to be measured can be accurately obtained according to the first resistance value and the parallel resistance value, the steps are simple and effective, the implementation is easy, and the measurement result is reliable and accurate.
In some embodiments, the forming a dc voltage drop between the first node and the second node of the resistance measurement circuit, and obtaining the first resistance value of the shunt component according to the dc voltage drop measurement, includes:
applying a direct current electrical signal to the second node of the resistance measurement circuit and connecting the first node of the resistance measurement circuit to a zero potential;
and forming an alternating current voltage drop between the first node and the second node of the resistance measurement circuit, and measuring the parallel resistance value of the shunt assembly and the resistor to be measured according to the alternating current voltage drop, wherein the method comprises the following steps:
an alternating electrical signal is applied to the second node of the resistance measurement circuit and the first node of the resistance measurement circuit is connected to a zero potential.
In some embodiments, the second resistance value of the resistance to be measured is calculated from the first resistance value and the parallel resistance value based on the following formula:
R to be measured =1/(1/R-1/R Testing );
Wherein the method comprises the steps of,R To be measured For the second resistance value, R is the parallel resistance value, R Testing To test the resistance.
In some embodiments, the voltage of the direct current signal ranges from 0.1mv to 10mv.
In some embodiments, the amplitude of the ac signal ranges from 0.1mv to 10mv.
In some embodiments, the standard resistance value of the shunt component ranges from 10Ω to 100deg.Ω.
In some embodiments, the shunt assembly includes a plurality of shunt resistors serially connected in sequence.
In some embodiments, the capacitance value of the gating capacitor ranges from 1pf to 20pf.
According to some embodiments, there is also provided in another aspect of the present application a resistance measurement circuit for performing a resistance measurement method as described in the previous embodiments; the resistance measurement circuit comprises a gating capacitor and a shunt component which are connected in series;
the first polar plate of the gating capacitor is used for being connected with the first end of the resistor to be tested, and the second polar plate of the gating capacitor is connected with the second end of the shunt component;
the first end of the shunt component is used for being connected with the second end of the resistor to be tested;
the connection point of the second end of the resistor to be tested and the first end of the shunt component forms a first node, and the connection point of the second polar plate of the gating capacitor and the second end of the shunt component forms a second node.
The resistance measurement circuit provided in the foregoing embodiment may be used to perform the resistance measurement method described in the foregoing embodiment, so that the foregoing resistance measurement method may achieve technical effects, and the foregoing resistance measurement circuit may also be implemented, which will not be described in detail herein.
According to some embodiments, a further aspect of the present application further provides a wafer testing apparatus, including the resistance measurement circuit described in the above embodiments.
The wafer testing device provided in the foregoing embodiments includes the resistance measurement circuit described in the foregoing embodiments, so that the foregoing resistance measurement circuit can achieve the technical effects, and the foregoing wafer testing device can also be implemented, which will not be described in detail herein.
Drawings
In order to more clearly illustrate the technical solutions of embodiments or conventional techniques of the present application, the drawings required for the descriptions of the embodiments or conventional techniques will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person of ordinary skill in the art.
FIG. 1 is a flow chart of a method for measuring resistance according to some embodiments of the present disclosure;
FIG. 2 is a schematic diagram of a resistance measurement circuit according to some embodiments of the present disclosure;
FIG. 3 is a schematic circuit diagram of a resistance measurement circuit provided in some embodiments of the present application;
FIG. 4 is a schematic circuit diagram of a resistance measurement circuit according to further embodiments of the present application;
fig. 5 is a schematic flow chart of step S200 and step S300 in the resistance measurement method according to some embodiments of the present application.
Reference numerals illustrate:
10. a resistor to be measured; 20. a gate capacitor; 30. a shunt assembly; a. a first node; b. and a second node.
Detailed Description
In order to facilitate an understanding of the present application, a more complete description of the present application will now be provided with reference to the relevant figures. Examples of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
It will be understood that the terms "first," "second," and the like, as used herein, may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another element. For example, a first plate may be referred to as a second plate, and similarly, a second plate may be referred to as a first plate, without departing from the scope of the present application. Both the first plate and the second plate are plates, but they are not the same plate.
It is to be understood that in the following embodiments, "connected" is understood to mean "electrically connected", "communicatively connected", etc., if the connected circuits, modules, units, etc., have electrical or data transfer between them.
As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," and/or the like, specify the presence of stated features, integers, steps, operations, elements, components, or groups thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or groups thereof. Also, the term "and/or" as used in this specification includes any and all combinations of the associated listed items.
After wafer production is completed, a wafer acceptance test (Wafer Acceptance Test, WAT) is typically required to test the process of each wafer product. Important test parameters that a wafer can accept a test include the resistance value of the resistor under test in the test structure. However, the measurement accuracy is limited, and for some resistors to be measured with small resistance values, accurate measurement is often not possible.
Based on this, the present application provides, in one aspect, a resistance measurement method according to some embodiments.
Referring to fig. 1, in some embodiments, the resistance measurement method may specifically include steps S100 to S400 as follows.
S100: and connecting resistance measuring circuits at two ends of the resistor to be measured. As will be appreciated herein in connection with fig. 2, the resistance measurement circuit may include a gating capacitor 20 and a shunt assembly 30 in series. In step S100, a first end of the resistor to be measured 10 may be connected to the first plate of the gate capacitor 20, and a second end of the resistor to be measured 10 may be connected to the first end of the shunt assembly 30. In the resistance measurement circuit, a second plate of the gating capacitor 20 is connected to a second terminal of the shunt assembly 30. For convenience of description, in the embodiment of the present application, a connection point between the second end of the resistor to be measured 10 and the first end of the shunt component 30 is defined to form a first node a, and a connection point between the second plate of the gate capacitor 20 and the second end of the shunt component 30 forms a second node b.
S200: a dc voltage drop is formed between the first node a and the second node b of the resistance measurement circuit, and the first resistance value of the shunt element 30 is obtained according to the dc voltage drop measurement.
S300: an ac voltage drop is formed between the first node a and the second node b of the resistance measurement circuit, and the parallel resistance value of the shunt component 30 and the resistor 10 to be measured is obtained according to the ac voltage drop measurement.
S400: and obtaining a second resistance value of the resistor 10 to be measured according to the first resistance value and the parallel resistance value.
In the resistance measurement method provided in the above embodiment, the resistance measurement circuit is used to measure the second resistance value of the resistor 10 to be measured. The resistance measurement circuit includes a gating capacitor 20 and a shunt assembly 30 in series; the first end of the resistor to be measured 10 is connected with the first polar plate of the gating capacitor 20, the second end of the resistor to be measured 10 is connected with the first end of the shunt assembly 30 and is connected to the first node a of the resistance measurement circuit, and the second polar plate of the gating capacitor 20 is connected with the second end of the shunt assembly 30 and is connected to the second node b of the resistance measurement circuit. The gate capacitor 20 is utilized to realize the function of isolating the direct current from the alternating current, and the first resistance value of the shunt assembly 30 can be measured by forming a direct current voltage drop between the first node a and the second node b; then, by forming an ac voltage drop between the first node a and the second node b, the gate capacitor 20 is turned on to connect the shunt element 30 in parallel with the resistor 10 to be measured, so that the parallel resistance value of the shunt element 30 and the resistor 10 to be measured can be measured. Thus, the second resistance value of the resistor 10 to be measured can be accurately obtained according to the first resistance value and the parallel resistance value, the steps are simple and effective, the implementation is easy, and the measurement result is reliable and accurate. For example, even for the resistor 10 to be measured with a small second resistance value, the measurement of the resistor 10 to be measured can be effectively and accurately completed by adopting the resistance measurement method, and the steps are simple and easy to implement.
Furthermore, it will be appreciated that resistors with very small values of resistance will typically have a lower equivalent circuit frequency response, i.e. different values of resistance at different frequencies. Therefore, at high frequencies, the equivalent capacitance and equivalent inductance of the resistor may affect the measurement. However, in the resistance measurement method provided in the above embodiment, by introducing the gate capacitor 20 into the resistance measurement circuit, the frequency can be controlled during the measurement, and even for the resistor 10 to be measured with a small second resistance value, the adoption of the resistance measurement method can ensure that the measurement result is accurate and reliable within the required range.
It should be understood that, although the steps in the flowchart of fig. 1 are shown in sequence as indicated by the arrows, the steps are not necessarily performed in sequence as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least a portion of the steps in fig. 1 may include a plurality of steps or stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily sequential, but may be performed in rotation or alternatively with at least a portion of the steps or stages in other steps or other steps.
In some embodiments, step S200 forms a dc voltage drop between the first node a and the second node b of the resistance measurement circuit, and obtains the first resistance value of the shunt element 30 according to the dc voltage drop measurement, which may be specifically expressed as:
the second node b of the resistance measurement circuit is connected to zero potential and a direct current electrical signal is applied to the first node a of the resistance measurement circuit.
The voltage of the dc signal in the above steps is not particularly limited in the embodiments of the present application. For example, the voltage of the dc signal may range from 0.1mv to 10mv. For example, the voltage of the DC signal may be 0.1mV, 0.5mV, 1mV, 5mV, 10mV, or the like.
It should be noted that, in the embodiment of the present application, the first resistance value measured in step S200 should be an actual resistance value (also referred to as a true resistance value) of the shunt assembly 30.
As an example, the shunt component 30 with a larger standard resistance value may be selected, so that the actual resistance value of the shunt component 30 is ensured to be larger, and a better shunt effect can be achieved in the subsequent step S300, so that the parallel resistance value of the shunt component 30 and the resistor 10 to be measured can be accurately measured in the subsequent step S300.
It will be appreciated that the first resistance value is the actual resistance value of the shunt assembly 30, and is a result of measurement and calculation, taking into account errors in actual manufacturing and use, environmental conditions, aging, and the like. The actual resistance value of the shunt assembly 30 is measured in step S200, so that the first resistance value is more accurate. Therefore, the method is beneficial to enabling the follow-up steps according to the first resistance value to obtain more reliable and accurate measurement results, and improves the measurement accuracy of the resistance measurement method.
The standard resistance value of the shunt assembly 3 is not particularly limited in this embodiment. As an example, the standard resistance value of the shunt assembly 3 may have a range of 10Ω to 100deg.Ω. For example, the standard resistance value of the shunt assembly 3 may be 10Ω, 20Ω, 50Ω, 80Ω, 100deg.OMEGA, or the like.
In the embodiment of the present application, the shunt assembly 30 may be a resistor or may include a plurality of resistors, which is not specifically limited herein. As an example, as shown in fig. 3, the shunt assembly 30 may include a shunt resistor; alternatively, as shown in fig. 4, the shunt assembly 30 may also include a plurality of shunt resistors connected in series. When the shunt resistor is formed by connecting a plurality of shunt resistors in series, the shunt component 30 with larger resistance value is formed conveniently. Of course, in other examples, the flow diversion assembly 30 may be provided in other forms as well.
The capacitance value of the gate capacitor 20 is not particularly limited in the embodiment of the present application. As an example, the capacitance value of the gate capacitor 20 may range from 1pf to 20pf. For example, the capacitance value of the gate capacitor 20 may be 1pF, 5pF, 10pF, 15pF, 20pF, or the like.
In some embodiments, step S300 forms an ac voltage drop between the first node a and the second node b of the resistance measurement circuit, and obtains the parallel resistance value of the shunt element 30 and the resistor 10 to be measured according to the ac voltage drop measurement, which may be specifically expressed as:
the second node b of the resistance measurement circuit is connected to zero potential and an alternating electrical signal is applied to the first node a of the resistance measurement circuit.
The amplitude of the ac signal in the above steps is not particularly limited in the embodiments of the present application. For example, the amplitude of the ac signal may range from 0.1mv to 10mv. For example, the magnitude of the ac signal may be 0.1mV, 0.5mV, 1mV, 5mV, 10mV, or the like.
As an example, in step S400, the second resistance value of the resistor to be measured 10 may be obtained according to the first resistance value and the parallel resistance value, and based on the following formula:
R to be measured =1/(1/R-1/R Testing );
Wherein R is To be measured A second resistance value, R is a parallel resistance value, R Testing To test the resistance.
The step of connecting the second node b of the resistance measurement circuit to the zero potential and applying the dc signal to the first node a of the resistance measurement circuit and the step of connecting the second node b of the resistance measurement circuit to the zero potential and applying the ac signal to the first node a of the resistance measurement circuit are not limited in sequence, that is, either one of the two is executed before or simultaneously is allowed.
As shown in fig. 5, in some embodiments, the second node b of the resistance measurement circuit may be first connected to zero potential and a dc electrical signal applied to the first node a of the resistance measurement circuit; then, the second node b of the resistance measurement circuit is connected to the zero potential, and an alternating current signal is applied to the first node a of the resistance measurement circuit.
In accordance with yet another aspect of the present application, a resistance measurement circuit is provided. The resistance measurement circuit can be used to perform the resistance measurement method as provided in the foregoing embodiment, and thus the technical effects achieved by the foregoing resistance measurement method can be achieved.
With continued reference to fig. 2, in some embodiments, the resistance measurement circuit may include a gating capacitor 20 and a shunt assembly 30 in series.
The first electrode plate of the gating capacitor 20 is used for being connected with the first end of the resistor 10 to be tested, and the second electrode plate of the gating capacitor 20 is connected with the second end of the shunt assembly 30; the shunt assembly 30 has a first end for connection to a second end of the resistor 10 to be tested.
And, the first end of the shunt assembly 30 is also connected to a first node a of the resistance measurement circuit, the second plate of the gating capacitor 20 and the second end of the shunt assembly 30 are also connected to a second node b of the resistance measurement circuit.
The resistance measurement circuit provided in the above embodiment includes the gating capacitor 20 and the shunt component 30 connected in series; the first end of the resistor to be measured 10 is connected with the first polar plate of the gating capacitor 20, the second end of the resistor to be measured 10 is connected with the first end of the shunt assembly 30 and is connected to the first node a of the resistance measurement circuit, and the second polar plate of the gating capacitor 20 is connected with the second end of the shunt assembly 30 and is connected to the second node b of the resistance measurement circuit. The gate capacitor 20 is utilized to realize the function of isolating the direct current from the alternating current, and the first resistance value of the shunt assembly 30 can be measured by forming a direct current voltage drop between the first node a and the second node b; then, by forming an ac voltage drop between the first node a and the second node b, the gate capacitor 20 is turned on to connect the shunt element 30 in parallel with the resistor 10 to be measured, so that the parallel resistance value of the shunt element 30 and the resistor 10 to be measured can be measured. Thus, the second resistance value of the resistor 10 to be measured can be accurately obtained according to the first resistance value and the parallel resistance value, the steps are simple and effective, the implementation is easy, and the measurement result is reliable and accurate. For example, even for the resistor 10 to be measured with a small second resistance value, the measurement of the resistor 10 to be measured can be effectively and accurately completed by adopting the resistance measuring circuit, and the steps are simple and easy to implement.
Furthermore, it will be appreciated that resistors with very small values of resistance will typically have a lower equivalent circuit frequency response, i.e. different values of resistance at different frequencies. Therefore, at high frequencies, the equivalent capacitance and equivalent inductance of the resistor may affect the measurement. However, in the resistance measurement circuit provided in the above embodiment, by introducing the gate capacitor 20, the frequency can be controlled during the measurement, and even for the resistor 10 to be measured having a small second resistance value, the adoption of the resistance measurement circuit can ensure that the measurement result is accurate and reliable within the required range.
It should be noted that, the resistance measurement circuits in the embodiments of the present application may be used to perform the corresponding resistance measurement methods, so that technical features between the method embodiments and the circuit embodiments may be replaced and supplemented with each other without conflict, so that those skilled in the art can learn about the technical content of the present application.
Furthermore, it will be appreciated by those skilled in the art that the structure shown in FIG. 2 is merely a block diagram of some of the elements associated with the present application and does not constitute a limitation of the elements to which the present application is applied, and that a particular resistance measurement circuit may include more or fewer elements than those shown in FIG. 2, or may combine certain elements, or have a different arrangement of elements.
In accordance with yet another aspect of the present application, a wafer testing apparatus is provided. The wafer test apparatus may include the resistance measurement circuit described in the above embodiments, so that the technical effects achieved by the resistance measurement circuit described above can be achieved, and the above wafer test apparatus is also achieved, which will not be described in detail herein.
In the description of the present specification, reference to the terms "some embodiments," "other embodiments," "ideal embodiments," and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present application. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples merely represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the invention. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.

Claims (10)

1. A method of measuring resistance, comprising:
connecting resistance measuring circuits at two ends of the resistor to be measured; the resistance measurement circuit comprises a gating capacitor and a shunt component which are connected in series; the first end of the resistor to be tested is connected with the first polar plate of the gating capacitor, the second end of the resistor to be tested is connected with the first end of the shunt assembly, and the second polar plate of the gating capacitor is connected with the second end of the shunt assembly; the connection point of the second end of the resistor to be tested and the first end of the shunt component forms a first node, and the connection point of the second polar plate of the gating capacitor and the second end of the shunt component forms a second node;
forming a direct current voltage drop between the first node and the second node of the resistance measurement circuit, and measuring to obtain a first resistance value of the shunt assembly according to the direct current voltage drop;
forming an alternating current voltage drop between the first node and the second node of the resistance measurement circuit, and measuring according to the alternating current voltage drop to obtain a parallel resistance value of the shunt assembly and the resistor to be measured;
and obtaining a second resistance value of the resistor to be measured according to the first resistance value and the parallel resistance value.
2. The method of claim 1, wherein the forming a dc voltage drop between the first node and the second node of the resistance measurement circuit and measuring the first resistance of the shunt assembly according to the dc voltage drop comprises:
applying a direct current electrical signal to the second node of the resistance measurement circuit and connecting the first node of the resistance measurement circuit to a zero potential;
and forming an alternating current voltage drop between the first node and the second node of the resistance measurement circuit, and measuring the parallel resistance value of the shunt assembly and the resistor to be measured according to the alternating current voltage drop, wherein the method comprises the following steps:
an alternating electrical signal is applied to the second node of the resistance measurement circuit and the first node of the resistance measurement circuit is connected to a zero potential.
3. The resistance measurement method according to claim 1, wherein the second resistance value of the resistance to be measured is calculated based on the following formula from the first resistance value and the parallel resistance value:
R to be measured =1/(1/R-1/R Testing );
Wherein R is To be measured For the second resistance value, R is the parallel resistance value, R Testing To test the resistance.
4. The method of claim 2, wherein the voltage of the dc signal ranges from 0.1mv to 10mv.
5. The method of claim 4, wherein the amplitude of the ac signal is in a range of 0.1 v to 10mv.
6. The resistance measurement method according to claim 1, wherein the standard resistance value of the shunt assembly is in a range of 10Ω to 100deg.Ω.
7. The resistance measurement circuit of claim 1, wherein the shunt assembly comprises a plurality of shunt resistors serially connected in sequence.
8. The method of claim 1, wherein the capacitance of the gate capacitor ranges from 1pf to 20pf.
9. A resistance measurement circuit for performing the resistance measurement method according to any one of claims 1 to 8; the resistance measurement circuit comprises a gating capacitor and a shunt component which are connected in series;
the first polar plate of the gating capacitor is used for being connected with the first end of the resistor to be tested, and the second polar plate of the gating capacitor is connected with the second end of the shunt component;
the first end of the shunt component is used for being connected with the second end of the resistor to be tested;
the connection point of the second end of the resistor to be tested and the first end of the shunt component forms a first node, and the connection point of the second polar plate of the gating capacitor and the second end of the shunt component forms a second node.
10. A wafer testing apparatus comprising the resistance measurement circuit of claim 9.
CN202311346825.4A 2023-10-17 2023-10-17 Resistance measuring method, resistance measuring circuit and wafer testing device Pending CN117269618A (en)

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Application Number Priority Date Filing Date Title
CN202311346825.4A CN117269618A (en) 2023-10-17 2023-10-17 Resistance measuring method, resistance measuring circuit and wafer testing device

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Application Number Priority Date Filing Date Title
CN202311346825.4A CN117269618A (en) 2023-10-17 2023-10-17 Resistance measuring method, resistance measuring circuit and wafer testing device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117907688A (en) * 2023-12-22 2024-04-19 苏州新云医疗设备有限公司 Impedance detection circuit, impedance detection method and electronic equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117907688A (en) * 2023-12-22 2024-04-19 苏州新云医疗设备有限公司 Impedance detection circuit, impedance detection method and electronic equipment

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