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CN117093511B - Access control method, access control device, chip and electronic equipment - Google Patents

Access control method, access control device, chip and electronic equipment Download PDF

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Publication number
CN117093511B
CN117093511B CN202311135976.5A CN202311135976A CN117093511B CN 117093511 B CN117093511 B CN 117093511B CN 202311135976 A CN202311135976 A CN 202311135976A CN 117093511 B CN117093511 B CN 117093511B
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directory
fault
memory
directory entry
consistency
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CN117093511A (en
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贾琳黎
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Haiguang Yunxin Integrated Circuit Design Shanghai Co ltd
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Haiguang Yunxin Integrated Circuit Design Shanghai Co ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0811Multiuser, multiprocessor or multiprocessing cache systems with multilevel cache hierarchies
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16Error detection or correction of the data by redundancy in hardware
    • G06F11/20Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
    • G06F11/2053Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant
    • G06F11/2056Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring
    • G06F11/2064Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where persistent mass storage functionality or persistent mass storage control functionality is redundant by mirroring while ensuring consistency
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02Addressing or allocation; Relocation
    • G06F12/08Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815Cache consistency protocols
    • G06F12/0817Cache consistency protocols using directory methods
    • G06F12/0822Copy directories

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

The specification provides a memory access control method, a memory access control device, a chip and electronic equipment, wherein the memory access control method comprises the following steps: detecting a storage function of a shared memory, wherein a consistency catalog is stored in the shared memory; determining a fault directory entry in the consistency directory based on a storage function detection result of the shared memory; and generating directory fault information based on the fault directory entry, wherein the directory fault information is used for shielding a first physical storage area corresponding to the fault directory entry in the special memory and shielding a first directory entry area corresponding to the fault directory entry in the consistency directory. By adopting the scheme, the information integrity of the consistency catalogue can be ensured when the shared memory has faults, so that the accuracy of the consistency catalogue is improved.

Description

Access control method, access control device, chip and electronic equipment
Technical Field
The embodiment of the specification relates to the technical field of chips, in particular to a memory access control method, a memory access control device, a chip and electronic equipment.
Background
Currently, a processor core on a chip is coupled to a plurality of memories. The memory may be ranked according to the distance relationship between the memory and the processor core to clarify the order in which the processor checks the memory accesses. When the processor core needs to access a certain target data, a memory access request is sent to a first-level memory (namely, the memory closest to the first-level memory), if the target data is not stored in the first-level memory, the first-level memory feeds back the missing information of the request, and then the processor core sends a memory access request to the next-level memory until the target data is queried and the memory access operation is carried out.
In order to ensure the low failure rate and low latency requirements of access operations, the chip generally adopts a shared memory structure, i.e., multiple processor cores share the same memory, such as multiple processor cores share the last level of cache (LAST LEVEL CACHE, LLC). Where memory common to multiple processor cores may be referred to as shared memory, and accordingly memory used only by a single processor core may be referred to as private memory. In order to improve the memory access efficiency, after a certain processor core sends a memory access request to a shared memory and queries target data, the target data is backed up to a special memory thereof for subsequent use by the processor core in addition to performing memory access operation on the target data.
When the same data is backed up in the special memories of the processor cores, if the processor cores modify the backup of the data, the backup of the data in different special memories is inconsistent, so that the problem of data consistency is generated. For this purpose, the above problem can be solved by adopting a management manner based on directory (directory) coherence protocol, and a coherence directory is set in the shared memory for recording coherence state information (including allocation information, modification information, etc.) of the data. When a processor checks the shared memory to send out a memory access request, the content of the consistency directory record can determine whether the special memory of other processor cores needs to be checked, and if the consistency directory does not check that the target data has distribution conditions in the other processor cores, the check operation is not needed. When a backup of the target data is newly added in the dedicated memory, the shared memory also updates the consistency status information of the corresponding target data in the consistency directory.
However, due to factors such as production process deviation, a circuit fault exists in the shared memory, a circuit fault part cannot realize a storage function, if the circuit fault part is used for storing the consistency state of the consistency catalogue, the consistency state information is lost, so that the accuracy of the consistency catalogue is reduced, and the data access flow of the processor core cannot be effectively managed.
Therefore, how to avoid the information loss of the coherence directory when the shared memory fails, needs to be solved by those skilled in the art.
Disclosure of Invention
In view of this, the embodiments of the present disclosure provide a memory access control method, a memory access control device, a chip, and an electronic device, which can ensure the information integrity of a coherence directory when a shared memory fails, thereby improving the accuracy of the coherence directory.
The embodiment of the specification provides a memory access control method, which comprises the following steps:
Detecting a storage function of a shared memory, wherein a consistency catalog is stored in the shared memory;
Determining a fault directory entry in the consistency directory based on a storage function detection result of the shared memory;
And generating directory fault information based on the fault directory entry, wherein the directory fault information is used for shielding a first physical storage area corresponding to the fault directory entry in the special memory and shielding a first directory entry area corresponding to the fault directory entry in the consistency directory.
The embodiment of the specification also provides an access control method, which comprises the following steps:
Obtaining directory fault information, wherein the directory fault information is generated based on a fault directory entry of a consistency directory stored in a shared memory, and the fault directory entry is determined by a storage function detection result of the shared memory;
based on the directory fault information, controlling a special memory to mask a first physical storage area corresponding to the fault directory entry, and controlling the shared memory to mask a first directory entry area corresponding to the fault directory entry in the consistency directory.
The embodiment of the specification also provides a memory access control device, which comprises:
the detection unit is suitable for detecting the storage function of the shared memory, wherein the shared memory stores a consistency catalog;
the fault catalog item acquisition unit is suitable for determining fault catalog items in the consistency catalog according to the storage function detection result of the shared memory;
And the information generation unit is suitable for generating directory fault information according to the fault directory entry, and is used for shielding a first physical storage area corresponding to the fault directory entry in the special memory and shielding a first directory entry area corresponding to the fault directory entry in the consistency directory.
The embodiment of the specification also provides a memory access control device, which comprises:
the information acquisition module is suitable for acquiring directory fault information, wherein the directory fault information is generated based on fault directory entries of the consistency directory stored in the shared memory, and the fault directory entries are determined by a storage function detection result of the shared memory;
And the memory control module is suitable for controlling a special memory to shield a first physical storage area corresponding to the fault directory entry based on the directory fault information and controlling the shared memory to shield a first directory entry area corresponding to the fault directory entry in the consistency directory.
The embodiment of the specification also provides a chip, which comprises a shared memory, a plurality of special memories and a memory access control device, wherein:
the shared memory is suitable for storing a consistency catalog;
The access control device is suitable for detecting the storage function of the shared memory, determining a fault directory entry in the consistency directory based on the detection result of the storage function of the shared memory, generating directory fault information based on the fault directory entry, and shielding a first physical storage area corresponding to the fault directory entry in the special memory and a first directory entry area corresponding to the fault directory entry in the consistency directory.
An embodiment of the present disclosure provides an electronic device, including a chip as described in any one of the embodiments above.
By adopting the access control scheme of the embodiment of the specification, the fault directory entry in the consistency directory can be determined through the detection result of the storage function of the shared memory, and then directory fault information can be generated based on the fault directory entry, so as to be used for shielding a first physical storage area corresponding to the fault directory entry in the special memory and shielding a first directory entry area corresponding to the fault directory entry in the consistency directory. From the above, according to the storage function detection result of the shared memory, the portion of the shared memory where the storage function fails can be determined, so that a directory entry, i.e., a failed directory entry, in the coherence directory cannot be accurately recorded, and since the directory failure information is generated based on the failed directory entry, the first physical storage area corresponding to the failed directory entry in the private memory can be masked by the directory failure information, so that the backup of the target data cannot be stored in the first physical storage area, and the first directory entry area corresponding to the failed directory entry in the coherence directory can be masked, so that the first directory entry area cannot be used, and therefore, it can be ensured that the coherence state information of the target data cannot be recorded in the failed directory entry of the coherence directory, so that the backup position of the target data in the private memory and the information recording position of the coherence directory can be controlled by the target failure information, and the information integrity of the coherence directory can be ensured when the shared memory has a fault, thereby improving the accuracy of the coherence directory. In addition, the access control scheme can be realized through the logic function of the chip, and additional hardware resources are not required to be added to the chip, so that the access control scheme can be flexibly adapted to chips of various structure types.
Drawings
Fig. 1 is a flowchart of a memory access control method in an embodiment of the present disclosure.
Fig. 2 is a schematic diagram illustrating connection between a shared memory and a private memory according to an embodiment of the present disclosure.
Fig. 3 is a flowchart of a method for detecting a shared memory according to an embodiment of the present disclosure.
Fig. 4 is a flowchart of a memory access control method according to an embodiment of the present disclosure in an application scenario.
Fig. 5 is a flowchart of a memory access control method in an embodiment of the present disclosure.
Fig. 6 is a flowchart of a control procedure of backup writing of target data into a private memory in the embodiment of the present disclosure.
Fig. 7 is a schematic structural diagram of a memory access control device in an embodiment of the present disclosure.
FIG. 8 is another embodiment of the present disclosure the structure of the access control device is schematically shown.
Fig. 9 is a schematic structural diagram of a chip according to an embodiment of the present disclosure.
Detailed Description
As described above, the internal failure of the shared memory may result in information loss of the coherence directory, thereby reducing the accuracy of the coherence directory, and failing to effectively manage the data access flow of the processor core.
In view of the above problems, an embodiment of the present disclosure provides an access control scheme, which determines a faulty directory entry in the coherence directory according to a detection result of a storage function of a shared memory, and generates directory fault information based on the faulty directory entry, so as to mask a first physical storage area in a private memory corresponding to the faulty directory entry, and mask a first directory entry area in the coherence directory corresponding to the faulty directory entry. Therefore, the information integrity of the consistency catalogue can be ensured when the shared memory has faults, and the accuracy of the consistency catalogue is improved.
The following detailed description is presented to enable one skilled in the art to more clearly understand and to practice the concepts, implementations and advantages of the embodiments of the present disclosure.
Referring to fig. 1, in an embodiment of the present disclosure, a flow chart of a memory access control method may include the following steps:
S11, detecting the storage function of the shared memory, wherein the shared memory stores a consistency catalog.
In a specific implementation, under the condition of ensuring that the storage function of the physical storage area where the consistency directory is located can be detected, the specific detection range of the shared memory can be determined according to specific requirements, for example, in order to more comprehensively understand the storage function condition of the shared memory, global detection can be performed on all the physical storage areas including the consistency directory stored in the shared memory; for example, to improve the detection efficiency, only the physical storage area in which the coherence directory is located in the shared memory may be locally detected. The specific detection range of the shared memory is not particularly limited in the embodiment of the present specification, as long as the purpose of subsequently determining the fault directory entry can be achieved.
S12, determining a fault directory entry in the consistency directory based on a storage function detection result of the shared memory.
In a specific implementation, a fault part of the storage function failure in the shared memory can be determined according to the storage function detection result of the shared memory, so that a directory entry, namely a fault directory entry, in which the consistency status information cannot be accurately recorded in the consistency directory can be determined based on the storage function detection result of the shared memory.
S13, generating directory fault information based on the fault directory entry, wherein the directory fault information is used for shielding a first physical storage area corresponding to the fault directory entry in the special memory and shielding a first directory entry area corresponding to the fault directory entry in the consistency directory.
In a specific implementation, since the directory fault information is generated based on the fault directory entry, the first physical storage area corresponding to the fault directory entry in the dedicated memory can be shielded by the directory fault information, so that the backup of the target data cannot be stored in the first physical storage area, and the first directory entry area corresponding to the fault directory entry in the consistency directory can be shielded, so that the first directory entry area cannot be used, and further, it can be ensured that the consistency status information of the target data cannot be recorded in the fault directory entry of the consistency directory.
For example, referring to fig. 2, a schematic diagram of connection between a shared memory and a private memory in the embodiment of the present disclosure is shown, and referring to fig. 1 and 2 in combination, a coherence directory D1 is stored in the shared memory M1, where the coherence directory includes m×n directory entries, where M is a positive integer greater than 1, and n is a positive integer. According to the storage function detection result of the shared memory M1, it is determined that the directory entry c1 cannot accurately record the consistency state information, that is, the directory entry c1 is a failed directory entry, the first physical storage area Q1 corresponding to the failed directory entry c1 in the dedicated memory M1 can be masked based on the directory failure information generated by the failed directory entry c1, so that the backup of the target data cannot be stored in the first physical storage area Q1, and the first directory entry area P1 corresponding to the failed directory entry c1 in the consistency directory D1 is also masked, and the first directory entry area P1 cannot be used, and since the failed directory entry c1 is included in the first directory entry area P1, it is ensured that the consistency state information of the target data cannot be recorded in the failed directory entry c1 of the consistency directory.
It will be appreciated that the above examples are illustrative only, and in practice, there may be one or more faulty directory entries based on the detection result of the storage function of the shared memory, and accordingly, the first physical storage area may correspond to one or more faulty directory entries, and the first directory entry area may also correspond to one
Or a plurality of fault directory entries.
Therefore, the backup position of the target data in the special memory and the information recording position in the consistency directory can be controlled by utilizing the target fault information, and the information integrity of the consistency directory can be ensured when the shared memory has faults, so that the accuracy of the consistency directory is improved.
In addition, the access control scheme can be realized through the logic function of the chip, and additional hardware resources are not required to be added to the chip, so that the access control scheme can be flexibly adapted to chips of various structure types.
In a specific implementation, in order to ensure the accuracy and reliability of the directory fault information, the storage function of the shared memory may be detected again to check the accuracy of the directory fault information. Further, in order to increase the detection speed, when the storage function detection is performed on the shared memory again, the physical storage area where the first directory entry area is located in the shared memory may be skipped.
In an alternative example, with continued reference to fig. 1, the access control method may further include:
S14, detecting a storage function of a second physical storage area of the shared memory, wherein the second physical storage area is: and the physical storage area where the second directory entry area of the first directory entry area is not included in the consistency directory.
In a specific implementation, referring to fig. 2 in combination, the second directory entry area may be a directory entry area in the coherence directory D1 except for the first directory entry area P1, that is, a directory entry area corresponding to the group numbers Way01, way03 to Way0 m. Therefore, the physical storage area of the second physical storage area of the shared memory is detected, and the physical storage area where the first directory entry area P1 is located can be skipped, so that the detection speed is increased.
And S15, if the storage function detection result of the second physical storage area is not matched with the directory fault information, updating the directory fault information based on the storage function detection result of the second physical storage area.
Specifically, since the second physical storage area does not include the physical storage area corresponding to the first directory entry area, the storage function detection result of the second physical storage area theoretically does not have a fault directory entry, if the detection result of the second physical storage area indicates that a fault directory entry exists in the second directory entry area of the consistency directory, the directory fault information generated before is inaccurate, or a new circuit fault exists in the shared memory, so that the directory fault information can be updated based on the storage function detection result of the second physical storage area, so as to improve the accuracy and reliability of the directory fault information; and if the storage function detection result of the second physical storage area indicates that no fault directory entry exists in the second directory entry area of the consistency directory, the directory fault information generated before is accurately and reliably described.
Therefore, the accuracy and the reliability of directory fault information can be ensured, and the detection efficiency is improved by reasonably reducing the range of the physical storage area to be detected in the shared memory.
In a specific implementation, if the first directory entry area covers the coherence directory, the coherence directory is blocked from recording the coherence state information, that is, the coherence directory fails, and at this time, a prompt message may be set to prompt when the coherence directory fails.
In an alternative example, with continued reference to fig. 1, the access control method may further include: s16, after the fact that the first directory entry area covers the consistency directory is determined, directory failure prompt information is generated. Therefore, the chip and/or a user can be reminded of the directory failure prompt information, and the consistency directory can not record the consistency state information.
In specific implementation, a mapping relationship can exist between the consistency directory and the special memory, so that the consistency directory can track the data consistency state of the special memory, and because of the mapping relationship between the consistency directory and the special memory, according to the generated directory fault information, a first physical storage area corresponding to the fault directory entry in the special memory can be accurately shielded, and according to the first physical storage area, a first directory entry area corresponding to the fault directory entry in the consistency directory can be accurately shielded.
In particular embodiments, the coherence directory and the private memory may be partitioned in the same or similar manner to facilitate mapping.
For example, the coherence directory may be divided into a plurality of directory entries by index numbers and groups, and the private memory may be divided into a plurality of memory blocks by index numbers and groups. Thus, the coherence directory and the private memory can establish a mapping relationship based on index and group.
It should be noted that, since the coherence directory and the dedicated memory are both divided based on indexes and groups, there are index numbers and group numbers in the coherence directory, and there are index numbers and group numbers in the dedicated memory, for convenience of description and distinction, the index numbers and the group numbers in the coherence directory may be referred to as directory index numbers and directory group numbers, and the index numbers and the group numbers in the dedicated memory may be referred to as dedicated memory index numbers and dedicated memory group numbers.
Specifically, based on the directory index number, the directory group number, the special memory index number and the special memory group number, the directory entry in the coherence directory can be associated with the memory block in the special memory, so that a mapping relationship between the coherence directory and the special memory is established, and the coherence directory can conveniently track the data coherence state of the special memory.
After the backup of the target data is written in the storage block, the corresponding directory index number and directory group number in the consistency directory can be determined based on the special memory index number and the special memory group number of the storage block through the mapping relation between the consistency directory and the special memory, so that the directory entry associated with the storage block is determined, and then the consistency state information of the target data can be recorded in the directory entry.
To facilitate understanding of the mapping relationship between the coherence directory and the private memory, the following is taken in conjunction with the accompanying drawings
The rows are schematically illustrated.
In an alternative example, referring to FIG. 2, the coherence directory D1 is partitioned based on index and group. The directory Index numbers and directory group numbers are numbered in a specified order (this example is numbering in a left-to-right order based on the view of fig. 2), resulting in a plurality of directory Index numbers (e.g., index01, index02, to Index0n in fig. 2), and at least one directory group number (e.g., way01, way02, way03, to Way0m in fig. 2).
In the physical storage area of the private memory M2, division is performed based on the Index and the group to obtain m×n storage blocks, the private memory Index numbers and the private memory group numbers are numbered in a specified order to obtain a plurality of private memory Index numbers (e.g., index11, index12 to Index1n in fig. 2), and at least one private memory group number (e.g., way11, way12, way13 to Way1M in fig. 2) is obtained.
The mapping relationship between the coherence directory D1 and the private memory M2 may be established based on the directory Index number, the directory group number, the private memory Index number, and the private memory group number, for example, as in fig. 2, the directory entry a1 of the directory Index number Index01 and the directory group number Way01 corresponds to the memory block b1 of the private memory Index number Index11 and the private memory group number Way11, and after the backup of the target data is written in the memory block b1, the corresponding directory Index number Index01 and the directory group number Way01 in the coherence directory may be determined based on the private memory Index number Index11 and the private memory group number Way11 of the memory block b1 by the mapping relationship between the coherence directory and the private memory, so that the directory entry a1 associated with the memory block b1 may be determined, and then the coherence state information of the target data may be recorded in the directory entry a 1. It is to be understood that the mapping relationship between the rest of the directory entries in the coherence directory D1 and the rest of the memory blocks in the private memory M2 can be similar, and will not be described herein. Thus, the coherence directory D1 can track the data coherence state of the private memory M2.
It will be appreciated that the foregoing examples are merely illustrative, and in practical applications, the directory entries of the coherence directory may be in one-to-one correspondence with the storage blocks in the private memory, or may be one-to-many, or many-to-one, according to specific situations and requirements, which is not specifically limited in the embodiments of the present disclosure. In addition, the coherence directory can establish a mapping relationship with one or more private memories. The embodiment of the present specification does not particularly limit the number of dedicated memories that establish a mapping relationship with the coherence directory.
In implementations, several bits of a specified location may be selected from a target physical address of target data to represent a directory index number and a private memory index number in order for a coherence directory to track the coherence state of the target data in the private memory.
In a specific implementation, after the mapping relationship between the coherence directory and the private memory is established based on the index and the group, there is a correlation between the directory group number and the private memory group number, so that the correspondence between the directory entry of the coherence directory and the physical storage area of the private memory and the correspondence between the physical storage area and the first directory entry area can be determined through the directory group number and the private memory group number, and based on this, directory fault information can be generated according to the order of the directory group number of the fault directory entry in the directory group number sequence of the coherence directory, so that the correlation between the directory group number of the fault directory entry and the private memory group number, which are characterized by the directory fault information, can be determined.
For example, referring to fig. 2, the directory group number sequence of the coherence directory D1 is { Way01Way02 … … Way0m }, the order of the directory group number Way02 of the fault directory entry c1 in the directory group number sequence is the second bit, and then directory fault information "010 … …" may be generated, where the directory fault information has m bits in total, the value of the i-th bit represents whether there is a fault directory entry in the directory entry area corresponding to the i-th directory group number in the directory group number sequence of the coherence directory, i is greater than or equal to 1 and less than or equal to m, the value "0" represents that there is no fault directory entry in the directory entry area corresponding to the directory group number, and the value "1" represents that there is a fault directory entry in the directory entry area corresponding to the directory group number.
By the existence of the correlation between the directory failure information "010 … … 0" and the directory group number and the dedicated memory group number, the first physical storage area Q1 (i.e., the physical storage area corresponding to the dedicated memory group number Way 12) corresponding to the directory group number Way02 of the failed directory entry in the dedicated memory M1 can be determined, and therefore, by shielding the first physical storage area Q1, the backup of the target data can be prevented from being stored in the first physical storage area Q1, and based on the existence of the correlation between the directory group number and the dedicated memory group number, after the first physical storage area Q1 is shielded, the first directory entry area P1 corresponding to the directory group number Way02 in the coherence directory D1 is also shielded, the coherence state information of the target data is not recorded in the first directory entry area P1, and the failed directory entry c1 is included in the first directory entry area P1, and further, it can be ensured that the coherence state information of the target data is not recorded in the failed directory entry c1 of the coherence directory.
In practical applications, the storage function of the memory is implemented by a plurality of storage bits arranged in an array form, one storage bit is used for storing a value of one bit (bit), and if the storage bit and related circuits thereof have faults, the storage bit cannot accurately store the value of the bit, so that the storage function is lost.
It should be noted that, for ease of understanding and distinction, the storage bits of the shared memory may be referred to as shared storage bits. If the shared memory bit that loses memory function is used to store a bit value of coherency state information for a coherency directory, the coherency state information may be inaccurate. Therefore, at least the storage bit of the consistency state information for storing the consistency directory in the shared memory is detected, so that whether the shared storage bit (namely, the first fault storage bit) with invalid storage function exists in the shared memory is judged, and whether the fault directory entry exists in the consistency directory is judged.
In a specific implementation, a specific detection manner of the bits stored in the shared memory may be determined according to specific situations and requirements. In the case where the storage function failure portion in the shared memory can be determined, and the purpose of detecting the storage function of the shared memory is achieved, the detection manner of the shared memory is not particularly limited in the embodiments of the present specification.
In an alternative example, when the chip has a Self-Test function, such as a built-In Self-Test (BIST) Test function, the Self-Test function of the chip may be used to Test the storage bits In the shared memory to obtain the first faulty storage bit, and when the first faulty storage bit is used to store a bit value of the coherency state information, the fault directory entry may be determined according to the directory entry corresponding to the first faulty storage bit In the coherency directory. Further, the built-in self-test may be a built-in self-test based on hardware or a built-in self-test based on software, which is not limited in the embodiment of the present disclosure.
In another alternative example, as shown in fig. 3, which is a flowchart of a method for detecting a shared memory in an embodiment of the present disclosure, the shared memory may be detected by:
S21, writing test data into the shared memory.
According to the actual requirements and the array arrangement condition of the shared storage bits in the shared memory, the test data can be written into the shared memory in the modes of rows, columns, blocks and the like, and the specification is not particularly limited.
S22, after the writing operation of the test data is completed, the data stored in the shared memory is read, and the stored data is obtained.
And reading the data stored in the corresponding position in the shared memory according to the mode of writing the test data into the shared memory. For example, when test data is written into the shared memory in a row manner, the data stored in the corresponding row in the shared memory is read.
S23, based on the test data, identifying the shared storage bit corresponding to the bit with the numerical error in the storage data, and obtaining the first fault storage bit for determining the fault directory entry in the consistency directory.
In a specific implementation, when the first failure storage bit is used to store a bit value of the coherency state information, then the failure directory entry may be determined according to a directory entry corresponding to the first failure storage bit in the coherency directory. For example, referring to fig. 2 in combination, based on the test data and the storage data, it is determined that the shared storage bit corresponding to the bit with the data error in the storage data is D1, then the first faulty storage bit D1 may be obtained, and then, according to the directory entry c1 corresponding to the first faulty storage bit D1 in the coherence directory D1, it may be determined that the faulty directory entry in the coherence directory is c1.
In a specific implementation, after the first fault storage bit is obtained, according to the corresponding relation between each directory entry and the shared storage bit, the fault directory entry corresponding to the first fault storage bit can be directly determined. However, this tends to result in the first directory entry area being too large in extent, increasing the probability that the coherence directory will not be usable. Therefore, when the shared memory bit fails, whether the repair operation can be executed on the first failure shared memory bit is judged according to a certain replacement rule, if the redundant memory bit can replace the first failure memory bit to carry out the numerical value storage of the bit, the first failure memory bit which can be replaced by the redundant memory bit cannot cause the information loss of the consistency directory, and the directory entry corresponding to the first failure memory bit is not required to be determined as the failure directory entry. The redundant memory bits may be distributed in the shared memory according to columns and/or rows, or a register in the shared memory may be used as the redundant memory bit, which is not specifically limited in the embodiment of the present disclosure.
However, since the capacity of the shared memory is limited, the number of redundant memory bits is limited, and all of the failed shared memory cells may not be replaced, there are failed shared memory cells that cannot be replaced by the redundant memory bits.
Based on the above, after the first fault storage bit is obtained, the information integrity of the consistency directory can be ensured by determining the fault directory entry corresponding to the first fault storage bit which cannot be replaced by the redundant storage bit, and the number of the fault directory entries can be effectively reduced, so that the area range of the first directory entry is reduced, and the probability that the consistency directory cannot be used is reduced.
Specifically, after the first failed storage bit is obtained, the method for detecting the shared memory may further include: and identifying the first fault storage bit which cannot be replaced by the redundant storage bit configured in the shared memory, and obtaining the second fault storage bit. Accordingly, when determining the fault directory entry in the coherence directory based on the detection result of the shared memory, the directory entry corresponding to the second fault storage bit in the coherence directory may be identified, so as to obtain the fault directory entry.
In a specific implementation, to ensure that the chip can accurately replace at least part of the first failure storage bits after the detection of the shared memory, after obtaining the first failure storage bits, the method for detecting the shared memory may further include: and identifying the first fault storage bit which can be replaced by the redundant storage bit, and obtaining a third fault storage bit. Correspondingly, the access control method can further comprise the following steps: and generating storage repair information of the shared memory based on a detection result of the shared memory for indicating a repair operation performed on the third failed storage bit by using a redundant storage bit, wherein the storage repair information is generated based on a replacement relationship between the redundant storage bit and the third failed storage bit. Therefore, the chip can be accurately guided to replace at least part of the first fault storage bits (namely the third fault storage bits) with the redundant storage bits through storing the repair information.
In specific implementation, the application scenario of the access control method described in the foregoing embodiment may be set according to specific requirements, for example, the access control method described in the foregoing embodiment may be used when the chip is powered on and self-detected, or the access control method described in the foregoing embodiment may be used when the chip is debugged. And, after the generated directory fault information and the storage repair information (if the storage repair information exists), the directory fault information and the storage repair information can be written into a designated memory, such as One-Time Programmable (OTP), for subsequent use of the chip.
In order to facilitate understanding and implementation, the following detailed description is provided for the scheme of the present specification through a specific application scenario.
In an alternative example, as shown in fig. 4, a flowchart of a memory access control method according to an embodiment of the present disclosure is used in an application scenario. In this example, the access control method described in the embodiments of the present disclosure is adopted in on-chip power-on self-detection. Specifically, the access control method may include:
s301, the chip is electrified to start a self-detection program, and the directory fault information defect_way is initialized.
The directory fault information defect_way comprises x bits, x is a positive integer greater than 1, the value of the jth bit represents whether a fault directory entry exists in a directory entry area corresponding to the jth directory group number, j is greater than or equal to 1 and less than or equal to x, a value of 0 indicates that no fault directory entry exists in the directory entry area corresponding to the directory group number, and a value of 1 indicates that a fault directory entry exists in the directory entry area corresponding to the directory group number. The initialized directory fault information defect_way is "00 … … 0".
S302, detecting the storage function of the shared memory based on the directory fault information.
In step S302, the directory fault information defect_way is initialized, wherein the value of each bit is "0", so that the physical storage area where the coherence directory is located is detected when the shared memory is detected.
When the step S302 is skipped from the subsequent step S308, the directory fault information defect_way is updated, and when the shared memory is detected, according to the group number corresponding to the bit with the value of "1" in the directory fault information defect_way, the physical storage area (i.e. the first physical storage area) where the directory entry area of the group number is located in the consistency directory is skipped, and the physical storage areas (i.e. the second physical storage areas) where the directory entry areas of the remaining group numbers are located in the consistency directory are detected.
S303, judging whether the first fault storage bit exists in the consistency directory, if not, executing a step S304, otherwise, executing a step S305.
Specifically, if the detection result of the shared memory is that the first fault storage bit exists, it is indicated that a fault directory entry exists in the consistency directory, otherwise, it is indicated that no fault directory entry exists in the consistency directory.
S304, the directory fault information defect_way is written into the one-time programmable memory.
S305, performing repair prediction operation on the first fault storage bit.
S306, judging whether the redundant storage bit configured in the shared memory can replace the first fault storage bit, if so, executing step S307 by using the first fault storage bit as a third fault storage bit, otherwise, executing step S308 by using the first fault storage bit as a second fault storage bit.
S307, based on the replacement relation between the redundant storage bit and the third fault storage bit, storage repair information is generated and written into the one-time programmable memory.
S308, identifying a corresponding directory entry of the second fault storage bit in the consistency directory to obtain the fault directory entry, and updating directory fault information defect_way based on the directory group number of the fault directory entry.
Specifically, a bit position "1" corresponding to the directory group number of the failed directory entry in the directory failure information defect_way is set.
S309, judging whether each bit in the directory fault information defect_way is 1, if yes, executing step S310, otherwise, executing step S302.
S310, generating directory failure prompt information.
The embodiment of the specification also provides another access control scheme, which controls the special memory to shield a first physical storage area corresponding to the fault directory entry through the acquired directory fault information, and controls the shared memory to shield a first directory entry area corresponding to the fault directory entry in the consistent directory, wherein the directory fault information is generated based on the fault directory entry of the consistent directory stored in the shared memory, and the fault directory entry is determined by a storage function detection result of the shared memory. Therefore, the information integrity of the consistency catalogue can be ensured when the shared memory has faults, and the accuracy of the consistency catalogue is improved.
The following detailed description is presented to enable one skilled in the art to more clearly understand and to practice the concepts, implementations and advantages of the embodiments of the present disclosure.
Referring to fig. 5, in an embodiment of the present disclosure, a flowchart of a memory access control method may include the following steps:
s41, acquiring directory fault information, wherein the directory fault information is generated based on fault directory entries of the consistency directory stored in the shared memory, and the fault directory entries are determined by a storage function detection result of the shared memory.
It should be noted that, the process of obtaining the directory fault information may refer to the description of the related parts, which is not repeated herein.
S42, based on the directory fault information, controlling the special memory to shield a first physical storage area corresponding to the fault directory entry, and controlling the shared memory to shield a first directory entry area corresponding to the fault directory entry in the consistency directory.
For example, referring to fig. 2 in combination, based on the acquired directory fault information, the private memory is controlled to mask the first physical storage area Q1 corresponding to the fault directory entry c1, and the shared memory M1 is controlled to mask the first directory entry area P1 corresponding to the fault directory entry c1 in the coherence directory D1.
The process of determining the first physical storage area and the first directory entry area corresponding to the fault directory entry may refer to the description of the related parts, which is not described herein.
From the above, through the directory fault information, the first physical storage area corresponding to the fault directory entry in the dedicated memory can be masked, so that the backup of the target data cannot be stored in the first physical storage area, and the first directory entry area corresponding to the fault directory entry in the coherence directory can be masked, so that the first directory entry area cannot be used, thereby ensuring that the coherence state information of the target data cannot be recorded in the fault directory entry of the coherence directory. Therefore, the backup position of the target data in the special memory and the information recording position in the consistency directory can be controlled by utilizing the target fault information, and the information integrity of the consistency directory is ensured when the shared memory has faults, so that the accuracy of the consistency directory is improved.
In addition, the access control scheme can be realized through the logic function of the chip, and additional hardware resources are not required to be added to the chip, so that the access control scheme can be flexibly adapted to chips of various structure types.
In a specific implementation, the directory fault information is mainly used for controlling the process of backup writing of target data into the special memory. Specifically, referring to fig. 6 in combination, when controlling the dedicated memory to mask a first physical storage area corresponding to the failed directory entry based on the directory failure information, and controlling the shared memory to mask a first directory entry area corresponding to the failed directory entry in the coherence directory, the method may include the steps of:
S51, responding to a write operation request, and acquiring the backup of the target data through the shared memory after determining that the backup of the target data indicated by the write operation request does not exist in the special memory.
Wherein the write operation request may be sent by a processor core connected to a dedicated memory.
And S52, controlling the special memory to write the backup of the target data into a third physical storage area based on the directory fault information, wherein the third physical storage area is a physical storage area which does not correspond to the fault directory entry in the special memory.
And S53, based on the writing result of the target data in the third physical storage area, controlling a second directory entry area in the consistency directory of the shared memory to update the consistency state information of the target data, wherein the second directory entry area is a directory entry area which does not correspond to the fault directory entry in the consistency directory.
In this way, when the backup of the target data is written into the dedicated memory, the first physical storage area corresponding to the fault directory entry in the dedicated memory can be masked by the directory fault information, so that the backup of the target data cannot be stored in the first physical storage area, but is stored in a physical storage area (namely, a third physical storage area) other than the first physical storage area, and the first directory entry area corresponding to the fault directory entry in the consistency directory is masked by the control shared memory, but is stored in the directory entry area (namely, a second directory entry area) other than the first directory entry area, so that the consistency state information of the target data cannot be recorded in the fault directory entry.
In a specific implementation, after a mapping relationship is established between the coherence directory and the dedicated memory, after the backup of the target data is written into the memory block, a directory entry associated with the memory block may be determined according to the mapping relationship between the coherence directory and the dedicated memory, and then coherence state information of the target data may be recorded in the directory entry.
For example, referring to fig. 2 in combination, after controlling the dedicated memory M2 to write the backup of the target data into the storage block b1 of the third physical storage area based on the acquired directory failure information, according to the mapping relationship between the coherence directory D1 and the dedicated memory M2, it is determined that the directory entry associated with the storage block b1 in the coherence directory D1 is the directory entry a1, so as to control the shared memory M1 to record the coherence state information of the target data in the directory entry a 1.
In a specific implementation, the capacity of the private memory is generally smaller than that of the shared memory, and when the capacity of the private memory is saturated, a new backup of target data needs to be written after a storage block is selected and the backup in the storage block is rewritten into the shared memory, and the operation of selecting the storage block and rewriting the backup in the storage block into the shared memory may be referred to as a write-back operation. Based on this, before writing the backup of the target data to the third physical storage area of the dedicated memory, the access control method may further include: based on the storage state of the private memory, it is determined whether to perform a write-back operation. The storage state of the dedicated memory may specifically be a saturated state and an unsaturated state, when the storage state of the dedicated memory is the saturated state, it is determined that the write-back operation is executed, and when the storage state of the dedicated memory is the unsaturated state, it is determined that the write-back operation is not executed.
Further, after determining to execute the write-back operation, based on the directory fault information, a first physical storage area in the private memory may be masked, a first storage block for executing the write-back operation may be selected from the third physical storage area, and after the write-back operation is completed, a backup of the target data indicated by the write operation request may be written into the first storage block. Therefore, the first physical storage area can be shielded when the first storage block for executing the write-back operation is selected, so that the backup of the target data to be written is not stored in the first physical storage area, the first directory entry area corresponding to the fault directory entry in the consistency directory is also shielded, the consistency state information of the target data to be written is not stored in the first directory entry area, and accordingly it can be ensured that the consistency state information of the target data to be written is not recorded in the fault directory entry.
In implementations, the first memory block may be determined in combination with directory fault information and a replacement algorithm. Specifically, after determining to perform the write-back operation, a replacement algorithm may be employed to select the first memory block from the third physical memory area based on the directory failure information.
The specific type of the replacement algorithm can be determined according to specific situations and requirements. For example, the replacement algorithm may include at least one of: least recently Used (LEAST RECENTLY Used, LRU) algorithm; the most recently used algorithm (Mostly Recently Used, MRU); a Random (Random) algorithm; a pseudo-random (Pseudorandom) algorithm; re-referencing interval Prediction algorithm (Re-REFERENCE INTERVAL Prediction, RRIP); static Re-reference interval Prediction algorithm (Static Re-REFERENCE INTERVAL Prediction, SRRIP); dynamic re-referencing interval prediction algorithms (DYNAMIC RE-REFERENCE INTERVAL Policy, DRRIP); bimodal re-referencing interval prediction algorithm (Bimodal Re-REFERENCE INTERVAL Policy, BRRIP).
In a specific implementation, an application scenario of the access control method described in the foregoing embodiment may be set according to specific requirements, for example, the access control method described in the foregoing embodiment may be adopted after the chip starts up to work. In addition, the timing of acquiring the directory fault information and the storage repair information (if the storage repair information exists) may be set, for example, the directory fault information and the storage repair information (if the storage repair information exists) may be written from a designated memory (such as a one-time programmable memory) into a memory (such as a random access memory) of a related device (such as a memory access control device) when the chip starts up, and the directory fault information is loaded into a register of the related device during the process of the chip performing the initialization operation, and if the storage repair information exists, the repair operation is performed based on the indication of the storage repair information.
The present disclosure further provides an access control device corresponding to the access control method, and the detailed description is provided by specific embodiments with reference to the accompanying drawings. It should be noted that the access control apparatus described below may be regarded as a functional module that is required to be set for implementing the access control method provided in the present specification; the contents of the access control apparatus described below may be referred to in correspondence with the contents of the access control method described above.
An embodiment of the present disclosure provides a memory access control device, referring to fig. 7, which is a schematic structural diagram of a memory access control device in the embodiment of the present disclosure, where the memory access control device Z1 may include:
A detection unit Z11 adapted to perform a storage function detection (not shown in the figure) on a shared memory in which a coherence directory is stored;
A fault directory entry obtaining unit Z12, adapted to determine a fault directory entry in the coherence directory according to a storage function detection result of the shared memory;
the information generating unit Z13 is adapted to generate directory fault information according to the fault directory entry, for masking a first physical storage area in the private memory corresponding to the fault directory entry, and for masking a first directory entry area in the coherence directory corresponding to the fault directory entry.
It should be noted that, the specific process of detecting the storage function of the shared memory by the detecting unit Z11, the specific process of determining the fault directory entry by the fault directory entry obtaining unit Z12, and the specific process of generating the directory fault information by the information generating unit Z13 may refer to the description of the relevant parts, and will not be repeated herein.
From the above, according to the storage function detection result of the shared memory, the portion of the shared memory where the storage function fails can be determined, so that a directory entry, i.e., a failed directory entry, in the coherence directory cannot be accurately recorded, and since the directory failure information is generated based on the failed directory entry, the first physical storage area corresponding to the failed directory entry in the private memory can be masked by the directory failure information, so that the backup of the target data cannot be stored in the first physical storage area, and the first directory entry area corresponding to the failed directory entry in the coherence directory can be masked, so that the first directory entry area cannot be used, and therefore, it can be ensured that the coherence state information of the target data cannot be recorded in the failed directory entry of the coherence directory, so that the backup position of the target data in the private memory and the information recording position of the coherence directory can be controlled by the target failure information, and the information integrity of the coherence directory can be ensured when the shared memory has a fault, thereby improving the accuracy of the coherence directory.
In addition, the access control scheme can be realized through the logic function of the chip, and additional hardware resources are not required to be added to the chip, so that the access control scheme can be flexibly adapted to chips of various structure types.
In a specific implementation, with continued reference to fig. 7, the detecting unit Z11 is further adapted to perform a storage function detection on a second physical storage area of the shared memory, where the second physical storage area may be: the consistency directory does not contain a physical storage area corresponding to a second directory entry area of the first directory entry area; the information generating unit Z13 is further adapted to update the directory failure information based on the storage function detection result of the second physical storage area after the storage function detection result of the second physical storage area is not matched with the directory failure information.
It should be noted that, the specific process of detecting the storage function of the second physical storage area of the shared memory by the fault directory entry obtaining unit Z12 and the specific process of updating the directory fault information by the information generating unit Z13 may refer to the description of the related parts, and will not be repeated herein.
In a specific implementation, with continued reference to fig. 7, the information generating unit Z13 is further adapted to generate a directory invalidation hint information after determining that the first directory entry area covers the coherence directory. It should be noted that, the specific process of generating the directory failure prompt information by the information generating unit Z13 may refer to the description of the related parts, which is not described herein.
In a specific implementation, with continued reference to fig. 7, the detecting unit Z11 is adapted to write test data into the shared memory, and after completing a write operation of the test data, read data stored in the shared memory to obtain stored data, and identify, based on the test data, a shared storage bit corresponding to a bit with a numerical error in the stored data, to obtain the first failure storage bit, so as to determine a failure directory entry in the coherence directory. It should be noted that, the specific process of obtaining the first failure storage bit by the detection unit Z11 may refer to the description of the related portion, and will not be repeated herein.
In a specific implementation, with continued reference to fig. 7, the detecting unit Z11 is further adapted to identify a first faulty storage bit that cannot be replaced by a redundant storage bit configured in the shared memory, so as to obtain a second faulty storage bit; the fault directory entry obtaining unit Z12 is further adapted to identify a directory entry corresponding to the second fault storage bit in the coherence directory, so as to obtain the fault directory entry. It should be noted that, the specific process of the detection unit Z11 obtaining the second fault storage bit and the specific process of the fault directory entry obtaining unit Z12 obtaining the fault directory entry may refer to the description of the related parts, and will not be repeated herein.
In an implementation, with continued reference to fig. 7, the detecting unit Z11 is further adapted to identify a first failed storage bit that can be replaced by the redundant storage bit, resulting in a third failed storage bit; the information generating unit Z13 is further adapted to generate storage repair information of the shared memory for indicating a repair operation performed on the third faulty storage bit using the redundant storage bit based on a storage function detection result of the shared memory. It should be noted that, the specific process of the detecting unit Z11 obtaining the third failure storage bit and the specific process of the information generating unit Z13 generating the storage repair information may refer to the description of the related parts, and will not be repeated herein.
The embodiment of the present disclosure further provides a memory access control device, referring to fig. 8, which is a schematic structural diagram of another memory access control device in the embodiment of the present disclosure, where the memory access control device Z2 may include:
An information acquisition module Z21 adapted to acquire directory failure information, wherein the directory failure information is generated based on a failure directory entry of a coherence directory stored in a shared memory, the failure directory entry being determined by a storage function detection result of the shared memory;
the memory control module Z22 is adapted to control the dedicated memory to mask a first physical memory area corresponding to the faulty directory entry based on the directory fault information, and to control the shared memory to mask a first directory entry area corresponding to the faulty directory entry in the coherence directory.
It should be noted that, the specific process of controlling the dedicated memory by the memory control module Z22 and the specific process of controlling the shared memory by the memory control module Z22 may refer to the descriptions of the related parts, and will not be repeated herein.
From the above, through the directory fault information, the first physical storage area corresponding to the fault directory entry in the dedicated memory can be masked, so that the backup of the target data cannot be stored in the first physical storage area, and the first directory entry area corresponding to the fault directory entry in the coherence directory can be masked, so that the first directory entry area cannot be used, thereby ensuring that the coherence state information of the target data cannot be recorded in the fault directory entry of the coherence directory. Therefore, the backup position of the target data in the special memory and the information recording position in the consistency directory can be controlled by utilizing the target fault information, and the information integrity of the consistency directory is ensured when the shared memory has faults, so that the accuracy of the consistency directory is improved.
In addition, the access control scheme can be realized through the logic function of the chip, and additional hardware resources are not required to be added to the chip, so that the access control scheme can be flexibly adapted to chips of various structure types.
In an implementation, as shown in fig. 8, the memory control module Z22 may include:
the access response unit Z221 is adapted to respond to a write operation request, and after determining that no target data indicated by the write operation request exists in the dedicated memory, obtain the target data through the shared memory.
The access execution unit Z222 is adapted to control, based on the directory fault information, the private memory to write the backup of the target data into a third physical storage area, where the third physical storage area is a physical storage area in the private memory that does not correspond to the fault directory entry.
And the data consistency control unit Z223 is suitable for controlling a second directory entry area in the consistency directory of the shared memory to update the consistency state information of the target data based on the writing result of the target data in the third physical storage area, wherein the second directory entry area is not corresponding to the fault directory entry in the consistency directory.
It should be noted that, the specific process of writing the target data by the access execution unit Z22 and the specific process of updating the consistency status information of the target data by the data consistency control unit Z23 may refer to the description of the relevant parts, and will not be repeated here.
In this way, when the backup of the target data is written into the dedicated memory, the first physical storage area corresponding to the fault directory entry in the dedicated memory can be masked by the directory fault information, so that the backup of the target data cannot be stored in the first physical storage area, but is stored in a physical storage area (namely, a third physical storage area) other than the first physical storage area, and the first directory entry area corresponding to the fault directory entry in the consistency directory is masked by the control shared memory, but is stored in the directory entry area (namely, a second directory entry area) other than the first directory entry area, so that the consistency state information of the target data cannot be recorded in the fault directory entry.
In a specific implementation, with continued reference to fig. 8, the access execution unit Z222 is further adapted to determine, based on a storage state of the dedicated memory, whether to execute a write-back operation before controlling the dedicated memory to write the backup of the target data into the third physical storage area based on the acquired directory failure information. It should be noted that, the specific process of determining whether to perform the write-back operation by the access execution unit Z22 may refer to the description of the related parts, which is not repeated herein.
In a specific implementation, with continued reference to fig. 8, the access execution unit Z22 is adapted to, after determining to perform the write-back operation, select, by a replacement algorithm, a first memory block from the third physical memory area for performing the write-back operation based on the directory failure information; and after the write-back operation is executed, writing the backup of the target data indicated by the write-back operation request into the first storage block. It should be noted that, for the specific process of performing the write-back operation by the access execution unit Z22, reference may be made to the description of the relevant parts above, which is not repeated herein.
The present disclosure further provides a chip corresponding to the access control method, and the detailed description is provided by specific embodiments with reference to the accompanying drawings. It should be noted that the chip described below may be regarded as a functional module required to implement the access control method provided in the present specification; the contents of the chip described below may be referred to in correspondence with the contents of the access control method described above.
The embodiment of the present disclosure provides a memory access control device, referring to fig. 9, which is a schematic structural diagram of a chip in the embodiment of the present disclosure, where the chip C1 may include: a shared cache C11, a plurality of private caches (e.g., private memories C121, C122 to C12Y in fig. 9), and a memory access control device C13, wherein:
the shared memory C11 is suitable for storing a consistency catalog C11-1;
The access control device C13 is adapted to detect a storage function of the shared memory C11, determine a fault directory entry in the coherence directory C11-1 based on a detection result of the storage function of the shared memory C11, and generate directory fault information based on the fault directory entry, for shielding a first physical storage area corresponding to the fault directory entry in the private memories C121-C12Y, and for shielding a first directory entry area corresponding to the fault directory entry in the coherence directory C11-1.
It is to be understood that the specific control process of the access control device C13 may refer to the description of the relevant parts, and will not be repeated herein.
In a specific implementation, the access control device is adapted to respond to a write operation request, acquire target data through the shared memory after determining that no backup of the target data exists in the dedicated memory indicated by the write operation request, and control the dedicated memory indicated by the write operation request to write the backup of the target data into a third physical storage area according to the directory fault information, and control a second directory entry area in the coherence directory of the shared memory to update coherence state information of the target data based on a writing result of the target data in the third physical storage area, wherein the third physical storage area is a physical storage area in the dedicated memory, which does not correspond to the fault directory entry, and the second directory entry area is a directory entry area in the coherence directory, which does not correspond to the fault directory entry.
For example, with continued reference to fig. 9, the access control device C13, in response to a write operation request, acquires target data indicated by the write operation request through the shared memory C11 after determining that the target data does not exist, controls the dedicated memory C121 indicated by the write operation request to write a backup of the target data into a third physical storage area according to the directory failure information, and controls the shared memory C11 to update coherency state information of the target data in a second directory entry area in the coherency directory C11-1 based on a write result of the target data in the third physical storage area of the dedicated memory C121.
In an implementation, the coherence directory may include a plurality of coherence sub-directories, each of which establishes a mapping relationship with one of the dedicated memories.
For example, with continued reference to FIG. 9, the coherence directory C11-1 may include a plurality of coherence sub-directories (e.g., coherence sub-directories C11-11, C11-12-C11-1Y in FIG. 8), each of which may be mapped with one of the dedicated memories based on an index and a group, e.g., coherence sub-directory C11-11 may be mapped with dedicated memory C121 based on an index and a group, coherence sub-directory C11-12 may be mapped with dedicated memory C122 based on an index and a group, etc. Wherein, for convenience of description and understanding, the index number and the group number of the consistency sub-directory may be the sub-directory index number and the sub-directory group number. The specific process of establishing the mapping relationship between the consistency sub-directory and the special memory based on the index and the group may refer to the description of establishing the mapping relationship between the consistency directory and the special memory based on the index and the group, which is not described herein.
In particular implementations, the shared memory may include: at least one of static random access memory, latch, flip-flop. This is not particularly limited in the present specification examples.
In an implementation, the shared memory may be a secondary cache, a last level cache, or a main memory. This is not particularly limited in the present specification examples.
In a specific implementation, the dedicated memory may be a first level cache, a second level cache, a third level cache, or a fourth level cache. This is not particularly limited in the present specification examples.
In an implementation, the dedicated memory may be located in the processor core or may be located outside the processor core, which is not specifically limited by the embodiments of the present disclosure.
The embodiment of the specification also provides electronic equipment, which comprises the chip of any embodiment. The electronic equipment can be a handheld terminal such as a mobile phone, a tablet personal computer, a personal desktop computer and the like. The chip may be located on a motherboard of an electronic device, and the electronic device may further include other devices, such as an input/output device, a display device, and the like, which is not specifically limited in this specification.
It will be appreciated that the terms "first," "second," and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defining "a first" or "a second" may include one or more of the feature, either explicitly or implicitly. Moreover, the terms "first," "second," and the like, are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate to enable embodiments of the invention described herein to be implemented in sequences other than those illustrated or otherwise described herein.
Although the embodiments of the present invention are disclosed above, the present invention is not limited thereto. Various changes and modifications may be made by one skilled in the art without departing from the spirit and scope of the invention, and the scope of the invention should be assessed accordingly to that of the appended claims.

Claims (28)

1. The access control method is characterized by comprising the following steps of:
Detecting a storage function of a shared memory, wherein a consistency catalog is stored in the shared memory;
Determining a fault directory entry in the consistency directory based on a storage function detection result of the shared memory;
Generating directory fault information based on the fault directory entry, wherein the directory fault information is used for shielding a first physical storage area corresponding to the fault directory entry in a special memory and shielding a first directory entry area corresponding to the fault directory entry in the consistency directory; the directory fault information comprises the order of directory group numbers of the fault directory entries in a directory group number sequence of the consistency directory;
And determining a first physical storage area corresponding to the fault directory entry in the special memory and a first directory entry area corresponding to the fault directory entry in the consistency directory according to the relevance between the directory group number and the special memory group number of the fault directory entry represented by the directory fault information.
2. The access control method according to claim 1, further comprising:
Performing storage function detection on a second physical storage area of the shared memory, wherein the second physical storage area is: the physical storage area where the second directory entry area of the first directory entry area is not included in the consistency directory;
And if the storage function detection result of the second physical storage area is not matched with the directory fault information, updating the directory fault information based on the storage function detection result of the second physical storage area.
3. The access control method according to claim 1, further comprising:
and generating directory failure prompt information after determining that the first directory entry area covers the consistency directory.
4. A memory access control method according to any one of claims 1 to 3, further comprising, before the determination of the faulty directory entry in the coherence directory based on the result of the detection of the memory function of the shared memory:
the coherence directory and the private memory establish a mapping relationship based on indexes and groups.
5. The access control method according to claim 4, wherein the generating directory fault information based on the fault directory entry includes:
And determining the position of the directory group number of the fault directory entry in the directory group number sequence of the consistency directory, and generating the directory fault information.
6. A memory access control method according to any one of claims 1 to 3, wherein the detecting of the memory function of the shared memory includes:
Writing test data into the shared memory;
After the writing operation of the test data is completed, reading the data stored in the shared memory to obtain the stored data;
And identifying the shared storage bit corresponding to the bit with the numerical error in the storage data based on the test data, and obtaining a first fault storage bit for determining a fault directory entry in the consistency directory.
7. The access control method according to claim 6, wherein the detecting the storage function of the shared memory further comprises:
Identifying a first fault storage bit which cannot be replaced by the redundant storage bit configured in the shared memory, and obtaining a second fault storage bit;
the determining, based on the storage function detection result of the shared memory, a fault directory entry in the coherence directory includes:
And identifying a corresponding directory entry of the second fault storage bit in the consistency directory to obtain the fault directory entry.
8. The access control method according to claim 7, wherein the detecting the memory function of the shared memory further comprises:
Identifying a first fault storage bit which can be replaced by the redundant storage bit to obtain a third fault storage bit;
the access control method further comprises the following steps:
Based on the storage function detection result of the shared memory, storage repair information of the shared memory is generated for indicating a repair operation performed on the third failed storage bit by using the redundant storage bit.
9. The access control method according to claim 8, wherein the generating storage repair information of the shared memory based on a storage function detection result of the shared memory includes:
and generating storage repair information based on the replacement relationship between the redundant storage bit and the third fault storage bit.
10. The access control method is characterized by comprising the following steps of:
Obtaining directory fault information, wherein the directory fault information is generated based on a fault directory entry of a consistency directory stored in a shared memory, and the fault directory entry is determined by a storage function detection result of the shared memory; the directory fault information comprises the order of directory group numbers of the fault directory entries in a directory group number sequence of the consistency directory;
Through the relevance between the directory group number and the special memory group number of the fault directory entry represented by the directory fault information, a first physical memory area corresponding to the fault directory entry in the special memory and a first directory entry area corresponding to the fault directory entry in the consistency directory can be determined;
based on the directory fault information, controlling a dedicated memory to mask a first physical storage area corresponding to the fault directory entry, and controlling the shared memory to mask a first directory entry area corresponding to the fault directory entry in the coherence directory, includes:
Responding to a write operation request, and acquiring backup of target data indicated by the write operation request through the shared memory after determining that the backup of the target data does not exist in the special memory;
based on the directory fault information, controlling the special memory to write the backup of the target data into a third physical storage area, wherein the third physical storage area is a physical storage area which does not correspond to the fault directory entry in the special memory;
and based on the writing result of the target data in the third physical storage area, controlling a second directory entry area of the shared memory in the consistency directory to update the consistency state information of the target data, wherein the second directory entry area is a directory entry area which does not correspond to the fault directory entry in the consistency directory.
11. The access control method according to claim 10, wherein before the controlling the dedicated memory to write the backup of the target data to the third physical storage area based on the acquired directory failure information, further comprising:
Based on the storage state of the private memory, it is determined whether to perform a write-back operation.
12. The access control method according to claim 11, wherein the controlling the dedicated memory to write the backup of the target data to the third physical storage area based on the acquired directory failure information includes:
After determining to perform the write-back operation, selecting a first memory block for performing the write-back operation from the third physical memory area by adopting a replacement algorithm based on the directory failure information;
And after the write-back operation is executed, writing the backup of the target data indicated by the write-back operation request into the first storage block.
13. A memory access control device, comprising:
the detection unit is suitable for detecting the storage function of the shared memory, wherein the shared memory stores a consistency catalog;
the fault catalog item acquisition unit is suitable for determining fault catalog items in the consistency catalog according to the storage function detection result of the shared memory;
The information generation unit is suitable for generating directory fault information according to the fault directory entry, and is used for shielding a first physical storage area corresponding to the fault directory entry in the special memory and shielding a first directory entry area corresponding to the fault directory entry in the consistency directory; the directory fault information comprises the order of directory group numbers of the fault directory entries in a directory group number sequence of the consistency directory;
And determining a first physical storage area corresponding to the fault directory entry in the special memory and a first directory entry area corresponding to the fault directory entry in the consistency directory according to the relevance between the directory group number and the special memory group number of the fault directory entry represented by the directory fault information.
14. The access control device according to claim 13, wherein the detection unit is further adapted to perform a storage function detection on a second physical storage area of the shared memory, wherein the second physical storage area is: the consistency directory does not contain a physical storage area corresponding to a second directory entry area of the first directory entry area;
The information generating unit is further adapted to update the directory failure information based on the storage function detection result of the second physical storage area after the storage function detection result of the second physical storage area is not matched with the directory failure information.
15. The access control device according to claim 13, wherein the information generating unit is further adapted to generate a directory invalidation hint information after determining that the first directory entry area covers the coherence directory.
16. The access control device according to any one of claims 13 to 15, wherein the detection unit is adapted to write test data into the shared memory, and after completion of a write operation of the test data, read data stored in the shared memory to obtain stored data, and, based on the test data, identify a shared memory bit corresponding to a bit of the stored data that is numerically erroneous, to obtain a first faulty memory bit for use in determining a faulty directory entry in the coherence directory.
17. The memory access control device of claim 16, wherein the detection unit is further adapted to identify a first failed memory bit that cannot be replaced by a redundant memory bit configured in the shared memory, resulting in a second failed memory bit;
the fault directory entry obtaining unit is further adapted to identify a directory entry corresponding to the second fault storage bit in the coherence directory, so as to obtain the fault directory entry.
18. The memory access control device of claim 17, wherein the detection unit is further adapted to identify a first failed memory bit that the redundant memory bit can replace, resulting in a third failed memory bit;
The information generating unit is further adapted to generate storage repair information of the shared memory based on a storage function detection result of the shared memory, for indicating a repair operation performed on the shared memory using the redundant storage bits.
19. A memory access control device, comprising:
The information acquisition module is suitable for acquiring directory fault information, wherein the directory fault information is generated based on fault directory entries of the consistency directory stored in the shared memory, and the fault directory entries are determined by a storage function detection result of the shared memory; the directory fault information comprises the order of directory group numbers of the fault directory entries in a directory group number sequence of the consistency directory;
Through the relevance between the directory group number and the special memory group number of the fault directory entry represented by the directory fault information, a first physical memory area corresponding to the fault directory entry in the special memory and a first directory entry area corresponding to the fault directory entry in the consistency directory can be determined;
A memory control module adapted to control a dedicated memory to mask a first physical memory region corresponding to the failed directory entry based on the directory failure information, and to control the shared memory to mask a first directory entry region in the coherence directory corresponding to the failed directory entry,
Wherein the memory control module comprises:
an access response unit adapted to respond to a write operation request, and after determining that target data indicated by the write operation request does not exist in the private memory, acquire the target data through the shared memory;
The access execution unit is suitable for controlling the special memory to write the backup of the target data into a third physical storage area based on the directory fault information, wherein the third physical storage area is a physical storage area which does not correspond to the fault directory entry in the special memory;
The data consistency control unit is suitable for controlling a second directory entry area in the consistency directory of the shared memory to update consistency state information of the target data based on a writing result of the target data in the third physical storage area, wherein the second directory entry area is a directory entry area which does not correspond to the fault directory entry in the consistency directory;
And the memory control module is suitable for controlling a special memory to shield a first physical storage area corresponding to the fault directory entry based on the directory fault information and controlling the shared memory to shield a first directory entry area corresponding to the fault directory entry in the consistency directory.
20. The access control apparatus according to claim 19, wherein the access execution unit is further adapted to determine whether to execute a write-back operation based on a storage state of the dedicated memory before controlling the dedicated memory to write the backup of the target data to the third physical storage area based on the acquired directory failure information.
21. The access control device according to claim 20, wherein the access execution unit is adapted to, after determining to perform the write-back operation, select, based on the directory failure information, a first memory block from the third physical memory area for performing the write-back operation by a replacement algorithm; and after the write-back operation is executed, writing the backup of the target data indicated by the write-back operation request into the first storage block.
22. The chip is characterized by comprising a shared memory, a plurality of special memories and a memory access control device, wherein:
the shared memory is suitable for storing a consistency catalog;
The access control device is suitable for detecting the storage function of a shared memory, determining a fault directory entry in the consistency directory based on the detection result of the storage function of the shared memory, generating directory fault information based on the fault directory entry, and shielding a first physical storage area corresponding to the fault directory entry in the special memory and a first directory entry area corresponding to the fault directory entry in the consistency directory; the directory fault information comprises the order of directory group numbers of the fault directory entries in a directory group number sequence of the consistency directory;
And determining a first physical storage area corresponding to the fault directory entry in the special memory and a first directory entry area corresponding to the fault directory entry in the consistency directory according to the relevance between the directory group number and the special memory group number of the fault directory entry represented by the directory fault information.
23. The chip according to claim 22, wherein the access control means is adapted to respond to a write operation request, obtain, through the shared memory, the target data after determining that no backup of the target data exists in the dedicated memory indicated by the write operation request, and control the dedicated memory indicated by the write operation request to write the backup of the target data into a third physical storage area according to the directory fault information, and control, based on a result of writing the target data in the third physical storage area, the shared memory to update coherency state information of the target data in a second directory entry area in the coherency directory, wherein the third physical storage area is a physical storage area in the dedicated memory that does not correspond to the faulty directory entry, and the second directory entry area is a directory entry area in the coherency directory that does not correspond to the faulty directory entry.
24. The chip of claim 22 or 23, wherein the coherence directory comprises a plurality of coherence sub-directories, each of the coherence sub-directories having a mapping relationship with one of the dedicated memories based on an index and a group.
25. The chip of claim 22 or 23, wherein the shared memory comprises: at least one of static random access memory, latch, flip-flop.
26. The chip of claim 22 or 23, wherein the shared memory is a secondary cache, a last level cache, or a main memory.
27. The chip of claim 22 or 23, wherein the dedicated memory is a first level cache, a second level cache, a third level cache, or a fourth level cache.
28. An electronic device comprising the chip of any one of claims 22 to 27.
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