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CN117012860A - Preparation method of photodiode and photodiode - Google Patents

Preparation method of photodiode and photodiode Download PDF

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Publication number
CN117012860A
CN117012860A CN202311282660.9A CN202311282660A CN117012860A CN 117012860 A CN117012860 A CN 117012860A CN 202311282660 A CN202311282660 A CN 202311282660A CN 117012860 A CN117012860 A CN 117012860A
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China
Prior art keywords
silicon dioxide
dioxide layer
type region
semiconductor substrate
type
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CN202311282660.9A
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Inventor
朱合意
贾钊
窦志珍
胡恒广
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Qingdao Xuxin Internet Technology Research And Development Co ltd
Tunghsu Technology Group Co Ltd
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Qingdao Xuxin Internet Technology Research And Development Co ltd
Tunghsu Technology Group Co Ltd
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Priority to CN202311282660.9A priority Critical patent/CN117012860A/en
Publication of CN117012860A publication Critical patent/CN117012860A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/10Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors characterised by potential barriers, e.g. phototransistors
    • H01L31/101Devices sensitive to infrared, visible or ultraviolet radiation
    • H01L31/102Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier
    • H01L31/103Devices sensitive to infrared, visible or ultraviolet radiation characterised by only one potential barrier the potential barrier being of the PN homojunction type
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
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  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Light Receiving Elements (AREA)

Abstract

The application relates to a preparation method of a photodiode and the photodiode, wherein the preparation method comprises the following steps: growing a first silicon dioxide layer on a semiconductor substrate, and implementing first photoetching to form a P-type doped region window; p-type doping is carried out to form a P-type region, and a second silicon dioxide layer is grown at the same time; performing second photoetching to form an N-type doped region window; performing N-type doping to form an N-type region, and simultaneously growing a third silicon dioxide layer; performing third photoetching to remove the first silicon dioxide layer, the second silicon dioxide layer and the third silicon dioxide layer on the semiconductor substrate; and growing a fourth silicon dioxide layer on the semiconductor substrate, and carrying out fourth photoetching to etch the fourth silicon dioxide layer on the surfaces of the P-type region and the N-type region so as to form a silicon dioxide layer with a protective function between the P-type region and the N-type region again. The silicon dioxide layer finally formed by the application has uniform thickness and material quality, has higher insulation reliability, and improves the problem of easy breakdown of the photodiode.

Description

Preparation method of photodiode and photodiode
Technical Field
The application relates to the technical field of photoelectricity, in particular to a preparation method of a photodiode and the photodiode.
Background
Photodiodes are also called photodiodes. Photodiodes are similar in structure to semiconductor diodes in that the die is a PN junction with photosensitive characteristics and unidirectional conductivity, thus requiring the application of a reverse voltage during operation. In the absence of illumination, there is little saturated reverse leakage current, i.e., dark current, when the photodiode is turned off. When illuminated, the saturated reverse leakage current greatly increases, forming a photocurrent, which varies with the incident light intensity. When light irradiates the PN junction of the photosensitive feature, electron-hole pairs can be generated in the PN junction, so that the density of minority carriers is increased. These carriers drift under reverse voltage, increasing reverse current. The intensity of the illumination can be used to change the current in the circuit.
The manufacturing process of the photodiode chip is mature, but the chip is easy to break down, namely, accidental breakdown occurs between the P-type region and the N-type region in the chip. Therefore, with the increase of the product yield, the problem of easy breakdown of the product needs to be solved.
Disclosure of Invention
The application provides a preparation method of a photodiode and the photodiode, which are used for solving the problems of low product yield and unstable performance of the photodiode chip in the prior art that the photodiode chip is easy to break down.
The preparation method of the photodiode provided by the application comprises the following steps:
step 1, growing a first silicon dioxide layer on a semiconductor substrate, and implementing first photoetching to etch the first silicon dioxide layer to form a P-type doped region window;
step 2, P-type doping is implemented to form a P-type region on the semiconductor substrate, and a second silicon dioxide layer is grown on the semiconductor substrate and the first silicon dioxide layer;
step 3, implementing a second photoetching, and etching the second silicon dioxide layer and the first silicon dioxide layer below the second silicon dioxide layer to form an N-type doped region window;
step 4, N-type doping is implemented to form an N-type region on the semiconductor substrate, and a third silicon dioxide layer is grown on the semiconductor substrate and the second silicon dioxide layer;
step 5, implementing third photoetching to remove the first silicon dioxide layer, the second silicon dioxide layer and the third silicon dioxide layer on the semiconductor substrate;
and 6, growing a fourth silicon dioxide layer on the semiconductor substrate, and carrying out fourth photoetching to etch the fourth silicon dioxide layer on the surfaces of the P-type region and the N-type region so as to form a silicon dioxide layer with a protective effect between the P-type region and the N-type region again.
Further, in step 6, the fourth silicon dioxide layer is formed by enhanced chemical vapor deposition, the thickness of the fourth silicon dioxide layer is 3350-3950A, and the refractive index is 1.4-1.6.
In step 6, the silicon dioxide layer with protection function reformed between the P-type region and the N-type region is a ring structure, the inner side of the ring structure is the N-type region, and the outer side of the ring structure is the P-type region.
Further, in step 1, the thickness of the grown first silicon dioxide layer is 4800-5200A, and the refractive index is 1.4-1.6.
Further, in the step 2, the P-type doping is performed under the condition of introducing an oxygen aqueous solution;
in the step 4, N-type doping is performed under the condition of introducing gaseous oxygen;
the thickness of the second silicon dioxide layer simultaneously grown with the P-type doping is greater than the thickness of the third silicon dioxide layer simultaneously grown with the N-type doping.
Further, in the step 2, the square resistance of the P-type region is 28-38Ω/≡and the thickness of the second silicon dioxide layer which grows simultaneously with the P-type doping is 1800-2200A.
Further, in the step 4, the square resistance of the N-type region is 30-40 Ω/≡, and the thickness of the third silicon dioxide layer grown simultaneously with the N-type doping is 100-300A.
Further, the front surface of the semiconductor substrate is used for covering metal to form an N electrode, and the back surface of the semiconductor substrate is used for covering metal to form a P electrode;
in step 3, during the second photolithography, photoresist on the back surface of the semiconductor substrate is reserved to protect the second silicon dioxide layer on the back surface of the semiconductor substrate, and the second silicon dioxide layer under protection is used as a barrier layer for blocking element diffusion during N-type doping.
Further, the preparation method further comprises the following steps:
step 7, forming a silicon nitride protective layer outside the silicon dioxide layer with the protective function formed in the step 6;
and 8, generating metal electrodes in the N-type region and the P-type region of the semiconductor substrate respectively, and forming an N electrode for conducting the N-type region and a P electrode for conducting the P-type region.
According to the present application, there is provided a photodiode manufactured by the above method.
According to the technical scheme, a silicon dioxide layer is firstly used as a doping mask layer on a semiconductor substrate, P-type doping and N-type doping are respectively carried out, after P-type doping and N-type doping are completed to form a P-type region and an N-type region, each silicon dioxide layer grown in the previous procedure is removed through photoetching, a new silicon dioxide layer is regrown, and photoetching is carried out, so that a silicon dioxide layer with a protective effect is formed between the P-type region and the N-type region again. The finally formed silicon dioxide layer with the protection function grows through a single process and is not influenced by P-type doping and N-type doping, so that the material is uniform and pure, the thickness is uniform, the insulation reliability is higher, the problem that the photodiode is easy to break down is solved, and the product yield is improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to a person skilled in the art that other drawings can be obtained from these drawings without inventive effort.
FIG. 1 is a schematic flow chart of a method for manufacturing a photodiode according to an embodiment of the present application;
fig. 2-10 are schematic diagrams of products after various operation steps of the photodiode manufacturing method according to an embodiment of the present application, where,
FIG. 2 shows a schematic diagram of the product after a first lithography;
FIG. 3 shows a schematic product diagram after P-doping;
FIG. 4 shows a schematic diagram of the product after a second lithography;
FIG. 5 shows a schematic diagram of the product after N-type doping;
FIG. 6 shows a schematic product diagram after a third lithography;
FIG. 7 shows a schematic product diagram of growing a fourth silicon dioxide layer;
FIG. 8 shows a schematic diagram of the product after a fourth lithography;
FIG. 9 shows a schematic diagram of a product with a ring-structured silicon dioxide layer in top view;
FIG. 10 shows a schematic of the final product after electrode formation;
FIG. 11 shows a comparative schematic of a prior art breakdown product;
wherein the above figures include the following reference numerals:
100. a semiconductor substrate; 101. a P-type region; 102. an N-type region; 210. a first silicon dioxide layer; 220. a second silicon dioxide layer; 230. a third silicon dioxide layer; 240. a fourth silicon dioxide layer; 300. a silicon nitride protective layer; 400. an N electrode; 500. and a P electrode.
Detailed Description
It should be noted that, without conflict, the embodiments of the present application and features of the embodiments may be combined with each other. The application will be described in detail below with reference to the drawings in connection with embodiments.
It should be noted that the following detailed description is illustrative and is intended to provide further explanation of the application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.
Spatially relative terms, such as "above … …," "above … …," "upper surface at … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial location relative to another device or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as "above" or "over" other devices or structures would then be oriented "below" or "beneath" the other devices or structures. Thus, the exemplary term "above … …" may include both orientations of "above … …" and "below … …". The device may also be oriented 90 degrees or at other orientations and the spatially relative descriptors used herein interpreted accordingly.
It is noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the present application. As used herein, the singular is also intended to include the plural unless the context clearly indicates otherwise, and furthermore, it is to be understood that the terms "comprises" and/or "comprising" when used in this specification are taken to specify the presence of stated features, steps, operations, devices, components, and/or combinations thereof.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used may be interchanged where appropriate such that embodiments of the application described herein may be capable of being practiced otherwise than as specifically illustrated and described. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
FIG. 1 is a schematic flow chart of a method for manufacturing a photodiode according to an embodiment of the present application; fig. 2 to 10 are schematic diagrams of products after each operation step of the photodiode manufacturing method according to the embodiment of the present application. Referring to fig. 1 to 10, the present application discloses a method for manufacturing a photodiode, which comprises:
in step 1, a first silicon dioxide layer 210 is grown on the semiconductor substrate 100, and a first photolithography is performed to etch the first silicon dioxide layer 210 to form a P-type doped region window. The result of the first photolithography in this example is shown in FIG. 2. In fig. 2, the first photolithography exposes the front (i.e., top) peripheral surface and the back (i.e., bottom) surface of the semiconductor substrate 100 to form P-type doped region windows.
In step 2, P-type doping is performed to form a P-type region 101 on the semiconductor substrate 100, and a second silicon oxide layer 220 is grown on the semiconductor substrate 100 and the first silicon oxide layer 210. As a result of the P-type doping in this embodiment, as shown in fig. 3, the P-type doping may be performed by using, for example, boron, and diffusing the boron into the corresponding region of the semiconductor substrate 100 to form the P-type region 101. Since the P-type doping and the N-type doping are performed at a temperature of up to 1000 c, the doping continues to grow a new silicon dioxide layer on the surface of the semiconductor substrate 100 and the corresponding silicon dioxide layer at the same time. The silicon dioxide layer grown with the P-type doping is the second silicon dioxide layer 220. In fig. 2 to 11, the dividing lines between the different silicon dioxide layers are drawn with dashed lines.
Step 3, performing a second photolithography to etch the second silicon dioxide layer 220 and the first silicon dioxide layer 210 under the second silicon dioxide layer 220, thereby forming an N-type doped region window. The result of the second lithography in this example is shown in fig. 4. In fig. 4, a second photolithography exposes a front-side center surface of the semiconductor substrate 100 to form an N-type doped region window.
In step 4, N-type doping is performed to form N-type region 102 on semiconductor substrate 100 while growing third silicon dioxide layer 230 on semiconductor substrate 100 and second silicon dioxide layer 220. As a result of the N-type doping in this embodiment, as shown in fig. 5, the N-type doping may be performed by, for example, using phosphorus, and diffusing the phosphorus into the corresponding region of the semiconductor substrate 100 to form the N-type region 102. The silicon dioxide layer that grows simultaneously with the N-type doping is the third silicon dioxide layer 230.
In step 5, a third photolithography is performed to remove the first silicon oxide layer 210, the second silicon oxide layer 220, and the third silicon oxide layer 230 on the semiconductor substrate 100. The result of the third photolithography in this example is shown in FIG. 6. As can be seen in fig. 6, the third photolithography removes all of the first, second and third silicon dioxide layers 210, 220, 230 on the semiconductor substrate 100 between the N-type region 102, the P-type region 101 and the N-type region 102 and the P-type region 101.
In step 6, a fourth silicon dioxide layer 240 is grown on the semiconductor substrate 100, and a fourth photolithography is performed to etch away the fourth silicon dioxide layer 240 on the surfaces of the P-type region 101 and the N-type region 102, so as to form a protective silicon dioxide layer between the P-type region 101 and the N-type region 102 again. The grown complete fourth silicon dioxide layer 240 is shown in fig. 7, and the result of the fourth silicon dioxide layer 240 after the fourth photolithography is shown in fig. 8 and 9.
As can be seen from comparing fig. 8 and fig. 5, in the preparation method according to the embodiment of the present application, the regrowth of the silicon dioxide layer between the P-type region 101 and the N-type region 102 is achieved. The regrown silicon dioxide layer comes from the fourth silicon dioxide layer 240 grown in a single process, so that the thickness is uniform, the material is uniform, and the insulation stability is higher without being affected by the diffusion of the P-type doping and the N-type doping. Therefore, the embodiment of the application can effectively improve the lateral breakdown problem of the P-type region 101 and the N-type region 102 under the isolation protection of the regrown silicon dioxide layer. In addition, in the embodiment of the application, the surface layer structure of the semiconductor substrate is remolded through third photoetching, growing the fourth silicon dioxide layer 240 and fourth photoetching, and finally, the appearance color of the chip is more uniform as a result of feedback, so that the photoetching identification window used in the subsequent chip packaging process can be enlarged, and the trafficability of products is improved.
In some embodiments of the present application, in step 6, the fourth silicon oxide layer 240 is grown by enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition, abbreviated as PECVD), and the fourth silicon oxide layer 240 has a thickness of 3350-3950A and a refractive index of 1.4-1.6. Preferably, the thickness of the fourth silicon dioxide layer 240 is 3650A, the refractive index is 1.45, and the fourth silicon dioxide layer 240 under this parameter can effectively play a role of isolating and protecting the N-type region 102 and the P-type region 101, and also facilitate the light detection of the photodiode.
In some embodiments of the present application, in step 6, the silicon dioxide layer reformed between the P-type region 101 and the N-type region 102 has a ring structure, and referring to fig. 9, the inside of the ring structure is the N-type region 102, and the outside of the ring structure is the P-type region 101. The silicon dioxide layer with the annular structure can better realize the overall isolation of the P-type region 101 and the N-type region 102.
In some embodiments of the present application, in step 1, the first silicon dioxide layer 210 is grown to have a thickness of 4800-5200A and a refractive index of 1.4-1.6, so as to meet the process requirements of each subsequent photolithography step and doping step. Preferably, the first silicon dioxide layer 210 has a thickness of 5000A and a refractive index of 1.45.
In some embodiments of the present application, in step 2, the P-type doping is performed under the condition of introducing an aqueous oxygen solution; in step 4, N-type doping is performed under the condition of introducing gaseous oxygen, and the thickness of the second silicon dioxide layer 220 grown simultaneously with P-type doping is greater than the thickness of the third silicon dioxide layer 230 grown simultaneously with N-type doping because the P-type doping has a stronger oxidizing environment.
In the embodiment of the application, the oxygen water solution used for P-type doping is realized by adopting a hot water bath and simultaneously introducing oxygen into water for bubbling in the actual process. The P-type doping process is improved to form the thicker second silicon dioxide layer 220 in this embodiment, so as to enhance the blocking effect of the second silicon dioxide layer 220 to suppress the diffusion effect of the element of the subsequent N-type doping.
In some embodiments of the present application, in step 2, the sheet resistance of the P-type region 101 formed by the P-type doping is 28-38Ω/≡, and the thickness of the second silicon dioxide layer 220 grown simultaneously with the P-type doping is 1800-2200A, preferably 2000A.
In some embodiments of the present application, in step 4, the square resistance of the N-type region 102 formed by the N-type doping is 30-40Ω/≡, and the thickness of the third silicon dioxide layer 230 grown simultaneously with the N-type doping is 100-300A, preferably 200A.
In some embodiments of the present application, the front side of the semiconductor substrate 100 is used to cover the metal-forming N electrode 400, and the back side of the semiconductor substrate 100 is used to cover the metal-forming P electrode 500. Accordingly, in step 3, during the second photolithography, the photoresist on the back surface of the semiconductor substrate 100 is remained to protect the second silicon dioxide layer 220 on the back surface of the semiconductor substrate 100, and the second silicon dioxide layer 220 under protection is used as a barrier layer for blocking diffusion of elements during N-type doping, as shown in fig. 4.
As is well known to those skilled in the art, the first lithography, the second lithography, the third lithography, and the fourth lithography in the embodiments of the present application all include processes such as photoresist coating, exposure, development, etching, and cleaning, and the etching solution components, etching time, and etching temperature are actually set according to the needs, and are not described in detail herein.
In some embodiments of the application, the method of making further comprises: step 7, forming a silicon nitride protective layer 300 outside the silicon dioxide layer with protective effect formed in step 6, wherein the silicon nitride protective layer 300 is SiN x The layer has higher hardness and plays a role in mechanical protection.
In some embodiments of the application, the method of making further comprises: in step 8, metal electrodes are formed in the N-type region 102 and the P-type region 101 of the semiconductor substrate 100, respectively, to form an N electrode 400 for conducting the N-type region 102 and a P electrode 500 for conducting the P-type region 101.
In an embodiment of the present application, the final photodiode product is shown in fig. 10.
The conventional photodiode with an un-reshaped silicon dioxide layer is shown in fig. 11, wherein the silicon dioxide layer with a protective effect is formed by stacking a plurality of processes, namely, the first silicon dioxide layer 210, the second silicon dioxide layer 220 and the third silicon dioxide layer 230, and is affected by a doping process, and the inside of the photodiode is rich in doping elements, so that the P-type region 101 and the N-type region 102 are easily conducted transversely to cause breakdown.
Comparing fig. 11, in the product formed in fig. 10 according to the embodiment of the present application, the silicon dioxide layer with protection function is grown in a single process and is not affected by the doping process, so that the thickness is uniform, the material is uniform, the insulation stability is higher, and the abnormal breakdown problem of the product can be improved.
The application also discloses a photodiode which is manufactured by the method, and has the advantages that the reformed silicon dioxide layer which is uniform in thickness, uniform in material quality and higher in insulation stability is used as a transverse breakdown protection layer, the performance is more stable, and the product yield is higher during production.
In summary, in the process of preparing the photodiode, after the P-type doping and the N-type doping, the original silicon dioxide layer generated in the processes of doping procedure and the like is removed, the new silicon dioxide layer is regrown to serve as a protection layer, the regrown silicon dioxide layer comes from a single procedure, the thickness is uniform, the material is uniform, the diffusion influence of the P-type doping and the N-type doping is avoided, the stability is higher, and the breakdown problem of the chip can be effectively improved. Meanwhile, as the surface layer structure of the semiconductor substrate is remodeled, the appearance color of the manufactured chip is more uniform, so that the photoetching identification window used in the subsequent chip packaging process can be increased, and the trafficability of products is improved.
The above is only a preferred embodiment of the present application, and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims (10)

1. A method of fabricating a photodiode, the method comprising:
step 1, growing a first silicon dioxide layer on a semiconductor substrate, and implementing first photoetching to etch the first silicon dioxide layer to form a P-type doped region window;
step 2, P-type doping is carried out to form a P-type region on the semiconductor substrate, and a second silicon dioxide layer is grown on the semiconductor substrate and the first silicon dioxide layer at the same time;
step 3, implementing a second photoetching, and etching the second silicon dioxide layer and the first silicon dioxide layer below the second silicon dioxide layer to form an N-type doped region window;
step 4, N-type doping is carried out to form an N-type region on the semiconductor substrate, and a third silicon dioxide layer is grown on the semiconductor substrate and the second silicon dioxide layer at the same time;
step 5, implementing third photoetching, and removing the first silicon dioxide layer, the second silicon dioxide layer and the third silicon dioxide layer on the semiconductor substrate;
and 6, growing a fourth silicon dioxide layer on the semiconductor substrate, and carrying out fourth photoetching to etch away the fourth silicon dioxide layer on the surfaces of the P-type region and the N-type region so as to form a silicon dioxide layer with a protective function between the P-type region and the N-type region again.
2. The method of manufacturing a photodiode according to claim 1, wherein in the step 6, the fourth silicon oxide layer is formed by enhanced chemical vapor deposition growth, and the fourth silicon oxide layer has a thickness of 3350-3950A and a refractive index of 1.4-1.6.
3. The method of manufacturing a photodiode according to claim 2, wherein in the step 6, the silicon dioxide layer with protection function reformed between the P-type region and the N-type region has a ring structure, the N-type region is located inside the ring structure, and the P-type region is located outside the ring structure.
4. The method of fabricating a photodiode according to claim 1, wherein in step 1, the first silicon dioxide layer is grown to have a thickness of 4800 to 5200A and a refractive index of 1.4 to 1.6.
5. The method of manufacturing a photodiode according to claim 1, wherein,
in the step 2, the P-type doping is performed under the condition of introducing an oxygen aqueous solution;
in the step 4, the N-type doping is performed under the condition of introducing gaseous oxygen;
the thickness of the second silicon dioxide layer simultaneously grown with the P-type doping is greater than the thickness of the third silicon dioxide layer simultaneously grown with the N-type doping.
6. The method of claim 5, wherein in step 2, the square resistance of the P-type region is 28-38Ω/≡s, and the thickness of the second silicon dioxide layer grown simultaneously with the P-type doping is 1800-2200A.
7. The method according to claim 5, wherein in the step 4, the sheet resistance of the N-type region is 30-40Ω/≡s, and the thickness of the third silicon dioxide layer grown simultaneously with the N-type doping is 100-300A.
8. The method of manufacturing a photodiode of claim 5, wherein a front surface of the semiconductor substrate is used for covering a metal to form an N electrode, and a back surface of the semiconductor substrate is used for covering a metal to form a P electrode;
in the step 3, during the second photolithography, the photoresist on the back surface of the semiconductor substrate is reserved to protect the second silicon dioxide layer on the back surface of the semiconductor substrate, and the second silicon dioxide layer under protection is used as a barrier layer for blocking element diffusion during N-type doping.
9. The method of manufacturing a photodiode according to any one of claims 1 to 8, further comprising:
step 7, forming a silicon nitride protective layer outside the silicon dioxide layer with the protective function formed in the step 6;
and 8, generating metal electrodes in the N-type region and the P-type region of the semiconductor substrate respectively, and forming an N electrode for conducting the N-type region and a P electrode for conducting the P-type region.
10. A photodiode, characterized in that it is manufactured by the method according to any one of claims 1 to 9.
CN202311282660.9A 2023-10-07 2023-10-07 Preparation method of photodiode and photodiode Pending CN117012860A (en)

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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5610416A (en) * 1995-02-16 1997-03-11 Hewlett-Packard Company Avalanche photodiode with epitaxially regrown guard rings
CN1812059A (en) * 2004-12-15 2006-08-02 Lg电子有限公司 Zener diode and methods for fabricating and packaging same
CN106449770A (en) * 2016-12-07 2017-02-22 天津大学 Annular-gate single-photon avalanche diode capable of preventing edge breakdown and preparation method of annular-gate single-photon avalanche diode capable of preventing edge breakdown
US20170323793A1 (en) * 2013-09-13 2017-11-09 Shanghai Ic R&D Center Co., Ltd Fabrication method of fast recovery diode
CN114300348A (en) * 2021-12-31 2022-04-08 北海惠科半导体科技有限公司 Preparation method of doped semiconductor device and semiconductor device
CN115377243A (en) * 2021-12-31 2022-11-22 北海惠科半导体科技有限公司 Preparation method of photosensitive diode and semiconductor device

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5610416A (en) * 1995-02-16 1997-03-11 Hewlett-Packard Company Avalanche photodiode with epitaxially regrown guard rings
CN1812059A (en) * 2004-12-15 2006-08-02 Lg电子有限公司 Zener diode and methods for fabricating and packaging same
US20170323793A1 (en) * 2013-09-13 2017-11-09 Shanghai Ic R&D Center Co., Ltd Fabrication method of fast recovery diode
CN106449770A (en) * 2016-12-07 2017-02-22 天津大学 Annular-gate single-photon avalanche diode capable of preventing edge breakdown and preparation method of annular-gate single-photon avalanche diode capable of preventing edge breakdown
CN114300348A (en) * 2021-12-31 2022-04-08 北海惠科半导体科技有限公司 Preparation method of doped semiconductor device and semiconductor device
CN115377243A (en) * 2021-12-31 2022-11-22 北海惠科半导体科技有限公司 Preparation method of photosensitive diode and semiconductor device

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Application publication date: 20231107