CN116913351A

CN116913351A - Method, device, medium and equipment for testing data loss of storage equipment

Info

Publication number: CN116913351A
Application number: CN202311178413.4A
Authority: CN
Inventors: 潘慧敏; 赵啟鹏
Original assignee: Hefei Kangxinwei Storage Technology Co Ltd
Current assignee: Hefei Kangxinwei Storage Technology Co Ltd
Priority date: 2023-09-13
Filing date: 2023-09-13
Publication date: 2023-10-20
Anticipated expiration: 2043-09-13
Also published as: CN116913351B

Abstract

The application relates to the technical field of storage equipment testing, and discloses a storage equipment data loss testing method, which comprises the following steps: writing first data into a first storage unit of the storage device according to a first data writing parameter, wherein the first data writing parameter comprises the size, the type and the position of the first data and the number of times of executing a test step; executing power-down operation on the storage device after the first data are written; reading second data in a first storage unit of the storage device after power-down; and acquiring difference data between the first data and the second data as lost data. The method solves the problem that the prior method can not automatically acquire the maximum data loss when XLC block is written.

Description

Method, device, medium and equipment for testing data loss of storage equipment

Technical Field

The present application relates to the field of storage device testing technologies, and in particular, to a method, an apparatus, a medium, and a device for testing data loss of a storage device.

Background

eMMC (Embedded Multi Media Card) is an embedded memory standard specification which is set by the MMC conference and mainly aims at products such as mobile phones or tablet computers, and consists of an embedded memory solution, wherein the embedded memory standard specification is provided with an MMC (multimedia card) interface, a flash memory (nand-flash) and an eMMC controller. One significant advantage of eMMC is the integration of an eMMC controller in the package that provides a standard interface and manages the flash memory so that the handset vendor can concentrate on other parts of the product development and shorten the time to market out the product, with more and more mobile devices employing eMMC as the storage unit.

When performing read/write operation on the eMMC memory device, XLC (X-Level Cell) block starts to be consumed after SLC (Single-Level Cell) block is consumed. After power failure, the maximum data size lost by XLC block is one of the important indexes of each manufacturer in measuring eMMC performance.

However, no method for automatically acquiring the maximum data lost when XLC blocks are written to a storage device is found in the existing test methods.

Disclosure of Invention

The application provides a method, a device, a medium and equipment for testing data loss of storage equipment, which are used for solving the problems existing in the prior art.

To achieve the above and other related objects, the present application provides a method for testing data loss of a storage device, including:

writing first data into a first storage unit of the storage device according to a first data writing parameter, wherein the first data writing parameter comprises the size, the type, the address and the number of times of executing the test step of the first data;

executing power-down operation on the storage device after the first data are written;

reading second data in a first storage unit of the storage device after power-down;

and acquiring difference data between the first data and the second data as lost data.

In an embodiment of the present application, a plurality of test steps are performed on the storage device to obtain a plurality of difference data, and a maximum data in the plurality of difference data is used as the missing data.

In one embodiment of the present application, before the step of writing the first data to the first memory cell of the memory device, the method further includes:

and writing third data into a second storage unit of the storage device according to a second data writing parameter, wherein the third data writing parameter comprises the size, the type and the address of the third data.

In an embodiment of the present application, a data amount of the third data is greater than a storage capacity of the second storage unit.

In an embodiment of the present application, when the first test step is performed, a write start address of the first data is zero; when the second test step is performed, the write start address of the third data starts from the write end address of the first data, and the write start address of the first data starts from the write end address of the third data.

In an embodiment of the present application, the data size cold_data_ca_capability of the third data is expressed as:

cold_data_capcity = BKOPS_threshold*(SLC_page_count*a*b)+n

wherein BKOPS_threshold represents the number of SLC blocks reserved inside the storage device; slc_page_count represents the total SLC page number set by the storage device, and a represents the size of one page; slc_page_count a b is the total number of pages of XLC, b represents the total number of pages of XLC b times the total number of pages of SLC, and n represents the size of the data volume.

In an embodiment of the present application, the data amount hot_data_Capcity of the first data is expressed as:

hot_data_capcity=trunk_size*2*(cycle+1)

wherein trunk_size represents the size of the basic writing unit; cycle indicates the number of times the test step is performed.

To achieve the above and other related objects, the present application also provides a storage device data loss testing apparatus, including:

the data writing module is used for writing first data into a first storage unit of the storage device according to a first data writing parameter, wherein the first data writing parameter comprises the size, the type and the position of the first data and the number of times of executing the test step;

the power-on control module is used for executing power-on operation on the storage equipment after the first data are written;

the data reading module is used for reading the second data in the first storage unit of the storage device after power-down;

and the data comparison module is used for acquiring difference data between the first data and the second data as lost data.

To achieve the above and other related objects, the present application also provides a computer apparatus comprising:

one or more processors; and

one or more machine readable media having instructions stored thereon that, when executed by the one or more processors, cause the processors to perform one or more of the storage device data loss test methods described previously.

To achieve the above and other related objects, the present application also provides one or more machine-readable media having instructions stored thereon, which when executed by one or more processors, cause the processors to perform one or more of the storage device data loss testing methods described above.

As described above, the method, the device, the machine-readable medium and the equipment for testing the data loss of the storage device have the following beneficial effects:

the application discloses a method for testing data loss of storage equipment, which comprises the following steps: writing first data into a first storage unit of the storage device according to a first data writing parameter, wherein the first data writing parameter comprises the size, the type and the position of the first data and the number of times of executing a test step; executing power-down operation on the storage device after the first data are written; reading second data in a first storage unit of the storage device after power-down; and acquiring difference data between the first data and the second data as lost data. The method solves the problem that the prior method can not automatically acquire the maximum data loss when XLC block is written.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application as claimed.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments of the present application will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.

FIG. 1 is a schematic diagram of an exemplary storage device data loss testing method implementation environment according to the present application;

FIG. 2 is a flow chart of an exemplary method for testing data loss of a storage device according to the present application;

FIG. 3 is a block diagram of an exemplary memory device data loss testing apparatus of the present application;

FIG. 4 illustrates a schematic diagram of a computer system suitable for use in implementing embodiments of the present application.

Detailed Description

Further advantages and effects of the present application will become readily apparent to those skilled in the art from the disclosure herein, by referring to the accompanying drawings and the preferred embodiments. The application may be practiced or carried out in other embodiments that depart from the specific details, and the details of the present description may be modified or varied from the spirit and scope of the present application. It should be understood that the preferred embodiments are presented by way of illustration only and not by way of limitation.

It should be noted that the illustrations provided in the following embodiments merely illustrate the basic concept of the present application by way of illustration, and only the components related to the present application are shown in the drawings and are not drawn according to the number, shape and size of the components in actual implementation, and the form, number and proportion of the components in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated.

In the following description, numerous details are set forth in order to provide a more thorough explanation of embodiments of the present application, it will be apparent, however, to one skilled in the art that embodiments of the present application may be practiced without these specific details, in other embodiments, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the embodiments of the present application.

FIG. 1 shows a schematic block diagram according to a computer system. The computer system includes a host, a control system, and a memory. Hereinafter, a solid state disk is described as an example. The solid state disk includes, for example, a control system and a memory as shown in the figure, and a storage medium of the memory is, for example, a flash memory chip array.

The host interface of the control system is connected to the host to transmit instructions. Host interfaces are, for example, SATA, M.2, mSATA, and PCI-E. The processor is coupled to a host interface, a cache controller, and a memory controller 128. The cache chip in the control system includes an SRAM chip and a DRAM chip, for example, storing an L2P mapping table. The processor is used to implement a core software layer of memory control, FTL (Flash Translation Layer ), so that the operating system and file system can access memory as if it were accessing a hard disk. The FTL also has features such as supporting all SLC (Single Level Cell ) and MLC (Multi-Level Cell), supporting bad block management, wear leveling, garbage collection, power-down restoration, write balancing techniques, etc. The core function of FTL is address mapping, wherein processor reads the cache chip via the cache controller to obtain L2P mapping table, and maps logical address received from host to physical address of memory based on L2P mapping table. The memory controller of the control system is connected to the memory and performs data access operation on corresponding storage units of the memory according to the physical address provided by the processor.

The memory includes eMMC. In order to improve the data read/write performance, the memory controller of the control system may read/write the eMMC via a plurality of channels CH0 and CH 1. Each channel is connected to a set of emmcs. Each eMMC includes a plurality of physical blocks, each physical block including a plurality of physical pages. Data access operations to flash memory chips include read, write, and erase. Due to the physical characteristics of eMMC, a basic unit of data operation is, for example, a physical page, and a basic unit of erase operation is, for example, a physical block.

The control system receives instructions from the host when the host performs data operations. The control system maps logical addresses in the instructions to physical addresses that characterize locations in memory, including channels, physical blocks, physical pages, and the like. In a read operation, the control system reads data in units of physical pages, and acquires read data corresponding to logical addresses therefrom. In the write operation, the control system generates data in the instruction in units of physical pages and then writes the data in units of physical pages into the EMMC. At the time of the write operation, the L2P mapping table also needs to be updated.

It should be understood that the number of control systems in fig. 1 is merely illustrative. There may be any number of control systems and memories as practical.

When performing read-write operation on the eMMC memory device, the SLCSLC is consumed, and after Single-Level Cell (XLC) block is consumed, XLC block starts to be consumed. After power failure, the maximum data size lost by XLC (X-Level Cell) block is also one of the important indicators of each manufacturer in measuring eMMC performance.

However, no method capable of automatically acquiring the maximum data lost when XLC blocks are written into storage equipment is found in the existing test method, so that the application provides a test method for data loss of the storage equipment, and the method is suitable for testing of XLC blocks.

Embodiments of the present application respectively propose a storage device data loss test method, a storage device data loss test apparatus, a computer device, and a computer readable storage medium, and these embodiments will be described in detail below.

Referring to fig. 2, fig. 2 is a flowchart illustrating a method for testing data loss of a storage device according to an exemplary embodiment of the present application. The method may be applied to the implementation environment shown in fig. 1 and executed specifically by a control system in the implementation environment. It should be understood that the method may be adapted to other exemplary implementation environments and be specifically executed by devices in other implementation environments, and the implementation environments to which the method is adapted are not limited by the present embodiment.

Referring to fig. 2, fig. 2 is a flowchart of an exemplary method for testing data loss of a storage device according to the present application, where the method for testing data loss of a storage device at least includes steps S210 to S240, and is described in detail as follows:

step S210, writing first data into a first storage unit of the storage device according to a first data writing parameter, wherein the first data writing parameter comprises the size, the type, the address and the number of times of executing the test step of the first data;

in an embodiment, the storage device is eMMC, and the first storage unit is XLC block in eMMC. After receiving a data writing instruction of the host, writing first data into the storage unit according to the first data writing parameter. The size of the first data refers to the data amount of the first data, the type is random data, and the address includes a writing start address and a writing end address.

Step S220, a power-down operation is executed on the storage device after the first data are written;

the application tests the maximum data volume lost by XLC block of the eMMC storage device after power failure, so that the power-down operation is executed on the storage device after the writing of the first data is completed.

Step S230, reading second data in a first storage unit of the storage device after power-down;

after the storage device is powered down, the eMMC storage device may lose data, so that the stored data in the XLC block at this time is acquired as the second data.

Step S240, obtaining difference data between the first data and the second data as lost data.

The first data is compared with the second data to obtain difference data, and the difference data can be regarded as lost data generated by power failure.

The above steps describe performing a test on the data lost by the storage device, and those skilled in the art may perform multiple tests according to actual requirements, and the multiple tests are performed in a loop to perform the steps S210 to S240.

It should be noted that, each time a test step is performed, a difference data is obtained, and if only one test step is performed, the difference data can be regarded as lost data; if the test steps are performed a plurality of times, a plurality of difference data are obtained, and the maximum data in the plurality of difference data can be the maximum lost data.

In an embodiment, the multiple testing steps are performed on the storage device, so as to obtain multiple difference data, and the maximum data in the multiple difference data is used as lost data.

Generally, when performing read/write operation on an eMMC memory device, SLC block is consumed first, and XLC block is consumed after SLCSLC is consumed. The application tests the lost data of XLC block, in order to ensure that the data can be written into the XLC block when the data is written, therefore, the data is written into the second memory cell SLC block before the data is written into the XLC block, namely the first memory cell.

In an embodiment, before the step of writing the first data to the first storage unit of the storage device, the method further comprises: and writing third data into a second storage unit of the storage device according to a second data writing parameter, wherein the third data writing parameter comprises the size, the type and the address of the third data.

In order to ensure that the second storage unit is full of data, the data size of the third data is larger than the storage capacity of the second storage unit.

Note that, the third data may be cold data, that is, cold_data, and the data amount cold_data_capability of the third data is expressed as:

cold_data_capcity = BKOPS_threshold*(SLC_page_count*a*b)+n

Specifically, a can take on 32k, b can take on 3, n can take on 1024KB, and the data size cold_data_ca_capability of the third data is expressed as

cold_data_capcity = BKOPS_threshold*(SLC_page_count*32KB*3)+1024KB

BKOPS_threshold is the number of SLC blocks reserved in the device; slc_page_count is the total SLC page number set by the device, where 32K represents one page size; slc_page_count 32kb 3 is the total number of pages of XLC, 3 represents XLC 3 times SLC; 1024KB indicates 1G, i.e., 1G is additionally written on the basis of BKOPS_threshold (SLC_page_count 32KB 3), which ensures that data is written onto XLC block.

In an embodiment, the first data may be hot data, and the first data amount hot_data_ca_policy is expressed as:

Hot_data_capcity=trunk_size*2*(cycle+1)

wherein trunk_size represents the size of the basic writing unit; cycle indicates the number of times the test step is performed. It should be noted that, the data unit of the hot data increases with the increase of the cycle, for example, cycle=1, trunk_size=4, hot data unit=4x2x2=16, i.e. one CMD25 carries 16 512 bytes; cycle=2, one pen brings 24 512 bytes.

In an embodiment, due to the limitation of different test platforms, the amount of data that can be carried by a write command is different, and assuming that the amount of data carried by a write of test platform a is M (hot_data_ca_performance), when cycle= (M/(count_size) 2)) -1 turn, the cycle is reset to 0.

In an embodiment, when the first test step is performed, the write start address of the first data is zero; when the second test step is performed, the write start address of the third data starts from the write end address of the first data, and the write start address of the first data starts from the write end address of the third data.

It should be understood that the sequence number of each step in the foregoing embodiment does not mean that the execution sequence of each process should be determined by the function and the internal logic, and should not limit the implementation process of the embodiment of the present application.

An exemplary embodiment of the present application shows a method for testing data loss of a storage device, the method comprising:

1. operating the power-on and power-off module;

2. initializing eMMC;

3. sending a command to check whether the cached function is closed, and executing step 4 when the cached function is closed;

4. all-card write pattern_a, i.e., write data to the entire memory device, which may be the same data, e.g., all 1's or all 2's; through the step, errors generated in the process of comparing the subsequent written data due to the fact that other data are included in the storage device can be avoided;

5. enter the cyclic step (carry out 6-13);

6. generating a cold data model:

(1) Generating cold data total: determining total amount of cold data

cold_data_capcity= BKOPS_threshold*(SLC_page_count*32KB*3)+1024KB

BKOPS_threshold is the number of SLC blocks reserved in the storage device; slc_page_count is the total SLC page number set by the storage device, where 32K represents one page size; slc_page_count 32kb 3 is the total number of pages of XLC, where 3 represents that XLC is 3 times SLC; 1024KB indicates 1G, i.e. 1G is additionally written on the basis of BKOPS_threshold (SLC_page_count 32KB 3), so that data can be written on XLC block;

(2) The generated data unit cold data unit is 4 MB, the data content is pattern_b, and the cold data start logical address cold data start lba starts from the hot data end logical address hot data end lba, it should be noted that, during the first cycle (first test), the cold data start logical address cold data start lba =0;

7. cold data start logical address cold data start lba = hot data end logical address hot data end lba;

8. starting writing operation of cold data;

9. cold data end logical address cold data end lba = cold data start logical address cold data start lba + cold data total;

10. sending a command to start a cache function;

11. generating a thermal data hot data model:

(1) Data unit: trunk_size 2 (cycle+1) KB;

wherein, trunk_size is taken as an input parameter to represent a base write unit; cycle is the number of test turns. The data unit of the hot data increases with the increase of the cycle, for example, cycle=1, trunk_size=4, hot data unit=4x2x2=16, i.e. one CMD25 carries 16 512 bytes; cycle=2, one pen brings 24 512 bytes. I.e. one CMD25 carries 16 512 bytes; when cycle=2, one pen takes 24 512 bytes;

(2) The data content is pattern_rand (random data), and the hot data start logical address hot data start lba starts from the cold data end logical address cold data end lba;

12. hot data start logical address Hot data start lba = cold data end logical address cold data end lba;

13. starting a write operation of hot data;

14. hot data end lba=hot data start logical address hot data start lba +trunk_size 2 (cycle+1);

15. operating the power-on and power-off module;

16. reading thermal data, recording thermal data before power-off and thermal data after power-off, and comparing to obtain inconsistent data quantity;

17. and finally, the maximum data volume inconsistent with the output data is the maximum data volume lost by XLC after power-on under the cache-on condition.

It should be noted that, due to the limitation of different test platforms, the amount of data carried by one write command is different, and assuming that the amount of data carried by one write of test platform a is M, when cycle= (M/(count_size) 2)) -1 turn, the cycle is reset to 0.

Fig. 3 is a block diagram of a storage device data loss testing apparatus according to an exemplary embodiment of the present application. The device can be applied to the implementation environment shown in fig. 1 and is particularly configured in an intelligent terminal. The apparatus may also be adapted to other exemplary implementation environments and may be specifically configured in other devices, and the present embodiment is not limited to the implementation environments to which the apparatus is adapted.

As shown in fig. 3, a storage device data loss testing apparatus, the testing apparatus includes:

a data writing module 310, configured to write first data to a first storage unit of the storage device according to a first data writing parameter, where the first data writing parameter includes a size, a type, a location of the first data, and a number of times of executing a test step;

the power-down control module 320 is configured to perform a power-down operation on the storage device after the first data is written;

the data reading module 330 is configured to read the second data in the first storage unit of the storage device after power-down;

the data comparing module 340 is configured to obtain difference data between the first data and the second data as lost data.

It should be noted that, the storage device data loss testing apparatus provided in the foregoing embodiment and the storage device data loss testing method provided in the foregoing embodiment belong to the same concept, and the specific manner in which each module and unit perform the operation has been described in detail in the method embodiment, which is not repeated herein. In practical application provided by the above embodiment, the above function allocation may be performed by different functional modules according to needs, that is, the internal structure of the device is divided into different functional modules to perform all or part of the functions described above, which is not limited herein.

The embodiment of the application also provides computer equipment, which comprises: one or more processors; and a storage means for storing one or more programs which, when executed by the one or more processors, cause the computer device to implement the storage device data loss test method provided in the above embodiments.

FIG. 4 illustrates a schematic diagram of a computer system suitable for use in implementing embodiments of the present application. It should be noted that the computer system of the computer device shown in fig. 4 is only an example, and should not impose any limitation on the functions and the scope of use of the embodiment of the present application.

As shown in fig. 4, the computer system includes a central processing unit (Central Processing Unit, CPU) that can perform various appropriate actions and processes, such as performing the methods described in the above embodiments, according to a program stored in a Read-Only Memory (ROM) or a program loaded from a storage section into a random access Memory (Random Access Memory, RAM). In the RAM, various programs and data required for the system operation are also stored. The CPU, ROM and RAM are connected to each other by a bus. An Input/Output (I/O) interface is also connected to the bus.

The following components are connected to the I/O interface: an input section including a keyboard, a mouse, etc.; an output section including a Cathode Ray Tube (CRT), a liquid crystal display (Liquid Crystal Display, LCD), and the like, and a speaker, and the like; a storage section including a hard disk or the like; and a communication section including a network interface card such as a LAN (Local Area Network ) card, a modem, or the like. The communication section performs communication processing via a network such as the internet. The drives are also connected to the I/O interfaces as needed. Removable media such as magnetic disks, optical disks, magneto-optical disks, semiconductor memories, and the like are mounted on the drive as needed so that a computer program read therefrom is mounted into the storage section as needed.

In particular, according to embodiments of the present application, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present application include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising a computer program for performing the storage device data loss test method shown in flowchart 2. In such embodiments, the computer program may be downloaded and installed from a network via a communication portion, and/or installed from a removable medium. When being executed by a Central Processing Unit (CPU), performs the various functions defined in the system of the present application.

It should be noted that, the computer readable medium shown in the embodiments of the present application may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium may be, for example, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-Only Memory (ROM), an erasable programmable read-Only Memory (Erasable Programmable Read Only Memory, EPROM), flash Memory, an optical fiber, a portable compact disc read-Only Memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present application, a computer-readable signal medium may comprise a data signal propagated in baseband or as part of a carrier wave, with a computer-readable computer program embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. A computer program embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: wireless, wired, etc., or any suitable combination of the foregoing.

The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. Where each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams or flowchart illustration, and combinations of blocks in the block diagrams or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

The units involved in the embodiments of the present application may be implemented by software, or may be implemented by hardware, and the described units may also be provided in a processor. Wherein the names of the units do not constitute a limitation of the units themselves in some cases.

Another aspect of the application also provides a computer readable storage medium having stored thereon a computer program which, when executed by a processor of a computer, causes the computer to perform a storage device data loss test method as described above. The computer-readable storage medium may be contained in the memory described in the above embodiment or may exist alone without being assembled into the memory.

Another aspect of the application also provides a computer program product or computer program comprising computer instructions stored in a computer readable storage medium. The processor of the computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions so that the computer device performs the storage device data loss test method provided in the above-described respective embodiments.

The above embodiments are merely illustrative of the principles of the present application and its effectiveness, and are not intended to limit the application. Modifications and variations may be made to the above-described embodiments by those skilled in the art without departing from the spirit and scope of the application. It is therefore intended that all equivalent modifications and changes made by those skilled in the art without departing from the spirit and technical spirit of the present application shall be covered by the appended claims.

Claims

1. A method for testing data loss of a storage device, the method comprising:

2. The method for testing data loss of a storage device according to claim 1, wherein the step of testing the storage device is performed a plurality of times to obtain a plurality of difference data, and a maximum data among the plurality of difference data is used as the lost data.

3. The method of claim 1 or 2, wherein prior to the step of writing the first data to the first storage unit of the storage device, the method further comprises:

4. The method of claim 3, wherein the third data has a data size greater than a storage capacity of the second storage unit.

5. The method for testing data loss of a storage device according to claim 4, wherein the write start address of the first data is zero when the first testing step is performed; when the second test step is performed, the write start address of the second data starts from the write end address of the first data, and the write start address of the first data starts from the write end address of the second data.

6. The storage device data loss test method of claim 5, wherein the data amount cold_data_ca_hit of the third data is expressed as:

cold_data_capcity = BKOPS_threshold*(SLC_page_count*a*b)+n

7. The storage device data loss test method of claim 6, wherein the data amount hot_data_ca_hit of the first data is expressed as:

hot_data_capcity=trunk_size*2*(cycle+1)

8. A storage device data loss testing apparatus, the testing apparatus comprising:

9. A computer device, comprising:

one or more processors; and

one or more machine readable media having instructions stored thereon, which when executed by the one or more processors, cause the processors to perform the storage device data loss test method of one or more of claims 1-7.

10. One or more machine-readable media, characterized in that,

instructions stored thereon, which when executed by one or more processors, cause the processors to perform the storage device data loss test method of one or more of claims 1-7.