CN116795761A - Control method and device of I2C bus multiplexer and electronic equipment - Google Patents
Control method and device of I2C bus multiplexer and electronic equipment Download PDFInfo
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Abstract
The embodiment of the application provides a control method, a device and electronic equipment of an I2C bus multiplexer, which comprise the following steps: determining whether the baseboard management controller is in a restarting state under the condition that the AC is in a power-on state; under the condition that the baseboard management controller is in a restarting state under the condition that the AC is in a power-on state, scanning multiple I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and determining that a channel of the I2C bus multiplexer corresponding to the target I2C bus is closed. According to the application, the problem that when the BMC is restarted in the AC power-on state, the address allocation of the GPU is affected by opening some channels of the bus multiplexer is solved, and then the aim that the BMC is restarted to control all channels of the I2C bus multiplexer to be closed in the AC power-on state is achieved, so that the reset on software is realized.
Description
Technical Field
The embodiment of the application relates to the field of computers, in particular to a control method and device of an I2C bus multiplexer, a storage medium and electronic equipment.
Background
The BMC executes the remote management controller of the server, which is called Baseboard Management Controller in English, i.e. baseboard management controller.
The BMC can realize the functions of relevant control, information monitoring and the like of the server, and is a platform for intuitively presenting the information of the server. The BMC may typically monitor the GPU information installed on the server, including device serial number, version number, temperature, alarm information, and the like.
Taking GPU as an example, multiple GPU cards may be installed on one server, and the protocols on the I2C bus become progressively more complex due to the out-of-band monitoring function update iterations. For example, the current GPU may also respond to the DUID command of the SMBUS, and the network card monitoring policy may affect the allocation of the GPUI2C address, so that once the GPU is reassigned the I2C address, the monitoring for the GPU cannot be performed.
In the prior art, the GPU equipment is hung on the bus multiplexer, the default multiplexer is in a closed state when the machine AC is powered on, the multiplexer shields the access to the GPU directly at the moment, but when the BMC is restarted in the powered on state, the bus multiplexer may be in a state that a certain channel is opened, and at this moment, the monitoring policy of the network card influences the address allocation of the GPU, so that the GPU information cannot be obtained.
Disclosure of Invention
The embodiment of the application provides a control method and device of an I2C bus multiplexer, a storage medium and electronic equipment, which at least solve the problem that address allocation of a GPU is affected by opening some channels of the bus multiplexer when a BMC is restarted in an AC power-on state in the related art.
According to some embodiments of the present application, there is provided a method for controlling an I2C bus multiplexer, an I2C bus of a baseboard management controller is connected or not connected to the I2C bus multiplexer, a plurality of channels in the I2C bus multiplexer are respectively connected to a plurality of GPUs, including: determining whether the baseboard management controller is in a restarting state under the condition that the AC is in a power-on state; and under the condition that the AC is in the restarting state in the powering-on state, scanning a plurality of I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed.
In some embodiments of the present application, scanning multiple I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed, including: a first determination step: determining whether the scanned current I2C bus is the target I2C bus; a first control step: controlling all channels of the corresponding I2C bus multiplexer to be closed under the condition that the current I2C bus is the target I2C bus; a second determination step: under the condition that the current I2C bus is not the target I2C bus, scanning the next I2C bus of the current I2C bus and determining whether the next I2C bus of the current I2C bus is the target I2C bus; and a second control step: when the next I2C bus of the current I2C bus is the target I2C bus, controlling all channels of the I2C bus multiplexer corresponding to the next I2C bus to be closed, and continuing to scan the next I2C bus of the next I2C bus; and sequentially repeating the first determining step, the first controlling step, the second determining step and the second controlling step at least once until all channels of the I2C bus multiplexer corresponding to all target I2C buses of the baseboard management controller are closed.
In some embodiments of the present application, before scanning the plurality of I2C buses of the baseboard management controller according to a preset sequence, the method further includes obtaining position information of each I2C bus of the baseboard management controller in the baseboard management controller; and determining the preset sequence according to the position information of the plurality of paths of I2C buses.
In some embodiments of the present application, determining the preset sequence according to the position information of the plurality of I2C buses includes: determining a reference position in the baseboard management controller; acquiring distance information between the position information of each path of I2C bus and the reference position; and determining the preset sequence according to the plurality of distance information.
In some embodiments of the present application, before scanning the multiple I2C buses of the baseboard management controller according to a preset sequence, the method further includes obtaining types of signals transmitted by the I2C buses of each path of the baseboard management controller; determining the functions of the signals of each path according to the types of the signals transmitted by the I2C buses of each path; and determining the preset sequence according to the functions of the multiple paths of signals.
In some embodiments of the present application, determining the preset sequence according to the function of the plurality of signals includes: acquiring importance degree information of functions of the signals of each path; and determining the preset sequence according to a plurality of importance degree information.
In some embodiments of the present application, scanning multiple I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed, including: scanning multiple paths of I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of a primary I2C bus multiplexer connected with the target I2C bus to be closed; determining whether at least one stage of non-primary I2C bus multiplexer is included under the primary I2C bus multiplexer; and controlling the channel of the non-primary I2C bus multiplexer to be closed under the condition that the non-primary I2C bus multiplexer of at least one stage is included under the primary I2C bus multiplexer.
According to some embodiments of the present application, there is provided a control apparatus of an I2C bus multiplexer, an I2C bus of the baseboard management controller is connected or not connected to the I2C bus multiplexer, a plurality of channels in the I2C bus multiplexer are respectively connected to a plurality of GPUs, including: a first determining unit, configured to determine whether the baseboard management controller is in a restart state when AC is in a power-on state; the control unit is used for scanning multiple paths of I2C buses of the baseboard management controller according to a preset sequence under the condition that the baseboard management controller is in the restarting state when the AC is in the powering-on state, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed.
According to some embodiments of the present application, there is provided a computer readable storage medium having a computer program stored therein, wherein the computer program when executed by a processor implements the steps of any of the methods.
According to some embodiments of the present application there is provided an electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of any one of the methods when executing the computer program.
According to the application, whether the baseboard management controller is in a restarting state under the condition that the AC is in a power-on state is firstly determined, then under the condition that the baseboard management controller is in the restarting state under the condition that the AC is in the power-on state, the multi-path I2C buses of the baseboard management controller are scanned according to a preset sequence, the target I2C buses connected to the I2C bus multiplexer are determined, and the channel closing of the I2C bus multiplexer corresponding to the target I2C buses is determined. The method and the device realize that the channel of the I2C bus multiplexer connected to the I2C bus is controlled to be closed when the AC is in a restarting state under the power-on state, so that the influence on the address allocation of the GPU is avoided. The soft reset is realized, and compared with the hard reset mode, the cost is saved.
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FIG. 1 is a flow chart of a method of controlling an I2C bus multiplexer according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an I2C bus layout according to an embodiment of the application;
fig. 3 is a block diagram of a control device of an I2C bus multiplexer according to an embodiment of the present application.
Detailed Description
Embodiments of the present application will be described in detail below with reference to the accompanying drawings in conjunction with the embodiments.
It should be noted that the terms "first," "second," and the like in the description and the claims of the present application and the above figures are used for distinguishing between similar objects and not necessarily for describing a particular sequential or chronological order.
For convenience of description, the following will describe some terms or terminology involved in the embodiments of the present application:
baseboard management controller (Baseboard Management Controller, BMC for short): the intelligent management controller is a controller for providing intelligent management under the IPMI structure, the BMC gets the name because of being integrated on a main board, and the management of the system management software on each managed device is realized by communicating with the BMC. The BMC monitors the system for serious events by communicating with different sensors on the motherboard and issues alarms and log events when certain parameters exceed their preset thresholds. Specifically, the BMC chip is equivalent to a central processor in a computer, a pair of SMBus interfaces on the BMC chip are connected with a network, a user can realize Out-of-band management (Out-of-band) function of taking over a remote server through network access, such as a remote take-over server (Pre-OS), and complete take-over of the remote server is realized at a client; the remote server is connected with the Modem through an RS-232 interface, and under the condition that the remote server is down, a user can acquire SDR and SEL data through dialing access, and the fault cause is analyzed and diagnosed; the BMC accesses SMC on a module fan backboard, a power backboard and the like through an IPMB interface, so that key parameter management such as temperature, voltage, fan rotation speed and the like of various backboard is realized; the BMC realizes an IPMI message transmission mechanism through a system interface (multipurpose SMIC: server Management Interface Chip), controls the LCD to display and realizes the communication between upper software and bottom F/W, thereby realizing alarm and data acquisition. SDR, SEL, FRU (Field Replacement Unit) physical entity may be a memory bank built in a chip or may be an external E2PROM.
I2C bus: the I2C bus is a simple, bi-directional two-wire synchronous serial bus. It requires only two wires to transfer information between devices connected to the bus. The master device is used to initiate the bus transfer of data and generate a clock to open the transfer device, where any addressed device is considered a slave device. If the host computer is to send data to the slave device, the host computer firstly addresses the slave device, then actively sends the data to the slave device, and finally the host computer terminates the data transmission; if the host is to receive data from the slave, the slave is addressed by the master first, then the host receives data sent by the slave, and finally the host terminates the receiving process. In this case, the host is responsible for generating the timing clock and terminating the data transfer.
AC: namely a wireless access control server and an Access Controller (AC) wireless local area network access control device, which are responsible for converging data from different APs and accessing the Internet, and simultaneously completing the control functions of configuration management of the AP device, authentication, management, broadband access, safety and the like of wireless users.
GPU: graphics processor (Graphics Processing Unit, GPU), also known as display core, vision processor, display chip, is a microprocessor that is dedicated to image and graphics related operations on personal computers, workstations, gaming machines, and some mobile devices (e.g., tablet computers, smartphones, etc.).
SMBUS: (System Management Bus ) is applied to low rate communications in mobile PC and desktop PC systems. It is desirable to control devices on a motherboard and collect corresponding information via an inexpensive and powerful bus (consisting of two wires). The SMBus provides a control bus for such tasks as system and power management, and the system using the SMBus can save the pin count of the device by using the SMBus to send and receive messages between the devices instead of using separate control lines.
As described in the background art, in the prior art, when the BMC is restarted in the AC power-on state, the address allocation of the GPU is affected by opening some channels of the bus multiplexer, so as to solve the problem that when the BMC is restarted in the AC power-on state, the address allocation of the GPU is affected by opening some channels of the bus multiplexer.
In an embodiment of the present application, there is provided a method for controlling an I2C bus multiplexer running in a baseboard management controller, where an I2C bus of the baseboard management controller is connected or not connected to the I2C bus multiplexer, and a plurality of channels in the I2C bus multiplexer are respectively connected to a plurality of GPUs, and fig. 1 is a flowchart according to an embodiment of the present application, and as shown in fig. 1, the flowchart includes the following steps:
step S102, determining whether the baseboard management controller is in a restarting state under the condition that AC is in a power-on state;
the BMC collects information from various sensors and then can be stored in a local SEL for later inquiry, and important information can be displayed on a small LCD display (hardware support is needed) on the front panel of the server. And can access the information through a network card (LAN), a Serial port (Serial) and a local (Host).
The baseboard management controller may detect whether the AC is in a power-on state, for example, may determine that the AC is powered on by monitoring a level state of a preset pin of the baseboard management controller, for example, a level of the preset pin is a high level, and a level of the preset pin is a low level, and determines that the AC is powered down.
In some cases, when the baseboard management controller needs to restart, for example, when the network of the baseboard management controller is abnormal, it may be specifically determined whether the network abnormality exists by monitoring the state of the network port of the baseboard management controller;
in some cases, the baseboard management controller needs to be restarted, for example, in the case that some monitoring functions of the baseboard management controller are abnormal, the monitoring functions of the baseboard management controller are abnormal, for example, the baseboard management controller cannot normally monitor the state of a certain server;
specifically, the main board sends a state detection instruction to the baseboard management controller; determining whether the baseboard management controller is in a restarting state according to the received response information of the baseboard management controller;
specifically, when the AC is in a power-on state, the main board sends a state detection instruction to the baseboard management controller; determining whether response information of the baseboard management controller is received within a preset time period; and if not, sending a restarting instruction to the baseboard management controller to control the baseboard management controller to restart. The management controller generates the state of the identification information identification when in the restarting state, and the identification information identifies that the baseboard management controller is in the restarting state when the AC is in the power-on state, so that the I2C bus multiplexer can be controlled conveniently. The state detection instruction can be in the form of a message;
in addition, the management controller can send the restarting information to the main board at regular time (for example, once in 100 ms) in the restarting process, so that the main board control can conveniently execute other operations, the main board control is not affected to execute other operations, and the restarting end information is sent in a pause mode and synchronously generated after the restarting is ended. And after the restarting is finished, the channel closing of the corresponding I2C bus multiplexer is not controlled any more.
Step S104, when the baseboard management controller is in the restart state in the power-on state, scanning multiple paths of I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed.
In some cases, although the target I2C bus is connected with the I2C bus multiplexer, for some channels temporarily idle by the I2C bus multiplexer, the I2C bus multiplexer may be kept in an open state, so that the GPU is not affected, and resources are saved.
The I2C bus multiplexer may be a PCA9548 bus multiplexer, and the PCA9548ADBR device has eight bidirectional switches controllable through the I2C bus. The SCL/SDA upstream pair fans out to eight downstream pairs or channels. Any single SCx/SDx channel or combination of channels may be selected.
As shown in fig. 2, the baseboard management controller has n I2C buses, where n of the baseboard management controllers may be connected to one I2C bus multiplexer, and of course, n of the baseboard management controllers may be connected to a plurality of I2C bus multiplexers, and of course, some of the n I2C buses in the baseboard management controller may be not connected to the I2C bus multiplexer, and the configuration may be performed according to actual requirements. Therefore, it is necessary to determine which I2C buses are connected to the I2C bus multiplexer first, i.e. to determine the target I2C bus, after determining that the baseboard management controller is in the restart state when the AC is in the power-on state.
As shown in fig. 2, the I2C bus multiplexer has three channels that connect GPU1, GPU2, and GPU3, respectively.
The BMC monitors the functions of the GPU, and can monitor the temperature, voltage and other information of the GPU;
according to the control method of the I2C bus multiplexer, whether the baseboard management controller is in the restarting state under the AC power-on state is firstly determined, then under the condition that the baseboard management controller is in the restarting state under the AC power-on state, the multipath I2C buses of the baseboard management controller are scanned according to a preset sequence, the target I2C buses connected to the I2C bus multiplexer are determined, and the channel closing of the I2C bus multiplexer corresponding to the target I2C buses is determined. The method and the device realize that the channel of the I2C bus multiplexer connected to the I2C bus is controlled to be closed when the AC is in a restarting state under the power-on state, so that the influence on the address allocation of the GPU is avoided. The soft reset is realized, compared with a hard reset mode, the hardware complexity and the cost are reduced, and the flexibility is improved; and the state of the I2C bus multiplexer is the same in the AC power-on state and the BMC restarting state in the power-on state, so that the probability problem in different test scenes is avoided, and the BMC stability is improved. The monitoring functions of different modules are prevented from interfering with each other.
In an embodiment of the method of the present application, scanning multiple I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed, including:
a first determination step: determining whether the scanned current I2C bus is the target I2C bus;
a first control step: controlling all channels of the corresponding I2C bus multiplexer to be closed under the condition that the current I2C bus is the target I2C bus;
a second determination step: under the condition that the current I2C bus is not the target I2C bus, scanning the next I2C bus of the current I2C bus and determining whether the next I2C bus of the current I2C bus is the target I2C bus;
and a second control step: when the next I2C bus of the current I2C bus is the target I2C bus, controlling all channels of the I2C bus multiplexer corresponding to the next I2C bus to be closed, and continuing to scan the next I2C bus of the next I2C bus;
and sequentially repeating the first determining step, the first controlling step, the second determining step and the second controlling step at least once until all channels of the I2C bus multiplexer corresponding to all target I2C buses of the baseboard management controller are closed.
That is, the multi-path I2C buses are scanned path by path according to a preset sequence, so that the missing scanning is prevented. All of the channels controlling an I2C bus multiplexer connected to the I2C bus are turned off.
In an embodiment of the method of the present application, before scanning the multiple I2C buses of the baseboard management controller according to a preset sequence, the method further includes:
acquiring the position information of each path of I2C bus of the baseboard management controller in the baseboard management controller;
specifically, the position information of each path of the I2C bus may be stored in a register, and read from the register when in use;
and determining the preset sequence according to the position information of the plurality of paths of I2C buses.
That is, after determining the position information of each I2C bus in the baseboard management controller, determining an order of arranging positions, for example, from the first position to the last position and from the last position to the first position, that is, a preset order, and further performing scanning according to the preset order can prevent missed scanning.
In the method embodiment of the present application, determining the preset sequence according to the position information of the plurality of paths of I2C buses includes:
determining a reference position in the baseboard management controller;
specifically, the reference position may be selected, for example, a first position is selected as the reference position, a last position is selected as the reference position, and an intermediate position is selected as the reference position;
acquiring distance information between the position information of each path of I2C bus and the reference position;
and determining the preset sequence according to the plurality of distance information.
For example, scanning is performed in order of from small to large according to distance information, and scanning is performed in order of from large to small according to distance information;
that is, after the reference position is selected, the position information of each path of the I2C bus is different from the reference position, and then a preset sequence is determined according to the magnitude of the difference. Generally, the positions of the I2C buses in the baseboard management controller are arranged in sequence, and the scanning mode according to the difference value is simple to operate and is not easy to miss.
In an embodiment of the method of the present application, before scanning the multiple I2C buses of the baseboard management controller according to a preset sequence, the method further includes:
acquiring the types of signals transmitted by each path of I2C bus of the baseboard management controller;
for example, control class signals, indication class signals, signals for storage, etc.;
determining the functions of the signals of each path according to the types of the signals transmitted by the I2C buses of each path;
for example, the function of the control signal is to realize the corresponding control function, the function of the indication signal is to indicate the corresponding processing result, for example, indicate the processing success or processing failure, and the function of the signal used for storing is to store the corresponding information in the storage space, so that the subsequent use is convenient;
and determining the preset sequence according to the functions of the multiple paths of signals.
That is, the function of the signals is determined according to a scanning sequence, and the follow-up function can be realized while the missing scanning is prevented.
In an embodiment of the method of the present application, determining the preset sequence according to the functions of the multiple paths of signals includes:
acquiring importance degree information of functions of the signals of each path;
for example, one order of ranking the importance information from high to low is: a function of controlling a class signal, a function of indicating a class signal, a function of a signal for storage;
and determining the preset sequence according to a plurality of importance degree information.
The corresponding determined preset sequence according to the sequence is as follows: control class signal, indication class signal, signal for storage.
That is, the importance of the function is determined according to the function of the signal, the important function is scanned first, and then the important function is scanned again, so that the corresponding I2C bus multiplexer corresponding to the I2C bus is turned off, and the influence on the address of the GPU corresponding to the function can be prevented. The more important the function is shut down first, the effect is minimized.
In an embodiment of the method of the present application, scanning multiple I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed, including:
scanning multiple paths of I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of a primary I2C bus multiplexer connected with the target I2C bus to be closed;
determining whether at least one stage of non-primary I2C bus multiplexer is included under the primary I2C bus multiplexer;
and controlling the channel of the non-primary I2C bus multiplexer to be closed under the condition that the non-primary I2C bus multiplexer of at least one stage is included under the primary I2C bus multiplexer.
For example, a secondary I2C bus multiplexer, a tertiary I2C bus multiplexer, a quaternary I2C bus multiplexer;
that is, the I2C bus multiplexer may be multi-level, and if the I2C bus multiplexer is multi-level, the I2C bus multiplexer of each level needs to be turned off; to prevent impact on address assignment of the GPU.
The main execution body of the steps may be a baseboard management controller, but is not limited thereto.
From the description of the above embodiments, it will be clear to a person skilled in the art that the method according to the above embodiments may be implemented by means of software plus the necessary general hardware platform, but of course also by means of hardware, but in many cases the former is a preferred embodiment. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art in the form of a software product stored in a storage medium (e.g. ROM/RAM, magnetic disk, optical disk) comprising instructions for causing a terminal device (which may be a mobile phone, a computer, a server, or a network device, etc.) to perform the method according to the embodiments of the present application.
The embodiment also provides a control device of the I2C bus multiplexer, which is used for implementing the foregoing embodiments and preferred implementations, and is not described in detail. As used below, the term "module" may be a combination of software and/or hardware that implements a predetermined function. While the means described in the following embodiments are preferably implemented in software, implementation in hardware, or a combination of software and hardware, is also possible and contemplated.
Fig. 3 is a block diagram of a control device of an I2C bus multiplexer according to an embodiment of the present application, where an I2C bus of the baseboard management controller is connected or not connected to the I2C bus multiplexer, and a plurality of channels in the I2C bus multiplexer are respectively connected to a plurality of GPUs, as shown in fig. 3, and the device includes:
a first determining unit 31 for determining whether the baseboard management controller is in a restarting state in a power-on state of AC;
the baseboard management controller may detect whether the AC is in a power-on state, for example, may determine that the AC is powered on by monitoring a level state of a preset pin of the baseboard management controller, for example, a level of the preset pin is a high level, and a level of the preset pin is a low level, and determines that the AC is powered down.
And a control unit 33, configured to scan multiple I2C buses of the baseboard management controller according to a preset sequence, determine a target I2C bus connected to the I2C bus multiplexer, and control the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed when the baseboard management controller is in the restart state with the AC in the power-on state.
The I2C bus multiplexer may be a PCA9548 bus multiplexer, and the PCA9548ADBR device has eight bidirectional switches controllable through the I2C bus. The SCL/SDA upstream pair fans out to eight downstream pairs or channels. Any single SCx/SDx channel or combination of channels may be selected.
According to the control device of the I2C bus multiplexer, a first determining unit determines whether a baseboard management controller is in a restarting state under the condition that an AC is in a power-on state, and when the baseboard management controller is in the restarting state under the condition that the AC is in the power-on state, the control unit scans multiple I2C buses of the baseboard management controller according to a preset sequence, determines a target I2C bus connected to the I2C bus multiplexer, and determines that a channel of the I2C bus multiplexer corresponding to the target I2C bus is closed. The method and the device realize that the channel of the I2C bus multiplexer connected to the I2C bus is controlled to be closed when the AC is in a restarting state under the power-on state, so that the influence on the address allocation of the GPU is avoided. The soft reset is realized, compared with a hard reset mode, the hardware complexity and the cost are reduced, and the flexibility is improved; and the state of the I2C bus multiplexer is the same in the AC power-on state and the BMC restarting state in the power-on state, namely, the state consistency of the I2C bus multiplexer is ensured, the probability problem in different test scenes is avoided, and the BMC stability is improved.
In an embodiment of the device of the application, the control unit comprises a first determination module, a first control module, a second determination module, a second control module and a repetition module,
the first determining module is configured to perform a first determining step: determining whether the scanned current I2C bus is the target I2C bus;
the first control module is configured to execute a first control step: controlling all channels of the corresponding I2C bus multiplexer to be closed under the condition that the current I2C bus is the target I2C bus;
the second determining module is configured to perform a second determining step: under the condition that the current I2C bus is not the target I2C bus, scanning the next I2C bus of the current I2C bus and determining whether the next I2C bus of the current I2C bus is the target I2C bus;
the second control module is used for executing a second control step: when the next I2C bus of the current I2C bus is the target I2C bus, controlling all channels of the I2C bus multiplexer corresponding to the next I2C bus to be closed, and continuing to scan the next I2C bus of the next I2C bus;
the repeating module is configured to sequentially repeat the first determining step, the first controlling step, the second determining step, and the second controlling step at least once until all channels of the I2C bus multiplexer corresponding to all the target I2C buses of the baseboard management controller are closed.
That is, the multi-path I2C buses are scanned path by path according to a preset sequence, so that the missing scanning is prevented. All of the channels controlling an I2C bus multiplexer connected to the I2C bus are turned off.
In an embodiment of the device of the application, the device further comprises a first acquisition unit and a second determination unit,
the first acquisition unit is used for acquiring the position information of each path of I2C bus of the baseboard management controller in the baseboard management controller before scanning the plurality of paths of I2C buses of the baseboard management controller according to a preset sequence;
specifically, the position information of each path of the I2C bus may be stored in a register, and read from the register when in use;
the second determining unit is used for determining the preset sequence according to the position information of the plurality of paths of I2C buses.
That is, after determining the position information of each I2C bus in the baseboard management controller, determining an order of arranging positions, for example, from the first position to the last position and from the last position to the first position, that is, a preset order, and further performing scanning according to the preset order can prevent missed scanning.
In an embodiment of the device, the second determining unit includes a third determining module, a first acquiring module and a fourth determining module, where the third determining module is configured to determine a reference position in the baseboard management controller; specifically, the reference position may be selected, for example, a first position is selected as the reference position, a last position is selected as the reference position, and an intermediate position is selected as the reference position;
the first acquisition module is used for acquiring the distance information between the position information of each path of the I2C bus and the reference position; and the fourth determining module is used for determining the preset sequence according to the plurality of distance information. For example, scanning is performed in order of from small to large according to distance information, and scanning is performed in order of from large to small according to distance information;
that is, after the reference position is selected, the position information of each path of the I2C bus is different from the reference position, and then a preset sequence is determined according to the magnitude of the difference. Generally, the positions of the I2C buses in the baseboard management controller are arranged in sequence, and the scanning mode according to the difference value is simple to operate and is not easy to miss.
In an embodiment of the device, the device further includes a second acquiring unit, a third determining unit and a fourth determining unit, where the second acquiring unit is configured to acquire types of signals transmitted by each path of I2C buses of the baseboard management controller before scanning the paths of I2C buses of the baseboard management controller according to a preset sequence; for example, control class signals, indication class signals, signals for storage, etc.; the third determining unit is used for determining the functions of the signals of each path according to the types of the signals transmitted by the I2C buses of each path; for example, the function of the control signal is to realize the corresponding control function, the function of the indication signal is to indicate the corresponding processing result, for example, indicate the processing success or processing failure, and the function of the signal used for storing is to store the corresponding information in the storage space, so that the subsequent use is convenient; the fourth determining unit is used for determining the preset sequence according to the functions of the multiple paths of signals.
That is, the function of the signals is determined according to a scanning sequence, and the follow-up function can be realized while the missing scanning is prevented.
In the embodiment of the device provided by the application, the fourth determining unit comprises a second acquiring module and a fifth determining module, wherein the second acquiring module is used for acquiring the importance degree information of the functions of the signals of each path; and a fifth determining module determines the preset sequence according to a plurality of importance degree information.
For example, one order of ranking the importance information from high to low is: a function of controlling a class signal, a function of indicating a class signal, a function of a signal for storage;
the corresponding determined preset sequence according to the sequence is as follows: control class signal, indication class signal, signal for storage.
That is, the importance of the function is determined according to the function of the signal, the important function is scanned first, and then the important function is scanned again, so that the corresponding I2C bus multiplexer corresponding to the I2C bus is turned off, and the influence on the address of the GPU corresponding to the function can be prevented. The more important the function is shut down first, the effect is minimized.
In an embodiment of the device of the application, the control unit comprises a scanning module, a sixth determination module and a third control module,
the scanning module is used for scanning multiple I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of a primary I2C bus multiplexer connected with the target I2C bus to be closed;
the sixth determining module is used for determining whether the primary I2C bus multiplexer comprises at least one stage of non-primary I2C bus multiplexer;
and the third control module is used for controlling the channel of the non-primary I2C bus multiplexer of at least one stage to be closed under the condition that the non-primary I2C bus multiplexer of at least one stage is included under the primary I2C bus multiplexer.
For example, a secondary I2C bus multiplexer, a tertiary I2C bus multiplexer, a quaternary I2C bus multiplexer;
that is, the I2C bus multiplexer may be multi-level, and if the I2C bus multiplexer is multi-level, the I2C bus multiplexer of each level needs to be turned off; to prevent impact on address assignment of the GPU.
It should be noted that each of the above modules may be implemented by software or hardware, and for the latter, it may be implemented by, but not limited to: the modules are all located in the same processor; alternatively, the above modules may be located in different processors in any combination.
Embodiments of the present application also provide a computer readable storage medium having a computer program stored therein, wherein the computer program is arranged to perform the steps of any of the method embodiments described above when run.
In one exemplary embodiment, the computer readable storage medium may include, but is not limited to: a usb disk, a Read-Only Memory (ROM), a random access Memory (Random Access Memory, RAM), a removable hard disk, a magnetic disk, or an optical disk, or other various media capable of storing a computer program.
An embodiment of the application also provides an electronic device comprising a memory having stored therein a computer program and a processor arranged to run the computer program to perform the steps of any of the method embodiments described above.
In an exemplary embodiment, the electronic device may further include a transmission device connected to the processor, and an input/output device connected to the processor.
Specific examples in this embodiment may refer to the examples described in the foregoing embodiments and the exemplary implementation, and this embodiment is not described herein.
It will be appreciated by those skilled in the art that the modules or steps of the application described above may be implemented in a general purpose computing device, they may be concentrated on a single computing device, or distributed across a network of computing devices, they may be implemented in program code executable by computing devices, so that they may be stored in a storage device for execution by computing devices, and in some cases, the steps shown or described may be performed in a different order than that shown or described herein, or they may be separately fabricated into individual integrated circuit modules, or multiple modules or steps of them may be fabricated into a single integrated circuit module. Thus, the present application is not limited to any specific combination of hardware and software.
The above description is only of the preferred embodiments of the present application and is not intended to limit the present application, but various modifications and variations can be made to the present application by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the principle of the present application should be included in the protection scope of the present application.
Claims (10)
1. The control method of the I2C bus multiplexer is characterized in that an I2C bus of the baseboard management controller is connected with the I2C bus multiplexer or not, a plurality of channels in the I2C bus multiplexer are respectively connected with a plurality of GPUs, and the control method comprises the following steps:
determining whether the baseboard management controller is in a restarting state under the condition that the AC is in a power-on state;
and under the condition that the AC is in the restarting state in the powering-on state, scanning a plurality of I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed.
2. The method of claim 1, wherein scanning the plurality of I2C buses of the baseboard management controller in a preset order, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed, comprises:
a first determination step: determining whether the scanned current I2C bus is the target I2C bus;
a first control step: controlling all channels of the corresponding I2C bus multiplexer to be closed under the condition that the current I2C bus is the target I2C bus;
a second determination step: under the condition that the current I2C bus is not the target I2C bus, scanning the next I2C bus of the current I2C bus and determining whether the next I2C bus of the current I2C bus is the target I2C bus;
and a second control step: when the next I2C bus of the current I2C bus is the target I2C bus, controlling all channels of the I2C bus multiplexer corresponding to the next I2C bus to be closed, and continuing to scan the next I2C bus of the next I2C bus;
and sequentially repeating the first determining step, the first controlling step, the second determining step and the second controlling step at least once until all channels of the I2C bus multiplexer corresponding to all target I2C buses of the baseboard management controller are closed.
3. The method of claim 1, wherein prior to scanning the baseboard management controller's multi-way I2C bus in a predetermined order, the method further comprises:
acquiring the position information of each path of I2C bus of the baseboard management controller in the baseboard management controller;
and determining the preset sequence according to the position information of the plurality of paths of I2C buses.
4. A method according to claim 3, wherein determining the predetermined order based on the position information of the plurality of I2C buses comprises:
determining a reference position in the baseboard management controller;
acquiring distance information between the position information of each path of I2C bus and the reference position;
and determining the preset sequence according to the plurality of distance information.
5. The method of claim 1, wherein prior to scanning the baseboard management controller's multi-way I2C bus in a preset order, the method further comprises:
acquiring the types of signals transmitted by each path of I2C bus of the baseboard management controller;
determining the functions of the signals of each path according to the types of the signals transmitted by the I2C buses of each path;
and determining the preset sequence according to the functions of the multiple paths of signals.
6. The method of claim 5, wherein determining the predetermined order based on the function of the plurality of signals comprises:
acquiring importance degree information of functions of the signals of each path;
and determining the preset sequence according to a plurality of importance degree information.
7. The method of claim 1, wherein scanning the plurality of I2C buses of the baseboard management controller in a preset order, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed, comprises:
scanning multiple paths of I2C buses of the baseboard management controller according to a preset sequence, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of a primary I2C bus multiplexer connected with the target I2C bus to be closed;
determining whether at least one stage of non-primary I2C bus multiplexer is included under the primary I2C bus multiplexer;
and controlling the channel of the non-primary I2C bus multiplexer to be closed under the condition that the non-primary I2C bus multiplexer of at least one stage is included under the primary I2C bus multiplexer.
8. A control device of an I2C bus multiplexer, wherein an I2C bus of a baseboard management controller is connected or not connected with the I2C bus multiplexer, and a plurality of channels in the I2C bus multiplexer are respectively connected with a plurality of GPUs, comprising:
a first determining unit, configured to determine whether the baseboard management controller is in a restart state when AC is in a power-on state;
the control unit is used for scanning multiple paths of I2C buses of the baseboard management controller according to a preset sequence under the condition that the baseboard management controller is in the restarting state when the AC is in the powering-on state, determining a target I2C bus connected to the I2C bus multiplexer, and controlling the channel of the I2C bus multiplexer corresponding to the target I2C bus to be closed.
9. A computer readable storage medium, characterized in that a computer program is stored in the computer readable storage medium, wherein the computer program, when being executed by a processor, implements the steps of the method according to any of the claims 1 to 7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method of any one of claims 1 to 7 when the computer program is executed.
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