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CN116794771A - Interlayer coupling structure and preparation method thereof - Google Patents

Interlayer coupling structure and preparation method thereof Download PDF

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Publication number
CN116794771A
CN116794771A CN202310084469.7A CN202310084469A CN116794771A CN 116794771 A CN116794771 A CN 116794771A CN 202310084469 A CN202310084469 A CN 202310084469A CN 116794771 A CN116794771 A CN 116794771A
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China
Prior art keywords
waveguide
substrate
dielectric layer
layer
away
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CN202310084469.7A
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Chinese (zh)
Inventor
李彬
李志华
唐波
杨妍
张鹏
谢玲
刘若男
黄凯
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Institute of Microelectronics of CAS
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Institute of Microelectronics of CAS
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Priority to CN202310084469.7A priority Critical patent/CN116794771A/en
Publication of CN116794771A publication Critical patent/CN116794771A/en
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Abstract

The application provides an interlayer coupling structure and a preparation method thereof, wherein the structure comprises the following steps: a substrate; a first waveguide on the substrate; the first waveguide is positioned in a first area on the substrate; the first dielectric layer is positioned on the substrate and covers the first waveguide; the transition layer is positioned on one side of the first dielectric layer far away from the substrate; the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate; the second dielectric layer covers the transition layer; the second waveguide is positioned on one side of the second dielectric layer away from the substrate; a second waveguide is located in a second region of the substrate; the projection of any two of the first waveguide, the transition layer and the second waveguide on the substrate has a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with a bevel structure. Therefore, a transition layer is introduced between the first waveguide and the second waveguide, the interlayer distance between the first waveguide and the second waveguide is increased on the premise of ensuring the coupling efficiency, interlayer crosstalk during high integration is effectively reduced, and the influence on the performance of the device is reduced.

Description

Interlayer coupling structure and preparation method thereof
Technical Field
The application relates to the technical field of semiconductors, in particular to an interlayer coupling structure and a preparation method thereof.
Background
Silicon material has great benefits as a substrate material for photonic integrated chips, such as compatibility with CMOS (Complementary Metal Oxide Semiconductor ) processes, which can reduce mass production costs while facilitating photointegration with electronic chips.
However, with the continuous expansion of the application field, the requirements On the optical device are more and more complex, and the requirement of future development cannot be met by simply preparing an SOI (Silicon-On-Insulator) waveguide device with complex functions On an SOI substrate.
Silicon-based SiN-on-SOI hybrid integrated material platforms have received extensive attention from researchers in order to further enhance the performance of photonic integrated chips. The combination of SOI and SiN materials can realize a complex and high-performance photon integrated chip.
For example, by utilizing the characteristic of ultralow loss of SiN, a waveguide, a micro-ring resonant cavity, an MMI (Mutimode interferometer, multimode interferometer), an MZI (Mach-Zehnder interferometer ), an AWG (Arrayed Waveguide Grating, arrayed waveguide grating) or the like can be prepared to modulate or split an optical signal, then the optical signal is evanescent transmitted into an SOI waveguide at the lower layer through an interlayer coupling structure, and then the optical signal is converted into an electrical signal by using a waveguide-on-silicon Ge detector and is output.
Similarly, the optical signal in the SOI waveguide may also be transferred to the SiN layer through an interlayer coupling structure. Therefore, how to improve the device performance, it becomes extremely important to design a low-loss Si and SiN interlayer coupling structure.
Disclosure of Invention
In view of the above, this summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
The application aims to provide an interlayer coupling structure and a preparation method thereof, which can reduce the crosstalk between waveguide layers and improve the device performance while ensuring the coupling efficiency.
In order to achieve the above purpose, the application has the following technical scheme:
in a first aspect, an embodiment of the present application provides a method for manufacturing an interlayer coupling structure, including:
providing a substrate;
forming a first waveguide on the substrate; the first waveguide is located in a first region on the substrate;
forming a first dielectric layer on the substrate, wherein the first dielectric layer covers the first waveguide;
forming a transition layer on one side of the first dielectric layer far away from the substrate;
forming a second dielectric layer on one side of the first dielectric layer far away from the substrate; the second dielectric layer covers the transition layer;
forming a second waveguide on one side of the second dielectric layer away from the substrate; the second waveguide is positioned in a second region of the substrate; the projections of any two of the first waveguide, the transition layer and the second waveguide on the substrate have a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with an inclined surface structure.
In one possible implementation manner, the forming a second waveguide on a side of the second dielectric layer away from the substrate includes:
depositing a second initial waveguide on one side of the second dielectric layer away from the substrate;
and carrying out gray scale etching on the second initial waveguide to form the second waveguide with the inclined plane structure.
In one possible implementation, the thickness of the first dielectric layer is greater than or equal to 200nm and less than or equal to 1000nm;
the thickness of the transition layer is greater than or equal to 25nm and less than or equal to 100nm;
the thickness of the second dielectric layer is greater than or equal to 20nm and less than or equal to 200nm.
In one possible implementation, the material of the first waveguide includes Si, siN, or SiON; the material of the transition layer comprises SiN or SiON; the material of the second waveguide comprises SiN or SiON; the material of the first dielectric layer and the second dielectric layer comprises SiO 2
In one possible implementation, forming a first waveguide on the substrate includes:
depositing a first initial waveguide on the substrate;
and photoetching and etching the first initial waveguide to obtain the first waveguide.
In a second aspect, an embodiment of the present application provides an interlayer coupling structure, including:
a substrate;
a first waveguide on the substrate; the first waveguide is located in a first region on the substrate;
a first dielectric layer on the substrate, the first dielectric layer covering the first waveguide;
the transition layer is positioned on one side of the first dielectric layer away from the substrate;
the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate; the second dielectric layer covers the transition layer;
the second waveguide is positioned on one side of the second dielectric layer away from the substrate; the second waveguide is positioned in a second region of the substrate; the projections of any two of the first waveguide, the transition layer and the second waveguide on the substrate have a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with an inclined surface structure.
In one possible implementation, the method further includes:
and the third dielectric layer is positioned on one side of the second dielectric layer away from the substrate and covers the second waveguide.
In one possible implementation, an end of the first waveguide remote from the second waveguide is formed with a silicon optic.
In one possible implementation, the refractive index of the preparation material of the first waveguide is greater than the refractive index of the preparation material of the first dielectric layer.
In one possible implementation, the second waveguide is formed by grey scale etching.
Compared with the prior art, the embodiment of the application has the following beneficial effects:
the embodiment of the application provides an interlayer coupling structure and a preparation method thereof, wherein the structure comprises the following steps: a substrate; a first waveguide on the substrate; the first waveguide is positioned in a first area on the substrate; the first dielectric layer is positioned on the substrate and covers the first waveguide; the transition layer is positioned on one side of the first dielectric layer far away from the substrate; the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate; the second dielectric layer covers the transition layer; the second waveguide is positioned on one side of the second dielectric layer away from the substrate; a second waveguide is located in a second region of the substrate; the projection of any two of the first waveguide, the transition layer and the second waveguide on the substrate has a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with a bevel structure. Therefore, a transition layer is introduced between the first waveguide and the second waveguide, the interlayer distance between the first waveguide and the second waveguide is increased on the premise of ensuring the coupling efficiency, interlayer crosstalk during high integration is effectively reduced, and the influence on the performance of the device is reduced.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are some embodiments of the application and that other drawings may be obtained from these drawings without inventive effort for a person skilled in the art.
The above and other features, advantages, and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. The same or similar reference numbers will be used throughout the drawings to refer to the same or like elements. It should be understood that the figures are schematic and that elements and components are not necessarily drawn to scale.
Fig. 1 shows a flowchart of a method for manufacturing an interlayer coupling structure according to an embodiment of the present application;
fig. 2 to 8 are cross-sectional views showing respective structures in the process of manufacturing an interlayer coupling structure according to an embodiment of the present application;
fig. 9 is a cross-sectional view showing an interlayer coupling structure provided by an embodiment of the present application;
fig. 10 shows a top view of an interlayer coupling structure according to an embodiment of the present application.
Detailed Description
In order that the above objects, features and advantages of the application will be readily understood, a more particular description of the application will be rendered by reference to the appended drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, but the present application may be practiced in other ways other than those described herein, and persons skilled in the art will readily appreciate that the present application is not limited to the specific embodiments disclosed below.
As described in the background, silicon material has great benefits as a substrate material for photonic integrated chips, such as compatibility with CMOS (Complementary Metal Oxide Semiconductor ) processes, which can reduce mass production costs while facilitating photointegration with electronic chips.
However, with the continuous expansion of the application field, the requirements On the optical device are more and more complex, and the requirement of future development cannot be met by simply preparing an SOI (Silicon-On-Insulator) waveguide device with complex functions On an SOI substrate.
Silicon-based SiN-on-SOI hybrid integrated material platforms have received extensive attention from researchers in order to further enhance the performance of photonic integrated chips. The combination of SOI and SiN materials can realize a complex and high-performance photon integrated chip.
For example, by utilizing the characteristic of ultralow loss of SiN, a waveguide, a micro-ring resonant cavity, an MMI (Mutimode interferometer, multimode interferometer), an MZI (Mach-Zehnder interferometer ), an AWG (Arrayed Waveguide Grating, arrayed waveguide grating) or the like can be prepared to modulate or split an optical signal, then the optical signal is evanescent transmitted into an SOI waveguide at the lower layer through an interlayer coupling structure, and then the optical signal is converted into an electrical signal by using a waveguide-on-silicon Ge detector and is output.
Similarly, the optical signal in the SOI waveguide may also be transferred to the SiN layer through an interlayer coupling structure. Therefore, how to improve the device performance, it becomes extremely important to design a low-loss Si and SiN interlayer coupling structure.
In order to solve the above technical problems, embodiments of the present application provide an interlayer coupling structure and a method for manufacturing the same, the structure including: a substrate; a first waveguide on the substrate; the first waveguide is positioned in a first area on the substrate; the first dielectric layer is positioned on the substrate and covers the first waveguide; the transition layer is positioned on one side of the first dielectric layer far away from the substrate; the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate; the second dielectric layer covers the transition layer; the second waveguide is positioned on one side of the second dielectric layer away from the substrate; a second waveguide is located in a second region of the substrate; the projection of any two of the first waveguide, the transition layer and the second waveguide on the substrate has a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with a bevel structure. Therefore, a transition layer is introduced between the first waveguide and the second waveguide, the interlayer distance between the first waveguide and the second waveguide is increased on the premise of ensuring the coupling efficiency, interlayer crosstalk during high integration is effectively reduced, and the influence on the performance of the device is reduced.
Exemplary method
Referring to fig. 1, a flowchart of a method for manufacturing an interlayer coupling structure according to an embodiment of the present application includes:
s101: a substrate is provided.
In the embodiment of the present application, as shown in fig. 2, the substrate 1 has at least an interlayer dielectric layer 12, which may be an SOI substrate. The SOI substrate can be prepared by any one of a silicon wafer bonding and back etching method, an intelligent lift-off technique and an oxygen implantation isolation method, or by using an SOI substrate which has been prepared.
S102: forming a first waveguide on the substrate; the first waveguide is located in a first region on the substrate.
Referring to fig. 3, when the substrate 1 is an SOI substrate, the top silicon 13 of the SOI substrate is subjected to patterning processing, resulting in the first waveguide 3.
When the substrate 1 does not adopt an SOI substrate, the substrate 1 is provided with an interlayer dielectric layer 12, a first waveguide material layer is formed by depositing the interlayer dielectric layer 12, and patterning treatment is performed on the first waveguide material layer, so that the first waveguide 3 is obtained.
That is, in the embodiment of the present application, a first initial waveguide may be deposited on the substrate 1 as the first waveguide material layer, and the first initial waveguide may be subjected to photolithography and etching to obtain the first waveguide 3.
The first waveguide 3 may be patterned and a corresponding silicon optical device 301 formed.
Other auxiliary processes involved in the waveguide etching, epitaxy, ion implantation and thermode preparation of the silicon optical device 301 are all existing mature processes, and are not core improvement points of the present application, so that the description is omitted. The silicon optical device 301 includes silicon optical passive devices including, but not limited to, silicon or silicon nitride waveguides, gratings, arrayed waveguide gratings, micro-ring resonators, multimode interferometers, thermo-optical devices, and the like, and silicon optical active devices including, but not limited to, modulators and detectors.
S103: and forming a first dielectric layer on the substrate, wherein the first dielectric layer covers the first waveguide.
Referring to fig. 4, when an SOI substrate is used, the interlayer dielectric layer 12 in the SOI substrate may be silicon dioxide, and the first dielectric layer 4 may be silicon dioxide. The first dielectric layer 4 may be formed on the surfaces of the first waveguide 3 and the interlayer dielectric layer 12 by using any one of the conventional deposition processes such as chemical vapor deposition (Chemical Vapor Deposition, abbreviated as CVD), molecular beam epitaxy (Molecular Beam Epitaxy, abbreviated as MBE), and the like.
When the SOI substrate is not used, the first dielectric layer 4 is formed on the surfaces of the first waveguide 3 and the interlayer dielectric layer 12 by adopting a proper deposition mode according to the material used for the interlayer dielectric layer 12 and according to the actual material.
In addition, the first dielectric layer 4 may be thinned to a preset thickness, where the preset thickness of the first dielectric layer 4 is determined according to the designed distance between waveguide layers, and the thinning manner may be dry etching or chemical mechanical polishing.
S104: and forming a transition layer on one side of the first dielectric layer away from the substrate.
Referring to fig. 5, in the embodiment of the present application, a transition layer 5 may be formed on a side of the first dielectric layer 4 away from the substrate 1, and the transition layer 5 may be deposited by PECVD (Plasma Enhanced Chemical Vapor Deposition, plasma-enhanced chemical vapor deposition) or LPCVD (-Low Pressure Chemical Vapor Deposition, low pressure chemical vapor deposition).
The transition layer is a material having a refractive index of about 2.0, and may include SiN, siON, or the like, for example, and is a top view of the transition layer 5, as shown in fig. 6.
S105: forming a second dielectric layer on one side of the first dielectric layer far away from the substrate; the second dielectric layer covers the transition layer.
Referring to fig. 7, in the embodiment of the present application, a second dielectric layer 6 may be formed on a side of the first dielectric layer 4 away from the substrate 1; the second dielectric layer 6 covers the transition layer 5.
When an SOI substrate is used, the interlayer dielectric layer 12 and the first dielectric layer 4 may be silicon dioxide, and the second dielectric layer 6 may be silicon dioxide. The second dielectric layer 6 may be formed on the surfaces of the transition layer 5 and the first dielectric layer 4 by using any deposition process such as chemical vapor deposition and molecular beam epitaxy.
When the substrate does not adopt the SOI substrate, the second dielectric layer 6 forms the second dielectric layer 6 on the surfaces of the transition layer 5 and the first dielectric layer 4 according to the material used by the first dielectric layer 4 and according to the actual material by adopting a proper deposition mode.
S106: forming a second waveguide on one side of the second dielectric layer away from the substrate; the second waveguide is positioned in a second region of the substrate; the projections of any two of the first waveguide, the transition layer and the second waveguide on the substrate have a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with an inclined surface structure.
Referring to fig. 8, in the embodiment of the present application, the second waveguide 7 is made of a material having a refractive index of 1.9 to 3.5, for example, silicon nitride or silicon oxynitride. Wherein the second waveguide material layer may be deposited on the second dielectric layer 6 using any of the existing implementations. The second waveguide material layer is then patterned to obtain the second waveguide 7.
That is, in the embodiment of the present application, a second initial waveguide may be deposited on a side of the second dielectric layer 6 away from the substrate 1 as a second waveguide material layer, and gray scale etching may be performed on the second initial waveguide to form a second waveguide 7 having a slant structure.
The gray scale etching can reduce the requirement on the precision of the photolithography mask and save the plate making cost; reducing the effect on coupling efficiency of process bias (layer-to-layer lithography bias). And the application forms an inclined plane structure which is less sensitive to process deviation.
In addition, as shown in fig. 9, a third dielectric layer 8 may be formed on the side of the second dielectric layer 6 away from the substrate, the third dielectric layer 8 covering the second waveguide 7.
The thickness of the first dielectric layer 4 provided by the embodiment of the application is more than or equal to 200nm and less than or equal to 1000nm; the thickness of the transition layer 5 is greater than or equal to 25nm and less than or equal to 100nm; the thickness of the second dielectric layer 6 is 20nm or more and 200nm or less.
The material of the first waveguide 3 includes Si, siN or SiON; the material of the transition layer 5 includes SiN or SiON; the material of the second waveguide 7 includes SiN or SiON; the material of the first dielectric layer 4 and the second dielectric layer 6 comprises SiO 2
The width w1 of the first waveguide is greater than or equal to 400nm and less than or equal to 500nm; the width w2 of the second waveguide is greater than or equal to 0.4 μm and less than or equal to 2 μm.
The embodiment of the application provides an interlayer coupling structure and a preparation method thereof, and the structure prepared by the method comprises the following steps: a substrate; a first waveguide on the substrate; the first waveguide is positioned in a first area on the substrate; the first dielectric layer is positioned on the substrate and covers the first waveguide; the transition layer is positioned on one side of the first dielectric layer far away from the substrate; the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate; the second dielectric layer covers the transition layer; the second waveguide is positioned on one side of the second dielectric layer away from the substrate; a second waveguide is located in a second region of the substrate; the projection of any two of the first waveguide, the transition layer and the second waveguide on the substrate has a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with a bevel structure. Therefore, a transition layer is introduced between the first waveguide and the second waveguide, the interlayer distance between the first waveguide and the second waveguide is increased on the premise of ensuring the coupling efficiency, interlayer crosstalk during high integration is effectively reduced, and the influence on the performance of the device is reduced.
Exemplary Structure
Referring to fig. 9, a schematic diagram of an interlayer coupling structure according to an embodiment of the present application includes:
a substrate 1;
a first waveguide 3 located on the substrate; the first waveguide 3 is located in a first region on the substrate 1;
a first dielectric layer 4 on the substrate 1, the first dielectric layer 4 covering the first waveguide 3;
a transition layer 5 located on the side of the first dielectric layer 4 away from the substrate 1;
a second dielectric layer 6 located on a side of the first dielectric layer 4 away from the substrate 1; the second dielectric layer 6 covers the transition layer 5;
a second waveguide 7 located on a side of the second dielectric layer 6 remote from the substrate 4; the second waveguide 7 is located in a second region of the substrate 1; the projection of any two of the first waveguide 3, the transition layer 5 and the second waveguide 7 onto the substrate 1 has a region of overlap; the end of the second waveguide 7 near the first waveguide 3 has a bevel structure.
In one possible implementation, the method further includes:
and a third dielectric layer 8 positioned on the side of the second dielectric layer 6 away from the substrate 1, wherein the third dielectric layer 8 covers the second waveguide 7.
In one possible implementation, the end of the first waveguide 3 remote from the second waveguide 7 is formed with a silicon optical device.
In a possible implementation, the refractive index of the material of which the first waveguide 3 is made is greater than the refractive index of the material of which the first dielectric layer 4 is made.
Referring to fig. 10, a nonlinear structure may be adopted at the tip angle of the first waveguide 3 according to the embodiment of the present application, and the length of the first waveguide L1 may be reduced by several tens micrometers. The width w1 of the first waveguide is greater than or equal to 400nm and less than or equal to 500nm; the width w2 of the second waveguide is greater than or equal to 0.4 μm and less than or equal to 2 μm.
The embodiment of the application provides an interlayer coupling structure and a preparation method thereof, wherein the structure comprises the following steps: a substrate; a first waveguide on the substrate; the first waveguide is positioned in a first area on the substrate; the first dielectric layer is positioned on the substrate and covers the first waveguide; the transition layer is positioned on one side of the first dielectric layer far away from the substrate; the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate; the second dielectric layer covers the transition layer; the second waveguide is positioned on one side of the second dielectric layer away from the substrate; a second waveguide is located in a second region of the substrate; the projection of any two of the first waveguide, the transition layer and the second waveguide on the substrate has a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with a bevel structure. Therefore, a transition layer is introduced between the first waveguide and the second waveguide, the interlayer distance between the first waveguide and the second waveguide is increased on the premise of ensuring the coupling efficiency, interlayer crosstalk during high integration is effectively reduced, and the influence on the performance of the device is reduced.
In this specification, each embodiment is described in a progressive manner, and identical and similar parts of each embodiment are all referred to each other, and each embodiment mainly describes differences from other embodiments. In particular, for structural embodiments, since they are substantially similar to method embodiments, the description is relatively simple, and reference is made to the description of method embodiments for relevant points.
The foregoing is merely a preferred embodiment of the present application, and the present application has been disclosed in the above description of the preferred embodiment, but is not limited thereto. Any person skilled in the art can make many possible variations and modifications to the technical solution of the present application or modifications to equivalent embodiments using the methods and technical contents disclosed above, without departing from the scope of the technical solution of the present application. Therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present application still fall within the scope of the technical solution of the present application.

Claims (10)

1. A method for manufacturing an interlayer coupling structure, comprising:
providing a substrate;
forming a first waveguide on the substrate; the first waveguide is located in a first region on the substrate;
forming a first dielectric layer on the substrate, wherein the first dielectric layer covers the first waveguide;
forming a transition layer on one side of the first dielectric layer far away from the substrate;
forming a second dielectric layer on one side of the first dielectric layer far away from the substrate; the second dielectric layer covers the transition layer;
forming a second waveguide on one side of the second dielectric layer away from the substrate; the second waveguide is positioned in a second region of the substrate; the projections of any two of the first waveguide, the transition layer and the second waveguide on the substrate have a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with an inclined surface structure.
2. The method of claim 1, wherein forming a second waveguide on a side of the second dielectric layer remote from the substrate comprises:
depositing a second initial waveguide on one side of the second dielectric layer away from the substrate;
and carrying out gray scale etching on the second initial waveguide to form the second waveguide with the inclined plane structure.
3. The method of claim 1, wherein the first dielectric layer has a thickness of greater than or equal to 200nm and less than or equal to 1000nm;
the thickness of the transition layer is greater than or equal to 25nm and less than or equal to 100nm;
the thickness of the second dielectric layer is greater than or equal to 20nm and less than or equal to 200nm.
4. The method of claim 1, wherein the material of the first waveguide comprises Si, siN, or SiON; the material of the transition layer comprises SiN or SiON; the material of the second waveguide comprises SiN or SiON; the material of the first dielectric layer and the second dielectric layer comprises SiO 2
5. The method of claim 1, wherein forming a first waveguide on the substrate comprises:
depositing a first initial waveguide on the substrate;
and photoetching and etching the first initial waveguide to obtain the first waveguide.
6. An interlayer coupling structure, comprising:
a substrate;
a first waveguide on the substrate; the first waveguide is located in a first region on the substrate;
a first dielectric layer on the substrate, the first dielectric layer covering the first waveguide;
the transition layer is positioned on one side of the first dielectric layer away from the substrate;
the second dielectric layer is positioned on one side of the first dielectric layer away from the substrate; the second dielectric layer covers the transition layer;
the second waveguide is positioned on one side of the second dielectric layer away from the substrate; the second waveguide is positioned in a second region of the substrate; the projections of any two of the first waveguide, the transition layer and the second waveguide on the substrate have a superposition area; one end of the second waveguide, which is close to the first waveguide, is provided with an inclined surface structure.
7. The structure of claim 6, further comprising:
and the third dielectric layer is positioned on one side of the second dielectric layer away from the substrate and covers the second waveguide.
8. The structure of claim 6, wherein an end of the first waveguide remote from the second waveguide is formed with a silicon optic.
9. The structure of claim 6, wherein the refractive index of the first waveguide fabrication material is greater than the refractive index of the first dielectric layer fabrication material.
10. The structure of claim 6, wherein the second waveguide is formed by greyscale etching.
CN202310084469.7A 2023-01-16 2023-01-16 Interlayer coupling structure and preparation method thereof Pending CN116794771A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202310084469.7A CN116794771A (en) 2023-01-16 2023-01-16 Interlayer coupling structure and preparation method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202310084469.7A CN116794771A (en) 2023-01-16 2023-01-16 Interlayer coupling structure and preparation method thereof

Publications (1)

Publication Number Publication Date
CN116794771A true CN116794771A (en) 2023-09-22

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Country Status (1)

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