CN116564977A - Backside-illuminated image sensor, manufacturing method thereof and electronic equipment - Google Patents
Backside-illuminated image sensor, manufacturing method thereof and electronic equipment Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/1464—Back illuminated imager structures
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14658—X-ray, gamma-ray or corpuscular radiation imagers
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14658—X-ray, gamma-ray or corpuscular radiation imagers
- H01L27/14659—Direct radiation imagers structures
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Abstract
The application provides a back-illuminated image sensor, a manufacturing method thereof and electronic equipment, and relates to the field of sensors. The backside illuminated image sensor comprises a substrate, and a metal wiring layer, a semiconductor layer and a metal layer which are sequentially arranged on the substrate. The surface of the semiconductor layer far away from the substrate is a detection surface of the pixel array. The metal layer is arranged on the detection surface, and the work function of the metal material adopted by the metal layer is larger than that of the semiconductor material in the semiconductor layer.
Description
Technical Field
The application relates to the field of sensors, in particular to a back-illuminated image sensor, a manufacturing method thereof and electronic equipment.
Background
The back-illuminated (backside illumination, BSI) image sensor can be used as a high-energy particle or photon detection device, and has wide application in the fields of medical imaging, nondestructive testing, electron microscopy, mass spectrometry, particle physics and the like.
Referring to fig. 1, in the conventional BSI sensor, the back surface B (i.e., the irradiation incident surface, the detection surface) forms electron energy levels in the forbidden band at the surface due to the existence of interface states and other defect states (such as impurities, imperfect lattice arrangement, etc.), so that intermediate energy levels are introduced into the forbidden band to become a channel for electron transition, thereby generating a larger dark current and affecting the performance of the sensor.
Accordingly, as shown in fig. 1, the related art is fabricated by growing a dielectric stack 10 (SiO 2 /Al 2 O 3 /SiO 2 ) As a passivation layer, to reduce dark current. However, during the high-energy particle detection process, the dielectric layer can cause a total ionization dose (total ionizing dose, TID) effect, so that holes are accumulated near the interface of the dielectric layer, the density of the interface state is increased, dark current is increased along with the irradiation dose, and the radiation resistance of the sensor is reduced or even disabled.
Disclosure of Invention
The application provides a back-illuminated image sensor, a manufacturing method thereof and electronic equipment, which can reduce dark current and enhance anti-radiation performance.
The application provides a back-illuminated image sensor, which comprises a substrate, and a metal wiring layer, a semiconductor layer and a metal layer which are sequentially arranged on the substrate. The semiconductor layer is distributed with pixel arrays, the surface of the semiconductor layer far away from the substrate is a detection surface of the pixel arrays, and the metal layer is arranged on the detection surface; the irradiation signal from the side of the metal layer remote from the substrate is detected by the pixel array. The work function of the metal material used for the metal layer is larger than that of the semiconductor material in the semiconductor layer. In this case, field effect passivation is formed based on the difference of work functions of the metal layer and the semiconductor layer, and the surface potential of the detection surface is regulated and controlled, so that the intermediate energy level caused by the interface defect is far away from the fermi energy level, dark current is reduced (or inhibited), and meanwhile, the total ionization dose effect (TID) is weakened (or even eliminated), namely, the radiation resistance of the sensor is improved.
In some possible implementations, the metal layer and the semiconductor layer are part of a metal-semiconductor (metal semiconductor, MS) structure. In this case, the intermediate energy level caused by the interface defect can be kept away from the fermi level by the metal layer, so that the dark current is reduced (or suppressed), and the total ionization dose effect is reduced (or even eliminated), that is, the radiation resistance of the sensor is improved.
In some possible implementations, the metal layer is deposited on the detection surface with the metal layer and the semiconductor layer being part of the MS structure; in this case, the semiconductor layer and the metal layer constitute an MS structure.
In some possible implementations, the metal layer and the semiconductor layer are part of a metal-insulator-semiconductor (metal insulator semiconductor, MIS) structure. In this case, for some semiconductor layers with larger defect density on the surface, by disposing a dielectric layer between the metal layer and the semiconductor layer, the interface state density can be reduced through the dielectric layer, and the pinning effect is relieved, so that the regulation and control effect of the metal layer on the surface energy band of the semiconductor layer can be ensured.
In some possible implementations, in the case that the metal layer and the semiconductor layer are constituent parts of the MIS structure, the backside illuminated image sensor further includes a dielectric layer; the dielectric layer is deposited on the detection surface, and the metal layer is deposited on the surface of the dielectric layer far away from the semiconductor layer; the semiconductor layer, the dielectric layer and the metal layer form an MIS structure.
In some possible implementations, the dielectric layer has a thickness of 1nm to 5nm. Wherein, through setting the thickness of the dielectric layer to be more than or equal to 1nm, the continuity of the film layer is ensured, and the interface state density is reduced. The thickness of the dielectric layer is less than or equal to 5nm, so that the dielectric layer can not obviously influence the radiation resistance of the sensor.
In some possible implementations, the dielectric layer is made of SiO 2 、Al 2 O 3 、HfO 2 、Si 3 N 4 、Ta 2 O 5 、ZrO 2 、 TiO 2 At least one of them.
In some possible implementations, the metal layer is made of at least one of Pt, pd, au, ni, se, ir, rh, be, tiN metal materials.
In some possible implementations, the metal layer has a thickness of 5nm to 20nm. Wherein, through setting up the thickness of metal layer more than or equal to 5nm to guarantee the continuity and the better electric conductivity of rete. By setting the thickness of the metal layer to be less than or equal to 20nm, it is possible to avoid excessive energy loss when high-energy particles/photons pass through the metal layer to reach the semiconductor layer due to the excessive thickness of the metal layer.
In some possible implementations, the metal layer is coupled to ground to prevent charge from accumulating on the metal layer, causing voltage drift to form a local electric field, affecting the performance of the sensor, and further ensuring proper operation of the sensor.
In some possible implementations, the semiconductor layer employs high-resistance silicon having a resistivity greater than 100 Ω·cm.
The embodiment of the application also provides electronic equipment, which comprises a circuit board and the back-illuminated image sensor provided in any one of the possible modes; the circuit board is electrically connected with the back-illuminated image sensor.
The embodiment of the application also provides a manufacturing method of the back-illuminated image sensor, which can include: providing a substrate, and manufacturing a metal wiring layer and a semiconductor layer on the substrate; the metal wiring layer is positioned between the substrate and the semiconductor layer, the semiconductor layer is provided with a pixel array, and the surface of the semiconductor layer far away from the substrate is a detection surface of the pixel array. Forming a metal layer on the surface of the semiconductor layer; the work function of the metal material adopted by the metal layer is larger than that of the semiconductor material in the semiconductor layer.
In some possible implementations, forming a metal layer on the probe surface of the semiconductor layer may include: at least one metal material of Pt, pd, au, ni, se, ir, rh, be, tiN is adopted to form a metal layer with the thickness of 5-20 nm on the detection surface of the semiconductor layer.
The embodiment of the application also provides a manufacturing method of the back-illuminated image sensor, which can include: providing a substrate, and manufacturing a metal wiring layer on the substrate; manufacturing a semiconductor layer on the metal wiring layer, and manufacturing a pixel array in the semiconductor layer; the surface of the semiconductor layer far away from the substrate is a detection surface of the pixel array. Sequentially forming a dielectric layer and a metal layer on the detection surface of the semiconductor layer; wherein the work function of the metal material adopted by the metal layer is larger than that of the semiconductor material in the semiconductor layer.
In some possible implementations, the forming a dielectric layer and a metal layer on the detection surface of the semiconductor layer sequentially may include: siO is adopted 2 、Al 2 O 3 、HfO 2 、Si 3 N 4 、Ta 2 O 5 、ZrO 2 、TiO 2 Forming a dielectric layer with a thickness of 1 nm-5 nm on the detection surface of the semiconductor layer; at least one metal material of Pt, pd, au, ni, se, ir, rh, be, tiN is adopted to form a metal layer with the thickness of 5 nm-20 nm on the surface of the dielectric layer.
Drawings
Fig. 1 is a schematic structural diagram of an image sensor provided in the related art of the present application;
fig. 2 is a schematic structural diagram of an image sensor according to an embodiment of the present application;
FIG. 3 is a schematic diagram of the energy bands before and after metal-semiconductor contact;
fig. 4 is a schematic structural diagram of an image sensor according to an embodiment of the present application;
FIG. 5 is a schematic diagram of the band of the pinning effect and MIS structure;
FIG. 6 is a flowchart of a method for fabricating an image sensor according to an embodiment of the present disclosure;
fig. 7 is a schematic diagram of a manufacturing process of an image sensor according to an embodiment of the present application;
fig. 8 is a schematic diagram of a manufacturing process of an image sensor according to an embodiment of the present application;
fig. 9 is a flowchart of a method for manufacturing an image sensor according to an embodiment of the present application;
fig. 10 is a schematic diagram of a manufacturing process of an image sensor according to an embodiment of the present application.
Detailed Description
For the purposes of making the objects, technical solutions and advantages of the present application more apparent, the technical solutions in the present application will be clearly and completely described below with reference to the drawings in the present application, and it is apparent that the described embodiments are some, but not all, embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
The terms "first," "second," and the like in the description and in the claims and drawings are used for descriptive purposes only and are not to be construed as indicating or implying a relative importance or order. "and/or" for describing the association relationship of the association object, the representation may have three relationships, for example, "a and/or B" may represent: only a, only B and both a and B are present, wherein a, B may be singular or plural. The character "/" generally indicates that the context-dependent object is an "or" relationship. "at least one" means one or more, and "a plurality" means two or more. "at least one of" or the like means any combination of these items, including any combination of single item(s) or plural items(s). For example, at least one (one) of a, b or c may represent: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", wherein a, b, c may be single or plural. "mounted," "connected," and the like are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally connected; either directly or indirectly through intermediaries, or through communication between two elements. Furthermore, the terms "comprise" and "have," as well as any variations thereof, are intended to cover a non-exclusive inclusion, such as a series of steps or elements. The method, system, article, or apparatus is not necessarily limited to those explicitly listed but may include other steps or elements not explicitly listed or inherent to such process, method, article, or apparatus. "upper", "lower", "left", "right", etc. are used merely with respect to the orientation of the components in the drawings, these directional terms are relative terms, which are used for description and clarity with respect thereto, and which may vary accordingly depending on the orientation in which the components are placed in the drawings.
An embodiment of the present application provides an electronic device that includes a printed wiring board (printed circuit board, PCB; may also be referred to as a circuit board) and an image sensor electrically connected to the printed wiring board.
Of course, other devices may be provided in the electronic apparatus, which is not particularly limited in this application. Illustratively, in some embodiments, the electronic device may further include a controller, a processor, etc. electrically connected to the image sensor, so as to control related signals (such as input signals, output signals, etc.) of the image sensor through the controller, and perform operations, processes, etc. on the related signals (such as image signals, etc.) through the processor.
The application is not limited to the application detection range, the field and the like of the image sensor. The image sensor may be used for detection of energetic particles (e.g., energetic electrons, alpha particles, heavy ions, etc.), photons (e.g., X-rays, gamma rays, etc.), etc., as illustrated. The image sensor can be applied to the fields such as medical X-ray image detection, an electron detector in an electron microscope, a radiation detector in high-energy physical research and the like.
According to the image sensor adopted by the electronic equipment, the surface potential of the detection surface (namely the semiconductor surface) is regulated by arranging the metal layer with the high work function on the detection surface of the image sensor, so that a field passivation effect is formed, interface states and other defect states of the semiconductor surface are far away from the Fermi level, dark current of the sensor is further reduced, and the irradiation performance of the sensor is improved.
The specific arrangement structure of the sensor provided in the embodiment of the present application will be described below by taking a backside illuminated image sensor (hereinafter may be simply referred to as a sensor) as an example for detecting high-energy particles.
First, a brief description of the back-illuminated image sensor and related terms is as follows:
backside illuminated (BSI) image sensors: it is the metal wiring layer (i.e., circuit wiring layer) that is located below the pixel area that irradiates the sensor architecture directly incident to the pixel area.
Radiation resistance: the sensor can keep stable performance of the device under the irradiation of high-energy particles, is an important index in high-energy detection, and directly influences the performance and service life of the device.
Total ionization dose effect (total ionizing dose, TID): is a phenomenon in which a large number of radiation particles (or photons) enter the interior of a semiconductor device material and ionize with electrons outside the atomic nuclei of the material to generate additional charges, and the charges accumulate in an oxide layer in the device or induce interface states at the interface between a semiconductor layer and an insulating layer, so that the performance of the device gradually degrades or is finally lost.
Fig. 2 is a schematic structural diagram of a backside-illuminated image sensor according to an embodiment of the present application. As shown in fig. 2, the sensor comprises a substrate 1, and a metal wiring layer 2 and a semiconductor layer 3 which are sequentially arranged on the substrate 1, namely, the metal wiring layer 2 is positioned between the substrate 1 and the semiconductor layer 3, and related signals in the sensor are transmitted through the metal wiring layer 2.
The semiconductor layer 3 has a pixel array formed by a plurality of pixel units P distributed therein, and a surface of the semiconductor layer 3 on a side away from the substrate 1 serves as a detection surface S (i.e., an irradiation incident surface) of the pixel array to convert an irradiation signal from above the semiconductor layer 3 (i.e., a side away from the substrate) into an electrical signal by the pixel array to realize image detection.
Illustratively, in the above pixel array, the isolation wall a may be formed between two adjacent pixel units P by doping or filling to perform isolation. The pixel unit P may be a photodiode structure obtained by N-type doping and P-type doping. The specific arrangement form of the pixel units P and the partition walls a is not limited in this application.
Because of the interface state and other defects on the surface of the semiconductor (namely the detection surface S), intermediate energy levels are introduced into the forbidden band to become an electron transition channel, and larger dark current is generated to influence the performance of the sensor. In the related art, in order to reduce dark current, a dielectric stack (refer to fig. 1) is grown on a semiconductor surface (i.e., a detection surface S), and on one hand, the interface state density is reduced by chemical passivation; on the other hand, by utilizing the field passivation effect, the potential of the semiconductor surface is changed through fixed charges in the dielectric layer to form an electron blocking layer, so that the probability of capturing and releasing electrons by the intermediate energy level is reduced; thereby achieving the purpose of reducing dark current.
But the radiation resistance of the semiconductor surface is poor due to the non-conductive nature of the dielectric layer itself. Particularly in the process of high-energy particle detection, ionization of the high-energy particles in the dielectric layer generates a large number of electron-hole pairs, mobility of electrons in the dielectric layer is far greater than mobility of holes, electrons can move in the dielectric layer, and the holes can be trapped by traps, so that a total ionization dose effect (TID) is caused. Eventually, holes are accumulated near the interface of the dielectric layer, and the density of interface states is increased, so that dark current is increased along with the increase of irradiation dose, and the irradiation resistance of the sensor is reduced or even fails.
In contrast, as shown in fig. 2, in the sensor provided in the embodiment of the present application, a metal layer 41 is formed on the detection surface S of the semiconductor layer 3 by deposition, that is, the metal layer 41 covers the detection surface S; in this case, the irradiation signal from above the metal layer 41 (i.e., from the side remote from the substrate) is incident through the metal layer 41 to the detection surface S, is converted by the pixel array into an electrical signal, which can be transmitted through the wiring in the metal wiring layer 2 to a processor coupled to the sensor for processing to obtain corresponding image information.
In the above sensor, the metal layer 41 forms a metal-semiconductor (MS) structure with the semiconductor layer 3, and the metal layer 41 uses a metal material having a work function larger than that of the semiconductor material in the semiconductor layer 3. In this way, the field effect passivation is formed based on the difference of the work functions of the metal layer 41 and the semiconductor layer 3, and the surface potential of the detection surface S is regulated and controlled, so that the intermediate energy level caused by the interface defect is far away from the fermi level, the dark current is reduced (or inhibited), and the total ionization dose effect (TID) is reduced (or even eliminated), namely the radiation resistance of the sensor is improved.
The principle of reducing dark current and reducing the effect of total ionization dose by the arrangement of the metal layer 41 will be further described below.
Fig. 3 (a) shows the respective band diagrams of the metal and semiconductor, and fig. 3 (b) shows the band diagram of the metal-semiconductor structure. It will be appreciated by those skilled in the art that the work function of a material characterizes the energy required for one electron located at the fermi level of the material to move to the vacuum level. For different materials, the greater the work function of a material, the less the fermi level of that material, since the vacuum level is the same. Referring to fig. 3 (a), in the metal and semiconductor, the work function (phi) of the metal m ) Work function (phi) greater than semiconductor s ) Correspondingly, the fermi level (E F ) Higher than the fermi level of the metal (E F ). In this case, referring to fig. 3 (b), with the MS structure formed when the metal and the semiconductor are in contact, field effect passivation is formed by the energy band controlling effect of the metal to the semiconductor, electrons are transferred from the semiconductor to the metal, so that the metal side is negatively charged, the semiconductor side is positively charged, and the potential of the semiconductor side is pulled up until the fermi levels of both sides are at the same level, reaching an equilibrium state. At this time, a surface electric field is formed at the semiconductor interface due to the distribution of charges, and the surface energy band is bent upwards, so that the trap energy level of the interface is far away from the fermi energy level, and defective electrons at the semiconductor interface are exhausted, so that dark current is reduced.
Compared with the prior art that the surface field effect passivation is formed by utilizing the fixed charges in the dielectric layer, the embodiment of the application forms the field effect passivation by utilizing the energy band regulation effect of the metal on the semiconductor, so that the total ionization dose effect (TID) caused by the dielectric layer is avoided, and the irradiation resistance is improved.
Here, fig. 2 is only a schematic illustration of an MS structure formed by the metal layer 41 and the semiconductor layer 3, but the present application is not limited thereto. In some possible implementations, the MS structure may be provided with other layers according to actual needs, such as other functional adjustment layers, and so on.
The metal material used for the metal layer 41 is not limited in this application as long as the work function of the metal material used for the metal layer 41 is ensured to be larger than that of the semiconductor material in the semiconductor layer 3. Of course, the larger the work function difference between the metal layer 41 and the semiconductor layer 3, the larger the surface potential formed on the semiconductor surface (i.e., the detection surface S) is, the more advantageous the dark current is reduced.
Illustratively, in some possible implementations, the metallic material used for the metallic layer 41 may be at least one of Pt, pd, au, ni, se, ir, rh, be, tiN, but is not limited thereto.
It should be understood herein that, from the perspective of energy band theory, the metallic material used for the metallic layer 41 of the present application refers to a metal having a semi-full state of energy band, a fermi level within the band, and a material having metallic properties. For example, in the case of the above TiN, since N atoms in TiN crystals form vacancies or interstitial atoms, the conduction band of electrons is in a half-full state, and thus TiN appears as a metallic material.
In addition, the specific thickness of the metal layer 41 is not limited in this application, and the thickness of the metal layer 41 may be set as needed in practice. The thickness of the metal layer 41 is schematically designed to ensure film continuity and good conductivity without excessive energy loss due to high-energy particles/photons. For example, in some possible implementations, the thickness of the metal layer 41 may be set to 5nm to 20nm. By setting the thickness of the metal layer 41 to be greater than or equal to 5nm, the continuity and better conductivity of the film layer are ensured; by setting the thickness of the metal layer 41 to be 20nm or less, it is possible to avoid excessive energy loss when high-energy particles/photons pass through the metal layer to reach the semiconductor layer due to the excessive thickness of the metal layer 41. Illustratively, in some embodiments, the thickness of the metal layer 41 may be set to 5nm, 10nm, 15nm, 20nm.
In addition, for some semiconductor layers 3 with larger defect density on the surface, such as the semiconductor layer 3 made of silicon material, pinning effect may occur on the semiconductor surface, so that the fermi level of the semiconductor surface is limited to a specific position, and the energy band of the semiconductor surface cannot be changed along with the work function of the metal material, that is, the metal layer 41 may not realize the energy band regulation on the semiconductor surface (i.e., the detection surface S).
Based on this, compared to the case that the metal layer 41 directly covers the surface of the semiconductor layer 3 (i.e. the detection surface S) in fig. 2, another possible implementation manner is provided in the present application, in order to prevent the pinning effect, as shown in fig. 4, a thinner dielectric layer 42 may be covered on the surface (S) of the semiconductor layer 3, and the metal layer 41 covers the surface of the dielectric layer 42; that is, the dielectric layer 42 is deposited on the detection surface S first, and then the metal layer 41 is deposited on the surface of the dielectric layer 42. In this case, the metal layer 41, the dielectric layer 42, and the semiconductor layer 3 form a metal-insulator-semiconductor (metal insulator semiconductor, MIS) structure, and thus the interface state density can be reduced by the dielectric layer 42, and the pinning effect can be released, so that the regulation of the surface energy band of the semiconductor layer 3 by the metal layer 41 can be ensured.
In fig. 4, the MIS structure is schematically illustrated by way of example only, but the present application is not limited thereto. In some possible implementations, the MIS structure may be provided with other layers, such as other functional tuning layers, according to actual needs.
Fig. 5 (a) is a schematic band diagram of the MS structure under the pinning effect, and fig. 5 (b) is a schematic band diagram of the MIS structure. As can be seen from comparing fig. 5 (a) and (b), in the case where the dielectric layer 42 is not provided, the metal cannot regulate the energy band of the semiconductor due to the pinning effect; in the case of the dielectric layer 42, the energy band of the semiconductor can be controlled by metal, so that the energy band of the semiconductor surface is bent upwards, thereby inhibiting interface states and other defect states and reducing dark current.
In the sensor using the MIS structure, although the dielectric layer 42 is provided on the surface of the semiconductor layer 3, the dielectric layer 42 is generally thin, and the irradiation effect causes little charge accumulation in the dielectric layer, and in this case, the provision of the dielectric layer 42 does not significantly affect the radiation resistance of the sensor.
The thickness of the dielectric layer 42 is schematically designed to reduce the interface state density, but does not affect the radiation resistance. The specific thickness of the dielectric layer 42 is not limited in this application, and the thickness of the dielectric layer 42 may be set as needed in practice. For example, in some possible implementations, the thickness of dielectric layer 42 may be set to 1nm to 5nm. Wherein, by setting the thickness of the dielectric layer 42 to be greater than or equal to 1nm, the continuity of the film layer is ensured, and the interface state density is reduced. By providing the thickness of the dielectric layer 42 to be less than or equal to 5nm, it is ensured that the dielectric layer 42 does not have a significant impact on the radiation resistance of the sensor. Illustratively, in some embodiments, the dielectric layer 42 may be provided to have a thickness of 1nm, 2nm, 3nm, 4nm, 5nm.
In addition, the dielectric material used for the dielectric layer 42 is not limited in this application. Illustratively, in some possible implementations, dielectric layer 42 may be formed of SiO 2 、Al 2 O 3 、HfO 2 、Si 3 N 4 、Ta 2 O 5 、ZrO 2 、TiO 2 At least one of them.
In addition, to prevent charge build-up on metal layer 41, causing voltage drift to create a localized electric field that affects the performance of the sensor, metal layer 41 may be coupled to ground in some possible implementations to ensure proper operation of the sensor.
The application is not limited to the semiconductor material used for the semiconductor layer 3 in the sensor. For example, in some possible implementations, the semiconductor layer 3 may employ a silicon, germanium, iii-v semiconductor material.
Illustratively, taking the example of the semiconductor layer 3 being silicon, i.e. the pixel array being a silicon-based pixel array, the semiconductor layer 3 may be of a high-resistance silicon material in some possible implementations. For example, the resistivity of the high-resistance silicon material may be greater than 100 Ω·cm.
In practice, the materials and thicknesses of the interlayer structures in the sensor may be selected and set according to the selected sensor structure (for example, a MIS structure or an MS structure), which is not limited in this application.
Illustratively, taking the sensor of the MIS structure as an example, in some embodiments, the metal layer 41 may be TiN, and the thickness may be about 10nm; dielectric layer 42 may be formed of SiO 2 The thickness may be about 2nm; the semiconductor layer 3 may be made of a high-resistance silicon material. The work function of TiN is about 5eV, and the modulation of the work function of TiN-based metal can generate a surface potential of about-0.4V on the semiconductor layer 3 side (Si), thereby realizing the reduction of dark current.
The embodiment of the application further provides a method for manufacturing the sensor shown in fig. 2, as shown in fig. 6, where the method may include:
step 11, referring to fig. 7 (a), providing a substrate, and fabricating a metal wiring layer 2 and a semiconductor layer 3 on the substrate 1; the metal wiring layer 2 is located between the substrate 1 and the semiconductor layer 3, and a pixel array (i.e., a plurality of pixel units P) is fabricated in the semiconductor layer 3, and a surface of the semiconductor layer 3 away from the substrate 1 is a detection surface S of the pixel array.
The substrate 1 may be a passive carrier, such as a Si substrate, as a support structure for the sensor. The metal wiring layer 2 transmits the relevant signals in the sensor.
Illustratively, in some possible implementations, step 11 may include: referring to fig. 8 (a), a semiconductor layer 3 is first formed on a first substrate 01, and a plurality of pixel units P and a partition wall a between two adjacent pixel units P are formed (e.g., doped) in the semiconductor layer 3; then, referring to fig. 8 (b), a metal wiring layer 2 is formed on the surface of the semiconductor layer 3; next, referring to fig. 8 (c), the first substrate 01 formed with the semiconductor layer 3 and the metal wiring layer 2 is reversely attached to the second substrate (i.e., 1), that is, the metal wiring layer 2 is attached to the second substrate (1); then, the first substrate 01 is thinned again to expose the pixel units P (i.e., the detection surface S).
Of course, in other possible implementations, the metal wiring layer 2 and the semiconductor layer 3 may be fabricated directly on the substrate 1 in step 11, and the fabrication may be specifically referred to as related fabrication, which is not described herein.
Step 12, referring to fig. 7 (b), a metal layer 41 is formed on the detection surface S of the semiconductor layer 3; wherein the work function of the metal material used for the metal layer 41 is larger than that of the semiconductor material in the semiconductor layer 3.
Illustratively, in some possible implementations, the step 12 may include: at least one metal material of Pt, pd, au, ni, se, ir, rh, be, tiN is used to deposit a metal layer 41 having a thickness of 5nm to 20nm on the detection surface S of the semiconductor layer 3.
Of course, before the metal layer 41 is produced in step 12, it is generally necessary to treat the detection surface S of the semiconductor layer 3, and if a natural oxide layer is present, it is removed. Illustratively, the semiconductor layer 3 may be surface treated by means of acid washing, plasma bombardment, or the like, to clean the detection surface S of the semiconductor layer 3.
The embodiment of the present application further provides a method for manufacturing the sensor shown in fig. 4, as shown in fig. 9, where the method may include:
step 21, referring to fig. 10 (a), providing a substrate, and fabricating a metal wiring layer 2 and a semiconductor layer 3 on the substrate 1; the metal wiring layer 2 is located between the substrate 1 and the semiconductor layer 3, and a pixel array (i.e., a plurality of pixel units P) is fabricated in the semiconductor layer 3, and a surface of the semiconductor layer 3 away from the substrate 1 is a detection surface S of the pixel array.
The above step 21 is substantially identical to the above step 11, and specific reference may be made to the description of the above step 11, which is not repeated here.
Step 22, referring to fig. 10 (b) and (c), a dielectric layer 42 and a metal layer 41 are sequentially formed on the detection surface of the semiconductor layer 3; wherein the work function of the metal material used for the metal layer 41 is larger than that of the semiconductor material in the semiconductor layer 3.
Illustratively, in some possible implementations, the step 22 may include: siO is adopted 2 、Al 2 O 3 、HfO 2 、 Si 3 N 4 、Ta 2 O 5 、ZrO 2 、TiO 2 Forming a dielectric layer 42 having a thickness of 1nm to 5nm on the detection surface of the semiconductor layer 3; then, a metal layer 41 having a thickness of 5nm to 20nm is deposited on the surface of the dielectric layer 42 using at least one metal material of Pt, pd, au, ni, se, ir, rh, be, tiN.
The manner in which dielectric layer 42 is formed is not limited in this application. For example, in some possible implementations, dielectric layer 42 may be formed by deposition on a detection surface of a semiconductor layer (e.g., si) in a manner that decouples plasma oxide (decoupled plasma oxide, DPO). As another example, in some possible implementations, the dielectric layer 42 may be formed by atomic layer deposition (atomic layer deposition, ALD) on the detection side of a semiconductor layer (e.g., si).
By adopting the manufacturing method, an MS structure is formed by manufacturing a metal layer on the surface of the semiconductor layer, or an MIS structure is formed by sequentially manufacturing a dielectric layer and a metal layer on the surface of the semiconductor layer; the difference between the larger work function of the metal layer and the smaller work function of the semiconductor layer forms field effect passivation, and the surface potential of the semiconductor layer is regulated and controlled, so that the intermediate energy level caused by interface defects is far away from the fermi energy level, dark current is reduced (or inhibited), and meanwhile, the total ionization dose effect (TID) is weakened (even eliminated), namely the radiation resistance of the sensor is improved.
Regarding other relevant matters in the foregoing manufacturing method embodiment, such as thickness setting of the metal layer and the dielectric layer, etc., reference may be made correspondingly to the corresponding portions in the foregoing sensor structure embodiment, and details are not repeated herein. The related structure in the foregoing sensor structure embodiment may be manufactured according to the foregoing manufacturing method embodiment, or may be manufactured by appropriate adjustment in combination with the related art, which is not limited in this application.
It should be noted that, in the above embodiments, the image sensor is taken as a back-illuminated image sensor as an example, and in other possible implementations, the image sensor may be a stacked sensor, an active logic chip is integrated with the sensor, and signals of the sensor are read out, processed, stored by the active logic chip, and so on.
The foregoing is merely specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily think about changes or substitutions within the technical scope of the present application, and the changes and substitutions are intended to be covered by the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (14)
1. A backside illuminated image sensor, comprising:
a substrate;
a metal wiring layer disposed over the substrate;
the semiconductor layer is arranged above the metal wiring layer, pixel arrays are distributed in the semiconductor layer, and the surface of the semiconductor, which is far away from the substrate, is a detection surface of the pixel arrays;
and the metal layer is arranged on the detection surface, and the work function of a metal material adopted by the metal layer is larger than that of a semiconductor material adopted by the semiconductor layer.
2. The backside illuminated image sensor of claim 1, wherein,
the metal layer and the semiconductor layer are constituent parts of a metal-semiconductor MS structure or a metal-insulating layer-semiconductor MIS structure.
3. The backside illuminated image sensor according to claim 2, wherein the metal layer is deposited on the detection surface in case the metal layer and the semiconductor layer are an integral part of a metal-semiconductor MS structure.
4. The backside illuminated image sensor of claim 2, wherein,
in the case where the metal layer and the semiconductor layer are constituent parts of a metal-insulator-semiconductor MIS structure, the backside illuminated image sensor further includes: a dielectric layer;
the dielectric layer is deposited on the detection surface, and the metal layer is deposited on the surface of the dielectric layer far away from the semiconductor layer.
5. The backside illuminated image sensor of claim 4, wherein,
the thickness of the dielectric layer is 1 nm-5 nm.
6. The backside illuminated image sensor of any one of claim 1 to 5,
the metal layer adopts at least one of Pt, pd, au, ni, se, ir, rh, be, tiN metal materials.
7. The backside illuminated image sensor according to any one of claims 4 to 6, wherein,
the dielectric layer adopts SiO 2 、Al 2 O 3 、HfO 2 、Si 3 N 4 、Ta 2 O 5 、ZrO 2 、TiO 2 At least one of them.
8. The backside illuminated image sensor according to any one of claims 1 to 7, wherein,
the thickness of the metal layer is 5 nm-20 nm.
9. The backside illuminated image sensor according to any one of claims 1 to 8, wherein,
the metal layer is coupled to ground.
10. The backside illuminated image sensor according to any one of claims 1 to 9, wherein,
the semiconductor layer adopts high-resistance silicon with resistivity greater than 100 omega cm.
11. An electronic device, comprising:
a circuit board and a back-illuminated image sensor as claimed in any one of claims 1 to 10;
the circuit board is electrically connected with the back-illuminated image sensor.
12. A method for manufacturing a backside illuminated image sensor, comprising:
providing a substrate, and manufacturing a metal wiring layer and a semiconductor layer on the substrate; the metal wiring layer is positioned between the substrate and the semiconductor layer, a pixel array is manufactured in the semiconductor layer, and the surface of the semiconductor layer, which is far away from the substrate, is a detection surface of the pixel array;
forming a metal layer on the detection surface of the semiconductor layer; or sequentially forming a dielectric layer and a metal layer on the detection surface of the semiconductor layer; wherein, the work function of the metal material adopted by the metal layer is larger than that of the semiconductor material in the semiconductor layer.
13. The method of manufacturing a backside-illuminated image sensor of claim 12,
the forming a metal layer on the detection surface of the semiconductor layer includes:
and forming a metal layer with a thickness of 5-20 nm on the detection surface of the semiconductor layer by adopting at least one metal material in Pt, pd, au, ni, se, ir, rh, be, tiN.
14. The method of manufacturing a backside-illuminated image sensor of claim 12,
the sequentially forming the dielectric layer and the metal layer on the detection surface of the semiconductor layer comprises the following steps:
SiO is adopted 2 、Al 2 O 3 、HfO 2 、Si 3 N 4 、Ta 2 O 5 、ZrO 2 、TiO 2 At least one dielectric material of the semiconductor layer is formed on the detection surface of the semiconductor layerA dielectric layer with the thickness of 1 nm-5 nm;
and forming a metal layer with the thickness of 5-20 nm on the surface of the dielectric layer by adopting at least one metal material in Pt, pd, au, ni, se, ir, rh, be, tiN.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
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| CN202210109230.6A CN116564977A (en) | 2022-01-28 | 2022-01-28 | Backside-illuminated image sensor, manufacturing method thereof and electronic equipment |
| PCT/CN2022/128944 WO2023142573A1 (en) | 2022-01-28 | 2022-11-01 | Backside illumination image sensor, manufacturing method therefor, and electronic device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN202210109230.6A CN116564977A (en) | 2022-01-28 | 2022-01-28 | Backside-illuminated image sensor, manufacturing method thereof and electronic equipment |
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| CN116564977A true CN116564977A (en) | 2023-08-08 |
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| US9893101B2 (en) * | 2012-01-23 | 2018-02-13 | Sony Semiconductor Solutions Corporation | Solid-state image pickup unit, method of manufacturing solid-state image pickup unit, and electronic apparatus |
| JP6186205B2 (en) * | 2013-08-15 | 2017-08-23 | ソニーセミコンダクタソリューションズ株式会社 | Imaging device and imaging apparatus |
| JP6260139B2 (en) * | 2013-08-15 | 2018-01-17 | ソニー株式会社 | Imaging device and imaging apparatus |
| WO2017150167A1 (en) * | 2016-02-29 | 2017-09-08 | ソニー株式会社 | Solid-state imaging element |
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