CN116153860A - Wafer-level copper-copper bump interconnection structure and bonding method thereof - Google Patents
Wafer-level copper-copper bump interconnection structure and bonding method thereof Download PDFInfo
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
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Abstract
The invention relates to a wafer-level copper-copper bump interconnection structure and a bonding method thereof. The bonding method comprises the following steps: depositing a nano copper layer on the surface of a copper bump of a wafer by adopting pulse laser sputtering with the energy power of 100mJ-300mJ under background gas to obtain a structural wafer; coating nano copper slurry on the surface of a nano copper layer in the structural wafer to obtain a pretreated wafer, wherein the nano copper slurry comprises nano copper powder, a reducing agent, a curing agent and an organic solvent; and in a reducing atmosphere, the other structural wafer and the pretreatment wafer are subjected to flip-chip hot-pressing lamination, and are cooled and placed still after heat treatment and solidification, so that the bonding of the wafer-level copper-copper bump interconnection structure is completed. The bonding method can realize stable bonding between copper bumps without introducing other metals except copper, remarkably improves bonding reliability and ensures good conductive effect.
Description
Technical Field
The invention relates to the technical field of electronic packaging interconnection, in particular to a wafer-level copper-copper bump interconnection structure and a bonding method thereof.
Background
With the development of the integrated circuit industry, the interconnection bonding between chips and wafers or wafer-to-wafer is particularly important. The micro bump bonding is one of the more widely used modes at present. The wafer or the metal bumps on the chip are utilized for alignment bonding, and the wafer or the chip has the advantages of high bonding strength, easiness in packaging, simple process and the like.
In the conventional metal bump, the copper bump interconnection bonding application technology tends to be mature. The bonding between copper bumps is mainly realized by various modes such as direct bonding by hot pressing, solder bonding and the like. The hot-pressing direct bonding mainly utilizes thermal motion diffusion among copper atoms to realize up-and-down bonding of metal copper, but the surface cleanliness and flatness of copper bumps can influence the reliability of copper bump interconnection bonding. While the solder bonding contains a large amount of solder species and usually contains metallic tin, the main purpose is to generate a metallic intermediate layer by chemical reaction between copper and tin, so that the bonding structure is more stable, however, the requirement on the component of the metallic tin is relatively high, the component of the metallic tin is too small to form a sufficient metallic intermediate layer, and the component of the metallic tin is too much to easily form brittle intermetallic compound Cu 3 Sn causes a "dewetting" state of the solder interface, thereby reducing bonding reliability and conductivity. Therefore, there is a need to introduce a copper bump interconnection bonding method that is reliable in interconnection and superior in performance.
Disclosure of Invention
Accordingly, there is a need to provide a wafer level copper bump interconnect structure and a bonding method thereof; the bonding method can realize stable bonding between copper bumps without introducing other metals except copper, remarkably improves bonding reliability and ensures good conductive effect.
The bonding method of the wafer-level copper-copper bump interconnection structure comprises the following steps:
depositing a nano copper layer on the surface of a copper bump of a wafer by adopting pulse laser sputtering with the energy power of 100mJ-300mJ under background gas to obtain a structural wafer;
coating nano copper slurry on the surface of a nano copper layer in the structural wafer to obtain a pretreated wafer, wherein the nano copper slurry comprises nano copper powder, a reducing agent, a curing agent and an organic solvent;
and in a reducing atmosphere, the other structural wafer and the pretreatment wafer are subjected to flip-chip hot-pressing lamination, and are cooled and placed still after heat treatment and solidification, so that the bonding of the wafer-level copper-copper bump interconnection structure is completed.
In one embodiment, the nano-copper layer has a thickness of 0.5 μm to 1.5 μm.
In one embodiment, the particle size of the nano copper powder is 30nm-40nm, and the mass percentage of the nano copper powder in the nano copper slurry is 60% -80%.
In one embodiment, the reducing agent is at least one of oxalic acid and ethanol, and the mass percentage of the reducing agent in the nano copper slurry is 5% -10%.
In one embodiment, the curing agent is at least one selected from bisphenol A epoxy resin and polyvinyl alcohol resin, and the mass percentage of the curing agent in the nano copper slurry is 5% -10%.
In one embodiment, the other structural wafer is manufactured into a silicon chip through size design, and then the silicon chip is subjected to flip-chip hot-press bonding with the pretreatment wafer.
In one embodiment, the reducing atmosphere is selected from formic acid reducing atmospheres.
In one embodiment, the hot pressing is performed at a temperature of 50-180 ℃, a pressure of 5-20 MPa, and a time of 0.5-10 min.
In one embodiment, the heat treatment curing temperature is 100-250 ℃ and the time is 10-60 min.
The wafer-level copper-copper bump interconnection structure prepared by the bonding method of the wafer-level copper-copper bump interconnection structure comprises copper bumps and a nano copper interconnection layer interconnecting the two copper bumps.
According to the bonding method of the wafer-level copper-copper bump interconnection structure, the nano copper layer structure is obtained by utilizing pulse laser sputtering deposition under the specific energy power condition, nano copper particles forming the nano copper layer structure are loosely arranged and have a certain pore, so that the nano copper layer has a micro-nano structure, on one hand, the nano copper layer structure has rich pores which can be fully contacted with nano copper slurry, the size of the pore is larger than the particle size of the nano copper powder in the nano copper slurry, so that the nano copper slurry is easy to permeate, the bonding strength between the nano copper slurry and the nano copper layer is fully enhanced in the curing process, and the curing effect of the nano copper slurry is enhanced, so that the interconnection structure with high density and high strength can be formed after the nano copper slurry is cured; on the other hand, the micro-nano structure of the nano copper layer is also beneficial to fully releasing the stress generated in the curing process of the nano copper slurry, so that the stability of the interconnection structure can be ensured. In addition, the bonding method does not need to introduce other metals except copper, does not generate bad intermetallic compounds, can further improve bonding reliability, is beneficial to reducing loss caused by signal transmission, and ensures good conductive effect.
Therefore, the wafer-level copper-copper bump interconnection structure prepared by the bonding method has higher reliability and better conductive effect, and can be widely applied to the technical fields of electronic package interconnection and the like.
Drawings
FIG. 1 is a process diagram of a bonding method of a wafer level copper bump interconnect structure according to an embodiment of the present invention.
101, a wafer; 102. copper bumps; 103. a nano copper layer; 104. nano copper slurry.
Detailed Description
The present invention will be described in more detail below in order to facilitate understanding of the present invention. It should be understood, however, that the invention may be embodied in many different forms and is not limited to the implementations or embodiments described herein. Rather, these embodiments or examples are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments or examples only and is not intended to be limiting of the invention. As used herein, the optional scope of the term "and/or" includes any one of the two or more related listed items, as well as any and all combinations of related listed items, including any two or more of the related listed items, or all combinations of related listed items.
By constructing the nano micro-nano structure on the surface of the copper bump, a large-scale space contact area is formed, the bonding slurry is fully contacted, the mechanical connection is increased, the bonding force between the bonding slurry and the copper bump is improved, and the bonding reliability is enhanced. However, in the conventional technology, metal atoms such as zinc, tin and the like which are more active than copper are replaced or corroded by utilizing different active characteristics of different metal elements in the copper alloy layer, so that the copper alloy layer is constructed into a micro-nano structure. However, this method of constructing the micro-nano structure inevitably introduces impurity metals, and it is difficult to ensure the singleness of metallic copper in the final bonding structure in the replacement or corrosion process, and thus, the generation of intermetallic compounds cannot be avoided, thereby being disadvantageous in improving the bonding reliability.
Therefore, referring to fig. 1, the bonding method of the wafer level copper-copper bump interconnection structure provided by the invention comprises the following steps:
s1, depositing a nano copper layer 103 on the surface of a copper bump 102 of a wafer 101 by adopting pulse laser sputtering with the energy power of 100mJ-300mJ under the background gas to obtain a structural wafer;
s2, coating nano copper slurry 104 on the surface of a nano copper layer 103 in the structural wafer to obtain a pretreated wafer, wherein the nano copper slurry 104 comprises nano copper powder, a reducing agent, a curing agent and an organic solvent;
and S3, in a reducing atmosphere, reversely mounting another structural wafer and the pretreatment wafer, thermally pressing and attaching, cooling and standing after thermal treatment and solidification, and finishing the bonding of the wafer-level copper-copper bump interconnection structure.
In step S1, compared with the traditional film plating method, the method adopts the pulse laser sputtering deposition under the specific energy power condition, the pulse laser has a high energy peak value and a short pulse width, a large number of complex micro-nano copper particles are sputtered to form plasmas when the copper target material is ablated, the plasmas reach the surface of the copper bump 102 after being directionally expanded in background gas, so that the nano copper layer 103 formed by irregularly and loosely arranged nano copper particles is deposited on the surface of the copper bump 102, and certain pores are formed among the nano copper particles, so that the nano copper layer 103 has a micro-nano structure.
On the one hand, the nano copper layer 103 has abundant pores in the structure, can be fully contacted with the nano copper slurry 104, and the size of the pores is larger than the particle size of nano copper powder in the nano copper slurry 104, so that the nano copper slurry 104 is easy to permeate, the bonding strength between the nano copper slurry 104 and the nano copper layer 103 is fully enhanced in the curing process, the curing effect of the nano copper slurry 104 is enhanced, and the nano copper slurry 104 can form an interconnection structure with high density and high strength after being cured. On the other hand, the micro-nano structure of the nano copper layer 103 is also beneficial to fully releasing the stress generated in the curing process of the nano copper paste 104, so that the stability of the interconnection structure can be ensured.
Specifically, the background gas is selected from inert gases, preferably argon.
Preferably, the thickness of the nano copper layer 103 is 0.5 μm-1.5 μm, which is not only beneficial to the full penetration of the nano copper paste 104, enhances the solidification effect of the nano copper paste 104, improves the density and strength of the interconnection structure, but also can avoid the interlayer stress between the nano copper layer 103 and the copper bump 102 as much as possible. More preferably, the thickness of the nano-copper layer 103 is 0.5 μm to 1 μm.
In one embodiment, the preparation method of the copper bump 102 on the wafer 101 may be selected from electroplating, which includes the following specific steps: sputtering copper seed layer on the surface of the wafer by Physical Vapor Deposition (PVD), coating photoresist on the surface of the copper seed layer, baking, exposing, developing and post-baking,the photoresist is provided with a porous array, and the photoresist is ensured to have higher adhesiveness; placing wafer 101 with porous array photoresist in electroplating copper solution for electroplating deposition after power-on, wherein the electroplating process can be heated, and stirring rate is controlled, and the electroplating copper solution comprises CuSO 4 A brightening agent and a leveling agent; copper bumps 102 are grown in the holes of the photoresist by controlling the current density to be 1ASD-2ASD and the electroplating time to be 30min-60 min.
Specifically, the height of the copper bump 102 is 6 μm-8 μm.
In another embodiment, the wafer 101 with the porous array photoresist may be further used to perform pulse laser sputtering deposition on the nano-copper layer 103, so as to obtain a structural wafer with the nano-copper layer 103 deposited on the surface of the copper bump 102 of the wafer 101.
In step S2, it is preferable to coat the surface of the nano copper layer 103 with the nano copper slurry 104 of 1 μm-2 μm, and stand for 5min-15min, so that the nano copper slurry 104 can be fully immersed in the loose structure of the nano copper layer 103, and stability of the interconnection structure is improved.
Specifically, the particle size of the nano copper powder is preferably 30nm-40nm, which is more beneficial to the penetration of the nano copper slurry 104. Wherein, the mass percentage of the nanometer copper powder in the nanometer copper slurry 104 is 60-80%.
The reducing agent can reduce the nano copper powder oxidized by oxygen in the nano copper slurry 104, preferably, the reducing agent is at least one of oxalic acid and ethanol, and the mass percentage of the reducing agent in the nano copper slurry 104 is 5% -10%.
The curing agent is favorable for enhancing the curing strength of the nano copper paste 104, and preferably, the curing agent is at least one selected from bisphenol A epoxy resin and polyvinyl alcohol resin, and the mass percentage of the curing agent in the nano copper paste 104 is 5-10%.
The dispersion of the nano copper powder can be promoted by using an organic solvent, so that the nano copper powder is uniformly distributed in the infiltration process of the nano copper slurry 104, and the curing effect of the nano copper slurry 104 is further improved, preferably, the organic solvent is at least one of ethyl acetate, toluene, diethyl ether and isopropyl ether, and the mass percentage of the organic solvent in the nano copper slurry 104 is 10% -20%.
It can be appreciated that the nano copper paste has better curing strength when the nano copper paste includes 60wt% to 80wt% of nano copper powder, 5wt% to 10wt% of reducing agent, 5wt% to 10wt% of curing agent, and 10wt% to 20wt% of organic solvent.
It should be noted that, the photoresist of the copper bump 102 can be directly prepared on the wafer 101, and the nano copper slurry 104 can be coated; the nano copper paste 104 may be coated on the surface of the nano copper layer 103 by a printing screen method. The specific preparation process is not repeated, and a person skilled in the art can select a proper coating method according to actual preparation conditions, so that the invention is not limited.
In step S3, the nano copper particles in the nano copper layer 103 and the nano copper paste 104 are fully contacted through free movement and atomic thermal movement by hot pressing treatment to form preliminary Cu-Cu bonding. Furthermore, the wafer substrate bonded by the preliminary Cu-Cu is subjected to heat treatment, so that the nano copper slurry 104 is sintered and solidified, the sintering area can be increased based on the loose micro-nano structure of the nano copper layer 103, and the solidification degree of the nano copper slurry 104 and the nano copper layer 103 is improved, thereby further reinforcing the structure between the nano copper layer 103 and the nano copper slurry 104 and promoting the formation of more Cu-Cu bonds.
Preferably, the silicon chip is manufactured from another structural wafer through size design, and then the silicon chip is subjected to flip-chip hot-press lamination with the pretreatment wafer, so that the bonded target silicon chip can be directly obtained.
Specifically, the hot pressing temperature is 50-180 ℃, the pressure is 5-20 MPa, and the time is 0.5-10 min.
The temperature of the heat treatment is 100-250 ℃ and the time is 10-60 min.
The standing and solidifying time is 6-12 h.
It can be understood that the bonding effect is better when the hot pressing temperature is 50-180 ℃, the pressure is 5-20 MPa, the time is 0.5-10 min, the heat treatment temperature is 100-250 ℃, the time is 10-60 min, and the standing and curing time is 6-12 h.
The protective is carried out by adopting a reducing atmosphere, so that the problems of oxidation and the like in the reaction process can be effectively avoided, and the reducing atmosphere can be specifically selected from formic acid reducing atmosphere.
Therefore, the bonding method does not need to introduce other metals except copper, does not generate bad intermetallic compounds, can further improve bonding reliability, is beneficial to reducing loss caused by signal transmission, and ensures good conductive effect.
The invention also provides a wafer-level copper-copper bump interconnection structure prepared by the bonding method of the wafer-level copper-copper bump interconnection structure, which comprises copper bumps 102 and a nano copper interconnection layer interconnecting the two copper bumps 102.
Specifically, the nano-copper interconnect layer includes nano-copper particles and cured copper paste cured to fill in between the nano-copper particle pores.
The wafer-level copper-copper bump interconnection structure can realize efficient and stable conductive effect, so that the service life of an electronic component with the wafer-level copper-copper bump interconnection structure is longer.
The wafer level copper-copper bump interconnection structure and the bonding method thereof will be further described in the following specific examples.
Example 1
Sputtering a copper seed layer on the surface of a wafer by PVD, coating photoresist with the thickness of 10 mu m on the surface of the copper seed layer, and enabling the photoresist to have a porous array through baking, exposure, development and post baking; placing a wafer with photoresist with a porous array in an electrolytic copper plating solution for electroplating deposition after power-on, wherein the electrolytic copper plating solution comprises CuSO 4 The current density is controlled to be 2ASD, the electroplating time is controlled to be 30min, and copper bumps with the height of 8 mu m are grown in holes of the photoresist. Placing a wafer with copper bumps in a pulse laser sputtering deposition vacuum device, setting laser with energy power of 300mJ to bombard a copper target material under 60Pa of argon background gas, and depositing sputtered ion clusters to a receiving area to enable the copper bumps to be formedDepositing a nano copper layer with the thickness of 1 mu m on the surface to obtain a first structure wafer, preparing a second structure wafer by adopting the same method, removing photoresist in the second structure wafer by utilizing an organic solvent, and dicing into silicon chips with proper sizes by using a dicing saw.
80 weight percent of nano copper powder (particle size is 30 nm), 5 weight percent of oxalic acid, 10 weight percent of bisphenol A epoxy resin and 5 weight percent of ethyl acetate are added into a stirrer to be heated and stirred for 30min, so as to obtain nano copper slurry. Uniformly coating nano copper slurry with the thickness of 1 mu m on the surface of the nano copper layer in the first structure wafer, standing for 15min, and removing superfluous nano copper slurry on the surface to obtain the pretreated wafer.
And in a formic acid reducing atmosphere, placing the silicon chip and the pretreated wafer on a wafer bonding machine, enabling the silicon chip and copper bumps in the pretreated wafer to be in one-to-one correspondence, carrying out flip-chip hot-pressing lamination on the silicon chip and the pretreated wafer for 5min under the hot-pressing condition of 150 ℃ and 12MPa, then placing the silicon chip and the pretreated wafer in a drying oven at 250 ℃ for heat treatment for 10min, taking out the silicon chip and the pretreated wafer after the heat treatment is cooled to room temperature, standing the silicon chip and the pretreated wafer for 12h, and completing bonding of a wafer-level copper bump interconnection structure to obtain the wafer-level copper bump interconnection structure.
Example 2
Sputtering a copper seed layer on the surface of a wafer by PVD, coating photoresist with the thickness of 10 mu m on the surface of the copper seed layer, and enabling the photoresist to have a porous array through baking, exposure, development and post baking; placing a wafer with photoresist with a porous array in an electrolytic copper plating solution for electroplating deposition after power-on, wherein the electrolytic copper plating solution comprises CuSO 4 The current density is controlled to be 2ASD, the electroplating time is controlled to be 30min, and copper bumps with the height of 6 mu m are grown in holes of the photoresist. Placing the wafer with the copper bumps in pulse laser sputtering deposition vacuum equipment, setting laser with energy power of 100mJ under argon background gas of 60Pa to bombard copper target material, depositing sputtered ion groups on a receiving area to deposit a nano copper layer with thickness of 0.8 μm on the surface of the copper bumps to obtain a wafer with a first structure, preparing a wafer with a second structure by adopting the same method, removing photoresist in the wafer with the second structure by utilizing an organic solvent,dicing into silicon chips of suitable size with a dicing saw.
80 weight percent of nano copper powder (particle size is 35 nm), 5 weight percent of oxalic acid, 10 weight percent of bisphenol A epoxy resin and 5 weight percent of ethyl acetate are added into a stirrer to be heated and stirred for 30min, so as to obtain nano copper slurry. Uniformly coating nano copper slurry with the thickness of 1 mu m on the surface of the nano copper layer in the first structure wafer, standing for 15min, and removing superfluous nano copper slurry on the surface to obtain the pretreated wafer.
And in a formic acid reducing atmosphere, placing the silicon chip and the pretreated wafer on a wafer bonding machine, enabling the silicon chip and copper bumps in the pretreated wafer to be in one-to-one correspondence, carrying out flip-chip hot-pressing lamination on the silicon chip and the pretreated wafer for 5min under the hot-pressing condition of 150 ℃ and 12MPa, then placing the silicon chip and the pretreated wafer in a drying oven at 250 ℃ for heat treatment for 10min, taking out the silicon chip and the pretreated wafer after the heat treatment is cooled to room temperature, standing the silicon chip and the pretreated wafer for 12h, and completing bonding of a wafer-level copper bump interconnection structure to obtain the wafer-level copper bump interconnection structure.
Example 3
Sputtering a copper seed layer on the surface of a wafer by PVD, coating photoresist with the thickness of 10 mu m on the surface of the copper seed layer, and enabling the photoresist to have a porous array through baking, exposure, development and post baking; placing a wafer with photoresist with a porous array in an electrolytic copper plating solution for electroplating deposition after power-on, wherein the electrolytic copper plating solution comprises CuSO 4 The current density is controlled to be 2ASD, the electroplating time is controlled to be 30min, and copper bumps with the height of 8 mu m are grown in holes of the photoresist. Placing a wafer with copper bumps in pulse laser sputtering deposition vacuum equipment, setting laser with energy power of 150mJ under argon background gas of 60Pa to bombard a copper target material, depositing sputtered ion groups on a receiving area to enable the surface of the copper bumps to deposit a nano copper layer with thickness of 1 mu m, obtaining a wafer with a first structure, preparing a wafer with a second structure by adopting the same method, removing photoresist in the wafer with the second structure by utilizing an organic solvent, and dicing into silicon chips with proper sizes by using a dicing saw.
70wt% of nano copper powder (particle size is 30 nm), 10wt% of oxalic acid, 10wt% of bisphenol A epoxy resin and 10wt% of ethyl acetate are added into a stirrer to be heated and stirred for 30min, so as to obtain nano copper slurry. Uniformly coating nano copper slurry with the thickness of 1 mu m on the surface of the nano copper layer in the first structure wafer, standing for 15min, and removing superfluous nano copper slurry on the surface to obtain the pretreated wafer.
And in a formic acid reducing atmosphere, placing the silicon chip and the pretreated wafer on a wafer bonding machine, enabling the silicon chip and copper bumps in the pretreated wafer to be in one-to-one correspondence, carrying out flip-chip hot-pressing lamination on the silicon chip and the pretreated wafer for 5min under the hot-pressing condition of 150 ℃ and 12MPa, then placing the silicon chip and the pretreated wafer in a drying oven at 250 ℃ for heat treatment for 10min, taking out the silicon chip and the pretreated wafer after the heat treatment is cooled to room temperature, standing the silicon chip and the pretreated wafer for 12h, and completing bonding of a wafer-level copper bump interconnection structure to obtain the wafer-level copper bump interconnection structure.
Example 4
Sputtering a copper seed layer on the surface of a wafer by PVD, coating photoresist with the thickness of 10 mu m on the surface of the copper seed layer, and enabling the photoresist to have a porous array through baking, exposure, development and post baking; placing a wafer with photoresist with a porous array in an electrolytic copper plating solution for electroplating deposition after power-on, wherein the electrolytic copper plating solution comprises CuSO 4 The current density is controlled to be 2ASD, the electroplating time is controlled to be 30min, and copper bumps with the height of 8 mu m are grown in holes of the photoresist. Placing a wafer with copper bumps in pulse laser sputtering deposition vacuum equipment, setting laser with energy power of 200mJ under argon background gas of 60Pa to bombard a copper target material, depositing sputtered ion groups on a receiving area to enable the surface of the copper bumps to deposit a nano copper layer with thickness of 1 mu m, obtaining a wafer with a first structure, preparing a wafer with a second structure by adopting the same method, removing photoresist in the wafer with the second structure by utilizing an organic solvent, and dicing into silicon chips with proper sizes by using a dicing saw.
80 weight percent of nano copper powder (particle size is 40 nm), 5 weight percent of oxalic acid, 10 weight percent of bisphenol A epoxy resin and 5 weight percent of ethyl acetate are added into a stirrer to be heated and stirred for 30min, so as to obtain nano copper slurry. Uniformly coating nano copper slurry with the thickness of 1 mu m on the surface of the nano copper layer in the first structure wafer, standing for 15min, and removing superfluous nano copper slurry on the surface to obtain the pretreated wafer.
And in a formic acid reducing atmosphere, placing the silicon chip and the pretreated wafer on a wafer bonding machine, enabling the silicon chip and copper bumps in the pretreated wafer to be in one-to-one correspondence, carrying out flip-chip hot-pressing lamination on the silicon chip and the pretreated wafer for 8min under the hot-pressing condition of 110 ℃ and 15MPa, then placing the silicon chip and the pretreated wafer in a drying oven at 180 ℃ for heat treatment for 30min, taking out the silicon chip and the pretreated wafer after the heat treatment is cooled to room temperature, standing the silicon chip and the pretreated wafer for 10h, and completing bonding of a wafer-level copper bump interconnection structure to obtain the wafer-level copper bump interconnection structure.
Comparative example 1
Comparative example 1 differs from example 1 in that a nano copper layer was deposited on the copper bump surface using a magnetron sputtering deposition method.
Because the nano copper layer structure is compact and the porosity is lower, in the wafer-level copper-copper bump interconnection structure prepared in the comparative example 1, copper bumps are only interconnected by curing the nano copper slurry coated on the surface of the nano copper layer, and the reliability of the interconnection structure is lower.
Comparative example 2
Comparative example 2 differs from example 1 in that the nano-copper layer was deposited using pulsed laser sputtering with an energy power of 50 mJ.
The bonding effect of the wafer level copper-copper bump interconnect structure in comparative example 2 was poor because the energy power was too small, resulting in an insufficiently uniform distribution of the nano-copper layer structure.
Comparative example 3
Comparative example 3 differs from example 1 in that the nano-copper layer was deposited using pulsed laser sputtering with an energy power of 500 mJ.
The bonding effect of the wafer level copper-copper bump interconnect structure in comparative example 3 was poor because the energy power was too high, resulting in too large metal particles in the nano-copper layer structure.
The technical features of the above-described embodiments may be arbitrarily combined, and all possible combinations of the technical features in the above-described embodiments are not described for brevity of description, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples illustrate only a few embodiments of the invention, which are described in detail and are not to be construed as limiting the scope of the invention. It should be noted that it will be apparent to those skilled in the art that several variations and modifications can be made without departing from the spirit of the invention, which are all within the scope of the invention. Accordingly, the scope of protection of the present invention is to be determined by the appended claims.
Claims (10)
1. The bonding method of the wafer-level copper-copper bump interconnection structure is characterized by comprising the following steps of:
depositing a nano copper layer on the surface of a copper bump of a wafer by adopting pulse laser sputtering with the energy power of 100mJ-300mJ under background gas to obtain a structural wafer;
coating nano copper slurry on the surface of a nano copper layer in the structural wafer to obtain a pretreated wafer, wherein the nano copper slurry comprises nano copper powder, a reducing agent, a curing agent and an organic solvent;
and in a reducing atmosphere, the other structural wafer and the pretreatment wafer are subjected to flip-chip hot-pressing lamination, and are cooled and placed still after heat treatment and solidification, so that the bonding of the wafer-level copper-copper bump interconnection structure is completed.
2. The method of bonding a wafer level copper-copper bump interconnect structure of claim 1, wherein the nano-copper layer has a thickness of 0.5 μm to 1.5 μm.
3. The bonding method of the wafer-level copper-copper bump interconnection structure according to claim 1, wherein the particle size of the nano copper powder is 30nm-40nm, and the mass percentage of the nano copper powder in the nano copper slurry is 60% -80%.
4. The bonding method of the wafer-level copper-copper bump interconnection structure according to claim 1, wherein the reducing agent is at least one of oxalic acid and ethanol, and the mass percentage of the reducing agent in the nano copper paste is 5% -10%.
5. The bonding method of the wafer-level copper-copper bump interconnection structure according to claim 1, wherein the curing agent is at least one selected from bisphenol a epoxy resin and polyvinyl alcohol resin, and the mass percentage of the curing agent in the nano copper paste is 5% -10%.
6. The method of bonding a wafer level copper bump interconnect structure of claim 1 wherein another of said structural wafers is fabricated into a silicon die by sizing and flip-chip thermocompression bonded to said pre-processed wafer.
7. The method of bonding a wafer level copper bump interconnect structure of claim 1 wherein the reducing atmosphere is selected from the group consisting of a formic acid reducing atmosphere.
8. The bonding method of the wafer-level copper-copper bump interconnection structure according to claim 1, wherein the hot pressing temperature is 50-180 ℃, the pressure is 5-20 MPa, and the time is 0.5-10 min.
9. The method for bonding a wafer level copper bump interconnection structure according to claim 1, wherein the heat treatment curing temperature is 100 ℃ to 250 ℃ and the time is 10min to 60min.
10. A wafer level copper-copper bump interconnect structure made by the bonding method of the wafer level copper-copper bump interconnect structure of any one of claims 1 to 9, comprising copper bumps and a nano-copper interconnect layer interconnecting two of said copper bumps.
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