CN116052586B

CN116052586B - Pixel circuit, driving method and display panel

Info

Publication number: CN116052586B
Application number: CN202310129442.5A
Authority: CN
Inventors: 王炜
Original assignee: Wuhan Tianma Microelectronics Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2023-02-14
Filing date: 2023-02-14
Publication date: 2024-07-09
Anticipated expiration: 2043-02-14
Also published as: CN116052586A

Abstract

The embodiment of the application provides a pixel circuit, a driving method and a display panel, wherein the pixel circuit comprises: the control end of the driving module is electrically connected with the first node; the threshold compensation module is electrically connected with the first node and comprises at least two first transistors connected in series, and the connection node between the adjacent first transistors is a first connection node; the first reset module is electrically connected with the first node and comprises at least two second transistors connected in series, and the connection node between the adjacent second transistors is a second connection node; the control end of the leakage switch module is electrically connected with the first control signal line, the first end of the leakage switch module is electrically connected with the first connecting node, and the second end of the leakage switch module is electrically connected with the second connecting node; the first control signal line is used for providing a first control signal, and the first control signal is a constant voltage signal or a jump voltage signal. The embodiment of the application can improve the flicker problem of the display panel.

Description

Pixel circuit, driving method and display panel

Technical Field

The application belongs to the technical field of display, and particularly relates to a pixel circuit, a driving method and a display panel.

Background

With the continuous development of display technology, performance requirements of display panels are increasing. However, the present inventors have studied and found that when the display panel is displayed at a low refresh frequency, the display screen may have a Flicker phenomenon (Flicker) to a different extent, thereby affecting the display effect of the display panel.

Disclosure of Invention

The embodiment of the application provides a pixel circuit, a driving method and a display panel, which can improve the flicker problem of the display panel.

In a first aspect, an embodiment of the present application provides a pixel circuit, including: the control end of the driving module is electrically connected with the first node; the threshold compensation module is electrically connected with the first node and comprises at least two first transistors connected in series, and the connecting node between the adjacent first transistors is a first connecting node; the first reset module is electrically connected with the first node and comprises at least two second transistors connected in series, and the connecting node between the adjacent second transistors is a second connecting node; the control end of the leakage switch module is electrically connected with the first control signal line, the first end of the leakage switch module is electrically connected with the first connecting node, and the second end of the leakage switch module is electrically connected with the second connecting node; the first control signal line is used for providing a first control signal, and the first control signal is a constant voltage signal or a jump voltage signal.

In a second aspect, an embodiment of the present application provides a driving method, which is applied to the pixel circuit provided in the first aspect, the driving method including: the first control signal is supplied to the first control signal line, and is a constant voltage signal or a jump voltage signal.

In a third aspect, embodiments of the present application provide a display panel comprising a pixel circuit as provided in the first aspect.

The pixel circuit comprises a driving module, a threshold compensation module, a first reset module and a leakage switch module, wherein the threshold compensation module comprises at least two first transistors connected in series, a connecting node between every two adjacent first transistors is a first connecting node, the first reset module comprises at least two second transistors connected in series, the connecting node between every two adjacent second transistors is a second connecting node, the leakage switch module is connected between the first connecting node and the second connecting node, a first control signal provided by a first control signal line can control the conduction or leakage of the leakage switch module, and the charge of one of the first connecting node and the second connecting node with higher potential is transmitted to the other, so that the potential of a control end (namely the first node) of the driving module and the potential of the first connecting node and/or the potential difference between the potentials of the second connecting node are reduced, the leakage current of the first node is further reduced, the flicker phenomenon of the display panel is improved, and the display effect of the display panel is improved. In addition, when the first control signal is a jump voltage signal, the first control signal can be controlled to jump upwards or downwards in the lighting stage according to the brightness change of the display panel in a picture period, so that the potential of the first connection node and the potential of the second connection node are adjusted through the coupling effect of the parasitic capacitance of the leakage switch module, the dynamic adjustment of the potential of the first node is realized, the dynamic adjustment of the brightness of the display panel is further realized, and the stability and uniformity of the brightness of the display panel are further improved.

Drawings

In order to more clearly illustrate the technical solution of the embodiments of the present application, the drawings that are needed to be used in the embodiments of the present application will be briefly described, and it is possible for a person skilled in the art to obtain other drawings according to these drawings without inventive effort.

Fig. 1 is a schematic circuit diagram of a pixel circuit according to an embodiment of the present application;

FIG. 2 is a schematic diagram of a driving timing diagram of a pixel circuit according to an embodiment of the present application;

FIG. 3 is a schematic diagram of another driving timing of a pixel circuit according to an embodiment of the present application;

FIG. 4 is a schematic diagram of another driving timing of a pixel circuit according to an embodiment of the present application;

FIG. 5 is a schematic diagram of another circuit of a pixel circuit according to an embodiment of the present application;

FIG. 6 is a schematic diagram of another driving timing of a pixel circuit according to an embodiment of the present application;

FIG. 7 is a schematic diagram of another driving timing of a pixel circuit according to an embodiment of the present application;

FIG. 8 is a schematic diagram of another driving timing of a pixel circuit according to an embodiment of the present application;

FIG. 9 is a schematic diagram of a pixel circuit according to an embodiment of the present application;

FIG. 10 is a schematic flow chart of a driving method according to an embodiment of the present application;

fig. 11 is a schematic structural diagram of a display device according to an embodiment of the application.

Detailed Description

Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make the objects, technical solutions and advantages of the present application more apparent, the present application will be described in further detail below with reference to the accompanying drawings and the detailed embodiments. It should be understood that the particular embodiments described herein are meant to be illustrative of the application only and not limiting. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the application by showing examples of the application.

It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.

It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.

It should be noted that, the transistor in the embodiment of the present application may be an N-type transistor or a P-type transistor. For an N-type transistor, the on level is high and the off level is low. That is, the gate of the N-type transistor is on between the first and second poles when the gate is high, and is off between the first and second poles when the gate is low. For a P-type transistor, the on level is low and the off level is high. That is, when the control of the P-type transistor is at a very low level, the first pole and the second pole are turned on, and when the control of the P-type transistor is at a high level, the first pole and the second pole are turned off. In a specific implementation, the gate of each transistor is used as a control electrode, and the first electrode of each transistor may be used as a source electrode, the second electrode may be used as a drain electrode, or the first electrode may be used as a drain electrode, and the second electrode may be used as a source electrode, which is not distinguished herein.

In embodiments of the present application, the term "electrically connected" may refer to two components being directly electrically connected, or may refer to two components being electrically connected via one or more other components.

In the embodiment of the present application, the first node, the second node, and the third node are defined only for convenience in describing the circuit structure, and the first node, the second node, and the third node are not one actual circuit unit.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Accordingly, it is intended that the present application covers the modifications and variations of this application provided they come within the scope of the appended claims (the claims) and their equivalents. The embodiments provided by the embodiments of the present application may be combined with each other without contradiction.

Before describing the technical solution provided by the embodiments of the present application, in order to facilitate understanding of the embodiments of the present application, the present application firstly specifically describes the problems existing in the related art:

The charge at the control end (i.e., the first node) of the driving module is leaked to the node with lower potential through the transistor connected with the first node, so that the voltage of the first node is unstable, and the current flowing through the driving module is increased or decreased. Especially, in the case of a low refresh frequency (i.e., low frequency), since the time of one frame refresh period is long, the drain time of the first node is long, so that the potential change of the first node is large, and the flicker degree of the display panel is serious.

In the current display panel, a low temperature poly oxide (Low Temperature Polycrystalline Oxide, LTPO) display panel is generally used to reduce the leakage current of the transistor connected to the first node and improve the flicker problem of the display panel during low frequency driving. However, LTPO display panels have a complex structure and a complex manufacturing process, and have high manufacturing costs.

In view of the above-mentioned research of the inventor, the embodiments of the present application provide a pixel circuit, a driving method, and a display panel, which can solve the problem of flicker of the display panel during low-frequency driving in the related art.

The technical conception of the embodiment of the application is as follows: the leakage switch module is added in the pixel circuit and connected between the first connection node and the second connection node, and the first control signal provided by the first control signal line can control the conduction or leakage of the leakage switch module, so that the charge of one of the first connection node and the second connection node, which has higher potential, is transmitted to the other, the voltage difference between the potential of the control end (namely the first node) of the driving module and the potential of the first connection node and/or the potential of the second connection node is reduced, the leakage current of the first node is further reduced, the flicker phenomenon of the display panel is improved, and the display effect of the display panel is improved.

In addition, when the first control signal is a jump voltage signal, the first control signal can be controlled to jump upwards or downwards in the lighting stage according to the brightness change of the display panel in a picture period, so that the potential of the first connection node and the potential of the second connection node are adjusted through the coupling effect of the parasitic capacitance of the leakage switch module, the dynamic adjustment of the potential of the first node is realized, the dynamic adjustment of the brightness of the display panel is further realized, and the stability and uniformity of the brightness of the display panel are further improved.

The pixel circuit provided by the embodiment of the application is first described below.

Fig. 1 is a schematic circuit diagram of a pixel circuit according to an embodiment of the present application. As shown in fig. 1, the pixel circuit 10 provided in the embodiment of the present application may include a driving module 101, a threshold compensation module 102, a first reset module 103, and a leakage switch module 104. The control terminal of the driving module 101 is electrically connected to the first node N1, and the driving module 101 may provide a driving current for the light emitting element D to drive the light emitting element D to emit light. Illustratively, the light emitting element D includes, but is not limited to, an Organic LIGHT EMITTING Diode (OLED), an inorganic light emitting diode (LIGHT EMITTING diode, LED), or a Quantum Dot (QD). The inorganic light emitting diode may include, for example, a millimeter/sub-millimeter light emitting diode (MINI LIGHT EMITTING diode), a micro LIGHT EMITTING diode (micro LED), or a quantum dot LIGHT EMITTING diode (QLED), but the embodiment of the present application is not limited thereto.

The threshold compensation module 102 is electrically connected to the first node N1, and the threshold compensation module 102 may include at least two first transistors T1 connected in series, and fig. 1 illustrates that the threshold compensation module 102 includes two first transistors T1 connected in series. The connection node between adjacent first transistors T1 is a first connection node X1. The first reset module 103 is electrically connected to the first node N1, and the first reset module 103 may include at least two second transistors T2 connected in series, and fig. 1 illustrates that the first reset module 103 includes two second transistors T2 connected in series. The connection node between the adjacent second transistors T2 is a second connection node X2.

As shown in fig. 1, in some specific embodiments, optionally, the control terminal of the first reset module 103 may be electrically connected to the first scan signal line S1, the first terminal of the first reset module 103 may be electrically connected to the first reference voltage signal line vref1, and the second terminal of the first reset module 103 may be electrically connected to the first node N1. The first reset module 103 may be configured to be turned on under the control of the first scan signal line S1, and transmit the first reference voltage signal of the first reference voltage signal line vref1 to the first node N1 to reset/initialize the first node N1.

The control terminal of the threshold compensation module 102 may be electrically connected to the second scan signal line S2, the first terminal of the threshold compensation module 102 is electrically connected to the first node N1, and the second terminal of the threshold compensation module 102 is electrically connected to the second terminal of the driving module 101. The threshold compensation module 102 may be configured to be turned on under the control of the second scanning signal line S2, and connect the control end of the driving module 101 with the second end of the driving module 101, so as to implement compensation of the threshold voltage Vth of the driving module 101.

The control end of the leakage switch module 104 is electrically connected to the first control signal line K1, the first end of the leakage switch module 104 is electrically connected to the first connection node X1, and the second end of the leakage switch module 104 is electrically connected to the second connection node X2.

Note that the first control signal line K1 may be a signal line newly added to the display panel, or may be a signal line existing in the multiplexed display panel, which is not limited in the embodiment of the present application.

The first control signal line K1 may be used to provide a first control signal, and the leakage switch module 104 may be turned on or off under the control of the first control signal. When the leakage switch module 104 is in the off state, the characteristic leakage current of the leakage switch module 104 itself may be utilized.

In some embodiments, the first control signal may be a constant voltage signal. Wherein the constant voltage signal is a voltage signal with a constant voltage value, and the constant voltage signal includes, but is not limited to, a constant positive voltage signal or a constant negative voltage signal.

When the first control signal is a constant voltage signal, the leakage switch module can be turned on or leaked (leaked when turned off) under the control of the constant voltage signal, so that the charge of one of the first connection node and the second connection node with higher potential is transferred to the other, for example, the charge of the first connection node is transferred to the second connection node, thereby reducing the voltage difference between the potential of the control end (i.e. the first node) of the driving module and the potential of the first connection node and/or the potential of the second connection node, further reducing the leakage current of the first node, improving the flicker phenomenon of the display panel, and improving the display effect of the display panel.

In other embodiments, the first control signal may be a trip voltage signal. The voltage signal, i.e. the voltage signal, of which the voltage value can be hopped, such as a pulse signal.

When the first control signal is a jump voltage signal, on the one hand, the leakage switch module can be turned on or leaked (leaked when turned off) under the control of the jump voltage signal, so that the charge of one of the first connection node and the second connection node with higher potential is transferred to the other, for example, the charge of the first connection node is transferred to the second connection node, thereby reducing the voltage difference between the potential of the control end (i.e. the first node) of the driving module and the potential of the first connection node and/or the potential of the second connection node, further reducing the leakage current of the first node, improving the flicker phenomenon of the display panel and improving the display effect of the display panel.

On the other hand, when the first control signal is a jump voltage signal, the first control signal can be controlled to jump upwards or downwards in the lighting stage according to the brightness change of the display panel in a picture period, so that the potential of the first connection node and the potential of the second connection node are adjusted through the coupling effect of the parasitic capacitance of the leakage switch module, the dynamic adjustment of the potential of the first node is realized, the dynamic adjustment of the brightness of the display panel is further realized, and the stability and uniformity of the brightness of the display panel are further improved.

According to some embodiments of the present application, the leakage switch module 104 may alternatively be in a normally closed state, i.e. the charge transfer from one of the first connection node X1 and the second connection node X2, which has a higher potential, to the other is achieved by utilizing the characteristic of the leakage current of the leakage switch module 104 itself.

Specifically, in some particular embodiments, the leakage switch module 104 may include a first conductivity type transistor. The first conductivity type transistor may be a P-type transistor, for example. Accordingly, the voltage value of the first control signal may be greater than 0, and the leakage switch module 104 may be normally closed under the control of the first control signal.

In this way, by controlling the leakage switch module 104 to be in the normally closed state, the charge of the one with the higher potential in the first connection node X1 and the second connection node X2 is transferred to the other by utilizing the characteristic of the leakage current of the leakage switch module 104, so as to reduce the voltage difference between the potential of the first node N1 and the potential of the first connection node X1 and/or the potential of the second connection node X2, further reduce the leakage current of the first node N1, improve the flicker phenomenon of the display panel, and improve the display effect of the display panel.

For example, in the light emitting stage, the potential of the first connection node X1 is generally higher than that of the second connection node X2, and by utilizing the self-leakage current characteristic of the leakage switch module 104, the charge of the first connection node X1 can be transmitted to the second connection node X2 through the leakage switch module 104, so as to increase the potential of the second connection node X2, reduce the leakage current of the first node N1 to the second connection node X2, further improve the flicker phenomenon of the display panel, and improve the display effect of the display panel.

Of course, in other specific embodiments, the leakage switch module 104 may also include a transistor of the second conductivity type. The second conductivity type transistor may be an N-type transistor, for example. Accordingly, the voltage value of the first control signal may be greater than 0, and the leakage switch module 104 may be normally closed under the control of the first control signal.

Alternatively, according to some embodiments of the present application, the leakage switch module 104 may be in a normally open state, i.e. the conductive leakage switch module 104 is used to transfer the charge of the higher potential one of the first connection node X1 and the second connection node X2 to the other.

Specifically, in some particular embodiments, the leakage switch module 104 may include a first conductivity type transistor. The first conductivity type transistor may be a P-type transistor, for example. Accordingly, the voltage value of the first control signal may be less than 0. Specifically, the voltage difference between the voltage value of the first control signal and the potential of the source of the leakage switch module 104 may be smaller than the threshold voltage Vth 'of the leakage switch module 104, i.e., vgs < Vth'. The leakage switch module 104 may be normally open under control of the first control signal.

Of course, in other specific embodiments, the leakage switch module 104 may also include a transistor of the second conductivity type. The second conductivity type transistor may be an N-type transistor, for example. Accordingly, the voltage value of the first control signal may be greater than 0. Specifically, the voltage difference between the voltage value of the first control signal and the potential of the source of the leakage switch module 104 may be greater than the threshold voltage Vth 'of the leakage switch module 104, i.e., vgs > Vth'. The leakage switch module 104 may be normally open under control of the first control signal.

In this way, by controlling the leakage switch module 104 to be in a normally open state, the conductive leakage switch module 104 is utilized to realize that the charge of one of the first connection node X1 and the second connection node X2 with higher potential is transferred to the other, so as to reduce the voltage difference between the potential of the first node N1 and the potential of the first connection node X1 and/or the potential of the second connection node X2, further reduce the leakage current of the first node N1, improve the flicker phenomenon of the display panel, and improve the display effect of the display panel.

Alternatively, the leakage switch module 104 may be in an on state for a portion of the time period and an off state for another portion of the time period, according to some embodiments of the present application.

Fig. 2 is a schematic diagram of a driving timing diagram of a pixel circuit according to an embodiment of the application. As shown in conjunction with fig. 1 and 2, one screen refresh period H may include a data write frame H1 and a hold frame H2 at the time of low frequency driving. One frame refresh period may include one hold frame h2, or may include a plurality of hold frames h2, which is not limited in the embodiment of the present application. At the time of the data writing frame h1, the potential of the first node N1 is refreshed, that is, there is a process of initializing the first node N1 and writing the data signal. While maintaining the frame h2, the potential of the first node N1 is not refreshed, i.e., there is no process of initializing the first node N1 and writing the data signal, thereby reducing power consumption.

The voltage value of the first control signal supplied from the first control signal line K1 at the time of data writing into the frame h1 may be different from the voltage value of the first control signal at the time of holding the frame h 2. Specifically, in one of the data writing frame h1 and the holding frame h2, the voltage value of the first control signal is greater than 0, and in the other, the voltage value of the first control signal is less than 0. For example, in some specific embodiments, in the data writing frame h1, the leakage switch module 104 may be in a conducting state under the control of the first control signal, and the conducted leakage switch module 104 is utilized to make the potential of the second connection node X2 be the same as the potential of the first connection node X1, that is, to raise the potential of the second connection node X2, so as to reduce the leakage current from the first node N1 to the second connection node X2, further improve the flicker phenomenon of the display panel, and raise the display effect of the display panel.

For example, in the data writing stage of the data writing frame h1, the threshold compensation module 102 is turned on, and the potential of the first connection node X1 is the same as the potential of the first node N1, for example, vdata-Vth. Where Vdata represents the voltage value of the data signal, and Vth represents the threshold voltage of the driving module 101. Since the leakage switch module 104 is turned on, the potential of the second connection node X2 is also pulled up to Vdata-Vth. In this way, in the subsequent stage, since the potential of the first node N1, the potential of the first connection node X1 and the potential of the second connection node X2 are the same or similar, the leakage current of the first node N1 to the first connection node X1 and/or the second connection node X2 can be reduced, so as to improve the flicker phenomenon of the display panel and enhance the display effect of the display panel.

Accordingly, in the hold frame h2, the leakage switch module 104 may be in an off state under the control of the first control signal. In this way, in the holding frame h2, the self-leakage current characteristic of the leakage switch module 104 is utilized to balance the potentials of the first connection node X1 and the second connection node X2, so as to reduce the voltage difference between the potential of the first node N1 and the potential of the first connection node X1 and/or the potential of the second connection node X2, further reduce the leakage current of the first node N1, improve the flicker phenomenon of the display panel, and improve the display effect of the display panel.

In other embodiments, optionally, in the data writing frame h1, the leakage switch module 104 may also be in an off state under the control of the first control signal. In the hold frame h2, the leakage switch module 104 is in a conductive state under the control of the first control signal.

In this way, in the data writing frame h1, the leakage switch module 104 is in an off state under the control of the first control signal, and the potential of the second connection node X2 is the same as the potential of the first connection node X1 by using the characteristic of the self leakage current of the leakage switch module 104, for example, the potential of the second connection node X2 is increased, so that the leakage current from the first node N1 to the second connection node X2 is reduced, the flicker phenomenon of the display panel is improved, and the display effect of the display panel is improved. In the holding frame h2, the leakage switch module 104 is in a conducting state under the control of the first control signal, the conducted leakage switch module 104 is utilized to balance the electric potentials of the first connection node X1 and the second connection node X2, so that the voltage difference between the electric potential of the first node N1 and the electric potential of the first connection node X1 and/or the electric potential of the second connection node X2 is reduced, the leakage current of the first node N1 is further reduced, the flicker phenomenon of the display panel is improved, and the display effect of the display panel is improved.

The inventor of the present application has found that in the same frame refresh period, the brightness of the display panel when writing data into the frame may be different from the brightness of the display panel when maintaining the frame, i.e., the brightness changes, causing a flicker problem.

In view of this, the present application considers the change of the voltage value of the first control signal to adjust the potential of the first connection node and/or the second connection node, and further adjusts the potential of the first node N1, so as to dynamically adjust the brightness of the display panel, thereby reducing the brightness difference between the brightness of the display panel when writing data into the frame and the brightness of the display panel when maintaining the frame.

Fig. 3 is a schematic diagram of another driving timing diagram of a pixel circuit according to an embodiment of the application. As shown in connection with fig. 1,2 and 3, according to some embodiments of the present application, optionally, at the first time t1 of the data writing frame switching h1 to the holding frame h2 or at the second time t2 in the holding frame h2, the voltage value of the first control signal may jump to adjust the potential of the first connection node X1 and/or the second connection node X2 by using the coupling effect of the parasitic capacitance of the leakage switch module 104 itself.

Specifically, a parasitic capacitance exists between at least one of the first end of the leakage switch module 104 and the second end of the leakage switch module 104 and the control end of the leakage switch module 104, and when the voltage value of the first control signal jumps (i.e. the potential of the control end of the leakage switch module 104 jumps), the potential of the first connection node X1 and/or the second connection node X2 can be adjusted by using the coupling effect of the parasitic capacitance of the leakage switch module 104 itself.

Because the potential of the first connection node X1 and/or the second connection node X2 changes, the potential of the first node N1 can be adjusted by the characteristic of the self leakage current of the threshold compensation module 102 and/or the coupling action of the parasitic capacitance of the threshold compensation module 102, and similarly, the potential of the first node N1 can be adjusted by the characteristic of the self leakage current of the first reset module 103 and/or the coupling action of the parasitic capacitance of the first reset module 103, so that the potential of the first node N1 can be dynamically adjusted, the dynamic adjustment of the luminance of the display panel can be further realized, the luminance difference between the luminance of the display panel when writing data into a frame and the luminance of the display panel when maintaining the frame can be reduced, and the stability and uniformity of the luminance of the display panel can be further improved.

It should be noted that, fig. 2 and fig. 3 each illustrate an upward jump of the voltage value of the first control signal, but it is understood that the voltage value of the first control signal may also jump downward, and may be specifically and flexibly adjusted according to the actual situation, which is not limited by the embodiment of the present application.

Further, in some specific embodiments, the hold frame h2 may include a non-light-emitting phase and a light-emitting phase located after the non-light-emitting phase, and the second time t2 may be specifically any time in the non-light-emitting phase. In this way, adjustment of the potential of the first node N1 is achieved before the light-emitting stage of the holding frame h2, thereby enabling the display panel to emit light at the luminance after adjustment in the light-emitting stage of the holding frame h 2.

The following description will take the driving module as the first conductivity type transistor or the second conductivity type transistor as an example.

As shown in connection with fig. 1, 2 and 3, the driving module 101 may optionally include a first conductive type transistor, i.e., a P-type transistor, according to some embodiments of the present application.

In the same frame refresh period, when the second brightness of the display panel in the holding frame h2 is detected to be higher than the first brightness of the display panel in the data writing frame h1, at the first time t1 or the second time t2, the voltage value of the first control signal is controlled to jump high, so that the potential of the first connection node X1 and/or the second connection node X2 is pulled up by the coupling action of the parasitic capacitance of the leakage switch module 104.

The potential of the first node N1 can be further raised by the characteristic of the self-leakage current of the threshold compensation module 102 and/or the coupling action of the parasitic capacitance of the threshold compensation module 102 due to the rise of the potential of the first connection node X1 and/or the second connection node X2, and the potential of the first node N1 can be further raised by the characteristic of the self-leakage current of the first reset module 103 and/or the coupling action of the parasitic capacitance of the first reset module 103. Since the potential of the first node N1 is pulled up and the driving module 101 is a P-type transistor, the current flowing through the driving module 101 is reduced, and the second brightness of the display panel when the frame h2 is maintained is reduced, so that the second brightness of the display panel when the frame h2 is maintained is the same as or similar to the first brightness of the display panel when the data is written into the frame h1, the brightness difference between the brightness of the display panel when the data is written into the frame h1 and the brightness of the display panel when the frame h2 is maintained is reduced, and the stability and uniformity of the brightness of the display panel are further improved.

Fig. 4 is a schematic diagram of still another driving timing diagram of a pixel circuit according to an embodiment of the application. As shown in connection with fig. 1 and 4, the driving module 101 may optionally include a first conductive type transistor, i.e., a P-type transistor, according to some embodiments of the present application.

In the same frame refresh period, when the second brightness of the display panel in the holding frame h2 is detected to be lower than the first brightness of the display panel in the data writing frame h1, the voltage value of the first control signal is controlled to jump down at the first time t1 or the second time t2 so as to pull down the potential of the first connection node X1 and/or the second connection node X2 by utilizing the coupling effect of the parasitic capacitance of the leakage switch module 104. The case where the voltage value of the first control signal jumps down at the first time t1 is shown by a solid line, and the case where the voltage value of the first control signal jumps down at the second time t2 is shown by a broken line.

The potential of the first connection node X1 and/or the second connection node X2 is lowered, so that the potential of the first node N1 can be lowered by the characteristic of the self-leakage current of the threshold compensation module 102 and/or the coupling action of the parasitic capacitance of the threshold compensation module 102, and similarly, the potential of the first node N1 can be lowered by the characteristic of the self-leakage current of the first reset module 103 and/or the coupling action of the parasitic capacitance of the first reset module 103. Since the potential of the first node N1 is pulled down and the driving module 101 is a P-type transistor, the current flowing through the driving module 101 increases, and the second brightness of the display panel when the frame h2 is maintained increases, so that the second brightness of the display panel when the frame h2 is maintained is the same as or similar to the first brightness of the display panel when the data is written into the frame h1, the brightness difference between the brightness of the display panel when the data is written into the frame h1 and the brightness of the display panel when the frame h2 is maintained is reduced, and the stability and uniformity of the brightness of the display panel are further improved.

Fig. 5 is a schematic circuit diagram of another pixel circuit according to an embodiment of the application. As shown in fig. 5, the driving module 101 may alternatively include a second conductive type transistor, i.e., an N-type transistor, according to other embodiments of the present application.

As shown in fig. 4 and fig. 5, in the same frame refresh period, when it is detected that the second brightness of the display panel in the hold frame h2 is higher than the first brightness of the display panel in the data write frame h1, at the first time t1 or the second time t2, the voltage value of the first control signal is controlled to jump down, so that the potential of the first connection node X1 and/or the second connection node X2 is pulled down by the coupling effect of the parasitic capacitance of the leakage switch module 104.

The potential of the first connection node X1 and/or the second connection node X2 is lowered, so that the potential of the first node N1 can be lowered by the characteristic of the self-leakage current of the threshold compensation module 102 and/or the coupling action of the parasitic capacitance of the threshold compensation module 102, and similarly, the potential of the first node N1 can be lowered by the characteristic of the self-leakage current of the first reset module 103 and/or the coupling action of the parasitic capacitance of the first reset module 103. Since the potential of the first node N1 is pulled down and the driving module 101 is an N-type transistor, the current flowing through the driving module 101 is reduced, and the second brightness of the display panel when the frame h2 is maintained is reduced, so that the second brightness of the display panel when the frame h2 is maintained is the same as or similar to the first brightness of the display panel when the data is written into the frame h1, the brightness difference between the brightness of the display panel when the data is written into the frame h1 and the brightness of the display panel when the frame h2 is maintained is reduced, and the stability and uniformity of the brightness of the display panel are further improved.

Fig. 6 is a schematic diagram of still another driving timing diagram of a pixel circuit according to an embodiment of the application. As shown in connection with fig. 5 and 6, the driving module 101 may alternatively include a second conductive type transistor, i.e., an N-type transistor, according to other embodiments of the present application.

In the same frame refresh period, when the second brightness of the display panel in the holding frame h2 is detected to be lower than the first brightness of the display panel in the data writing frame h1, at the first time t1 or the second time t2, the voltage value of the first control signal is controlled to jump high, so that the potential of the first connection node X1 and/or the second connection node X2 is pulled up by using the coupling effect of the parasitic capacitance of the leakage switch module 104. The case where the voltage value of the first control signal jumps at the first time t1 is shown by a solid line, and the case where the voltage value of the first control signal jumps at the second time t2 is shown by a broken line.

The potential of the first node N1 can be further raised by the characteristic of the self-leakage current of the threshold compensation module 102 and/or the coupling action of the parasitic capacitance of the threshold compensation module 102 due to the rise of the potential of the first connection node X1 and/or the second connection node X2, and the potential of the first node N1 can be further raised by the characteristic of the self-leakage current of the first reset module 103 and/or the coupling action of the parasitic capacitance of the first reset module 103. Since the potential of the first node N1 is pulled up and the driving module 101 is an N-type transistor, the current flowing through the driving module 101 increases, and the second brightness of the display panel when the frame h2 is maintained increases, so that the second brightness of the display panel when the frame h2 is maintained is the same as or similar to the first brightness of the display panel when the data is written into the frame h1, the brightness difference between the brightness of the display panel when the data is written into the frame h1 and the brightness of the display panel when the frame h2 is maintained is reduced, and the stability and uniformity of the brightness of the display panel are further improved.

Fig. 7 is a schematic diagram of still another driving timing diagram of a pixel circuit according to an embodiment of the application. As shown in fig. 7, one picture refresh period H may optionally include one data write frame H1 and at least two hold frames H2, according to some embodiments of the present application.

In one part of the at least two holding frames h2, the voltage value of the first control signal jumps high, and in the other part of the at least two holding frames h2, the voltage value of the first control signal jumps low.

That is, when one frame refresh period H includes a plurality of hold frames, the voltage value of the first control signal may jump in a portion of the hold frames, and the voltage value of the first control signal may jump down in another portion of the hold frames, i.e., the brightness of the display panel may be dynamically adjusted, so that the brightness of the display panel may fluctuate in a smaller brightness range (such as a brightness range which is not easily distinguished by human eyes) in one frame refresh period, instead of adjusting the brightness of the display panel in a single direction, thereby realizing flexible adjustment of the brightness of the display panel.

It should be noted that, in the embodiment of the present application, the number and the order of the holding frames h2 corresponding to the jump of the voltage value of the first control signal and the number and the order of the holding frames h2 corresponding to the jump of the voltage value of the first control signal are not limited, and can be flexibly adjusted according to actual situations.

For example, taking an example in which one frame refresh period H includes 3 holding frames H2, the voltage value of the first control signal jumps high in the 1 st holding frame H2 and the 3 rd holding frame H2, the voltage value of the first control signal jumps low in the 2 nd holding frame H2, the voltage value of the first control signal jumps high in the 1 st holding frame H2 and the 2 nd holding frame H2, the voltage value of the first control signal jumps low in the 3 rd holding frame H2, and so on.

Fig. 8 is a schematic diagram of still another driving timing diagram of a pixel circuit according to an embodiment of the application. As shown in fig. 8, one picture refresh period H may optionally include one data write frame H1 and at least two hold frames H2, according to some embodiments of the present application. The voltage value of the first control signal jumps high in the odd-numbered holding frame of the at least two holding frames h2, and the voltage value of the first control signal jumps low in the even-numbered holding frame of the at least two holding frames h2. That is, in one screen refresh period H, for example, the voltage value of the first control signal may jump high in the 1 st holding frame H2 and the 3 rd holding frame H2, and the voltage value of the first control signal may jump low in the 2 nd holding frame H2 and the 4 th holding frame H2.

Therefore, in any two adjacent holding frames h2, the voltage value of the first control signal alternately jumps high and jumps low, so that the brightness of the display panel alternately changes high and changes low, the overall brightness of the display panel in one picture refreshing period can be more uniform, and the problem of overlarge brightness adjustment flickering is avoided.

Of course, in other embodiments, alternatively, the voltage value of the first control signal may jump down in the odd number of the at least two holding frames h2, and jump up in the even number of the at least two holding frames h 2. That is, in one screen refresh period H, for example, the voltage value of the first control signal may jump down at the 1 st holding frame H2 and the 3 rd holding frame H2, and the voltage value of the first control signal may jump up at the 2 nd holding frame H2 and the 4 th holding frame H2.

Therefore, in any two adjacent holding frames h2, the voltage value of the first control signal alternately jumps down and jumps up, so that the brightness of the display panel alternately becomes low and high, the overall brightness of the display panel in one picture refreshing period can be more uniform, and the problem of overlarge brightness adjustment flickering is avoided.

Fig. 9 is a schematic circuit diagram of a pixel circuit according to an embodiment of the application. In some embodiments, as shown in fig. 9, optionally, the control end of the driving module 101 is electrically connected to the first node N1, the first end of the driving module 101 is electrically connected to the second node N2, and the second end of the driving module 101 is electrically connected to the third node N3. The control end of the first reset module 103 is electrically connected to the first scan signal line S1, the first end of the first reset module 103 is electrically connected to the first reference voltage signal line vref1, and the second end of the first reset module 103 is electrically connected to the first node N1. The control end of the threshold compensation module 102 is electrically connected to the second scan signal line S2, the first end of the threshold compensation module 102 is electrically connected to the first node N1, and the second end of the threshold compensation module 102 is electrically connected to the third node N3. The control end of the leakage switch module 104 is electrically connected to the first control signal line K1, the first end of the leakage switch module 104 is electrically connected to the first connection node X1, and the second end of the leakage switch module 104 is electrically connected to the second connection node X2.

The pixel circuit 10 may further include:

The control end of the data writing module 105 is electrically connected with the third scanning signal line S3, the first end of the data writing module 105 is electrically connected with the data signal line data, and the second end of the data writing module 105 is electrically connected with the second node N2;

The control end of the second reset module 106 is electrically connected with the fourth scanning signal line S4, the first end of the second reset module 106 is electrically connected with the second reference voltage signal line vref2, and the second end of the second reset module 106 is electrically connected with the first pole of the light emitting element D;

The first light emitting control module 107, the control end of the first light emitting control module 107 is electrically connected with the light emitting control signal line EM, the first end of the first light emitting control module 107 is electrically connected with the first power voltage signal line PVDD, and the second end of the first light emitting control module 107 is electrically connected with the second node N2;

the second light-emitting control module 108, the control end of the second light-emitting control module 108 is electrically connected with the light-emitting control signal line EM, the first end of the second light-emitting control module 108 is electrically connected with the third node N3, and the second end of the second light-emitting control module 108 is electrically connected with the first electrode of the light-emitting element D;

The memory module 109 has a first end electrically connected to the first power supply voltage signal line PVDD, and a second end electrically connected to the first node N1.

Illustratively, the first pole of the light emitting element D may be an anode of the light emitting element D, the second pole of the light emitting element D may be a cathode of the light emitting element D, and the second pole of the light emitting element D may be electrically connected to the second power supply voltage signal line PVEE.

In some specific examples, the second scan signal line S2, the third scan signal line S3, and the fourth scan signal line S4 may be multiplexed, optionally.

According to the pixel circuit provided by the embodiment of the application, the leakage switch module is added in the pixel circuit and is connected between the first connection node and the second connection node, the first control signal provided by the first control signal line can control the leakage switch module to be conducted or leaked, so that the charge of one of the first connection node and the second connection node with higher potential is transmitted to the other, the voltage difference between the potential of the control end (namely the first node) of the driving module and the potential of the first connection node and/or the potential of the second connection node is reduced, the leakage current of the first node is further reduced, the flicker phenomenon of the display panel is improved, and the display effect of the display panel is improved.

In some specific embodiments, alternatively, the driving module 101 may include a driving transistor T0, the threshold compensation module 102 may include at least two first transistors T1 connected in series, the first reset module 103 may include at least two second transistors T2 connected in series, the leakage switch module 104 may include a third transistor T3, the data writing module 105 may include a fourth transistor T4, the second reset module 106 may include a fifth transistor T5, the first light emitting control module 107 may include a sixth transistor T6, the second light emitting control module 108 may include a seventh transistor T7, and the storage module 109 may include a storage capacitor Cst. The specific connection relationships refer to fig. 10 and the connection relationships of the above modules, and are not described herein.

Based on the pixel circuit 10 provided in the above embodiment, correspondingly, the embodiment of the application further provides a driving method. The driving method may be applied to the pixel circuit 10 of Yu Rudi aspects.

Fig. 10 is a schematic flow chart of a driving method according to an embodiment of the application. As shown in fig. 10, the driving method provided by the embodiment of the present application may include the following steps:

S101, providing a first control signal to a first control signal line, wherein the first control signal is a constant voltage signal or a jump voltage signal.

According to the embodiment of the application, the leakage switch module is added in the pixel circuit, the leakage switch module is connected between the first connection node and the second connection node, and the first control signal provided by the first control signal line can control the leakage switch module to be conducted or leaked, so that the charge of one of the first connection node and the second connection node with higher potential is transmitted to the other, and the voltage difference between the potential of the control end (namely the first node) of the driving module and the potential of the first connection node and/or the potential of the second connection node is reduced, so that the leakage current of the first node is reduced, the flickering phenomenon of the display panel is improved, and the display effect of the display panel is improved.

According to some embodiments of the application, optionally, one picture refresh period includes a data write frame and at least two hold frames.

S101, providing a first control signal to a first control signal line, which specifically comprises the following steps:

And adjusting the voltage value of the first control signal to jump high in one part of the at least two holding frames, and adjusting the voltage value of the first control signal to jump low in the other part of the at least two holding frames.

Therefore, when one picture refreshing period comprises a plurality of holding frames, the voltage value of the first control signal can be controlled to jump high in one part of the holding frames, and the voltage value of the first control signal can be controlled to jump low in the other part of the holding frames, namely, the brightness of the display panel is dynamically adjusted, so that the brightness of the display panel can fluctuate in a smaller brightness range (such as a brightness range which is not easily distinguished by human eyes) in one picture refreshing period, and the brightness of the display panel is not adjusted in a single direction, so that the flexible adjustment of the brightness of the display panel is realized.

According to some embodiments of the present application, optionally, S101 may specifically include the following steps:

In the odd number of the at least two holding frames, regulating the voltage value jump of the first control signal, and in the even number of the at least two holding frames, regulating the voltage value jump of the first control signal; or alternatively

And regulating the voltage value of the first control signal to jump down in the odd number of the at least two holding frames, and regulating the voltage value of the first control signal to jump up in the even number of the at least two holding frames.

Therefore, in any two adjacent holding frames, the voltage value of the first control signal alternately jumps high and jumps low, so that the brightness of the display panel alternately changes high and changes low, the overall brightness of the display panel in a picture refreshing period can be more uniform, and the problem of overlarge brightness adjustment flickering is avoided.

Based on the pixel circuit 10 provided in the above embodiment, correspondingly, the application also provides a display panel, and the display panel comprises the pixel circuit 10 provided in the application.

Based on the pixel circuit 10 provided in the above embodiment, correspondingly, the application also provides a display device, which includes the pixel circuit 10 provided in the application. Referring to fig. 11, fig. 11 is a schematic structural diagram of a display device according to an embodiment of the application. Fig. 11 provides a display device 1000 including a pixel circuit 10 according to any of the above embodiments of the present application. The embodiment of fig. 11 is described with respect to the display device 1000 by taking a mobile phone as an example, and it is to be understood that the display device provided in the embodiment of the present application may be a wearable product, a computer, a television, a vehicle-mounted display device, or other display devices having a display function, which is not particularly limited in the present application. The display device provided by the embodiment of the present application has the beneficial effects of the pixel circuit 10 provided by the embodiment of the present application, and the specific description of the pixel circuit 10 in the above embodiments may be referred to specifically, and the description of the embodiment is omitted herein.

It should be understood that the specific structures of the circuits provided in the drawings of the embodiments of the present application are only examples and are not intended to limit the present application. In addition, the above embodiments provided by the present application may be combined with each other without contradiction.

It should be understood that, in the present specification, each embodiment is described in an incremental manner, and the same or similar parts between the embodiments are all referred to each other, and each embodiment is mainly described in a different point from other embodiments. These embodiments are not exhaustive of all details, nor are they intended to limit the application to the precise embodiments disclosed, in accordance with the application. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the application and the practical application, to thereby enable others skilled in the art to best utilize the application and various modifications as are suited to the particular use contemplated. The application is limited only by the claims and the full scope and equivalents thereof.

Those skilled in the art will appreciate that the above-described embodiments are exemplary and not limiting. The different technical features presented in the different embodiments may be combined to advantage. Other variations to the disclosed embodiments can be understood and effected by those skilled in the art in view of the drawings, the description, and the claims. In the claims, the term "comprising" does not exclude other structures; the amounts refer to "a" and do not exclude a plurality; the terms "first," "second," and the like, are used for designating a name and not for indicating any particular order. Any reference signs in the claims shall not be construed as limiting the scope. The presence of certain features in different dependent claims does not imply that these features cannot be combined to advantage.

Claims

1. A pixel circuit, comprising:

the control end of the driving module is electrically connected with the first node;

The threshold compensation module is electrically connected with the first node and comprises at least two first transistors connected in series, and the connecting node between the adjacent first transistors is a first connecting node;

the first reset module is electrically connected with the first node and comprises at least two second transistors connected in series, and the connecting node between the adjacent second transistors is a second connecting node;

The control end of the leakage switch module is electrically connected with the first control signal line, the first end of the leakage switch module is electrically connected with the first connecting node, and the second end of the leakage switch module is electrically connected with the second connecting node;

The first control signal line is used for providing a first control signal, and the first control signal is a constant voltage signal or a jump voltage signal;

one screen refresh period includes a data write frame and a hold frame;

And when the data writing frame is switched to the first moment of the holding frame or the second moment of the holding frame, the voltage value of the first control signal jumps so as to adjust the potential of the first connection node and/or the second connection node by utilizing the coupling effect of the parasitic capacitance of the leakage switch module.

2. The pixel circuit according to claim 1, wherein the leakage switch module includes a first conductivity type transistor, a voltage value of the first control signal is greater than 0, and the first conductivity type transistor is normally closed under control of the first control signal;

or the leakage switch module comprises a second conduction type transistor, the voltage value of the first control signal is smaller than 0, and the second conduction type transistor is normally closed under the control of the first control signal.

3. The pixel circuit of claim 1, wherein the leakage switch module comprises a first conductivity type transistor, the voltage value of the first control signal is less than 0, the first conductivity type transistor is normally open under control of the first control signal;

Or the leakage switch module comprises a second conduction type transistor, the voltage value of the first control signal is larger than 0, and the second conduction type transistor is normally open under the control of the first control signal.

4. The pixel circuit according to claim 1, wherein one screen refresh period includes a data write frame and a hold frame, one of the data write frame and the hold frame having a voltage value of the first control signal greater than 0 and the other having a voltage value of the first control signal less than 0;

In the data writing frame, the electric leakage switch module is in a conducting state under the control of the first control signal, and in the holding frame, the electric leakage switch module is in a switching-off state under the control of the first control signal;

Or in the data writing frame, the leakage switch module is in an off state under the control of the first control signal, and in the holding frame, the leakage switch module is in an on state under the control of the first control signal.

5. The pixel circuit of claim 1, wherein the drive module comprises a first conductivity type transistor;

the pixel circuit is applied to a display panel, and when the second brightness of the display panel in the holding frame is higher than the first brightness of the display panel in the data writing frame, the voltage value of the first control signal jumps high at the first moment or the second moment so as to pull up the potential of the first connection node and/or the second connection node by utilizing the coupling effect of the parasitic capacitance of the leakage switch module.

6. The pixel circuit of claim 1, wherein the drive module comprises a first conductivity type transistor;

The pixel circuit is applied to a display panel, and when the second brightness of the display panel in the holding frame is lower than the first brightness of the display panel in the data writing frame, the voltage value of the first control signal jumps down at the first moment or the second moment so as to pull down the potential of the first connection node and/or the second connection node by utilizing the coupling effect of the parasitic capacitance of the leakage switch module.

7. The pixel circuit of claim 1, wherein one of the picture refresh periods comprises the data write frame and at least two of the hold frames;

In one part of at least two holding frames, the voltage value of the first control signal jumps high, and in the other part of at least two holding frames, the voltage value of the first control signal jumps low.

8. The pixel circuit according to claim 7, wherein a voltage value of the first control signal jumps high in an odd-numbered one of the at least two holding frames, and a voltage value of the first control signal jumps low in an even-numbered one of the at least two holding frames;

Or the voltage value of the first control signal jumps down in the odd number of the at least two holding frames, and the voltage value of the first control signal jumps up in the even number of the at least two holding frames.

9. The pixel circuit of claim 1, wherein a first end of the drive module is electrically connected to a second node and a second end of the drive module is electrically connected to a third node;

the control end of the first reset module is electrically connected with a first scanning signal line, the first end of the first reset module is electrically connected with a first reference voltage signal line, and the second end of the first reset module is electrically connected with the first node;

the control end of the threshold compensation module is electrically connected with the second scanning signal line, the first end of the threshold compensation module is electrically connected with the first node, and the second end of the threshold compensation module is electrically connected with the third node;

The pixel circuit further includes:

The control end of the data writing module is electrically connected with the third scanning signal line, the first end of the data writing module is electrically connected with the data signal line, and the second end of the data writing module is electrically connected with the second node;

The control end of the second reset module is electrically connected with the fourth scanning signal line, the first end of the second reset module is electrically connected with the second reference voltage signal line, and the second end of the second reset module is electrically connected with the first electrode of the light-emitting element;

The control end of the first light-emitting control module is electrically connected with a light-emitting control signal line, the first end of the first light-emitting control module is electrically connected with a first power supply voltage signal line, and the second end of the first light-emitting control module is electrically connected with the second node;

The control end of the second light-emitting control module is electrically connected with the light-emitting control signal line, the first end of the second light-emitting control module is electrically connected with the third node, and the second end of the second light-emitting control module is electrically connected with the first electrode of the light-emitting element;

And the first end of the storage module is electrically connected with the first power supply voltage signal line, and the second end of the storage module is electrically connected with the first node.

10. A driving method, wherein the driving method is applied to the pixel circuit according to any one of claims 1 to 9, the driving method comprising:

the first control signal is provided to the first control signal line, and the first control signal is a constant voltage signal or a jump voltage signal.

11. The driving method according to claim 10, wherein one of the picture refresh periods includes a data write frame and at least two hold frames;

the providing the first control signal to the first control signal line specifically includes:

And adjusting the voltage value jump of the first control signal in one part of the at least two holding frames, and adjusting the voltage value jump of the first control signal in the other part of the at least two holding frames.

12. The driving method according to claim 11, wherein adjusting the voltage value jump of the first control signal in a part of the holding frames among the at least two holding frames, adjusting the voltage value jump of the first control signal in another part of the holding frames among the at least two holding frames, specifically comprises:

Regulating the voltage value of the first control signal to jump high in the odd number of the at least two holding frames, and regulating the voltage value of the first control signal to jump low in the even number of the at least two holding frames;

Or in the odd number of the at least two holding frames, regulating the voltage value of the first control signal to jump down, and in the even number of the at least two holding frames, regulating the voltage value of the first control signal to jump up.

13. A display panel comprising a pixel circuit according to any one of claims 1-9.