CN115995994B - Split-phase three-bridge arm inverter circuit and modulation method - Google Patents
Split-phase three-bridge arm inverter circuit and modulation method Download PDFInfo
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Abstract
The invention discloses a split-phase three-bridge arm inverter circuit and a modulation method, wherein the split-phase three-bridge arm inverter circuit comprises a direct current power supply Vdc, an inverter bridge arm I, an inverter bridge arm II, an inverter bridge arm III, an alternating current filter capacitor, a filter inductor, an alternating current power supply, an alternating current load and a controller, wherein the direct current power supply Vdc is connected with a direct current filter capacitor Cd in parallel; according to the invention, through matching of the DC power supply Vdc, the inverter bridge arm I, the inverter bridge arm II, the inverter bridge arm III, the AC filter capacitor, the filter inductor, the AC power supply, the AC load and the controller, the controller outputs proper driving signals to the inverter bridge arm I and the inverter bridge arm III after internal logic processing and control, the internal power switch tube works with SPWM high-frequency switch, and outputs proper driving signals to the inverter bridge arm II to work with a fixed duty ratio of 50%, and finally stable voltage or current is provided for the AC power supplies Va, vc or the AC load, the problem of non-voltage division is naturally eliminated without using a DC voltage division capacitor, and the purposes of small volume and low cost can be realized.
Description
Technical Field
The invention belongs to the technical field of power electronics, and particularly relates to a split-phase three-bridge arm inverter circuit and a modulation method.
Background
In North America country power supply systems, a double live wire (L1-L2) or a single live wire (L1-N and/or L2-N) mode and a double live wire parallel (L1/L2-N) mode are generally used, and flexible switching between the three modes can be realized, so that great complexity exists in the design of the split-phase inverter. Split phase inverters typically use a bi-generic inverter circuit (as shown in fig. 5). The circuit comprises two direct current filter capacitors Cd1 and Cd2, also called direct current voltage division capacitors, four power switching tubes and body diodes Q1-Q4 thereof, two filter inductors L1 and L2 and two alternating current filter capacitors Cf1 and Cf2. In the double-live wire mode, cd1, cd2, cf1 and Cf2 are filtered in series, Q1-Q4 form a traditional full-bridge inverter circuit, L1 and L2 are filtered in series to provide electric energy for the series-connected alternating-current power supplies Va and Vc, and simultaneously loads RL1/RL2 obtain electric energy from two live wires instead of N wires. In the single live wire mode, cd1, Q2, L1 and Cf1 form a first half-bridge inverter circuit, cd2, Q3, Q4, L2 and Cf2 form a second half-bridge inverter circuit, so that a split-phase inverter circuit is formed, and the two inverter circuits respectively supply electric energy to Va, RL1, vc and RL2 through N lines. To accommodate different load types, the amplitude, frequency and phase of the two sets of single-phase ac voltages in the single-live mode may be different. The parallel mode of the double fire wires is similar to that of the single fire wire, and still forms a split-phase inverter circuit, and the difference is that only two fire wires are directly connected in parallel, so that the amplitude, frequency and phase of two groups of single-phase alternating voltages are required to be identical. The traditional split-phase inverter circuit has the outstanding advantages of simple circuit structure, mature modulation method and the like, and is widely applied to North America industry and civil inverters.
However, this circuit still has the following drawbacks:
under the working condition of different sizes of the two alternating current loads RL1 and RL2 or nonlinear loads, when the single-live-wire split-phase mode works, the voltage at two ends of Cd1 and Cd2 has larger voltage difference, so that the problem of non-voltage equalizing exists in the direct current voltage dividing capacitor in practice. In order to realize voltage equalizing of the direct current voltage-dividing capacitor, a filter capacitor with larger capacitance is needed to be selected, so that the inverter is overlarge in size; or an independent voltage equalizing circuit is additionally added, the control mode is complex, and the cost of the inverter is increased.
Therefore, we need to propose a split-phase three-bridge arm inverter circuit and a modulation method to solve the problems existing in the prior art, so that the problem of non-voltage equalizing is naturally eliminated without using a direct current voltage dividing capacitor, and the purposes of small volume and low cost can be achieved.
Disclosure of Invention
The invention aims to provide a split-phase three-bridge arm inverter circuit and a modulation method, which are matched with a DC power supply Vdc, an inverter bridge arm I, an inverter bridge arm II, an inverter bridge arm III, an AC filter capacitor, a filter inductor, an AC power supply, an AC load and a controller, and can realize the purposes of small volume and low cost by naturally eliminating the problem of non-voltage equalizing without using a DC voltage dividing capacitor.
In order to achieve the above purpose, the invention adopts the following technical scheme:
the split-phase three-bridge arm inverter circuit comprises a direct current power supply Vdc, an inverter bridge arm I, an inverter bridge arm II, an inverter bridge arm III, an alternating current filter capacitor, a filter inductor, an alternating current power supply, an alternating current load and a controller, wherein the direct current power supply Vdc is connected in parallel with the direct current filter capacitor Cd, the inverter bridge arm I, the inverter bridge arm II and the inverter bridge arm III are connected in parallel with the direct current power supply Vdc, the filter inductor comprises L1 and L2, the alternating current filter capacitor comprises Cf1 and Cf2, one end of the L1 is connected with one end of the inverter bridge arm I, the other end of the L1 is connected with one end of the Cf1, one end of the L2 is connected with one end of the inverter bridge arm III, the other end of the L2 is connected with one end of the Cf2, the other end of the Cf1 is connected with one end of the inverter bridge arm II, the other end of the C f1 is connected with one end of the inverter bridge arm Va and the Vc, one end of the Vc is connected with the connecting end of the L2 and the Cf2, the other end of the C1 is connected with the connecting end of the Cf2, and the other end of the inverter bridge arm and the alternating current filter is connected with the two ends of the AC load and the alternating current power supply respectively.
Preferably, the controller comprises a driving unit, a control and wave generation unit and a voltage and current sampling circuit, wherein one end of the driving unit is electrically connected with the first inversion bridge arm, the second inversion bridge arm and the third inversion bridge arm, the other end of the driving unit is connected with the control and wave generation unit, the other end of the control and wave generation unit is connected with the voltage and current sampling circuit, and the controller is built by using discrete electronic components or an application specific integrated circuit.
Preferably, the inverter bridge arm I comprises Q1 and Q2, an emitter of the Q1 is connected with a collector of the Q2, one end of the L1 is connected with a connecting end of the Q1 and Q2, the inverter bridge arm II comprises Q3 and Q4, an emitter of the Q3 is connected with a collector of the Q4, a connecting end of the Cf1 and Cf2 is connected with a connecting end of the Q3 and Q4, the inverter bridge arm III comprises Q5 and Q6, an emitter of the Q5 is connected with a collector of the Q6, and one end of the L2 is connected with a connecting end of the Q5 and the Q6.
Preferably, the ac load comprises RL1 and RL2, the RL1 is connected in parallel with Cf1, the RL1 is located between Cf1 and Va, the RL2 is connected in parallel with Cf2, and the RL2 is located between Cf2 and Vc.
Preferably, the voltage and current sampling circuit comprises a current error amplifier, one end of the current error amplifier is connected with the voltage error amplifier, the voltage error amplifier and the current error amplifier are both connected with a compensator in parallel, and one end of the voltage error amplifier is connected with the alternating current load through a sampling resistor.
Preferably, the current error amplifier comprises U3 and U4, one ends of the U3 and U4 are connected with the control and wave generation unit, the voltage error amplifier comprises U1 and U2, one end of the U2 is connected with the positive electrode end of the U4, and one end of the U1 is connected with the positive electrode end of the U3.
Preferably, the compensator comprises PI1, PI2, PI3 and PI4, PI1 is connected in parallel with U1, PI2 is connected in parallel with U2, PI3 is connected in parallel with U3, PI4 is connected in parallel with U4, the sampling resistor comprises R5, R6, R7 and R8, R6 is connected in parallel between the positive end and the negative end of U1, one end of R6 is connected with one end of R5, the other end of R5 is connected with one end of Va, R8 is connected in parallel between the positive end and the negative end of U2, one end of R7 is connected with one end of R8, and the other end of R7 is connected with one end of RL2.
Preferably, the first inverter bridge arm and the third inverter bridge arm are arranged as two-phase staggered parallel circuits, the second inverter bridge arm is located between the first inverter bridge arm and the third inverter bridge arm, the second inverter bridge arm comprises Q3 and Q4, an emitter of the Q3 is connected with a collector of the Q4, and a connecting end of the Cf1 and the Cf2 is connected with a connecting end of the Q3 and the Q4.
Preferably, the inverter bridge arm one comprises Q11 and Q21 which are arranged in series and Q12 and Q22 which are arranged in series, and the Q11 and Q21 which are arranged in series are connected in parallel with the Q12 and Q22 which are arranged in series, and the inverter bridge arm three comprises Q51 and Q61 which are arranged in series and Q52 and Q62 which are arranged in series, and the Q51 and Q61 which are arranged in series and the Q52 and Q62 which are arranged in series are connected in parallel.
Based on the split-phase three-bridge arm inverter circuit, the invention also provides a modulation method of the split-phase three-bridge arm inverter circuit, which comprises the following steps:
s1, in a double-live wire mode, an alternating current filter capacitor, an inversion bridge arm I and an inversion bridge arm III form a full-bridge inversion circuit, electric energy is provided for alternating current power supplies Va and Vc which are connected in series through two filter inductors, meanwhile, an alternating current load obtains electric energy from two live wires instead of an N line, and at the moment, the inversion bridge arm II does not work;
s2, in a single live wire mode, the first inversion bridge arm, the second inversion bridge arm, the L1 and the Cf1 form a first full-bridge inversion circuit; the third inverter bridge arm, the second inverter bridge arm, L2 and Cf2 form a second full-bridge inverter circuit, so that a split-phase inverter circuit is formed, and the first full-bridge inverter circuit and the second full-bridge inverter circuit respectively provide electric energy for Va, vc and an alternating current load through N lines;
s3, in a double-live-wire parallel mode, the first inversion bridge arm, the second inversion bridge arm, the L1 and the Cf1 form a first full-bridge inversion circuit; the third inverter bridge arm, the second inverter bridge arm, L2 and Cf2 form a second full-bridge inverter circuit, so that a split-phase inverter circuit is formed, and two live wires of the first full-bridge inverter circuit and the second full-bridge inverter circuit are directly connected in parallel;
and S4, after internal logic processing and control, the controller outputs proper driving signals to the first inverter bridge arm and the third inverter bridge arm, wherein the internal power switching tubes work with SPWM high-frequency switches, and outputs proper driving signals to the second inverter bridge arm, and the second inverter bridge arm works with a fixed duty ratio of 50%, so that stable voltage or current is finally provided for the alternating current power supplies Va, vc or alternating current loads.
Compared with the prior art, the split-phase three-bridge arm inverter circuit and the modulation method provided by the invention have the following advantages:
1. according to the invention, through matching of the DC power supply Vdc, the inverter bridge arm I, the inverter bridge arm II, the inverter bridge arm III, the AC filter capacitor, the filter inductor, the AC power supply, the AC load and the controller, after internal logic processing and control, the controller outputs proper driving signals to the inverter bridge arm I and the inverter bridge arm III, the internal power switch tube works with SPWM high-frequency switch, and outputs proper driving signals to the inverter bridge arm II to work with a fixed duty ratio of 50%, and finally stable voltage or current is provided for the AC power supplies Va, vc or the AC load, the problem of non-voltage division is naturally eliminated without using a DC voltage division capacitor, and the purposes of small volume and low cost can be realized;
2. according to the invention, through the matching of the first inverter bridge arm, the second inverter bridge arm, the third inverter bridge arm, the filter inductor and the alternating current filter capacitor, an inverter circuit working in a double-fire-wire mode, a single-fire-wire mode or a double-fire-wire parallel mode can be formed according to actual use requirements, and flexible switching among the double-fire-wire mode, the single-fire-wire mode and the double-fire-wire parallel mode can be realized.
Drawings
FIG. 1 is a circuit diagram of the present invention;
FIG. 2 is a circuit diagram of embodiment 1 of the present invention;
FIG. 3 is a diagram of the main operation waveforms of the present invention;
FIG. 4 is a circuit diagram of embodiment 2 of the present invention;
fig. 5 is a circuit diagram of a conventional split phase inverter.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. The specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Example 1
The invention provides a split-phase three-leg inverter circuit shown in fig. 1, which comprises a direct-current power supply Vdc, an inverter leg I, an inverter leg II, an inverter leg III, an alternating-current filter capacitor, a filter inductor, an alternating-current power supply, an alternating-current load and a controller, wherein the direct-current power supply Vdc is connected in parallel with a direct-current filter capacitor Cd, the inverter leg I, the inverter leg II and the inverter leg III are connected in parallel with the direct-current power supply Vdc, the filter inductor comprises L1 and L2, the alternating-current filter capacitor comprises Cf1 and Cf2, one end of L1 is connected with one end of the inverter leg I, the other end of L1 is connected with one end of Cf1, one end of L2 is connected with one end of the inverter leg III, the other end of L2 is connected with one end of Cf2, the other end of Cf1 is connected with one end of the inverter leg II, the other end of Cf2 is connected with one end of the inverter leg II, the other end of Cva and the other end of Cf2 is connected with one end of the inverter leg II, the alternating-current power supply comprises Vc and the connecting ends of Cva 1 and Cf1, one end of Vc and the connecting ends of Cf1 and Cf2 are respectively.
As shown in fig. 2, the inverter bridge arm one includes Q1 and Q2, an emitter of Q1 is connected with a collector of Q2, one end of L1 is connected with a connection end of Q1 and Q2, the inverter bridge arm two includes Q3 and Q4, an emitter of Q3 is connected with a collector of Q4, a connection end of Cf1 and Cf2 is connected with a connection end of Q3 and Q4, the inverter bridge arm three includes Q5 and Q6, an emitter of Q5 is connected with a collector of Q6, and one end of L2 is connected with a connection end of Q5 and Q6.
The ac load includes RL1 and RL2, the RL1 is in parallel with Cf1, the RL1 is between Cf1 and Va, the RL2 is in parallel with Cf2, and the RL2 is between Cf2 and Vc.
In summary, the split-phase three-leg inverter circuit includes a dc power source Vdc, a dc filter capacitor Cd, an inverter leg first, an inverter leg second, an inverter leg third, ac filter capacitors Cf1, cf2, filter inductors L1, L2, ac power sources Va, vc when new energy is grid-connected for power generation, ac loads RL1, RL2 when off-grid or in other application situations, and a controller. The power switch tube Q1, the power switch tube Q2 and the body diode thereof are connected in series to form an inversion bridge arm I, the power switch tube Q3, the power switch tube Q4 and the body diode thereof are connected in series to form an inversion bridge arm II, and the power switch tube Q5, the power switch tube Q6 and the body diode thereof are connected in series to form an inversion bridge arm III. In the double-live wire mode, cf1 and Cf2 are filtered in series, an inversion bridge arm I and an inversion bridge arm III form a traditional full-bridge inversion circuit, electric energy is supplied to alternating current power supplies Va and Vc in series through two filter inductors L1 and L2, and meanwhile loads RL1/RL2 obtain electric energy from two live wires instead of N wires. In the single live wire mode, the first inverter bridge arm, the second inverter bridge arm, the filter inductor L1 and the alternating current filter capacitor Cf1 form a first full-bridge inverter circuit, the third inverter bridge arm, the second inverter bridge arm, the filter inductor L2 and the alternating current filter capacitor Cf2 form a second full-bridge inverter circuit, so that a split-phase inverter circuit is formed, and the first full-bridge inverter circuit, the second inverter bridge arm, the filter inductor L2 and the alternating current filter capacitor Cf2 respectively provide electric energy for Va, RL1, vc and RL2 through N wires. The parallel mode of the double fire wires is similar to that of the single fire wire, and still forms a split phase full bridge inverter circuit, the difference is that only two fire wires are directly connected in parallel, so that the amplitude, the frequency and the phase of two groups of single-phase alternating voltages are required to be identical, and the inverter circuit working in the double fire wire mode, the single fire wire mode or the double fire wire parallel mode can be formed according to the actual use requirement by matching the first inverter bridge arm, the second inverter bridge arm, the third inverter bridge arm, the filter inductor and the alternating filter capacitor, and flexible switching among the double fire wire mode, the single fire wire mode and the double fire wire parallel mode can be realized.
The controller comprises a driving unit, a control and wave generation unit and a voltage and current sampling circuit, wherein one end of the driving unit is electrically connected with the first inversion bridge arm, the second inversion bridge arm and the third inversion bridge arm, the other end of the driving unit is connected with the control and wave generation unit, and the other end of the control and wave generation unit is connected with the voltage and current sampling circuit.
The voltage and current sampling circuit comprises a current error amplifier, one end of the current error amplifier is connected with the voltage error amplifier, the voltage error amplifier and the current error amplifier are both connected with a compensator in parallel, and one end of the voltage error amplifier is connected with an alternating current load through a sampling resistor.
The current error amplifier comprises U3 and U4, one ends of the U3 and U4 are connected with the control and wave generation unit, the voltage error amplifier comprises U1 and U2, one end of the U2 is connected with the positive electrode end of the U4, and one end of the U1 is connected with the positive electrode end of the U3.
The compensator comprises PI1, PI2, PI3 and PI4, PI1 is connected with U1 in parallel, PI2 is connected with U2 in parallel, PI3 is connected with U3 in parallel, PI4 is connected with U4 in parallel, sampling resistor comprises R5, R6, R7 and R8, R6 is connected between the positive pole end and the negative pole end of U1 in parallel, one end of R6 is connected with one end of R5, the other end of R5 is connected with one end of Va, R8 is connected between the positive pole end and the negative pole end of U2 in parallel, one end of R7 is connected with one end of R8, and the other end of R7 is connected with one end of RL2.
The controller comprises two alternating output voltage and current sampling and feedback circuits, specifically voltage error amplifiers U1 and U2, current error amplifiers U3 and U4, voltage and current compensators PI1-PI4, a control and wave generation unit U5, a driving unit U6, peripheral circuits and the like. In the first sampling and feedback circuit, resistors R5 and R6 sample alternating current output voltage Va and are connected to the negative input end of a voltage error amplifier U1 in parallel, and the positive input end of the U1 is connected with an alternating current sine wave voltage reference signal Vr 1. The output end of the U1 is connected to the positive input end of the current error amplifier U3. The filtering inductance current signal Ia is connected to the negative input end of U3, and the output end of U3 is connected to the input end of the control and wave generation unit U5. The current sampling device optionally uses a current sensor, a current transformer or a resistor. The voltage compensator PI1 realizes the stable operation of Va through the voltage outer ring formed by U1 and peripheral devices, and the current compensator PI3 realizes the stable operation of Ia through the current inner ring formed by U3 and peripheral devices. The second sampling and feedback circuit is completely symmetrical with the first one, and mainly comprises U2, U4, PI2 and PI4, and the connection mode is basically similar to that of the first one, and is not repeated here. The input end of the driving unit U6 is connected to the output end of the U5, so that the power switching tubes Q1 to Q6 are driven after pulse driving signals are generated.
The controller outputs a driving signal and provides the driving signal for Q1 to Q6 through the grid-stage driving amplifying circuit, after the driving signal is subjected to inversion bridge arm to generate high-frequency square waves, the high-frequency square waves are filtered through L1 and L2 and Cf1 and Cf2, and output voltages are provided for Va and Vc or/and RL1 and RL2. In the double-live wire mode, U1 and U2 sample alternating current output voltages Va and Vc respectively, and obtain voltages between two live wires after correlation operation; in the single-live wire or double-live wire parallel mode, the U1 and the U2 respectively directly sample the alternating current output voltages Va and Vc, and adjust the output voltages and realize voltage stabilization through corresponding compensators PI1 and PI 2. In the double live wire mode, U3 or U4 respectively samples the current Ia of the filter inductor L1 or the current Ic of the filter inductor L2, and selects one of the two as a current sampling signal; in the parallel mode of single live wire or double live wire, the currents Ia and Ic of the filter inductors L1 and L2 are directly sampled by U3 and U4 respectively, and the average current mode or the peak current mode can be adopted for control through the corresponding compensators PI3 and PI4, so that the dynamic response performance of the filter inductors is improved.
The middle point of the inversion bridge arm I is 1, the middle point of the inversion bridge arm II is N, and the middle point of the inversion bridge arm III is 2. When the split phase output of the alternating current sine wave is positive half cycle in the single-live wire or double-live wire parallel mode and the duty ratio D1 of Q1 is more than 0.5 and the duty ratio D2 of Q5 is less than 0.5, main working waveforms are respectively Q1, Q5 and Q3 grid driving signals Vgs from top to bottom, a voltage difference V1N from a midpoint "1" of an inversion bridge arm to a midpoint "N" of an inversion bridge arm, and a voltage difference V2N from a midpoint "2" of an inversion bridge arm to a midpoint "N" of the inversion bridge arm are shown in FIG. 3. When Q1 is on and Q3 is off, v1n=vdc, otherwise v1n=0. When Q5 is off and Q3 is on, v2n=vdc, otherwise v2n=0. Q1, Q5 operate in a high frequency Sinusoidal Pulse Width Modulation (SPWM) mode, Q3 operates in a fixed duty cycle 50% modulation mode, and the pulse drive signal midpoints of Q1, Q3, and Q5 remain synchronized. The gate drive signals of Q2, Q4, Q6 are opposite to Q1, Q3, Q5, respectively, but there is some dead time between the gate drive signals of Q1 and Q2, Q3 and Q4, Q5 and Q6. The waveform can be further seen through observing the waveform, the working frequency of V1N, V N is twice that of Q1-Q6 driving signals, the conventional frequency doubling unipolar effect is achieved, the lower power switch tube working frequency can be selected to reduce the switching loss, and meanwhile the frequency doubling is carried out to improve the filter inductance working frequency to reduce the inductance volume. The working principles of Q1 and Q5 when working at other duty ratios and when the AC sine wave split phase outputs the negative half cycle are basically similar to those of the same, and are not repeated here. Thus, the ac voltages Va and Vc can obtain a sine wave output. The working principle of the double-live wire mode is identical to that of the traditional full-bridge inverter circuit, and the double-live wire mode is not repeated here.
Based on the split-phase three-bridge arm inverter circuit, the invention also provides a modulation method of the split-phase three-bridge arm inverter circuit, which comprises the following steps:
s1, in a double-live wire mode, an alternating current filter capacitor, an inversion bridge arm I and an inversion bridge arm III form a full-bridge inversion circuit, electric energy is provided for alternating current power supplies Va and Vc which are connected in series through two filter inductors, meanwhile, an alternating current load obtains electric energy from two live wires instead of an N line, and at the moment, the inversion bridge arm II does not work;
s2, in a single live wire mode, the first inversion bridge arm, the second inversion bridge arm, the L1 and the Cf1 form a first full-bridge inversion circuit; the third inverter bridge arm, the second inverter bridge arm, L2 and Cf2 form a second full-bridge inverter circuit, so that a split-phase inverter circuit is formed, and the first full-bridge inverter circuit and the second full-bridge inverter circuit respectively provide electric energy for Va, vc and an alternating current load through N lines;
s3, in a double-live-wire parallel mode, the first inversion bridge arm, the second inversion bridge arm, the L1 and the Cf1 form a first full-bridge inversion circuit; the third inverter bridge arm, the second inverter bridge arm, L2 and Cf2 form a second full-bridge inverter circuit, so that a split-phase inverter circuit is formed, two live wires of the first full-bridge inverter circuit and the second full-bridge inverter circuit are directly connected in parallel, a double live wire parallel mode is similar to a single live wire mode, a split-phase inverter circuit is still formed, the difference is that only two live wires are directly connected in parallel, and therefore, the amplitude, the frequency and the phase of two groups of single-phase alternating voltages are required to be identical;
and S4, after internal logic processing and control, the controller outputs proper driving signals to the first inverter bridge arm and the third inverter bridge arm, wherein the internal power switching tubes work with SPWM high-frequency switches, and outputs proper driving signals to the second inverter bridge arm, and the second inverter bridge arm works with a fixed duty ratio of 50%, so that stable voltage or current is finally provided for the alternating current power supplies Va, vc or alternating current loads, the problem of non-voltage equalizing is naturally eliminated without using a direct current voltage dividing capacitor, and the purposes of small volume and low cost can be achieved.
Based on the split-phase three-bridge-arm inverter circuit, the invention further provides a split-phase inverter for realizing direct current-alternating current (DC/AC) energy conversion, wherein the split-phase three-bridge-arm inverter mainly comprises a direct current power supply Vdc, a direct current filter capacitor Cd, two alternating current filter capacitors Cf1 and Cf2, two split-phase alternating current power supplies Va and Vc when new energy is grid-connected for power generation, two alternating current loads RL1 and RL2 when off-grid or in other application occasions, an inversion bridge arm I, an inversion bridge arm II, an inversion bridge arm III and a controller, as shown in figure 1. The inverter bridge arm I and the inverter bridge arm III are respectively connected with a live wire through L1 and L2 and are called as live wire bridge arms; the second inverter bridge arm is directly connected with the zero line or the neutral line (N), and is called an N-line bridge arm.
Example 2
The same points are not repeated, and unlike in embodiment 1, as shown in fig. 4, the first inverter leg and the third inverter leg are provided as two-phase interleaved parallel circuits, the second inverter leg is located between the first inverter leg and the third inverter leg, the second inverter leg includes Q3 and Q4, the emitter of Q3 is connected with the collector of Q4, and the connection ends of Cf1 and Cf2 are connected with the connection ends of Q3 and Q4.
The inverter bridge arm I comprises Q11 and Q21 which are arranged in series and Q12 and Q22 which are arranged in series, the Q11 and Q21 which are arranged in series are connected in parallel with the Q12 and Q22 which are arranged in series, the inverter bridge arm III comprises Q51 and Q61 which are arranged in series and Q52 and Q62 which are arranged in series, and the Q51 and Q61 which are arranged in series and the Q52 and Q62 which are arranged in series are connected in parallel.
Q11, Q21 and L11 are in staggered parallel connection with Q12, Q22 and L12, and Q51, Q61 and L21 are in staggered parallel connection with Q52, Q62 and L22 respectively, so that the output power of the split-phase inverter is further improved. The working principle and the modulation method thereof are basically similar to those of embodiment 1, and are not repeated here. It should be noted that the staggered parallel connection is not limited to two phases, but can be extended to a multi-staggered parallel split phase inverter circuit.
The power switching transistors (Q1 to Q6, Q11, Q21, Q51, Q22, Q52) in the above embodiments employ Insulated Gate Bipolar Transistors (IGBTs), alternatively other fully controlled power semiconductor devices such as metal oxide field effect transistors (MOSFETs), and third generation semiconductor Wide Bandgap (WBG) power devices such as silicon carbide (SiC), gallium nitride (GaN) MOSFETs, etc. may also be used. The controller can be built by using discrete electronic components, and can also be designed and used as an application specific integrated circuit, such as an analog control chip, a single chip Microcomputer (MCU) programmed by software, a Digital Signal Processor (DSP) and a programmable logic device (FPGA/CPLD) and the like. The inverter circuit can be integrated into a controller in a discrete device mode or an integrated mode, and can be integrated into a large-scale hybrid integrated circuit in a unified mode.
Finally, it should be noted that: the foregoing description is only illustrative of the preferred embodiments of the present invention, and although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments described, or equivalents may be substituted for elements thereof, and any modifications, equivalents, improvements or changes may be made without departing from the spirit and principles of the present invention.
Claims (9)
1. The split-phase three-bridge arm inverter circuit comprises a direct-current power supply Vdc, an inversion bridge arm I, an inversion bridge arm II, an inversion bridge arm III, an alternating-current filter capacitor, a filter inductor, an alternating-current power supply, an alternating-current load and a controller, and is characterized in that: the DC power supply Vdc is connected in parallel with a DC filter capacitor Cd, the first inverter bridge arm, the second inverter bridge arm and the third inverter bridge arm are connected in parallel with the DC power supply Vdc, the filter inductor comprises L1 and L2, the AC filter capacitor comprises Cf1 and Cf2, one end of L1 is connected with the midpoint of the first inverter bridge arm, the other end of L1 is connected with one end of Cf1, one end of L2 is connected with the midpoint of the third inverter bridge arm, the other end of L2 is connected with one end of Cf2, the other end of Cf1 and the other end of Cf2 are both connected with the midpoint of the second inverter bridge arm, the AC power supply comprises Va and Vc, one end of Va is connected with the connecting ends of L1 and Cf1, one end of Vc is connected with the connecting ends of L2 and Cf2, the other ends of Va and Vc are both connected with the connecting ends of Cf1 and Cf2 and are directly connected with N lines, the first inverter bridge arm, the second inverter bridge arm and the third inverter bridge arm are electrically connected with a controller, the AC load and the AC power supply are respectively connected with the two ends of the AC filter bridge arm and the AC power supply;
the modulation method of the split-phase three-bridge arm inverter circuit comprises the following steps:
s1, in a double-live wire mode, an alternating current filter capacitor Cf1, cf2, an inversion bridge arm I and an inversion bridge arm III form a full-bridge inversion circuit, electric energy is provided for an alternating current power supply Va and an alternating current power supply Vc which are connected in series through two filter inductors, meanwhile, an alternating current load obtains electric energy from two live wires instead of an N line, and at the moment, the inversion bridge arm II does not work;
s2, in a single live wire mode, the first inversion bridge arm, the second inversion bridge arm, the L1 and the Cf1 form a first full-bridge inversion circuit; the third inverter bridge arm, the second inverter bridge arm, L2 and Cf2 form a second full-bridge inverter circuit, so that a split-phase inverter circuit is formed, and the first full-bridge inverter circuit and the second full-bridge inverter circuit respectively provide electric energy for Va, vc and an alternating current load through N lines;
s3, in a double-live-wire parallel mode, the first inversion bridge arm, the second inversion bridge arm, the L1 and the Cf1 form a first full-bridge inversion circuit; the third inverter bridge arm, the second inverter bridge arm, L2 and Cf2 form a second full-bridge inverter circuit, so that a split-phase inverter circuit is formed, and two live wires of the first full-bridge inverter circuit and the second full-bridge inverter circuit are directly connected in parallel;
and S4, after internal logic processing and control, the controller outputs proper driving signals to the first inverter bridge arm and the third inverter bridge arm, wherein the internal power switching tubes work with SPWM high-frequency switches, and outputs proper driving signals to the second inverter bridge arm, and the second inverter bridge arm works with a fixed duty ratio of 50%, so that stable voltage or current is finally provided for the alternating current power supplies Va, vc or alternating current loads.
2. The split-phase three-leg inverter circuit of claim 1, wherein: the controller comprises a driving unit, a control and wave generation unit and a voltage and current sampling circuit, wherein one end of the driving unit is electrically connected with the first inversion bridge arm, the second inversion bridge arm and the third inversion bridge arm, the other end of the driving unit is connected with the control and wave generation unit, the other end of the control and wave generation unit is connected with the voltage and current sampling circuit, and the controller is built by using discrete electronic components or an application specific integrated circuit.
3. The split-phase three-leg inverter circuit of claim 2, wherein: the inverter bridge arm I comprises Q1 and Q2, an emitter of the Q1 is connected with a collector of the Q2, one end of the L1 is connected with a connecting end of the Q1 and Q2, the inverter bridge arm II comprises Q3 and Q4, an emitter of the Q3 is connected with a collector of the Q4, a connecting end of the Cf1 and Cf2 is connected with a connecting end of the Q3 and Q4, the inverter bridge arm III comprises Q5 and Q6, an emitter of the Q5 is connected with a collector of the Q6, and one end of the L2 is connected with a connecting end of the Q5 and the Q6.
4. The split-phase three-leg inverter circuit of claim 3, wherein: the ac load includes RL1 and RL2, the RL1 is in parallel with Cf1, the RL1 is between Cf1 and Va, the RL2 is in parallel with Cf2, and the RL2 is between Cf2 and Vc.
5. The split-phase three-leg inverter circuit of claim 4, wherein: the voltage and current sampling circuit comprises a current error amplifier and a voltage error amplifier, wherein the positive input end of the current error amplifier is connected with the output end of the voltage error amplifier, compensators are connected in parallel between the negative input ends of the voltage error amplifier and the current error amplifier and the output end, the negative input end of the voltage error amplifier is connected with an alternating current load through a sampling resistor, and the positive input end of the voltage error amplifier is connected with an alternating current sine wave voltage reference signal.
6. The split-phase three-leg inverter circuit of claim 5, wherein: the current error amplifier comprises U3 and U4, wherein the output ends of the U3 and U4 are connected with the control and wave generation unit, the voltage error amplifier comprises U1 and U2, the output end of the U2 is connected with the positive input end of the U4, and the output end of the U1 is connected with the positive input end of the U3.
7. The split-phase three-leg inverter circuit of claim 6, wherein: the compensator comprises PI1, PI2, PI3 and PI4, wherein the PI1 is connected in parallel between the negative input end and the output end of U1, the PI2 is connected in parallel between the negative input end and the output end of U2, the PI3 is connected in parallel between the negative input end and the output end of U3, the PI4 is connected in parallel between the negative input end and the output end of U4, the sampling resistor comprises R5, R6, R7 and R8, one end of R6 is connected with one end of R5, the other end of R6 is grounded, the other end of R5 is connected with one end of Va, one end of R7 is connected with one end of R8, the other end of R7 is connected with one end of Vc, and the other end of R8 is grounded.
8. The split-phase three-leg inverter circuit of claim 1, wherein: the first inverter bridge arm and the third inverter bridge arm are arranged into two-phase staggered parallel circuits, the second inverter bridge arm is located between the first inverter bridge arm and the third inverter bridge arm, the second inverter bridge arm comprises Q3 and Q4, an emitter of the Q3 is connected with a collector of the Q4, and connection ends of the Cf1 and the Cf2 are connected with connection ends of the Q3 and the Q4.
9. The split-phase three-leg inverter circuit of claim 8, wherein: the inverter bridge arm I comprises Q11 and Q21 which are arranged in series and Q12 and Q22 which are arranged in series, the Q11 and Q21 which are arranged in series are connected in parallel with the Q12 and Q22 which are arranged in series, the inverter bridge arm III comprises Q51 and Q61 which are arranged in series and Q52 and Q62 which are arranged in series, and the Q51 and Q61 which are arranged in series and the Q52 and Q62 which are arranged in series are connected in parallel.
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