CN115908132A

CN115908132A - Image scaling processing method and device based on cubic convolution interpolation method

Info

Publication number: CN115908132A
Application number: CN202211439656.4A
Authority: CN
Inventors: 请求不公布姓名
Original assignee: Chuangshi Microelectronics Chengdu Co ltd
Current assignee: Chuangshi Microelectronics Chengdu Co ltd
Priority date: 2022-11-17
Filing date: 2022-11-17
Publication date: 2023-04-04

Abstract

The invention discloses an image scaling processing method and device based on a cubic convolution interpolation method, wherein the method comprises the following steps: calculating the image scaling by adopting a scaling calculation method according to the size of an input original image and the size of an output target interpolation image; calculating the position of the output target interpolation image corresponding to the original image coordinate system according to the image scaling to obtain coordinate point information around the interpolation point in the output target interpolation image; performing convolution calculation based on a cubic convolution interpolation method according to the coordinate point information to obtain a pixel value of the output target interpolation image after convolution processing; and performing data alignment processing on the pixel values of the output target interpolation image after the convolution processing, and outputting the target image after the alignment processing. The method of the invention can better keep the details of the original image after zooming, and is not easy to generate phenomena such as aliasing, edge sawtooth and the like; and the device is a hardware circuit which is easy to integrate, reduces the area of the hardware circuit, and is small and easy to realize.

Description

Image scaling processing method and device based on cubic convolution interpolation method

Technical Field

The invention relates to the technical field of image scaling processing, in particular to an image scaling processing method and device based on a cubic convolution interpolation method.

Background

At present, most of image zooming methods are designed and realized based on software platforms, and most of algorithms adopted by existing image zooming hardware circuits are simple algorithms of nearest neighbor interpolation and bilinear interpolation, so that zoomed images have phenomena of aliasing, fuzzy outlines, edge saw teeth and the like, and corresponding hardware realization modes are complex and difficult to realize.

In view of this, the present application is specifically made.

Disclosure of Invention

The invention aims to solve the technical problems that the prior image scaling processing mostly adopts simple algorithms of a nearest neighbor interpolation method and a bilinear interpolation method, so that the zoomed images have the phenomena of aliasing, fuzzy outline, edge saw tooth and the like, and the corresponding hardware has complex implementation mode, large hardware circuit area and difficult implementation.

The invention aims to provide an image scaling processing method and device based on a cubic convolution interpolation method, and the method can enable the scaled image to better keep the details of the original image and is not easy to generate phenomena such as aliasing, edge sawtooth and the like; based on the characteristics of the image size change interval, a first-stage operation (a shift operation based on subtraction) is used for replacing a divider, so that the area of a hardware circuit is reduced on the premise of not influencing the functional effect; meanwhile, the convolution operation process is optimized, and the number of calculators and the use amount of a buffer memory are reduced by splitting the calculation mode of horizontal operation and vertical operation, so that the effect of reducing the area is achieved. The device is a hardware circuit easy to integrate, reduces the area of the hardware circuit, and is easy to realize.

The invention is realized by the following technical scheme:

in a first aspect, the present invention provides an image scaling method based on cubic convolution interpolation, the method comprising:

calculating image scaling ratios Ka and Kb by adopting a scaling calculation method according to the size of an input original image and the size of an output target interpolation image;

according to the image scaling, calculating the corresponding position of the output target interpolation image (x, y) in the original image coordinate system to obtain 16 coordinate point information around the interpolation point in the output target interpolation image;

performing convolution calculation based on a cubic convolution interpolation method according to the coordinate point information to obtain a pixel value of the output target interpolation image after convolution processing;

and performing data alignment processing on the pixel values of the output target interpolation image after the convolution processing, and outputting the target image after the alignment processing.

Further, the scaling calculation method is to calculate the image scaling using a shift operation based on subtraction.

Further, when the input original image size is x y and the output target interpolation image size is a x b, the scaling calculation method comprises the following specific steps:

step A, calculating the scaling of the image in the horizontal direction, and firstly performing line expansion on x and a (determined by the calculation bit width);

b, shifting the expanded x to the left, comparing the shifted x with the expanded a, if x is less than a, continuing to shift, otherwise, executing x-a +1, wherein the execution times are the calculated bit width, and finally obtaining a quotient and a remainder; wherein, the quotient is an integer part of the scaling;

step C, after the remainder obtained in the step B is expanded by 10^ N times, the step A and the step B are executed to obtain a fractional part of the scaling; wherein N is the calculation precision;

and step D, calculating the scaling in the vertical direction by substituting y and B into the step A, the step B and the step C.

Further, outputting the information of the 16 coordinate points around the interpolation point in the target interpolation image, and performing synchronous counting through an input line synchronous counter, an input column synchronous counter, an interpolation point line counter and an interpolation point column counter to determine the pixel point required by the current interpolation point under different scaling ratios.

Further, outputting information of 16 coordinate points around an interpolation point in a target interpolation image, assuming that the number of channels is N, the scaling of the image in the vertical direction is Ka, and the scaling of the image in the horizontal direction is Kb for a multi-data channel parallel transmission system, specifically including:

step a, setting a synchronous counter, wherein the synchronous counter comprises an input row synchronous counter v _ cnt, input column synchronous counters h _ cnt 0-h _ cnt-1, a total pixel number input counter h _ cnt _ all for each row, a row synchronous counter v _ cnt _ y for outputting images, an output column synchronous counter h _ cnt _ x _ 0-h _ cnt _ x _ N-1, a counter value _ data _ cnt for outputting the number of valid data and channel valid data output judgment FLAG signals value _ data _ FLAG _ 0-value _ data _ FLAG _ N-1;

b, when each line is input in the original image, calculating v _ cnt = v _ cnt +1; v _ cnt _ y = v _ cnt _ y + Ka; in each clock period, judging whether the output column synchronous counter is equal to the input column synchronous counter after the scaling of the output column synchronous counter plus the image horizontal direction is rounded; wherein, the judgment expression is:

h_cnt_(A)＝(A)+1+h_cnt_all；

h_cnt_all＝h_cnt_all+N；

h _ cnt _ x _ (a) = (int (h _ cnt _ x _ (a) + Kb) = = h _ cnt _ (a))? h _ cnt _ x _ (A) + Kb h _ cnt _ x _ (A), wherein A is in the range of 0-N-1;

if the two signals are equal, outputting a scaling ratio of the column synchronization counter plus the image horizontal direction, and outputting effective data of a corresponding channel to judge that FLAG (value _ data _ FLAG) is pulled high; otherwise, the output column synchronization counter keeps the count value of the previous clock cycle CLK;

and c, judging whether the value obtained by rounding the output line synchronous counter/column synchronous counter in the step b is equal to the value obtained by rounding the input line synchronous counter/input column synchronous counter, if so, determining the information of 16 coordinate points around the interpolation point, simultaneously obtaining the value of a corresponding convolution interpolation formula (g (u')), and then obtaining the pixel value of the target pixel point after the image is zoomed by using a cubic convolution interpolation method.

Further, performing convolution calculation based on a cubic convolution interpolation method according to the marked point information to obtain a pixel value of the output target interpolation image after convolution processing, and the method comprises the following steps:

performing convolution operation on the input pixel points of each line according to the coordinate point information to obtain line convolution value data;

the row convolution value data is stored in a row cache unit SRAM,

judging whether i in the interpolation points (i, j) is equal to the input row synchronous counters h _ cnt _ 0-N or not, and whether j is equal to the input row synchronous counter v _ cnt or not;

and if the values are equal, extracting effective row convolution value data from the SRAM of the row cache unit, and performing convolution on the effective row convolution value data and the column convolution value data to obtain the pixel value of the output target interpolation image after convolution processing.

Furthermore, the data alignment processing adopts a structure that a channel effective data signal flag is combined with a trigger, whether the current channel is effective data is judged directly through the action of the channel effective data signal, and if the current channel is effective data, the effective data is stored in a preset trigger; and outputting all effective data until the trigger is full, thereby realizing the alignment processing of the effective data.

Further, the specific steps of the data alignment process are as follows:

step H, obtaining effective data of an interpolation point output channel to judge a Flag signal (value _ data _ Flag _);

step I, setting a valid data counter CNT _ ALL, wherein the full count is 2N, and the count value exceeding 2N is CNT _ ALL-2N;

step J, setting counters CH _0 _CNT-CH _ N-1 _CNTcorresponding to each channel, wherein the full count is 2N, and the count value exceeding 2N is CH _ CNT-2N;

step K, judging effective data according to the Flag signals value _ data _ Flag _andCH _0 _CNT-CH _ N-1 _CNTin the step H and the step J, and storing the effective data into a trigger for caching; the method specifically comprises the following steps:

determining whether the data of the current channel is valid or not through a Flag signal value _ data _ Flag _, if so, storing the corresponding channel value into FF1[ a ] in the 1 st group of triggers according to whether the count value a of the CH _ CNT counter corresponding to the current channel is less than or equal to N or not; if not, storing the corresponding channel value into FF2[ a-N ] in the 2 nd group of flip-flops;

step L, setting a trigger to output an effective signal out _ data _ en, pulling the valid signal up when the CNT _ ALL is larger than N, and pulling the valid signal down when the CNT _ ALL is larger than 2N; namely, the data of the 1 st group of flip-flops can be output when the out _ data _ en rises, and the values of the 2 nd group of flip-flops can be output when the out _ data _ en falls; where N represents the number of channels.

In a second aspect, the present invention further provides an image scaling processing apparatus based on cubic convolution interpolation, which is a hardware circuit for implementing the image scaling processing method based on cubic convolution interpolation. The device supports the image scaling processing method based on the cubic convolution interpolation method; the device comprises:

the scaling calculation unit is used for calculating the scaling of the image by adopting a scaling calculation method according to the size of the input original image and the size of the output target interpolation image;

the interpolation point coordinate confirmation unit is used for calculating the corresponding position of the output target interpolation image in the original image coordinate system according to the image scaling to obtain coordinate point information around the interpolation point in the output target interpolation image;

the cubic convolution calculating unit is used for carrying out convolution calculation based on a cubic convolution interpolation method according to the coordinate point information to obtain a pixel value of the output target interpolation image after convolution processing;

the data alignment unit is used for carrying out data alignment processing on the pixel values of the output target interpolation image after the convolution processing;

and the image output processing unit is used for caching the aligned target image and then continuously outputting the target image.

Further, the cubic convolution calculating unit includes:

the line convolution calculating subunit is used for performing convolution operation on the input pixel points in each line according to the coordinate point information to obtain line convolution value data;

a buffer subunit for storing the line convolution value data into a line buffer unit SRAM,

a judgment subunit, configured to judge whether i in the interpolation point (i, j) is equal to the input column synchronization counter h _ cnt _0 to N, and j is equal to the input row synchronization counter v _ cnt;

and the column convolution calculating subunit is used for extracting effective row convolution value data from the SRAM in the row cache unit if the judgment results of the judging subunits are equal to each other, and performing convolution on the effective row convolution value data and the column convolution value data to obtain the pixel value of the output target interpolation image after the convolution processing.

Compared with the prior art, the invention has the following advantages and beneficial effects:

the invention relates to an image zooming processing method and a device based on a cubic convolution interpolation method, and provides a hardware circuit implementation scheme for easy integration of image zooming based on the cubic convolution interpolation method; meanwhile, the convolution operation process is optimized, and the number of calculators and the use amount of a buffer memory are reduced in a mode of splitting calculation by horizontal calculation and vertical calculation, so that the effect of reducing the area is achieved. The device is a hardware circuit easy to integrate, reduces the area of the hardware circuit, and is easy to realize.

Drawings

The accompanying drawings, which are included to provide a further understanding of the embodiments of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the principles of the invention. In the drawings:

FIG. 1 is a schematic diagram of the cubic convolution interpolation method of the present invention.

FIG. 2 is a flowchart of an image scaling method based on cubic convolution interpolation according to the present invention.

FIG. 3 is a schematic structural diagram of an image scaling apparatus based on cubic convolution interpolation according to the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail below with reference to examples and accompanying drawings, and the exemplary embodiments and descriptions thereof are only used for explaining the present invention and are not meant to limit the present invention.

The image-based zooming method is mostly designed and realized based on a software platform, and algorithms adopted by the existing image zooming hardware circuit are mostly nearest neighbor interpolation methods, bilinear interpolation methods and the like, which may cause phenomena of aliasing, fuzzy outline, edge saw tooth and the like of zoomed images.

Based on the problems, the image aliasing and other phenomena generated by the existing algorithm are improved mainly through a cubic convolution interpolation method. However, due to the calculation amount of the cubic convolution interpolation method, the scaling ratio is not fixed, and other reasons (the data of the peripheral 16 pixels are needed to be subjected to convolution operation; and the actions of data processing alignment and the like under different scaling ratios need to be considered when a hardware circuit is designed), the hardware circuit is difficult to implement. Based on the method, the invention provides the image scaling processing method and the device based on the cubic convolution interpolation method, and the method ensures that the scaled image can better keep the details of the original image and is not easy to generate phenomena such as aliasing, edge sawtooth and the like; the device of the invention is simple to realize and reasonable in structure.

As shown in fig. 1, the principle of cubic convolution interpolation adopted by the present invention is as follows:

the Cubic Convolution interpolation (Cubic Convolution) is also called bicubic Convolution interpolation, as shown in fig. 1, where (i, j) represents the closest mapping point of a certain pixel (x, y) in the target interpolation image (fig. 1 (b)) in the original image (fig. 1 (a)), and the value of (x, y) in the finally interpolated image is the sum of the weighted convolutions of 16 pixels around the pixel.

The basic formula of the cubic convolution formula is as follows:

f (i + u, j + v) = a × B × C; formula A

A = [ g (1 + u), g (u), g (1-u), g (2-u) ]; formula B

B = [ f (i-1, j-1), f (i +1, j-1), f (i +2, j-1); formula C

f(i-1,j),f(i,j),f(i+1,j),f(i+2,j)；

f(i-1,j+1),f(i,j+1),f(i+1,j+1),f(i+2,j+1)；

f(i-1,j+2),f(i,j+2),f(i+1,j+2),f(i+2,j+2)]；

C = [ g (1 + v); g (v); g (1-v); g (2-v) ]; formula D

Its formula is also equivalent to:

in the above formula, F () is the value of the corresponding coordinate after interpolation, F () is a parameter dependent on the data of the sampling point, and g () is an interpolation formula for interpolation convolution.

Regarding the interpolation formula, according to the sampling theorem of continuous signals, if the function sinc (x × PI) = sin (x × PI)/(x × PI) is used for interpolation, the value of any point between sampling points can be theoretically and accurately obtained, when a hardware circuit is realized, the circuit area and the power consumption can be effectively optimized by performing calculation processing by using a cubic approximation polynomial of the function sinc (x × PI) = sin (x × PI)/(x × PI), and the convolution kernel operation is performed by using the following polynomial:

example 1

As shown in fig. 2, the image scaling method based on cubic convolution interpolation of the present invention includes:

As a further implementation, the scaling algorithm is to employ a shift operation based on subtraction to calculate the image scaling. Specifically, when the input original image size is x _ y and the output target interpolation image size is a _ b, the scaling calculation method includes the specific steps of:

In a further implementation, outputting the information of the 16 coordinate points around the interpolation point in the target interpolation image is to perform synchronous counting through an input line synchronous counter, an input column synchronous counter, an interpolation point line counter and an interpolation point column counter, so as to determine the required pixel point of the current interpolation point under different scaling ratios. Specifically, outputting information of 16 coordinate points around an interpolation point in a target interpolation image, assuming that the number of channels is N, the scaling in the vertical direction of the image is Ka, and the scaling in the horizontal direction of the image is Kb for a multi-data-channel parallel transmission system, specifically includes:

h_cnt_(A)＝(A)+1+h_cnt_all；

h_cnt_all＝h_cnt_all+N；

h_cnt_x_(A)＝(int(h_cnt_x_(A)+Kb)＝＝h_cnt_(A))？h_cnt_x_(A)+Kb:h_cnt_x_(A)，

wherein, the value range of A is 0-N-1;

if the current value is equal to the current value, the output column synchronization counter is added with the scaling ratio of the image horizontal direction, and the valid data output judgment FLAG (value _ data _ FLAG) of the corresponding channel is pulled high; otherwise, the output column synchronization counter keeps the count value of the previous clock cycle CLK;

In a further implementation, performing convolution calculation based on a cubic convolution interpolation method according to the marked point information to obtain a pixel value of the output target interpolation image after convolution processing, including:

the row convolution value data is stored in a row cache unit SRAM,

and if the values are equal, extracting effective row convolution value data from the SRAM of the row cache unit, and convolving the effective row convolution value data with the column convolution value data to obtain the pixel value of the output target interpolation image after convolution processing.

The data alignment processing is further implemented by adopting a structure of combining a channel effective data signal flag and a trigger, judging whether the current channel is effective data directly through the action of the channel effective data signal, and if the current channel is effective data, storing the effective data into a preset trigger; and outputting all effective data until the trigger is full, thereby realizing the alignment processing of the effective data. Specifically, the data alignment processing includes the following specific steps:

step K, judging effective data according to the Flag signals value _ data _ Flag _andCH _0 _CNTto CH _ N-1 _CNTin the step H and the step J, and storing the effective data into a trigger for caching; the method specifically comprises the following steps:

The method of the invention can better keep the details of the original image after zooming, and is not easy to generate phenomena such as aliasing, edge sawtooth and the like; based on the characteristics of the image size change interval, a first-stage operation (a shift operation based on subtraction) is used for replacing a divider, so that the area of a hardware circuit is reduced on the premise of not influencing the functional effect; meanwhile, the convolution operation process is optimized, and the number of calculators and the use amount of a buffer memory are reduced in a mode of splitting calculation by horizontal calculation and vertical calculation, so that the effect of reducing the area is achieved.

Example 2

As shown in fig. 3, the present embodiment is different from embodiment 1 in that the present embodiment provides an image scaling processing apparatus based on cubic convolution interpolation, which is a hardware circuit that realizes an image scaling processing method based on cubic convolution interpolation. The apparatus supports the image scaling processing method based on cubic convolution interpolation of embodiment 1; the device includes:

the cubic convolution calculation unit is used for performing convolution calculation based on a cubic convolution interpolation method according to the coordinate point information to obtain a pixel value of the output target interpolation image after convolution processing;

Each unit is described in detail and illustrated in the following examples:

1. scaling calculation unit

Since the scaling is derived from the ratio of the output image size to the input image size, i.e. a division operation is required. If division operation is directly used, the area of the integrated hardware circuit is large, and the design cost is further increased. Therefore, on the premise that the image size change period is larger than one image frame period, the division operation is realized by using an algorithm based on subtraction shift operation in the scheme of the invention, on one hand, the circuit area is reduced by splitting the division operation through the primary operation of the addition algorithm, and on the other hand, the image size before and after scaling can be ensured to be set arbitrarily.

The realization idea is as follows:

since the image size is processed, and the current mainstream image size is generally smaller than 2^32 x 2^32, it can be assumed that the scaling unit processes 32-bit unsigned numbers. Assuming that the dividend is a and the divisor is b, neither their quotient nor remainder exceeds 32 bits.

The first step is as follows: a is converted into temp _ a with the upper 32 bits being 0 and the lower 32 bits being a. Then b is converted into temp _ b with b as the upper 32 bits and 0 as the lower 32 bits.

The second step is that: when each clock period CLK starts, firstly, the temp _ a is shifted to the left by one bit, the tail is complemented by 0, then the signals are compared with b to judge whether the signals are greater than b, if the signals are greater than b, the temp _ a is subtracted from the temp _ b and 1 is added; otherwise, the above operations are repeated continuously, the execution times is 32 times (the bit width is determined), the high 32 bits of temp _ a after the execution is finished are the remainder Y, and the low 32 bits are the quotient Z.

The third step: according to the formula B and the formula D of the cubic convolution interpolation principle, the cubic convolution interpolation requires a fractional part (u, v) of a scaling to carry out convolution kernel (g (x)) operation, so that 10^ N times of expansion is firstly carried out on the basis of a remainder obtained by the calculation, and N represents the calculation precision.

And then, the expanded remainder Y and the divisor b are subjected to the operations of the first step and the second step, and finally the lower 32 bits are the value of the decimal part.

Examples are: the input image size a was 1920 (32' b0000_0000 _0111_1000 _0000),

the output image size b is 1080 (32' b0000_0000 _0000_0100_0011 _1000).

Then the first step described above is performed:

temp_a:

0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0000_0111_1000_0000

temp_b:

0000_0000_0000_0000_0000_0100_0011_1000_0000_0000_0000_0000_0000_0000_0000_0000

then, executing the second step, after shifting temp _ a left by one bit, comparing with temp _ b, if less than then, continuing the shift, otherwise, the following condition is the case:

temp_a:

0000_0000_0000_0000_0000_0111_1000_0000_0000_0000_0000_0000_0000_0000_0000_0000

temp_b:

0000_0000_0000_0000_0000_0100_0011_1000_0000_0000_0000_0000_0000_0000_0000_0000

at this time, calculation temp _ a = temp _ a-temp _ b +1 is performed:

temp_a:

0000_0000_0000_0000_0000_0011_0100_1000_0000_0000_0000_0000_0000_0000_0000_0001

since the above result is just after the 32 th shift, it can be:

remainder Y:0000_0000_0011 _0100_1000 → 32'd840

Quotient Z:0000_0000_0001 → 32' d1

The integer part of the available scaling is 1.

Then, the third step is executed to calculate the decimal part of the scaling:

expanding the remainder Y obtained by the result by 10^5 times (the calculation precision is 5 bits after the decimal point);

remainder Y:840 × 100000=84000000

And then executing the first step and the second step on the expanded Y:

temp _ a, which yields the corresponding remainder and divisor, is:

0000_0000_0000_0000_0000_0011_0100_1000_0000_0000_0000_0001_0010_1111_1101_0001

from the lower 32 bits available: 0000_0000_0001_0010 _1111_1101 _0001 → 32' d77777

That is, the decimal part of the scaling ratio is 0.7777777

The scaling at this time is 1.77777,

the scaled sizes were: 1920/1.77777=1080.00472.

2. Interpolation point coordinate confirming unit

The data stream transmission mode of the hardware circuit of the image processing is a progressive transmission mode. Therefore, in order to confirm the coordinate position of the input image data, a row counter (hereinafter, referred to as v _ cnt) and a column counter (hereinafter, referred to as h _ cnt _0 to N-1, where N is the number of data transmission channels) for timing synchronization of the input image data are provided to determine the coordinate position of the input image data.

In order to confirm the coordinate system position of the output image relative to the input image, a row counter (hereinafter, referred to as v _ cnt _ y) and a column synchronization counter (hereinafter, referred to as h _ cnt _0 to N-1, and N is the number of data transmission channels) of the output image are also required, the maximum count value of the counters is the size of the output image, and the count interval of the counters is the image scaling calculated by the scaling unit.

Since the cubic convolution interpolation method adopted by the invention needs 16 pixel points around the interpolation point, it is difficult to judge which input pixel points are required pixels of the current interpolation point (namely to obtain the information of 16 coordinate points around the interpolation point) when data is input at different scaling ratios.

Therefore, the scheme of the invention carries out synchronous counting by designing the input line/column synchronous counter and the interpolation point line/column counter, and can determine the pixel points required by the current interpolation point under different scaling. For a multi-data channel parallel transmission system, assuming that the number of channels is N, the scaling in the vertical direction of an image is Ka, and the scaling in the horizontal direction of the image is Kb, the method specifically includes:

h_cnt_(A)＝(A)+1+h_cnt_all；

h_cnt_all＝h_cnt_all+N；

By setting the advantages of several synchronous counters mentioned above: (1) The synchronous counting can be carried out under a multi-data channel transmission hardware system, and the consistency of the input counting and the output counting can be achieved. (2) When counting, the information whether the data on the output channel is valid data can be obtained, which is convenient for the following valid data alignment unit to judge.

Examples are as follows: for an 8-channel transmission system, the scaling Ka =1.2, kb =1.3;

v _ cnt +1 for each input line of input image data.

Because 8-channel transmission systems are used, i.e., each clock cycle CLK transmits 8 rows of 8 pixel data (8 columns), and because the counters count based on the clock cycles CLK, if the count values (columns) corresponding to the 8 pixel data are all represented in one clock cycle CLK, each transmission channel needs a separate column synchronization counter (h _ cnt _ 0-7), i.e., 8 column synchronization counters need to be set.

h _ cnt _ all, a total input pixel data count counter, clear 0 at the beginning of each line of input pixel data, 8 increments every CLK in a line (8 pixel data transfers at a time), and the maximum count is the size of the input image.

The specific counting operations of h _ cnt _0 to 7 are as follows:

first clock cycle CLK:

h_cnt_0＝0+1+h_cnt_all(0)＝1

h_cnt_1＝1+1+h_cnt_all(0)＝2

h_cnt_2＝2+1+h_cnt_all(0)＝3

h_cnt_3＝3+1+h_cnt_all(0)＝4

…

h_cnt_7＝8-1+1+h_cnt_all(0)＝8

h_cnt_all＝h_cnt_all(0)+8＝8

second CLK:

h_cnt_0＝0+1+h_cnt_all(8)＝8+1

h_cnt_1＝1+1+h_cnt_all(8)＝8+2

h_cnt_2＝2+1+h_cnt_all(8)＝8+3

h_cnt_3＝3+1+h_cnt_all(8)＝8+4

…

h_cnt_7＝-8-1+1+h_cnt_all(8)＝8+8

h_cnt_all＝h_cnt_all(8)+8＝8+8

and so on, counting.

I.e. each row; v _ cnt = v _ cnt +1

Each of the CLK: h _ cnt _ N = N +1+ h \ u cnt _all

h_cnt_all＝h_cnt_all+8

Then, the user can use the device to perform the operation,

v _ cnt _ y: a line synchronization counter for outputting an image, v _ cnt _ y + Ka for every input line of pixel data.

h _ cnt _ x _0 to 7, as with the input column synchronization counters (h _ cnt _0 to 7), since 8 columns of coordinate point information of output pixels need to be generated in one clk, 8 column counters need to be provided.

value _ data _ cnt: the count signal of the total effective data number is clear 0 at the beginning of each line of the output pixels, and the maximum count value is the size of the output image.

The counting principle of the counting is as follows:

each clock cycle CLK:

h_cnt_x_0＝(int(h_cnt_x_N-1+Kb)＝＝h_cnt_0)？h_cnt_x_N-1+Kb:h_cnt_x_N-1

h_cnt_x_1＝(int(h_cnt_x_0+Kb)＝＝h_cnt_1)？h_cnt_x_0+Kb:h_cnt_x_0

h_cnt_x_2＝(int(h_cnt_x_1+Kb)＝＝h_cnt_2)？h_cnt_x_1+Kb:h_cnt_x_1

h_cnt_x_3＝(int(h_cnt_x_2+Kb)＝＝h_cnt_3)？h_cnt_x_2+Kb:h_cnt_x_2

……

h_cnt_x_N-1＝(int(h_cnt_x_N-1+Kb)＝＝h_cnt_N-1)？h_cnt_x_N-1+Kb:h_cnt_x_N-1

in order to conveniently judge whether valid data are output by the channel through the subsequent alignment unit, when the judgment condition of the counting signal is met (namely the pixel value of the current channel needs to be subjected to image scaling processing and valid data are output), the valid data output judgment FLAG signal (value _ data _ FLAG _) of the corresponding channel is raised.

Examples are as follows:

first clock cycle clk:

h_cnt_x_0＝(int(0+1.3)＝＝1)？0+1.3:0＝1.3，value_data_flag_0＝1；

h_cnt_x_1＝(int(1.3+1.3)＝＝2)？1.3+1.3:1.3＝2.6，value_data_flag_1＝1；

h_cnt_x_2＝(int(2.6+1.3)＝＝3)？2.6+1.3:2.6＝3.9,value_data_flag_2＝1；

h_cnt_x_3＝(int(3.9+1.3)＝＝4)？3.9+1.3:3.9＝3.9,value_data_flag_3＝0；

h_cnt_x_4＝(int(3.9+1.3)＝＝5)？3.9+1.3:3.9＝5.2,value_data_flag_4＝1；

……

h_cnt_x_7＝(int(7.8+1.3)＝＝8)？7.8+1.3:7.8＝7.8,value_data_flag_7＝0；

next clk to

h_cnt_x_0＝(int(7.8+1.3)＝＝9)？7.8+1.3:7.8＝9.1，value_data_flag_0＝1；

And so on.

Therefore, it can be seen that:

setting the integer part of h _ cnt _ x _ 0-N-1, v _cnt _, as i, j;

the decimal part is u, v.

[] If the number is an integer, then:

i = [ h _ cnt _ x _0 to N ], j = [ v _ cnt _ y ]; formula (1)

u = h _ cnt _ x _0 to N-i, v = v _ cnt-j; formula (2)

When i, j and h _ cnt _0 to N, v _ cnt coincide, 16 coordinate points around the interpolation point can be determined.

(h_cnt-1,v_cnt-1),(h_cnt,vcnt-1),(h_cnt+1,v_cnt-1),(h_cnt+2,v_cnt-1)

(h_cnt-1,v_cnt),(h_cnt,v_cnt),(h_cnt+1,v_cnt),(h_cnt+2,v_cnt)

(h_cnt-1,v_cnt+1),(h_cnt,v_cnt+1),(h_cnt+1,v_cnt+1),(h_cnt+2,v_cnt+1)

(h_cnt-1,v_cnt+2),(h_cnt,v_cnt+2),(h_cnt+1,v_cnt+2),(h_cnt+2,v_cnt+2)

And substituting u, v into the convolution interpolation formula (g (x)) can obtain:

g(1+u)g(u)g(1-u)g(2-u)

g(1+v)g(v)g(1-v)g(2-v)

therefore, the above method can confirm the 16 pixel values around each interpolation point and the corresponding convolution interpolation formula (g (u')) value, and then the cubic convolution interpolation method can be used to obtain the pixel value of the target pixel point after the image is zoomed.

3. Cubic convolution calculating unit

Based on the cubic convolution interpolation method, convolution calculation needs to be performed on 16 pixel points around an interpolation point, and if convolution calculation is directly performed on 16 points, the calculation amount is large, and the design area is also large.

The scheme of the invention provides that the convolution operation (g (u ')) is carried out on the input pixel points of each line, then the data after convolution is stored in a line cache unit SRAM, then whether i, j and h _ cnt _ 0-N, v _ cnt are equal or not is judged, then effective convolution data is extracted from the line cache unit SRAM, and finally the effective convolution data and g (v') are carried out convolution. The convolution operation of 4x4 points is carried out step by step, firstly the convolution is carried out on 4 points of each line, then the result after the convolution is stored in a line cache unit SRAM, finally the result is extracted, and finally the convolution is carried out with g (v'). In this way, only 4 points are operated in each convolution calculation, and the operation amount is greatly reduced.

Examples are:

the first step is as follows:

in the interpolation point coordinate determination unit, the v _ cnt, h _ cnt _ a of the input image and the h _ cnt _ x _0 to N, v _ cnt _ y counters of the output image start counting synchronously, so that each time one pixel coordinate (v _ cnt, h _ cnt _ a) is input into the input pixel data, the corresponding pixel coordinate (v _ cnt _ y, h _ cnt _ x _0 to N) of the output image can be synchronously obtained. That is, the corresponding pixel point (i, j) and the fractional part (u, v) can be obtained from equations (1) and (2) of the interpolated coordinate point determination unit.

Therefore, at this time, convolution calculation can be performed on each pixel point of each row of the input pixel data and g (1 + u), g (u), g (1-u), g (2-u) corresponding to the pixel point;

the following can be obtained:

f(i’,j)＝g(1+u)f(i-1,j)+g(u)f(i,j)+g(1-u)f(i+1,j)+g(2-u)f(i+2,j)；

that is, after inputting one row of data, the convolution results of all pixel points and g (1 + u), g (u), g (1-u), g (2-u) in the row are obtained.

The second step:

and storing the value obtained by convolution of each line in the first step into a line buffer unit below.

The third step:

from the above two steps, when a cubic convolution operation is performed on a certain interpolation point, the calculation result of g (1 + u), g (u), g (1-u), g (2-u) in the calculation formula is already put into the line buffer unit, and at this time, only the corresponding convolution value needs to be taken out from the line buffer unit, and the convolution is performed on the sum g (1 + v), g (v), g (1-v), g (2-v), so that a value (output pixel value) after cubic convolution interpolation can be obtained.

That is, the convolution operation of g (1 + u), g (u), g (1-u), g (2-u) is started at the time of each row transmission, then the corresponding f (i ', j), f (i', j-1), f (i ', j + 1), f (i', j + 2) are taken out through the judgment of interpolation points, and finally the operation is performed on g (1 + v), g (v), g (1-v), g (2-v).

By the method, the horizontal operation and the vertical operation are divided into calculation modes, the number of calculators and the use amount of a buffer memory are reduced, and the effect of reducing the area is achieved.

4. Line cache unit

According to the cubic convolution calculation unit, it can be known that each line of the input pixels and the result after convolution of g (1 + u), g (u), g (1-u), g (2-u) need to be buffered, and when the nth line of the scaled image is processed, because the cubic convolution interpolation operation needs to be performed, it can be known from formula C of the cubic convolution interpolation principle that there is a requirement to ensure that there is data of n-1, n +1, n +2 lines at this time.

Therefore, in order to meet the above requirement, it is necessary to perform buffering processing on the input line data.

The scheme of the invention adopts a line cache unit SRAM to carry out a 4-line data cache scheme, and the specific realization idea is as follows:

as above, the data stream is transmitted row by row, when the 3 rd row of the input image starts to be transmitted, at this time, the SRAM already stores the first 2 rows of data, so that the row data that can be obtained at this time has the 1 st row, 2 nd row and 3 th row, and substitutes the requirement for the convolution processing output (when the convolution processing outputs the nth row data, the row data having n-1, n +1, n +2 is satisfied), n can be replaced by 1, that is, when the convolution processing outputs the 1 st row data, the data requirements for the 0 st row, 1 st row, 2 nd row and 3 th row of the input pixel can be obtained, so that at this time, the pixel of the first row can start to be output by the triple convolution interpolation processing.

As for the 0 row (n-1 row), because there is no actual data, the data of the 2 nd row is directly mirrored to the 0 th row by the common data mirroring processing mode.

When the 4 th row of the input image starts to be transmitted, the SRAM already stores the first 3 rows of data, and the data of the 4 th row is being transmitted, and the requirement in the convolution processing is substituted (when the convolution processing outputs the nth row of data, the requirement of the row data of n-1, n +1, n +2 is satisfied), n can be replaced by 2, that is, when the convolution processing outputs the 2 nd row of data, the data requirements of the 1 st, 2 nd, 3 rd and 4 th rows of the input pixel can be obtained, so that the pixel of the second row can be output by the triple convolution interpolation processing at this time.

When the 5 th row of the input image starts to be transmitted, the SRAM stores the first 4 th row of data, the 5 th row of data is stored to the 1 st row of data, and the data is substituted into the requirement in the convolution processing (when the convolution processing outputs the nth row of data, the data requirement of n-1, n +1, n +2 is satisfied), n can be replaced by 3, namely when the convolution processing outputs the 3 rd row of data, the data requirement of the 2 nd row, the 3 rd row, the 4 th row and the 5 th row of the input pixel can be obtained, so the pixel of the third row can be output by the cubic convolution interpolation processing at this time.

And so on until the data is finally processed.

5. Data alignment unit

For the data alignment unit, there are disclosed bubbling method (multi-stage sequential loop comparison judgment) or exhaustive method (all cases are listed for judgment), and these methods are not applicable to the cubic convolution interpolation method. The reason is that: in the case of a multi-channel system and a non-fixed scaling, if the two methods are implemented by hardware, the design area is increased and the layout and wiring difficulty is increased.

The data alignment processing adopts a structure of combining a channel effective data signal and a trigger, judges whether the current channel is effective data directly through the action of the channel effective data signal, and stores the effective data into a preset trigger if the current channel is the effective data; and outputting all effective data until the trigger is full, thereby realizing the alignment processing of the effective data. Specifically, the steps H to L in example 1 may be performed.

In the current image data processing hardware circuit, in order to increase the data transmission rate, a multi-data channel (8-channel) parallel transmission mode is generally adopted for data transmission. According to the scaling module, the whole data is reduced, so that the scaled data needs to be effectively aligned and then output.

When image reduction processing is performed:

as known by the second-step interpolation coordinate point confirming unit, only when I, j is consistent with h _ cnt and v _ cnt, the third convolution interpolation operation is carried out, and the value of the target image coordinate point is output.

Therefore, when the condition is not satisfied, no valid data is output, resulting in non-continuous output, and the discontinuous operation is not regular because the scaling factor is a decimal multiple. If not processed, the back-end output cannot determine those as valid data and those as invalid data.

Namely, effective data alignment processing needs to be performed on data processed by the convolution module, and the specific implementation idea is as follows:

for the transmission system with N channels, a Buffer consisting of 2 groups of N triggers is arranged for carrying out alignment processing on effective data. Hereinafter, referred to as FF1[1 to N ], FF2[1 to N ].

The specific implementation actions are as follows:

the first step is as follows:

and (4) judging a Flag signal (value _ data _ Flag) from the effective data of the output channel of the interpolation point coordinate confirmation unit, and introducing the Flag signal into the data alignment unit.

The second step is that:

the count signal CNT _ ALL is set, and the input pixels are cleared at the start of each line. CNT _ ALL is equal to the result of accumulation of value _ data _ flag _0 to N-1 at each data transfer, the full count is 2N, and the count value exceeding 2N is CNT _ ALL-2N.

The third step:

setting counters CH _ 0-N-1 \/CNT of each channel, wherein the full number is 2N, and the count value exceeding 2N is CH \ _ CNT-2N;

the counting principle is as follows:

CH_0_CNT＝value_data_flag_0+CNT_ALL；

CH_1_CNT＝value_data_flag_0+value_data_flag_1+CNT_ALL；

CH_2_CNT＝value_data_flag_0+value_data_flag_1+value_data_flag_2+CNT_ALL；

CH_3_CNT＝value_data_flag_0+value_data_flag_1+value_data_flag_2+value_data_flag_3+CNT_ALL；

……；

CH_N-1_CNT＝value_data_flag_0+value_data_flag_1+value_data_flag_2+…+vlue_data_flag_N+CNT_ALL。

the fourth step:

and judging effective data in the N data transmitted each time, and putting the effective data into a specified Buffer after judging the information of the CH _ CNT and the value _ data _ flag. The specific actions are as follows:

firstly, judging whether value _ data _ flag _ is high, if yes, the value _ data _ flag _ is valid data, and the valid data needs to be stored into a Buffer.

Then, whether the count value a of CH _ CNT is smaller than N:

if yes, storing the corresponding channel value into FF1[ a ] in the 1 st group of Buffer;

if not, storing the corresponding channel value into FF2[ a-N ] in the group 2 Buffer;

example (c): for an 8-channel transmission system,

the data in the 8 transmission channels output by the convolution calculating unit at the time of the first CLK are as follows:

CH0: valid data

CH1: valid data

CH2: invalid data

CH3: invalid data

CH4: invalid data

CH5: valid data

CH6: invalid data

CH7: invalid data

Then, it is known that the valid data output determination FLAG signal output by the interpolation coordinate point confirmation unit: value _ data _ flag _0,1,5 are pulled high,

CH _0 \\ CNT = value_data_flag_0 (1) + CNT _ ALL (start CNT _ ALL =0 for one H) =1;

CH_1_CNT＝value_data_flag_0(1)+value_data_flag_1(1)+CNT_ALL(0)＝2；

CH_2_CNT＝value_data_flag_0(1)+value_data_flag_1(1)+value_data_flag_2(0)+CNT_ALL(0)＝2；

…；

CH_5_CNT＝value_data_flag_0(1)+value_data_flag_1(1)+value_data_flag_2(0)+…+value_data_flag_5(1)+…+CNT_ALL(0)＝3；

…；

CH_7_CNT＝value_data_flag_0(1)+value_data_flag_1(1)+value_data_flag_2(0)+…+value_data_flag_7(0)+CNT_ALL(0)＝3；

CNT_ALL＝value_data_flag_0+value_data_flag_1+…+value_data_flag_7＝3；

then judging the counting value and the flag action of each channel, putting the counting value and the flag action into a specified Buffer,

that is to say at this time, the time,

CH _0 \\ cnt =1 and < =8, value_data_flag_0 =1, so it is put into the flip-flop FF1[1] in the first set of buffers;

CH _1 \_cnt =2 and < =8, value_data_flag_1 =1, so it is put into flip-flop FF1[2] in the first set of Buffer;

CH _2 \\ CNT =2, value_data _flag __1 =0, and the data is judged to be invalid data and discarded;

…

CH _5 \\ cnt =3 and < =8, value_data_flag_1 =1, so it is put into the flip-flop FF1[3] in the first set of buffers;

…

CH _7 \\ CNT =3, value_data _flag _ _1=0, and judging the data to be invalid and discarding the data.

The data in the 8 transmission channels output by the convolution computation unit for the second CLK time are as follows:

CH0: valid data

CH1: valid data

CH2: invalid data

CH3: valid data

CH4: valid data

CH5: invalid data

CH6: valid data

CH7: valid data

Then the valid data output judgment FLAG signal output by the interpolation coordinate point confirmation unit at this time is:

value _ data _ flag _0,1,3,4,6,7 are pulled high,

CH _0_cnt = value _data _flag _0 (1) + CNT _ ALL (last CLK count value = 3) =4;

CH _1 \_cnt = value _ data _flag _0 (1) + value _ data _ flag _1 (1) + CNT _ ALL (last CLK count value = 3) =5;

…

CH_3_CNT＝value_data_flag_0(1)+…+value_data_flag_3(1)+CNT_ALL(3)＝6；

CH_4_CNT＝value_data_flag_0(1)+…+value_data_flag_3(1)+value_data_flag_4(1)+CNT_ALL(3)＝7；

…

CH_6_CNT＝value_data_flag_0(1)+…+value_data_flag_6(1)+CNT_ALL(3)＝8；

CH_7_CNT＝value_data_flag_0(1)+…+value_data_flag_7(1)+CNT_ALL(3)＝9；

CNT_ALL＝value_data_flag_0+value_data_flag_1+…+value_data_flag_7+CNT_ALL＝9；

namely, at this time:

CH _0 \\ cnt =4 and < =8, value_data_flag_0 =1, so it is put into the flip-flop FF1[4] in the first set of buffers;

CH _1 \\ \ cnt =5 and < =8, value \ u data \ u flag \1 =1, so it is put into the flip-flop FF1[5] in the first set of buffers;

…；

CH _3 \\ u CNT =6 and < =8, value_data flag_3 =1, so it is put into the flip-flop FF1[6] in the first set of buffers;

CH _4 \\ \ cnt =7 and < =8, value \ u data flag \ u 4=1, so it is put into the flip-flop FF1[7] in the first set of buffers;

…；

CH _6 \\ cnt =8 and < =8, value_data_flag_6 =1, so it is put into the flip-flop FF1[8] in the first set of buffers;

CH _7 \_cnt =9, value _ _data _flag _ _7=1, but CH _7 _cntis greater than 8, so it should be the flip-flop FF2[ CH _7_CNT (9) -N (8) ] of group 2 Buffer, i.e. FF2[1 ].

And so on until all data is processed.

The fifth step:

the output valid signal out _ data _ en is set, and when CNT _ ALL is greater than N, it is pulled high, which indicates that the first set of buffers is full and can be output. Then, since the maximum value of CNT _ ALL can only count to 2N, and when the maximum value exceeds 2N, the CNT _ ALL count value will be counted again, so that out _ data _ en will be pulled low at this time, which means that the second group of buffers is full and can be output.

That is, at the time of the rising edge of out _ data _ en, it is determined that FF1[1 to N ] is full at this time, and the valid data therein is output to the subsequent image output processing unit, and at the time of the falling edge of out _ data _ en, it is determined that FF2[1 to N ] is full at this time, and the valid data therein is output to the subsequent image output processing unit.

And when the second group of buffers is full, the effective data stored in the first group of buffers is already output, so that the subsequent effective data can be stored in the first group of buffers, and by analogy, the two groups of buffers are alternately used for carrying out the alignment output processing of the effective data.

6. Image output processing unit

For the data processing output by the alignment unit, the scheme of the invention provides a method of adopting a line cache (SRAM), and a specific idea is as follows:

the scheme of storing one row and reading alternately is carried out by using 2 SRAMs.

When the aligned N data of the data alignment unit are stored into the first address of the SRAM0, the aligned data of the first row are stored all the time;

then, the alignment data of the second row is stored in the SRAM1, and the data stored in the SRAM0 (the data of the first row) is read at the same time;

and then storing the data aligned in the third row into the SRAM0, simultaneously reading the data in the SRAM1 (the 2 nd row), and so on, and repeating the operations until all the data in all the rows are transmitted.

By the SRAM alternative reading and writing method, the requirement of continuously reading effective data in one line can be met.

The invention provides a hardware circuit implementation scheme for image scaling easy to integrate based on a cubic convolution interpolation method, which uses first-stage operation (based on the shift operation of subtraction) to replace a divider based on the characteristic of image size change interval, thereby reducing the area of a hardware circuit on the premise of not influencing the functional effect; meanwhile, the convolution operation process is optimized, and the number of calculators and the use amount of a buffer memory are reduced by splitting the calculation mode of horizontal operation and vertical operation, so that the effect of reducing the area is achieved. The device is a hardware circuit easy to integrate, reduces the area of the hardware circuit, and is easy to realize.

The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the present invention in further detail, and it should be understood that the above-mentioned embodiments are merely exemplary embodiments of the present invention, and are not intended to limit the scope of the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims

1. The image scaling processing method based on the cubic convolution interpolation method is characterized by comprising the following steps of:

calculating the image scaling by adopting a scaling calculation method according to the size of an input original image and the size of an output target interpolation image;

calculating the position of the output target interpolation image corresponding to the original image coordinate system according to the image scaling to obtain coordinate point information around the interpolation point in the output target interpolation image;

and carrying out data alignment processing on the pixel values of the output target interpolation image after the convolution processing, and outputting the target image after the alignment processing.

2. The method of claim 1, wherein the scaling calculation is to calculate the image scaling using a shift operation based on subtraction.

3. The method of claim 2, wherein when the input original image size is x _ y and the output target interpolation image size is a _ b, the scaling method comprises the steps of:

step A, calculating the scaling of the image in the horizontal direction, and performing line expansion on x and a;

step C, after the remainder obtained in the step B is enlarged by 10^ N times, executing the step A and the step B to obtain a decimal part of a scaling ratio; wherein N is the calculation precision;

4. The image scaling processing method based on cubic convolution interpolation method as claimed in claim 1, wherein the coordinate point information around the interpolation point in the output target interpolation image is synchronously counted by an input line synchronization counter, an input column synchronization counter, an interpolation point line counter and an interpolation point column counter, so as to determine the pixel point required by the current interpolation point at different scaling ratios.

5. The image scaling processing method based on cubic convolution interpolation of claim 4, wherein the outputting of the coordinate point information around the interpolation point in the target interpolation image is performed by assuming that, for a multi-data channel parallel transmission system, the number of channels is N, the scaling in the vertical direction of the image is Ka, and the scaling in the horizontal direction of the image is Kb, and specifically includes:

step a, setting a synchronous counter, wherein the synchronous counter comprises an input row synchronous counter v _ cnt, input column synchronous counters h _ cnt 0-h _ cnt-1, a per-row input total pixel number counter h _ cnt _ all, a row synchronous counter v _ cnt _ y for outputting images, an output column synchronous counter h _ cnt _ x _ 0-h _ cnt _ x _ N-1, a counter value _ data _ cnt for outputting the number of effective data, and a channel effective data output judgment FLAG signal value _ data _ FLAG _ 0-value _ data _ FLAG _ N-1;

b, when each line is input in the original image, calculating v _ cnt = v _ cnt +1; v _ cnt _ y = v _ cnt _ y + Ka; in each clock period, judging whether the output column synchronous counter is equal to the input column synchronous counter after the scaling of the output column synchronous counter plus the image horizontal direction is rounded; if the two signals are equal, the output column synchronization counter is added with the scaling of the image in the horizontal direction, and the effective data output of the corresponding channel judges that FLAG is pulled up; otherwise, the output column synchronization counter keeps the count value of the last clock period;

and c, judging whether the rounded value of the output line synchronous counter/column synchronous counter is equal to the input line synchronous counter/input column synchronous counter or not in the step b, and if so, determining the information of 16 coordinate points around the interpolation point.

6. The image scaling processing method based on cubic convolution interpolation as claimed in claim 1, wherein the performing convolution calculation based on cubic convolution interpolation according to the marked point information to obtain a pixel value of the convolution-processed output target interpolation image includes:

the line convolution value data is stored in a line buffer unit,

and if the values are equal, extracting effective line convolution value data in the line cache unit, and performing convolution on the effective line convolution value data and the column convolution value data to obtain the pixel value of the output target interpolation image after the convolution processing.

7. The image scaling processing method based on cubic convolution interpolation as claimed in claim 1, wherein the data alignment processing is a structure combining a channel valid data signal and a trigger, and directly judges whether the current channel is valid data through the action of the channel valid data signal, if so, the valid data is stored in a preset trigger; and outputting all effective data until the trigger is full, thereby realizing the alignment processing of the effective data.

8. The image scaling processing method based on cubic convolution interpolation as claimed in claim 7, wherein the data alignment processing specifically comprises:

step H, obtaining effective data judgment Flag signals of an interpolation point output channel;

step J, setting counters CH _0 _CNT-CH _ N-1 _CNTcorresponding to each channel, wherein the full record number is 2N, and the count value exceeding 2N is CH _ CNT-2N;

step K, judging effective data according to the Flag signals and the CH _0 _CNTto the CH _ N-1 _CNTin the steps H and J, and storing the effective data into a trigger for caching; the method specifically comprises the following steps:

determining whether the data of the current channel is valid or not through a Flag signal, if so, storing the corresponding channel value into FF1[ a ] in the 1 st group of triggers according to whether the count value a of the CH _ CNT counter corresponding to the current channel is less than or equal to N or not; if not, storing the corresponding channel value into FF2[ a-N ] in the 2 nd group of flip-flops;

9. An image scaling processing apparatus based on cubic convolution interpolation, characterized in that the apparatus supports the image scaling processing method based on cubic convolution interpolation according to any one of claims 1 to 8; the device comprises:

the interpolation point coordinate confirmation unit is used for calculating the position of the output target interpolation image in the original image coordinate system according to the image scaling to obtain coordinate point information around the interpolation point in the output target interpolation image;

10. The apparatus according to claim 9, wherein said cubic convolution calculating means includes:

a buffer subunit, configured to store the line convolution value data into the line buffer unit,

a judging subunit, configured to judge whether i in the interpolation point (i, j) is equal to the input column synchronization counter h _ cnt _0 to N, and j is equal to the input row synchronization counter v _ cnt;

and the column convolution calculating subunit is used for extracting effective row convolution value data in the row cache unit and performing convolution with the column convolution value data to obtain the pixel value of the output target interpolation image after the convolution processing if the judgment results of the judging subunit are equal.