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CN115833758A - Broadband Doherty power amplifier based on reactance compensation structure - Google Patents

Broadband Doherty power amplifier based on reactance compensation structure Download PDF

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Publication number
CN115833758A
CN115833758A CN202211541474.8A CN202211541474A CN115833758A CN 115833758 A CN115833758 A CN 115833758A CN 202211541474 A CN202211541474 A CN 202211541474A CN 115833758 A CN115833758 A CN 115833758A
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peak
carrier
power
matching network
amplifier
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余建源
刘国华
尤明晖
宋宇
程知群
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Hangzhou University Of Electronic Science And Technology Fuyang Institute Of Electronic Information Co ltd
Hangzhou Dianzi University
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Hangzhou University Of Electronic Science And Technology Fuyang Institute Of Electronic Information Co ltd
Hangzhou Dianzi University
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Abstract

The invention discloses a broadband Doherty power amplifier based on a reactance compensation structure, which at least comprises a broadband power distributor, a carrier power amplification module, a peak power amplification module and a combined output matching network, wherein the carrier power amplification module is provided with a phase delay line, and a broadband carrier input matching network, a carrier power amplifier and a broadband carrier output matching network are arranged in the carrier power amplification module; the peak power amplifier module is provided with a peak power amplifier phase delay line, a broadband peak input network, a peak power amplifier and a peak output network based on a reactance compensation structure. According to the Doherty power amplifier, a reactance compensation structure is fused into a peak value output matching network of the Doherty power amplifier to change an imaginary part of the impedance of a combining point in power back-off so as to compensate the load impedance of the carrier amplifier in a low-power area, so that the back-off efficiency is enhanced in a wide frequency range without influencing the Doherty load modulation in saturated power.

Description

Broadband Doherty power amplifier based on reactance compensation structure
Technical Field
The invention relates to the field of microwave radio frequency communication, in particular to a radio frequency power amplifier, and particularly relates to a broadband Doherty power amplifier based on a reactance compensation structure.
Background
The radio frequency power amplifier is widely applied to various modern communication systems, such as radars, communication base stations, urban communication networks and the like. Also, with the advent of the 5G era, modulation methods of signals used in communication base stations have become more complex, which has resulted in higher peak-to-average ratios of signals. This requires that the power amplifier maintain high efficiency over a large power back-off range. In addition, in the 5G era, more and more frequency bands are used, so that higher requirements are put on the bandwidth of the power amplifier, and the high efficiency is a continuously pursued index of the power amplifier. The Doherty power amplifier can keep high efficiency under the condition of large power back-off through a load modulation technology, has good linearity, and is a mainstream power amplifier type at present. Referring to fig. 1, two quarter-wave lines are used in the load modulation of the conventional Doherty power amplifier, and the quarter-wave lines are frequency devices, and the impedance value of the quarter-wave lines changes obviously with frequency, so that the wideband of the conventional Doherty power amplifier is greatly limited, and the power back-off range of the conventional Doherty power amplifier is only 6dB, which is far from meeting the requirement of 5G communication. Therefore, how to increase the power back-off range and the bandwidth of the Doherty power amplifier becomes a hot point of research. An existing and effective improvement of the conventional Doherty power amplifier is to perform reactance compensation on a combining point of the power amplifier during power back-off, however, this creates a new problem that the reactance compensation part may possibly affect the impedance of the combining point when the power is saturated, thereby reducing the efficiency of the power amplifier when the power is saturated.
In view of the difficulties in the prior art, research is needed to solve the technical problems in the prior art.
Disclosure of Invention
In order to overcome the difficulties in the prior art, the invention provides a broadband Doherty power amplifier based on a reactance compensation structure, which adopts a method of integrating the reactance compensation structure into a peak amplifier output matching network, a broadband input-output matching network formed by series microstrip lines and a combined output matching network formed by series connection of multistage step microstrip lines to expand the bandwidth.
In order to solve the technical problems in the prior art, the technical scheme of the invention is as follows: a broadband Doherty power amplifier based on a reactance compensation structure at least comprises a broadband power divider, a carrier power amplification module, a peak power amplification module and a combined output matching network, wherein,
the input end of the broadband power distributor is connected with a radio frequency signal, and the output end of the broadband power distributor is respectively connected with the input ends of the carrier power amplification module and the peak power amplifier module;
the carrier power amplifier module is sequentially provided with a carrier phase delay line, a carrier input matching network, a carrier power amplifier and a carrier output matching network;
the peak power amplifier module is sequentially provided with a peak phase delay line, a peak input matching network, a peak power amplifier and a peak output matching network based on a reactance compensation structure; the peak output matching network based on the reactance compensation structure is formed by sequentially connecting microstrip lines TL1, TL2, TL3, TL4 and TL5 in series;
the combined output matching network adopts a series step matching network.
In the technical scheme, the traditional reactance compensation structure of adding a lambda/4 short circuit or a lambda/2 open circuit at the combining point is replaced by the structure of integrating the reactance compensation network into the peak value output matching network to carry out reactance compensation on the impedance of the combining point, so that the impedance of the combining point is kept stable in a wider frequency band, and the working bandwidth of the power amplifier is expanded. To achieve this, the peak output matching network should transform the output impedance of the peak power amplifier module to a purely reactive form at power back-off and achieve proper impedance matching at power saturation. Therefore, a simple broadband structure is realized to replace a traditional 1/4 wavelength line or a reactance compensation network, and on the basis, a broadband Doherty power amplifier under the condition of ensuring the back-off efficiency is provided, and the Doherty power amplifier can work under a 5G frequency band.
As a further improvement scheme, the broadband power divider adopts an asymmetric Wilkinson power divider structure, and the working frequency range is 2.5-3.5 GHz; the percentage of the components is 1:2.
as a further improvement, the combiner output matching network includes a three-section impedance matching microstrip line.
As a further improvement scheme, the input and output matching networks adopt a structure of connecting step microstrip lines in series to carry out broadband impedance matching.
As a further improvement scheme, the carrier input matching network is formed by connecting four microstrip lines in series, the peak input matching network is formed by five microstrip lines, and the characteristic impedances of the microstrip lines of the carrier offset network and the peak offset network are both 50 ohms; at power saturation, the peak output is matched to 50 ohms and the carrier output is used to eliminate the quarter wave impedance inverter to extend bandwidth and reduce size to match to 50 ohms.
As a further improvement, the design process of the peak output matching network based on the reactance compensation structure is as follows:
each transistor is regarded as an ideal current source, the effective loads of the two transistors can be represented by ABCD parameters of respective output matching networks, and the load of a combining point is Z L The ratio of the currents between the peak amplifier and the carrier amplifier is expressed by a numerical value. In the power back-off region, the effective load impedance of the carrier and peaking amplifiers may be expressed as:
Figure BDA0003977871030000041
Z p_low =∞
(30)
wherein ABCD is the transmission matrix of the carrier output matching network at a given frequency. The equation for the voltage and current across the carrier output matching network can be expressed in terms of ABCD parameters as:
Figure BDA0003977871030000042
at the power back-off point, the impedance of the combining point becomes Z L Considering V cn =I cn Z L The carrier load impedance may be expressed as:
Figure BDA0003977871030000043
in the power back-off region, due to V p =V cn =I cn Z cn Thus, the current and voltage output by the carrier amplifier can be expressed as:
V c =AV p +BI cn (33)
I c =CV p +DI cn (34)
wherein, V is p =V cn =I cn Z cn Substitution (5) can result in:
Figure BDA0003977871030000051
from the load modulation relationship, the following relationship can be obtained:
Figure BDA0003977871030000052
substituting (7) into (8) can result in:
Figure BDA0003977871030000053
according to an impedance transformation, Z c Can be expressed as:
Figure BDA0003977871030000054
thus, the output voltage of the carrier amplifier can be expressed as:
Figure BDA0003977871030000055
substituting (11) into (9) can result in:
Figure BDA0003977871030000056
for further derivation, the following relationship is assumed:
Figure BDA0003977871030000057
wherein,
Figure BDA0003977871030000058
is the phase of the peak amplifier output current. The carrier load impedance at saturation power can be obtained by combining (12) and (13):
Figure BDA0003977871030000059
from V p =V cn =I cn Z cn And (5) can obtain:
Figure BDA0003977871030000061
the peak load impedance under the saturated power can be obtained through (9), (12) and (15):
Figure BDA0003977871030000062
to simplify the analysis process, the carrier output matching network is made to be the conventional characteristic impedance Z T The corresponding ABCD matrix is:
Figure BDA0003977871030000063
wherein θ is λ 0 Phase delay of/4 wavelength line, i.e. theta = (pi/2). F/f 0 ). Substituting ABCD in (17) into (4), (14), (16) can obtain:
Figure BDA0003977871030000064
Figure BDA0003977871030000065
Figure BDA0003977871030000066
in general Z L Is 0.5Z 0 ,Z T Is equal to Z 0 Wherein Z is 0 Representing the optimum load impedance of the amplifier, typically 50 ohms. If order
Figure BDA0003977871030000067
And the peak amplifier and the carrier amplifier can realize the same magnitude of output current in the whole frequency band, according to the above (18),
(19) (20) the normalized load impedance Z can be calculated c_low ,Z c_sat ,Z p_sat The results are shown in FIG. 4.
As can be seen in FIG. 4, Z c_low Equal to ideal value 2Z only at the central frequency point 0 When the frequency deviates from the central frequency point more, Z c_low A fast drop, which results in a drop in efficiency at power back-off. Therefore, in order to expand the bandwidth of the power amplifier, Z should be made c_low I.e., the effective resistance of the carrier amplifier at power back-off increases at both low and high frequencies. The invention adopts a novel reactance compensation structure, realizes impedance matching by using a peak amplifier output matching network and simultaneously carries out reactance compensation on a combining point, so that the effective output resistance of the carrier amplifier is close to an ideal value during rollback, thereby achieving the purpose of expanding the bandwidth.
Thus, a two-point matching technique is used to implement a peak output matching network to match the peak amplifier to the optimum impedance Z when the power is saturated 0 And providing proper reactance for the combining point when the power is backed off. In addition, the output matching network of the carrier amplifier is also designed by using a two-point matching technology, so that an impedance inverter in the traditional Doherty structure is omitted, the circuit is simpler, and the limitation of a quarter-wavelength line to the bandwidth is avoided. Fig. five shows a representation of the peak output matching network in ABCD matrix.
When a two-port network has the characteristics of a lossless reciprocal network, its S parameter can be expressed as:
Figure BDA0003977871030000071
the S parameters are converted to ABCD transmission matrix to represent the peak output matching network:
Figure BDA0003977871030000072
Figure BDA0003977871030000073
Figure BDA0003977871030000074
Figure BDA0003977871030000081
wherein, theta 21 Is S 21 The phase of (c).
The system of linear equations for the voltage and current across the peak output matching network can be expressed in terms of ABCD parameters as:
Figure BDA0003977871030000082
in power back-off, the peak amplifier is in off state, and the following formula can be obtained:
Figure BDA0003977871030000083
Figure BDA0003977871030000084
z in the above formula p_low And Z p_sat Can be obtained by load traction, and Z pn_low ,Z pn_sat The peak branch output impedance is set according to design requirements, and in general, the peak branch output impedance is 50 ohms in saturation, and the reactance value required by design is set in power back-off. After these four parameters are determined, S can be obtained by (22) - (25), (27), (28) 11 And theta 21 Thus, the entire S parameter is obtained. Based on the S-parameter, a peak output matching network can be designed. The carrier output matching network S parameters can be obtained in the same way.
According to the analysis, the novel reactance compensation structure is fused into the peak value output matching network, so that the combining point obtains reactance compensation when power is returned, the working bandwidth of the power amplifier is improved, and the impedance of the combining point when power is saturated is not influenced.
As a preferred technical solution, the combined output matching network is formed by multiple sections of series-connected step microstrip lines, and the output bandwidth of the combined output matching network is expanded to a certain extent.
Compared with the prior art, the invention has the following technical effects:
1. the invention adopts a novel reactance compensation structure to replace the traditional reactance compensation structure which adds a lambda/4 short circuit or a lambda/2 open circuit at the combining point to carry out reactance compensation on the impedance of the combining point so as to realize the working broadband of 2.5-3.5 GHz.
2. The impedance inverter after the carrier amplifier outputs the matching network is eliminated by adopting a two-point matching technology, so that the working bandwidth of the power amplifier is expanded while the circuit is simplified.
3. The bandwidth of the working frequency band is improved to a certain extent by adopting multistage series step microstrip lines.
4. The invention can be applied to a power amplifier module of a 5G base station, realizes the working bandwidth of a 4G to 5G frequency band, reduces the overall cost of the power amplifier, and can be well applied to a fifth generation mobile communication system.
Drawings
Fig. 1 is a schematic block diagram of a conventional Doherty power amplifier;
fig. 2 is a schematic block diagram of a wideband Doherty power amplifier of the present invention based on a novel reactance compensation architecture;
FIG. 3 is a Doherty equivalent circuit diagram with the carrier and peaking power amplifiers represented by current sources;
FIG. 4 is a normalized Doherty load impedance for the 0.75 to 1.25 frequency band;
FIG. 5 is a schematic diagram of the novel reactance compensated peak output matching network of the present invention;
fig. 6 is a schematic diagram of a simulation result of characteristics under a large signal of broadband Doherty based on a novel reactance compensation network provided by the invention.
Detailed Description
The following are specific embodiments of the present invention and are further described with reference to the drawings, but the present invention is not limited to these embodiments.
Referring to fig. 2, a schematic block diagram of a wideband Doherty power amplifier based on a novel reactance compensation structure according to an embodiment is shown, and the wideband Doherty power amplifier includes a wideband power divider, a carrier power amplifier module, a peak power amplifier module, and a combiner output matching network based on the novel reactance compensation structure. Compared to the conventional Doherty structure shown in fig. 1, the conventional peak output matching network is replaced with a peak output matching network incorporating a novel reactance compensation structure. The carrier power amplifier module comprises a carrier phase delay line, a carrier input matching network, a carrier power amplifier and a carrier output matching network; the peak power amplifier module comprises a peak phase delay line, a peak input matching network, a peak power amplifier and a novel reactance compensation peak output matching network; the combined output matching network comprises a three-step impedance matching microstrip line. The broadband power divider realizes power distribution on a bandwidth of 2.5GHz to 3.5 GHz. The phase delay lines are added at the input ends of the carrier power amplifier and the peak power amplifier for adjusting the phase of the whole circuit, so that the phases of the output currents of the carrier and the peak power amplifier at the combining point are the same.
In this embodiment, the input and output matching network adopts a structure in which step microstrip lines are connected in series to perform broadband impedance matching, which is beneficial to reducing the Q value of the impedance matching circuit and further expanding the bandwidth. The bias circuit is realized by adopting the conventional technical method in the field, and the characteristic impedance of the microstrip line is Z 0 Ohm; both carrier output and peak output are matched to Z 0 . The carrier power amplifier phase delay line is the same as the peak power amplifier phase delay line, and the characteristic impedance of the line is Z 0 The wide-band impedance transformation line (at the center frequency).
Wherein Z is 0 The optimal load resistance value of the carrier amplifier and the peak amplifier in the B-type mode is obtained.
Referring to fig. 3, the Doherty equivalent method using current source to represent carrier and peak power amplifierA circuit diagram. Each transistor is regarded as an ideal current source, the effective loads of the two transistors can be represented by ABCD parameters of respective output matching networks, and the load of a combining point is Z L And the ratio delta of the currents between the peak amplifier and the carrier amplifier. In the power back-off region, the effective load impedance of the carrier and peaking amplifiers may be expressed as:
Figure BDA0003977871030000111
Z p_low =∞
(58)
wherein ABCD is the transmission matrix of the carrier output matching network at a given frequency. The equations for the voltage and current across the carrier output matching network can be expressed in terms of ABCD parameters as:
Figure BDA0003977871030000112
at the power back-off point, the impedance of the combining point becomes Z L Considering V cn =I cn Z L The carrier load impedance may be expressed as:
Figure BDA0003977871030000113
in the power back-off region, due to V p =V cn =I cn Z cn Thus, the current and voltage output by the carrier amplifier can be expressed as:
V c =AV p +BI cn (61)
I c =CV p +DI cn (62)
wherein, V is p =V cn =I cn Z cn Substitution (5) can result in:
Figure BDA0003977871030000121
from the load modulation relationship, the following relationship can be obtained:
Figure BDA0003977871030000122
substituting (7) into (8) can result in:
Figure BDA0003977871030000123
according to an impedance transformation, Z c Can be expressed as:
Figure BDA0003977871030000124
thus, the output voltage of the carrier amplifier can be expressed as:
Figure BDA0003977871030000125
substituting (11) into (9) can result in:
Figure BDA0003977871030000126
for further derivation, the following relationship is assumed:
Figure BDA0003977871030000127
wherein,
Figure BDA0003977871030000128
is the phase of the peak amplifier output current. The carrier load impedance at saturation power can be obtained by combining (12) and (13):
Figure BDA0003977871030000131
from V p =V cn =I cn Z cn And (5) can obtain:
Figure BDA0003977871030000132
the peak load impedance under the saturated power can be obtained through (9), (12) and (15):
Figure BDA0003977871030000133
to simplify the analysis process, the carrier output matching network is made to be the conventional characteristic impedance Z T The corresponding ABCD matrix is:
Figure BDA0003977871030000134
wherein, theta is lambda 0 Phase delay of/4 wavelength line, i.e. theta = (pi/2). F/f 0 ). Substituting ABCD in (17) into (4), (14), (16) can obtain:
Figure BDA0003977871030000135
Figure BDA0003977871030000136
Figure BDA0003977871030000137
in general Z L Is 0.5Z 0 ,Z T Is equal to Z 0 Wherein Z is 0 Indicating the optimum load resistance of an amplifierThe reactance is typically 50 ohms. If order
Figure BDA0003977871030000138
And the peak amplifier and the carrier amplifier can realize the same magnitude of output current in the whole frequency band, according to the above (18),
(19) (20) the normalized load impedance Z can be calculated c_low ,Z c_sat ,Z p_sat The results are shown in FIG. 4.
As can be seen in FIG. 4, Z c_low Equal to ideal value 2Z only at the central frequency point 0 When the frequency deviates from the central frequency point more, Z c_low A fast drop, which results in a drop in efficiency at power back-off. Therefore, in order to expand the bandwidth of the power amplifier, Z should be made c_low I.e., the effective resistance of the carrier amplifier at power back-off increases at both low and high frequencies. The invention adopts a novel reactance compensation structure, realizes impedance matching by using a peak amplifier output matching network and simultaneously carries out reactance compensation on a combining point, so that the effective output resistance of the carrier amplifier is close to an ideal value during rollback, thereby achieving the purpose of expanding the bandwidth.
Thus, a two-point matching technique is used to implement a peak output matching network to match the peak amplifier to the optimum impedance Z when the power is saturated 0 And providing proper reactance for the combining point when the power is backed off. In addition, the output matching network of the carrier amplifier is also designed by using a two-point matching technology, so that an impedance inverter in the traditional Doherty structure is omitted, the circuit is simpler, and the limitation of a quarter-wavelength line on the bandwidth is avoided. Fig. 5 shows a representation of the peak output matching network in ABCD matrix.
When a two-port network has the characteristics of a lossless reciprocal network, its S parameter can be expressed as:
Figure BDA0003977871030000141
the S parameters are converted to ABCD transmission matrix to represent the peak output matching network:
Figure BDA0003977871030000142
Figure BDA0003977871030000143
Figure BDA0003977871030000151
Figure BDA0003977871030000152
wherein, theta 21 Is S 21 The phase of (c).
The system of linear equations for the voltage and current across the peak output matching network can be expressed in terms of ABCD parameters as:
Figure BDA0003977871030000153
in power back-off, the peak amplifier is in off state, and the following formula can be obtained:
Figure BDA0003977871030000154
Figure BDA0003977871030000155
z in the above formula p_low And Z p_sat Can be obtained by load traction, and Z pn_low ,Z pn_sat The peak branch output impedance is set according to design requirements, and in general, the peak branch output impedance is 50 ohms in saturation, and the reactance value required by design is set in power back-off. After determining these four parameters, one canS was obtained by (22) to (25), (27) and (28) 11 And theta 21 Thus, the entire S parameter is obtained. Based on the S-parameter, a peak output matching network can be designed. The carrier output matching network S parameters can be obtained in the same way.
According to the analysis, the novel reactance compensation structure is fused into the peak value output matching network, so that the combining point obtains reactance compensation when power is returned, the working bandwidth of the power amplifier is improved, and the impedance of the combining point when power is saturated is not influenced.
The invention also discloses a design method of the broadband Doherty power amplifier based on the reactance compensation network, which comprises the following design steps of:
1, the working band of the DPA to be designed and the expected backoff range are first specified.
And 2, calculating the saturation current ratio required by the peak amplifier and the carrier amplifier on the basis of determining the back-off range. Since the larger the peak amplifier to carrier amplifier saturation current ratio, the earlier the effective output impedance of the carrier amplifier can reach the saturation efficiency point, it is generally set to be greater than 1, i.e., the back-off range exceeds 6dB.
And 3, selecting a proper transistor on the basis of determining the saturation current ratio, and designing a power divider matched with the saturation current ratio.
And 4, reasonably designing an input/output impedance matching network of the carrier amplifier and an input/output matching network of the peak amplifier according to a transistor data manual. In the process, the design of the output matching network of the peak amplifier needs to be considered particularly, so that the output matching network can give proper reactive reactance compensation to the combining point in a power back-off region, and the matching of the optimal output impedance of the peak amplifier to the 25 ohm resistance of the combining point is completed at the power saturation position.
We use a two-point matching technique to achieve the effect that the peak amplifier needs to achieve.
And 6, finally, designing a combined output matching network according to the impedance value of the combined point by utilizing the serial microstrip line structure, so that the impedance is converted into 50 ohms which can be output and measured.
Referring to fig. 6, a schematic diagram of the simulation result of the characteristics under large signal of the broadband Doherty based on the novel reactance compensation network in the present embodiment is shown. The novel reactance-compensated peak output matching network is used for carrying out reactance compensation on the combining point of the Doherty power amplifier, so that the effective output impedance of a carrier wave is closer to an ideal state in a wider frequency band during power back-off, and the Doherty power amplifier realizes high efficiency and high back-off in a wider frequency band. The embodiment realizes the working bandwidth of 2.5GHz to 3.5GHz and can be simultaneously used for 4G and 5G communication. As can be seen from fig. 6, in the operating frequency band, the saturated output power is 44.2dBm-46.4dBm, the saturated drain efficiency is 55% -75%, and the 9dB back-off efficiency is 45% -55%.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and these modifications or substitutions do not depart from the spirit of the corresponding technical solutions of the embodiments of the present invention.

Claims (8)

1. A broadband Doherty power amplifier based on a reactance compensation structure is characterized by at least comprising a broadband power divider, a carrier power amplification module, a peak power amplification module and a combined output matching network, wherein,
the input end of the broadband power distributor is connected with a radio frequency signal, and the output end of the broadband power distributor is respectively connected with the input ends of the carrier power amplification module and the peak power amplifier module;
the carrier power amplifier module is sequentially provided with a carrier phase delay line, a carrier input matching network, a carrier power amplifier and a carrier output matching network;
the peak power amplifier module is sequentially provided with a peak phase delay line, a peak input matching network, a peak power amplifier and a peak output matching network based on a reactance compensation structure; the peak output matching network based on the reactance compensation structure is formed by sequentially connecting microstrip lines TL1, TL2, TL3, TL4 and TL5 in series;
the combined output matching network adopts a series step matching network.
2. The broadband Doherty power amplifier based on the reactance compensation structure as claimed in claim 1, wherein the broadband power divider adopts an asymmetric Wilkinson power divider structure, and the working frequency band is 2.5-3.5 GHz; the percentage of the components is 1:2.
3. the reactance compensation structure-based wideband Doherty power amplifier of claim 1 wherein the combining output matching network comprises a three-section impedance matching microstrip line.
4. The broadband Doherty power amplifier based on the reactance compensation structure of claim 1, wherein the input and output matching networks are all in broadband impedance matching by adopting a series connection structure of step microstrip lines.
5. The broadband Doherty power amplifier based on the reactance compensation structure of claim 4, wherein the carrier input matching network is composed of four microstrip lines connected in series, the peak input matching network is composed of five microstrip lines, and the characteristic impedances of the microstrip lines of the carrier offset network and the peak offset network are both 50 ohms; at power saturation, the peak output is matched to 50 ohms and the carrier output is used to eliminate the quarter wave impedance inverter to extend bandwidth and reduce size to match to 50 ohms.
6. The broadband Doherty power amplifier based on a reactance compensation structure of claim 1, wherein the peak output matching network based on a reactance compensation structure is designed as follows:
considering each transistor as an ideal current source, two crystalsThe effective load of the tube is represented by ABCD parameters of respective output matching networks, and the load of the combining point is Z L The ratio δ of the currents between the peak amplifier and the carrier amplifier; in the power back-off region, the effective load impedance of the carrier and peaking amplifiers is expressed as:
Figure FDA0003977871020000021
Z p_low =∞ (2)
wherein ABCD is a transmission matrix of the carrier output matching network at a given frequency; the equations of voltage and current on both sides of the carrier output matching network are expressed as ABCD parameters:
Figure FDA0003977871020000022
at the power back-off point, the impedance of the combining point becomes Z L In view of V cn =I cn Z L The carrier load impedance is expressed as:
Figure FDA0003977871020000023
in the power back-off region, due to V p =V cn =I cn Z cn Thus, the current and voltage output by the carrier amplifier are expressed as:
V c =AV p +BI cn (5)
I c =CV p +DI cn (6)
wherein, V is p =V cn =I cn Z cn Substitution (5) can result in:
Figure FDA0003977871020000031
according to the load modulation relationship, the following relationship is obtained:
Figure FDA0003977871020000032
substituting (7) into (8) can result in:
Figure FDA0003977871020000033
according to an impedance transformation, Z c Can be expressed as:
Figure FDA0003977871020000034
thus, the output voltage of the carrier amplifier is represented as:
Figure FDA0003977871020000035
substituting (11) into (9) can yield:
Figure FDA0003977871020000036
for further derivation, the following relationship is assumed:
Figure FDA0003977871020000037
wherein,
Figure FDA0003977871020000038
is the phase of the peak amplifier output current; combining (12) and (13) to obtain carrier load impedance under saturation power as follows:
Figure FDA0003977871020000041
from V p =V cn =I cn Z cn And (5) obtaining:
Figure FDA0003977871020000042
and the peak load impedance under the saturated power is obtained from (9), (12) and (15):
Figure FDA0003977871020000043
to simplify the analysis process, the carrier output matching network is made to be the conventional characteristic impedance Z T The corresponding ABCD matrix is:
Figure FDA0003977871020000044
wherein, theta is lambda 0 Phase delay of/4 wavelength line, i.e. theta = (pi/2). F/f 0 ) (ii) a Substituting ABCD in (17) into (4), (14), (16) to obtain:
Figure FDA0003977871020000045
Figure FDA0003977871020000046
Figure FDA0003977871020000047
Z L is 0.5Z 0 ,Z T Is equal to Z 0 Wherein Z is 0 Represents the optimal load impedance of the amplifier, with a value of 50 ohms; if order
Figure FDA0003977871020000048
And the peak amplifier and the carrier amplifier can realize the output current with the same amplitude in the whole frequency band, and the normalized load impedance Z is obtained by calculation according to the above (18), (19) and (20) c_low ,Z c_sat ,Z p_sat Wherein Z is c_low Equal to ideal value 2Z only at the central frequency point 0 When the frequency deviates from the central frequency point more, Z c_low A fast drop, which results in a drop in efficiency at power back-off; therefore, in order to expand the bandwidth of the power amplifier, Z should be made c_low That is, the effective resistance of the carrier amplifier at power back-off increases at both low and high frequencies; the reactance compensation structure is adopted, impedance matching is realized by the peak amplifier output matching network, and meanwhile reactance compensation is carried out on the combining point, so that the effective output resistance of the carrier amplifier is close to an ideal value during rollback, and the purpose of expanding the bandwidth is achieved.
7. The broadband Doherty power amplifier of claim 6 and based on the reactance compensation structure, wherein the peak output matching network is implemented using a two-point matching technique to match the peak amplifier to the optimal impedance Z when the power is saturated 0 Providing a proper reactance for the combining point when the power is returned; meanwhile, the output matching network of the carrier amplifier is also designed by using a two-point matching technology, so that the circuit is simpler and the limitation of a quarter-wavelength line on the bandwidth is avoided.
8. The reactance compensation structure-based wideband Doherty power amplifier of claim 6 wherein the peak output matching network is represented in the form of an ABCD matrix;
when a two-port network has the characteristics of a lossless reciprocal network, the S parameter is expressed as:
Figure FDA0003977871020000051
the S parameters are converted to ABCD transmission matrix to represent the peak output matching network:
Figure FDA0003977871020000052
Figure FDA0003977871020000053
Figure FDA0003977871020000061
Figure FDA0003977871020000062
wherein, theta 21 Is S 21 The phase of (d);
the system of linear equations for the voltage and current across the peak output matching network is expressed in terms of ABCD parameters as:
Figure FDA0003977871020000063
in power back-off, the peak amplifier is in off state, and the following formula is obtained:
Figure FDA0003977871020000064
Figure FDA0003977871020000065
z in the above formula p_low And Z p_sat Obtained by traction of a load, and Z pn_low ,Z pn_sat Setting according to design requirements, wherein the output impedance of the peak branch circuit is 50 ohms in saturation, and the reactance value required by design is set in power back-off; after these four parameters are determined, S can be obtained by (22) - (25), (27), (28) 11 And theta 21 Obtaining the whole S parameter; and designing a peak output matching network and a carrier output matching network based on the S parameter.
CN202211541474.8A 2022-12-02 2022-12-02 Broadband Doherty power amplifier based on reactance compensation structure Pending CN115833758A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116090385A (en) * 2023-03-31 2023-05-09 南京米乐为微电子科技有限公司 Matching network design method and device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116090385A (en) * 2023-03-31 2023-05-09 南京米乐为微电子科技有限公司 Matching network design method and device

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